Cirrus Logic CS4340A User Manual
CS4340A
24-Bit, 192 kHz Stereo DAC for Audio
Features
! 101 dB Dynamic Range
! -91 dB THD+N
! +3.3 V or +5 V Power Supply
! 50 mW with 3.3 V supply
! Low Clock Jitter Sensitivity
! Filtered Line Level Outputs
! On-Chip Digital De-emphasis for 44.1 kHz
! Popguard
and Pops
! Up to 200 kHz Sample Rates
! Automatic Mode Detection for Sample Rates
between 4 and 200 kHz
! Pin Compatible with the CS4340
®
Technology for Control of Clicks
Description
The CS4340A is a complete stereo digital-to-analog system including digital interpolation, fourth-order deltasigma digital-to-analog conversion, digital de-emphasis
and switched capacitor analog filtering. The advantages
of this architecture include: ideal differential linearity, no
distortion mechanisms due to resistor matching errors,
no linearity drift over time and temperature, and a high
tolerance to clock jitter.
The CS4340A accepts data at all standard audio sample
rates up to 192 kHz, consumes very little power, operates over a wide power supply range and is pin
compatible with the CS4340, as described in section 3.1.
These features are ideal for DVD audio players.
ORDERING INFORMATION
CS4340A-KS 16-pin SOIC, -10 to 70 °C
CS4340A-KSZ, Lead Free, 16-pin SOIC, -10 to 70 °C
CDB4340A Evaluation Board
RST
LRCK
SDIN
DIF0 DIF1
http://www.cirrus.com
SCLK
Serial
Audio
Interface
DEM
De-emphasis
Inter polation
Filter
Inter polation
Filter
Copyright © Cirrus Logic, Inc. 2005
∆Σ
DAC
∆Σ
DAC
MCLK
(All Rights Reserved)
MUTEC
External
Mute C ontrol
Analog Filter
Analog Filter
AOUT L
AOUTR
JULY '05
DS590F2
1
TABLE OF CONTENTS
1. PIN DESCRIPTION ....................................................................................................................4
2. TYPICAL CONNECTION DIAGRAM......................................................................................5
3. APPLICATIONS .........................................................................................................................6
3.1 Upgrading from the CS4340 to the CS4340A .....................................................................6
3.2 Sample Rate Range/Operational Mode Detect ....................................................................6
3.3 System Clocking ..................................................................................................................6
3.4 Digital Interface Format.......................................................................................................7
3.5 De-Emphasis........................................................................................................................8
3.6 Power-up Sequence..............................................................................................................9
3.7 Popguard® Transient Control...............................................................................................9
3.7.1 Power-up.....................................................................................................................9
3.7.2 Power-down ................................................................................................................9
3.7.3 Discharge Time...........................................................................................................9
3.8 Mute Control......................................................................................................................10
3.9 Grounding and Power Supply Arrangements ....................................................................10
4. CHARACTERISTICS AND SPECIFICATIONS.....................................................................11
RECOMMENDED OPERATING SPECIFICATION .................................................................11
ABSOLUTE MAXIMUM RATINGS...........................................................................................11
ANALOG CHARACTERISTICS (CS4340A-KS/KSZ)...............................................................12
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE.......................14
SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE ..........................................17
DC ELECTRICAL CHARACTERISTICS ...................................................................................18
DIGITAL INTERFACE SPECIFICATIONS................................................................................18
DIGITAL INPUT CHARACTERISTICS .....................................................................................18
5. PARAMETER DEFINITIONS..................................................................................................19
6. REFERENCES...........................................................................................................................19
7. PACKAGE DIMENSIONS.......................................................................................................20
THERMAL CHARACTERISTICS AND SPECIFICATIONS ....................................................20
8. REVISION HISTORY...............................................................................................................21
CS4340A
2 DS590F2
LIST OF FIGURES
CS4340A
Figure 1. Typical Connection Diagram..........................................................................................................5
Figure 2. CS4340A Format 0 - I
Figure 3. CS4340A Format 1 - Left Justified up to 24-Bit Data.....................................................................8
Figure 4. CS4340A Format 2 - Right Justified, 24-Bit Data ..........................................................................8
Figure 5. CS4340A Format 3 - Right Justified, 16-Bit Data ..........................................................................8
Figure 6. De-Emphasis Curve.......................................................................................................................8
Figure 7. Output Test Load.........................................................................................................................13
Figure 8. Maximum Loading........................................................................................................................13
Figure 9. Single-Speed Stopband Rejection...............................................................................................14
Figure 10. Single-Speed Transition Band...................................................................................................14
Figure 11. Single-Speed Transition Band (Detail).......................................................................................15
Figure 12. Single-Speed Passband Ripple.................................................................................................15
Figure 13. Double-Speed Stopband Rejection............................................................................................15
Figure 14. Double-Speed Transition Band..................................................................................................15
Figure 15. Double-Speed Transition Band (Detail).....................................................................................16
Figure 16. Double-Speed Passband Ripple................................................................................................16
Figure 17. Serial Input Timing.....................................................................................................................17
LIST OF TABLES
Table 1. CS4340A Auto-Detect.....................................................................................................................6
Table 2. Single-Speed Mode Standard Frequencies........... ... ... ... .... ... ... ................................................ ......7
Table 3. Double-Speed Mode Standard Frequencies...................................................................................7
Table 4. Quad-Speed Mode Standard Frequencies .....................................................................................7
Table 5. Digital Interface Format - DIF1 and DIF0........................................................................................7
Table 6. De-Emphasis Control......................................................................................................................8
2
S up to 24-Bit Data....................................................................................7
DS590F2 3
1. PIN DESCRIPTION
CS4340A
SDIN AOUTL
SCLK VA
LRCK AGND
MCLK AOUTR
DIF1 REF_GND
DIF0 VQ
DEM FILT+
Pin Name # Pin Description
RST
SDIN
SCLK
LRCK
MCLK
DIF1
DIF0
DEM
FILT+
VQ
REF_GND
AOUTR
AOUTL
AGND
VA
MUTEC
Reset (Input) - Powers down device.
1
Serial Audio Data (Input) - Input for two’s complement serial audio data.
2
Serial Clock (Input) -Serial clock for the serial audio interface.
3
Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on the
4
serial audio data line.
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
5
Digital Interface Format (Input) - Defines the required relationship between the Left Right
6
Clock, Serial Clock and Serial Audio Data.
7
De-emphasis Control (Input) - Selects the standard 15µs/50µs digital de-emphasis filter
8
response for the 44.1 kHz sample rate.
Positive Voltage Reference (Output) - Positive voltage reference for the internal
9
sampling circuits.
Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.
10
Reference Ground (Input) - Ground reference for the internal sampling circuits.
11
Analog Outputs (Output) - The full scale analog output level is specified in the
12
Analog Characteristics table.
15
Analog Ground (Input)
13
14 Power (Input) - Positive power for the analog, digital and serial audio interface sections.
Mute Control (Output) - Control signal for an optional mute circuit.
16
RST MUTEC
161
152
143
134
125
116
107
98
4 DS590F2
2. TYPICAL CONNECTION DIAGRAM
CS4340A
Serial Audio
Data
Processor
External Clock
Mode
Config urati on
1µF
560
560
+3.3V o r + 5 .0 V
Ω
C
+
1µF
0.1 µF
Ω
C
C=
OPTIONAL
MUTE
CIRCUIT
+ 560
R
L
π F
560
4
SRL
R
L
R
L
Left
Audio
Output
Right
Audio
Output
+
.1 µF
+
+
Ω
1µF
+
Ω
14
VA
2
SDIN
3
SCLK
4
LRCK
CS4340A
5
MCLK
6
DIF1
7
DIF0
8
DEM
1
RST
AGND
13
0.1µF
AOUT L
MUTEC
FILT+
VQ
REF_GND
AOUTR
3.3 µF
15
10 k
16
9
10
11
3.3 µF
12
10 k
Figure 1. Typical Connection Diagram
DS590F2 5
CS4340A
3. APPLICATIONS
3.1 Upgrading from the CS4340 to the CS4340A
The CS4340A is pin and functionally compatible with all CS4340 designs, operating at the standard audio
sample rates, that use pin 3 as a serial clock input. In addition to the features of the CS4340, the CS4340A
supports standard sample rates up to 192 kHz, as well as automatic mode detection for sample rates between 4 and 200 kHz. The automatic mode detection feature allows sample rate changes between single,
double and quad-speed modes without external intervention.
The CS4340A does not support an internal serial clock mode, sample rates between 50 kHz and 84 kHz,
de-emphasis for 32 and 48 kHz, or 2.7 V operation as does the CS4340.
3.2 Sample Rate Range/Operational Mode Detect
The device operates in one of three operational modes. It will auto-detect the correct mode when the input
sample rate (Fs), defined by the LRCK frequency, falls within one of the ranges illustrated in Table 1. Sample rates outside the specified range for each mode are not supported.
Input Sample Rate (FS)MODE
4 kHz - 50 kHz Single-Speed Mode
84 kHz - 100 kHz Double-Speed Mode
170 kHz - 200 kHz Quad-Speed Mode
Table 1. CS4340A Auto-Detect
3.3 System Clocking
The device requires external generation of the master (MCLK), left/right (LRCK) and serial (SCLK)
clocks. The LRCK, defined also as the input sample rate (Fs), must be synchronously derived from the
MCLK according to specified ratios. The specified ratios of MCLK to LRCK, along with several standard
audio sample rates and the required MCLK frequency, are illustrated in Tables 2-4.
6 DS590F2
CS4340A
Sample Rate
(kHz)
256x 384x 512x 768x
32 8.1920 12.2880 16.3840 24.5760
44.1 11.2896 16.9344 22.5792 33.8688
48 12.2880 18.4320 24.5760 36.8640
Table 2. Single-Speed Mode S tandard Frequencies
Sample Rate
(kHz)
88.2 11.2896 16.9344 22.5792 33.8688
96 12.2880 18.4320 24.5760 36.8640
Table 3. Double-Speed Mode Standard Frequencies
Sample Rate
(kHz)
176.4 22.5792 33.8688
192 24.5760 36.8640
Table 4. Quad-Speed Mode Standard Frequencies
3.4 Digital Interface Format
MCLK (MHz)
MCLK (MHz)
128x 192x 256x 384x
MCLK (MHz)
128x 192x
The device will accept audio samples in several digital interface formats as illustrated in Table 5. The desired format is selected via the DIF1 and DIF0 pins. For an illustration of the required relationship between
LRCK, SCLK and SDIN, see Figures 2-5.
DIF1 DIF0 DESCRIPTION FORMAT FIGURE
00
01
10
11
LRCK
SCLK
SDIN +3 +2 +1+5 +4
MSB
-1 -2 -3 -4 -5
I2S, up to 24-bit data
Left Justified, up to 24-bit data
Right Justified, 24-bit Data
Right Justified, 16-bit Data
Table 5. Digital Interface Format - DIF1 and DIF0
Left C hannel
LSB
MSB LSB
-1 -2 -3 -4
Figure 2. CS4340A Format 0 - I2S up to 24-Bit Data
02
13
24
35
Right Channel
+3 +2 +1+5 +4
DS590F2 7
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