CATALYST CAT5111 Service Manual

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CAT5111
100-Tap Digitally Programmable Potentiometer (DPP™) with Buffered Wiper
FEATURES
APPLICATIONS
N
E
G
F
O
R
L
A
H
L
E
A
E
E
E
E
TM
R
D
F
100-position linear taper potentiometer
Non-volatile NVRAM wiper storage;
buffered wiper
Low power CMOS technology
Increment up/down serial interface
Ω,Ω,
Resistance values: 10k
Available in PDIP, SOIC, TSSOP and MSOP packages
Ω, 50k
Ω,Ω,
and 100k
ΩΩ
ΩΩ
DESCRIPTION
The CAT5111 is a single digitally programmable potentiometer (DPP™) designed as a electronic replacement for mechanical potentiometers and trim pots. Ideal for automated adjustments on high volume production lines, they are also well suited for applications where equipment requiring periodic adjustment is either difficult to access or located in a hazardous or remote environment.
The CAT5111 contains a 100-tap series resistor array connected between two terminals RH and RL. An up/ down counter and decoder that are controlled by three input pins, determines which tap is connected to the wiper, RWB. The CAT5111 wiper is buffered by an op amp that operates rail to rail. The wiper setting, stored in non-volatile NVRAM memory, is not lost when the device is powered down and is automatically recalled when power is returned. The wiper can be adjusted to test new
Automated product calibration
Remote control adjustments
Offset, gain and zero control
Tamper-proof calibrations
Contrast, brightness and volume controls
Motor controls and feedback systems
Programmable analog functions
system values without effecting the stored setting. Wiper-control of the CAT5111 is accomplished with three input control pins, CS, U/D, and INC. The INC input increments the wiper in the direction which is determined by the logic state of the U/D input. The CS input is used to select the device and also store the wiper position prior to power down.
The digitally programmable potentiometer can be used as a buffered voltage divider. For applications where the potentiometer is used as a 2-terminal variable resistor, please refer to the CAT5113. The buffered wiper of the CAT5111 is not compatible with that application. DPPs bring variability and programmability to a broad range of applications and are used primarily to control, regulate or adjust a characteristic or parameter of an analog circuit.
FUNCTIONAL DIAGRAM
V
CC
U/D
INC
CS
© 2004 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice
Control
and
Memory
Power On Recall
GND
R
H
R
H
+
R
WB
+
-
R
WB
R
L
Electronic Potentiometer
Implementation
R
L
Doc. No. 2008, Rev. O1
CAT5111
PIN CONFIGURATION
PDIP Package (P, L)
1
INC
2
U/D
3
R
H
GND
GND
4
SOIC Package (S, V)
1
INC
2
U/D
3
R
H
4
8 7 6 5
8 7 6 5
V
CS
R R
V
CS
R R
CC
L WB
CC
L WB
TSSOP Package (U, Y)
1
CS
V
2
CC
3
INC
4
U/D
MSOP Package (R, Z)
1
INC
2
U/D
3
R
H
GND
4
R
8
L
7
R
WB
6
GND
5
R
H
8
V
CC
7
CS
6
R
L
5
R
WB
PIN DESCRIPTIONS
INCINC
INC: Increment Control Input
INCINC
The INC input (on the falling edge) moves the wiper in the up or down direction determined by the condition of the U/D input.
DD
U/
D: Up/Down Control Input
DD
The U/D input controls the direction of the wiper movement. When in a high state and CS is low, any high­to-low transition on INC will cause the wiper to move one increment toward the RH terminal. When in a low state and CS is low, any high-to-low transition on INC will cause the wiper to move one increment towards the RL terminal.
R
High End Potentiometer Terminal
H:
RH is the high end terminal of the potentiometer. It is not required that this terminal be connected to a potential greater than the RL terminal. Voltage applied to the R terminal cannot exceed the supply voltage, VCC or go below ground, GND.
RWB: Wiper Potentiometer Terminal (Buffered)
RWB is the buffered wiper terminal of the potentiometer. Its position on the resistor array is controlled by the control inputs, INC, U/D and CS.
RL: Low End Potentiometer Terminal
RL is the low end terminal of the potentiometer. It is not required that this terminal be connected to a potential less than the RH terminal. Voltage applied to the R terminal cannot exceed the supply voltage, VCC or go below ground, GND. RL and RH are electrically interchangeable.
CSCS
CS: Chip Select
CSCS
The chip select input is used to activate the control input
PIN FUNCTIONS
Pin Name Function
INC Increment Control U/D Up/Down Control R
H
Potentiometer High Terminal GND Ground R
WB
R
L
Buffered Wiper Terminal
Potentiometer Low Terminal CS Chip Select V
CC
Supply Voltage
of the CAT5111 and is active low. When in a high state, activity on the INC and U/D inputs will not affect or change the position of the wiper.
DEVICE OPERATION
The CAT5111 operates like a digitally controlled potentiometer with RH and RL equivalent to the high and low terminals and RWB equivalent to the mechanical potentiometer's wiper. There are 100 available tap positions including the resistor end points, RH and RL. There are 99 resistor elements connected in series between the RH and RL terminals. The wiper terminal is connected to one of the 100 taps and controlled by three inputs, INC, U/D and CS. These inputs control a seven­bit up/down counter whose output is decoded to select the wiper position. The selected wiper position can be stored in nonvolatile memory using the INC and CS inputs.
H
With CS set LOW the CAT5111 is selected and will respond to the U/D and INC inputs. HIGH to LOW transitions on INC wil increment or decrement the wiper (depending on the state of the U/D input and seven-bit counter). The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. When the CAT5111 is powered-down, the last stored wiper counter position is maintained in the nonvolatile memory. When power is restored, the contents of the memory are
L
recalled and the counter is set to the value stored. With INC set low, the CAT5111 may be de-selected
and powered down without storing the current wiper position in nonvolatile memory. This allows the system to always power up to a preset value stored in nonvolatile memory.
Doc. No. 2008, Rev. O
2
CAT5111
OPERATING MODES
INCCC CSCC U/DC Operation
High to Low Low High Wiper toward R High to Low Low Low Wiper toward R
H L
High Low to High X Store Wiper Position Low Low to High X No Store, Return to Standby X High X Standby
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
VCC to GND –0.5V to +7V
Inputs
CS to GND 0.5V to V INC to GND 0.5V to V
U/D to GND –0.5V to V RH to GND –0.5V to V RL to GND –0.5V to V RWB to GND –0.5V to V
RELIABILITY CHARACTERISTICS
CC CC CC CC CC CC
+0.5V +0.5V +0.5V +0.5V +0.5V +0.5V
Operating Ambient Temperature
Commercial (‘C’ or Blank suffix) 0°C to +70°C
Industrial (‘I’ suffix) – 40°C to +85°C Junction Temperature +150°C Storage Temperature –65°C to +150°C Lead Soldering (10 sec max) +300°C
* Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. Absolute Maximum Ratings are limited values applied individually while other parameters are within specified operating conditions, and functional operation at any of these conditions is NOT implied. Device performance and reliability may be impaired by exposure to absolute rating conditions for extended periods of time.
R
H
C
H
C
L
R
wi
R
WB
C
W
Potentiometer
R
L
Equivalent Circuit
Symbol Parameter Test Method Min Typ Max Units
(1)
V I T N
ZAP
LTH
DR END
(1)(2)
ESD Susceptibility MIL-STD-883, Test Method 3015 2000 Volts Latch-Up JEDEC Standard 17 100 mA Data Retention MIL-STD-883, Test Method 1008 100 Years Endurance MIL-STD-883, Test Method 1003 1,000,000 Stores
DC Electrical Characteristics: VCC = +2.5V to +6.0V unless otherwise specified
Power Supply
Symbol Parameter Conditions Min Typ Max Units
V
CC
I
CC1
I
CC2
ISB
(2)
1
Operating Voltage Range 2.5 6.0 V Supply Current (Increment) VCC = 6V, f = 1MHz, IW=0 ——200 µA
= 6V, f = 250kHz, IW=0 ——100
V
CC
Supply Current (Write) Programming, VCC = 6V ——1mA
VCC = 3V ——500 µA
Supply Current (Standby) CS=VCC-0.3V 75 150 µA
U/D, INC=VCC-0.3V or GND
Logic Inputs
Symbol Parameter Conditions Min Typ Max Units
I
IH
I
IL
V
IH1
V
IL1
V
IH2
V
IL2
Input Leakage Current VIN = V
CC
——10 µA Input Leakage Current VIN = 0V ——–10 µA TTL High Level Input Voltage 4.5V ≤ VCC 5.5V 2 V
CC
V
TTL Low Level Input Voltage 0 0.8 V CMOS High Level Input Voltage 2.5V ≤ VCC 6V VCC x 0.7 VCC + 0.3 V CMOS Low Level Input Voltage -0.3 VCC x 0.2 V
NOTES: (1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC + 1V
=source or sink
(3) I
W
(4) These parameters are periodically sampled and are not 100% tested.
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Doc. No. 2008, Rev. O
CAT5111
Potentiometer Parameters
Symbol Parameter Conditions Min Typ Max Units R
POT
Potentiometer Resistance -10 Device 10
-50 Device 50 k
-00 Device 100
Pot Resistance Tolerance ±20 % V V
RH
RL
Voltage on RH pin 0 V
Voltage on RL pin 0 V
CC CC
V
V
Resolution 1 % INL Integral Linearity Error IW 2µA 0.5 1 LSB DNL Differential Linearity Error IW 2µA 0.25 0.5 LSB R
OUT
I
OUT
TC
RPOT
TC
RATIO
R
ISO
CRH/CRL/CRW
Buffer Output Resistance .05V
Buffer Output Current .05V
V
CC
CC
.95VCC, VCC=5V 1
WB
VWB≤ .95VCC, VCC=5V 3 mA
TC of Pot Resistance 300 ppm/oC
Ratiometric TC TBD ppm/oC
Isolation Resistance TBD
Potentiometer Capacitances 8/8/25 pF fc Frequency Response Passive Attenuator, 10k 1.7 MHz V
WB(SWING)
Output Voltage Range I
100µA, VCC=5V 0.01V
OUT
CC
.99V
CC
Doc. No. 2008, Rev. O
4
AC CONDITIONS OF TEST
VCC Range 2.5V ≤ VCC 6V
CAT5111
Input Pulse Levels 0.2VCC to 0.7V
CC
Input Rise and Fall Times 10ns Input Reference Levels 0.5V
CC
AC OPERATING CHARACTERISTICS:
VCC = +2.5V to +6.0V, VH = VCC, VL = 0V, unless otherwise specified
Symbol Parameter Min Typ
t
CI
t
DI
t
ID
t
IL
t
IH
t
IC
t
CPH
t
CPH
t
IW
t
CYC
t
R, tF
t
PU
t
WR
(2)
(2)
CS to INC Setup 100 ——ns U/D to INC Setup 50 ——ns U/D to INC Hold 100 ——ns
INC LOW Period 250 ——ns INC HIGH Period 250 ——ns INC Inactive to CS Inactive 1 ——µs CS Deselect Time (NO STORE) 100 ——ns CS Deselect Time (STORE) 10 ——ms INC to V
Change 15µs
OUT
INC Cycle Time 1 ——µs INC Input Rise and Fall Time —— 500 µs
Power-up to Wiper Stable —— 1 msec Store Cycle 510ms
(1)
Max Units
A. C. TIMING
CS
t
t
CI
CYC
t
IL
t
IH
t
IC
INC
tID
tDI
U/D
t
IW
R
WB
(1) Typical values are for TA=25˚C and nominal supply voltage. (2) This parameter is periodically sampled and not 100% tested. (3) MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
(store)
t
CPH
90% 90%
t
F
10%
t
R
(3)
MI
5
Doc. No. 2008, Rev. O
CAT5111
ORDERING INFORMATION
Prefix Device # Suffix
CAT
Optional Company ID
5111
Product Number
5111: Buffered 5113: Unbuffered
S
I
-10
Resistance
-10: 10kohms
-50: 50kohms
-00: 100kohms
TE13
Tape & Reel
SOIC: 2000/Reel TSSOP: 2000/Reel MSOP: 2500/Reel
Package
P: PDIP S: SOIC U: TSSOP R:
MSOP
L: PDIP (Lead free, Halogen free) V: SOIC (Lead free, Halogen free) Y: TSSOP (Lead free, Halogen free) Z: MSOP (Lead free, Halogen free)
Notes: (1) The device used in the above example is a CAT5111 SI-10TE13 (SOIC, 10K Ohms, Industrial Temperature, Tape & Reel)
Doc. No. 2008, Rev. O
6
REVISION HISTORY
Date Rev. Reason
3/10/2004 M Updated Potentiometer Parameters 3/29/2004 N Changed Green Package marking for SOIC from W to V 4/12/2004 O Updated Reel Ordering Information
Copyrights, Trademarks and Patents
Trademarks and registered trademarks of Catalyst Semiconductor include each of the following:
CAT5111
DPP ™ AE2 ™ Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents
issued to Catalyst Semiconductor contact the Company’s corporate office at 408.542.1000.
CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.
Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a situation where personal injury or death may occur.
Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.
Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate typical semiconductor applications and may not be complete.
Catalyst Semiconductor, Inc. Corporate Headquarters 1250 Borregas Avenue Sunnyvale, CA 94089 Phone: 408.542.1000 Fax: 408.542.1200 www.catalyst-semiconductor.com
Publication #: 2002 Revison: O Issue date: 4/12/04
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Doc. No. 2008, Rev. O
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