CATALYST CAT140xx Service Manual

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Voltage Supervisor with I2C Serial
CMOS EEPROM

CAT140xx

FEATURES

 Precision Power Supply Voltage Monitor

 5V, 3.3V, 3V & 2.5V systems
 7 threshold voltage options

 Active High or Low Reset

 Valid reset guaranteed at V

 Supports Standard and Fast I

= 1 V

CC

2

C Protocol

 16-Byte Page Write Buffer
 Low power CMOS technology
 1,000,000 Program/Erase cycles
 100 year data retention
 Industrial temperature range
 RoHS-compliant 8-pin SOIC package

For Ordering Information details, see page 14.

PIN CONFIGURATION

SOIC (W)

CAT14016 / 08 / 04 / 02

8

NC / NC / NC / A

NC / NC / A

NC /

1A1

A2A2A

///

V

0

2

SS

1

2

3

4

V

7

RST/RST

6

SCL

5

SDA

CC

PIN FUNCTION

Pin Name Function

A0, A1, A2 Device Address Inputs
SDA Serial Data Input/Output
SCL Serial Clock Input

¯¯¯¯

RST/RST
VCC Power Supply
VSS Ground
NC No Connect

Reset Output

DESCRIPTION

The CAT140xx (see table below) are memory and
supervisory solutions for microcontroller based systems. A
CMOS serial EEPROM memory and a system power
supervisor with brown-out protection are integrated
together. Memory interface is via both the standard
(100kHz) as well as fast (400kHz) I

The CAT140xx provides a precision V

2

C protocol.

sense circuit

CC

with two reset output options: CMOS active low output
or CMOS active high. The RESET output is active
whenever V

is below the reset threshold or falls

CC

below the reset threshold voltage.

The power supply monitor and reset circuit protect
system controllers during power up/down and against
brownout conditions. Seven reset threshold voltages
support 5V, 3.3V, 3V and 2.5V systems. If power
supply voltages are out of tolerance reset signals
become active, preventing the system microcontroller,
ASIC or peripherals from operating. Reset signals
become inactive typically 240ms after the supply
voltage exceeds the reset threshold level.

MEMORY SIZE SELECTOR

Product Memory density

14002 2-Kbit
14004 4-Kbit
14008 8-Kbit
14016 16-Kbit

THRESHOLD SUFFIX SELECTOR

Nominal Threshold

Voltage

4.63V L

4.38V M

4.00V J

3.08V T

2.93V S

2.63V R

2.32V Z

Threshold Suffix

Designation

© 2006 Catalyst Semiconductor, Inc. 1 Doc. No. 1117 Rev. A
Characteristics subject to change without notice

CAT140xx

T

BLOCK DIAGRAM

SDA

SCL

A0
A1

A2

EEPROM

V

CC

V

SS

VOLTAGE

DETECTOR

RST or RS

ABSOLUTE MAXIMUM RATINGS

(1)

Parameters Ratings Units

Storage Temperature -65 to +150 °C
Voltage on Any Pin with Respect to Ground

RELIABILITY CHARACTERISTICS

(3)

(2)

-0.5 to +6.5 V

Symbol Parameter Min Units

(4)

NEND

Endurance 1,000,000 Program/ Erase Cycles

TDR Data Retention 100 Years

D.C. OPERATING CHARACTERISTICS

V

= +2.5V to +5.5V unless otherwise specified.

CC

Limits

Symbol Parameter

Min. Typ. Max.

Test Condition Units

ICC Supply Current 1 Read or Write at 400kHz mA

ISB Standby Current

10 22 V
8 17 V

< 5.5V; All I/O Pins at VSS or VCC

CC

< 3.6V; All I/O Pins at VSS or VCC

CC

IL I/O Pin Leakage 2 Pin at GND or VCC μA

VIL Input Low Voltage -0.5 VCC x 0.3 V

V
VOL Output Low Voltage

Input High Voltage VCC x 0.7 VCC + 0.5 V

IH

SDA

0.4

≥ 2.5 V, IOL = 3.0 mA

V

CC

μA

V

Notes:

(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.

(2) The DC input voltage on any pin should not be lower than -0.5 V or higher than V

undershoot to no less than -1.5 V or overshoot to no more than V

(3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100

and JEDEC test methods.

(4) Page Mode, V

Doc. No. 1117 Rev. A 2 © 2006 Catalyst Semiconductor, Inc.

= 5 V, 25°C

CC

+ 1.5 V, for periods of less than 20 ns.

CC

+ 0.5 V. During transitions, the voltage on any pin may

CC

Characteristics subject to change without notice

CAT140xx

A.C. CHARACTERISTICS (MEMORY)

V

= 2.5V to 5.5V, TA = -40°C to 85°C, unless otherwise specified.

CC

Symbol Parameter

F

Clock Frequency 100 400 kHz

SCL

t

START Condition Hold Time 4 0.6 µs

HD:STA

t

Low Period of SCL Clock 4.7 1.3 µs

LOW

t

High Period of SCL Clock 4 0.6 µs

HIGH

t

START Condition Setup Time 4.7 0.6 µs

SU:STA

t

Data In Hold Time 0 0 µs

HD:DAT

t

Data In Setup Time 250 100 ns

SU:DAT

(2)

t

SDA and SCL Rise Time 1000 300 ns

R

(2)

t

SDA and SCL Fall Time 300 300 ns

F

t

STOP Condition Setup Time 4 0.6 µs

SU:STO

t

Bus Free Time Between STOP and START 4.7 1.3 µs

BUF

(1)

Standard Fast

Min Max Min Max

Units

tAA SCL Low to Data Out Valid 3.5 0.9 µs
tDH Data Out Hold Time 100 100 ns

(2)

T

Noise Pulse Filtered at SCL and SDA Inputs 100 100 ns

i

tWR Write Cycle Time 5 5 ms

(2, 3)

t

Power-up to Ready Mode 1 1 ms

PU

Notes:

(1) Test conditions according to “A.C. Test Conditions” table.
(2) Tested initially and after a design or process change that affects this parameter.

is the delay between the time VCC is stable and the device is ready to accept commands.

(3) t

PU

A.C. TEST CONDITIONS

Input Levels 0.2 x V
Input Rise and Fall Times

50 ns

≤

to 0.8 x VCC

CC

Input Reference Levels 0.3 x VCC, 0.7 x VCC
Output Reference Levels 0.5 x VCC
Output Load Current Source: IOL = 3 mA; CL = 100 pF

© 2006 Catalyst Semiconductor, Inc. 3 Doc. No. 1117 Rev. A
Characteristics subject to change without notice

CAT140xx

ELECTRICAL CHARACTERISTICS (SUPERVISORY FUNCTION)

V

= Full range, TA = -40ºC to +85ºC unless otherwise noted. Typical values at TA = +25ºC and VCC = 5V for

CC

L/M/J versions, V

Symbol Parameter Threshold Conditions Min Typ Max Units

V

TH

Reset Threshold Voltage

Symbol Parameter Conditions Min Typ

Reset Threshold Tempco 30 ppm/ºC

t

V

RPD

= 3.3V for T/S versions, VCC = 3V for R version and VCC = 2.5V for Z version.

CC

TA = +25ºC 4.56 4.63 4.70
T

= -40ºC to +85ºC 4.50 4.75

A

TA = +25ºC 4.31 4.38 4.45
T

= -40ºC to +85ºC 4.25 4.50

A

TA = +25ºC 3.93 4.00 4.06
T

= -40ºC to +85ºC 3.89 4.10

A

TA = +25ºC 3.04 3.08 3.11
T

= -40ºC to +85ºC 3.00 3.15

A

TA = +25ºC 2.89 2.93 2.96
T

= -40ºC to +85ºC 2.85 3.00

A

TA = +25ºC 2.59 2.63 2.66
T

= -40ºC to +85ºC 2.55 2.70

A

TA = +25ºC 2.28 2.32 2.35
T

= -40ºC to +85ºC 2.25 2.38

A

= VTH to (VTH -100mV) 20 µs

to Reset Delay

CC

L

M

J

T

S

R

Z

(2)

V

CC

(1)

Max Units

V

t

Reset Active Timeout Period TA = -40ºC to +85ºC 140 240 460 ms

PURST

¯¯¯¯¯¯

RESET

Output Voltage Low
(Push-pull, active LOW,
CAT140xx9)

V

OL

¯¯¯¯¯¯

RESET

V

(Push-pull, active LOW,

OH

Output Voltage High

CAT140xx9)

RESET Output Voltage Low

V

OL

(Push-pull, active HIGH,
CAT140xx1)

RESET Output Voltage High

VOH

(Push-pull, active HIGH,
CAT140xx1)

Notes:
(1) Production testing done at T
(2) RESET

output for the CAT140xx9; RESET output for the CAT140xx1.

VCC = VTH min, I

= 1.2 mA

SINK

R/S/T/Z
VCC = VTH min, I

= 3.2 mA

SINK

J/L/M

> 1.0V, I

V

CC

VCC = VTH max, I

= 50µA 0.3

SINK

= -500µA

SOURCE

R/S/T/Z

= VTH max, I

V

CC

SOURCE

= -800µA

J/L/M
VCC > VTH max, I

= 1.2mA

SINK

R/S/T/Z

> VTH max, I

V

CC

= 3.2mA

SINK

J/L/M

1.8V < V
I

SOURCE

= +25ºC; limits over temperature guaranteed by design only.

A

≤ VTH min,

CC

= -150µA

0.3

0.4

0.8V

CC

V

V

- 1.5

V

CC

0.3
V

0.4

0.8VCC V

Doc. No. 1117 Rev. A 4 © 2006 Catalyst Semiconductor, Inc.

Characteristics subject to change without notice

CAT140xx

g

g

N

R

PIN DESCRIPTION

RESET/RESET

This output is available in two versions: CMOS
Active Low (CAT140xx9) and CMOS Active High
(CAT140xx1). Both versions are push-pull outputs
for high efficiency.

SDA: SERIAL DATA ADDRESS
The Serial Data I/O pin receives input data and

transmits data stored in EEPROM. In transmit mode,
this pin is open drain. Data is acquired on the
positive edge, and is delivered on the negative edge
of SCL.

SCL: SERIAL CLOCK
The Serial Clock input pin accepts the Serial Clock

generated by the Master.

A0, A1, A2: Device Address Inputs
The Address inputs set the device address when

cascading multiple devices. When not driven, these
pins are pulled LOW internally.

¯¯¯¯¯¯

: RESET OUTPUT

and remains asserted for at least 140ms (t

PURST

) after
the power supply voltage has risen above the threshold.
Reset output timing is shown in Figure 1.

The CAT140xx devices protect μPs against brownout
failure. Short duration V

transients of 4μsec or less

CC

and 100mV amplitude typically do not generate a Reset
pulse.

Figure 2 shows the maximum pulse duration of negative­going V

transients that do not cause a reset condition.

CC

As the amplitude of the transient goes further below the
threshold (increasing V
duration decreases. In this test, the V

- VCC), the maximum pulse

TH

starts from

CC

an initial voltage of 0.5V above the threshold and
drops below it by the amplitude of the overdrive voltage

- VCC).

(V

TH

= 25ºC

T

AMB

ATION [µs]

DEVICE OPERATION

The CAT140xx products combine the accurate
voltage monitoring capabilities of a standalone
voltage supervisor with the high quality and reliability
of standard EEPROMs from Catalyst Semiconductor.

RESET CONTROLLER DESCRIPTION

The reset signal is asserted LOW for the CAT140xx9
and HIGH for the CAT140xx1 when the power
supply voltage falls below the threshold trip voltage

V

CC

V

RVALID

TH

t

PURST

t

RPD

V

RESE T

T DU

CAT140xxZ

CAT1 40xxM

TRANSIE

RESET OVERDRIVE VTH - VCC [mV]

Figure 2. Maximum Transient Duration Without

Causing a Reset Pulse vs. Overdrive Voltage

t

t

PURST

RPD

CAT140xx9

RESE T

ure 1. RESET Output Timin

Fi

CAT140xx1

© 2006 Catalyst Semiconductor, Inc. 5 Doc. No. 1117 Rev. A
Characteristics subject to change without notice