BBK ABS530T Service manual
Principle and Maintenance of ABS530T(RU)
Table of Contents
Chapter I Overview of ABS530T (RU)
1. Description of Functions
2. Block Diagram of Player
3. Composition of IC for Player
Chapter II Operating Principle of Servo Circuit
1. Processing Procedure of Digital Signal
2. Processing Procedure of Control Signal
Chapter III Operating Principle of Decoding Circuit
1. Control Circuit of System
2. Audio and Video Output Circuit
Chapter IV Operating Principle of Power Board
1. Block Diagram
2. Operating Principle of Circuits
Chapter V Operating Principle of Panel
1. Operating Principle
Chapter VI Troubleshooting
Appendix: Functions of IC Pins
Operating Principle Analysis of ABS530T(RU)
Chapter I Overview of ABS530T(RU)
I. Description of Functions
ABS530T(RU)is a mini-type music center integrating with video disc and power
amplifier, with the following major features:
1. The layer adopts “Sanyo deck+MT1389” solution;
2. The power amplifier adopts the analogue power amplification circuit, with the
power IC of TDA7265;
3. The audio DAC adopts CS4340 192KHz/24bit sampling, with high integration and
high performance and price ratio;
4. It has the function of radio reception, and the tuner adopts Sanzhenxing DTS -44K
（CE）module;
5. The power supply adopts the linear power, with stable performance and lower cost;
6. Equipped with SCART（CVBS/RGB）port;
7. “RSD” function;
8. Timed ON/OFF functions.
9. Compact and with beautiful appearance.
II. Block Diagram of ABS530T Complete Player and IC Function Table:
track
power
servo drive
channel output
VGA
Sanyo
deck
focus
29LV160BE
16M ROM
BA5954
feed
main
load
Load drive
Power circuit
Radio reception head
AT24C02
MT1389
digital signal
digital servo
SDRAM
MPEG decoder
4340，7265
HCU04
status
Audio D/A，
Refor
Panel circuit
AV output circuit
Progressive
Composite video
S-video
Y/Cb/Cr
2-
Optical, coaxial
Y/Pb/Pr
Figure 1
III. Function Table of ICs for ABS530T
Circuit
Board
Deck
Number Name Function
Sanyo Pick-up of disc signal
U201 MT1389
U202 AT24C02 Series EEPROM, status memory
U205 HCU04 Hexaphase
Mother
U207 CS4340 AF digital/analog converter circuit
Board
U209 LM1117MP-1.8 1.8v voltage -regulated power supply
U211 AE45164016 64Mbit SDRAM
U214 29LV160BE 16Mbit FLASH ROM
RF signal processing, digital signal
processing, servo processing, MPEG
decoding, line scan, system control
U219-221
4580 Dual operational amplifier
U302 D5954 4-channel servo driver circuit
Panel U401 IC 0791 Panel control, VFD display drive
U402 HS0038A2 IR sensor
+12V 3-terminal voltage-regulated
power supply
-12V 3-terminal voltage -regulated
power supply
5V 3-terminal voltage -regulated
power supply
+3.3V 3-terminal voltage -regulated
power supply
Power
Board
N100 LM7812
N102 LM7912
N101 LM1085
N104 IC BA033
N103 TDA 7265 Power amplification IC
Chapter II Operating Principle of Servo Circuit
I. Processing Procedure of Digital Signal
ABS530T(RU) adopts Sanyo double super error correction mechanism and MTK
decoding solution, and its servo circuit mainly consists of preposition signal
processing, digital servo processing, digital signal processing IC MT1389 and driver
circuit BA5954. MT1389 is also a main part of the decoding circuit.
The A, B, C, D, E, F, SA, SB and RFO signal transmitted from the mechanism are
mainly inputted through the 2-13 pins of MT1389, and after amplifying treatment of
built-in amplifier of MT 1389, the signals are treated in two parts within MT1389:
After being processed by the internal digital servo signal circuit of MT1389, part of
the signal forms into corresponding servo control signal, and output focus (FOSO),
tracking (TRSO), main shaft (DMSO) and feed (FMSO) servo control signal from the
P42, P41, P37 and P38 of MT1389 and send them to the driver circuit BA5954 to
amplify the drive. After drive amplification, the signals will drive the focus coil,
tracking coil, main shaft motor and feed motor. The focus and tracking servo s will be
used to adjust the object lens and enable laser beam to identify signal from compact
disc correctly; the feed servo will be used to drive the laser head to move
longitudinally, and scan the compact disc; the main shaft servo is used to control the
main shaft motor to read the signals in constant linear speed and drive the disc to
rotate.
After being processed by the internal VGA voltage -controlled amplifier of MT1389 in
amplification and balance frequency compensation; another part of the signals is
converted into digital signal by the internal A/D converter. When the mechanism
reads the CD/VCD signals, these signals will be EFM demodulated in MT1389, and
after accomplishing CIRC error regulation in internal MT1389, output to the next
grade to carry out audio and video decoding; when the deck reads the DVD signals,
these signals will be ESM demodulated in MT1389, and after accomplishing RSPC
error regulation in internal MT1389, output to the next grade to carry out audio and
video decoding.
II. Processing Procedure of Control Signal
1. Automatic control of laser power, with the circuit shown as the Figure II:
MT1389 is integrated with APC (automatic light power control) circuit. Its Pin 20 is
the pin for inputting VCD laser power rate detection signal, the Pin 21 is the pin for
inputting DVD laser power rate detection signal, and the Pin 23 is the pin for
outputting VCD laser power rate drive control. When the Pin 23 finds that the laser
output power rate is too strong, the output voltage on Pin 23 will increase after the
processing of internal circuit of MT1389, and then the conduction degree of V302
(2SB1132) and the voltage on its integration polar will decrease, which consequently
lead to the decrease of voltage supplied to the laser tube, the weakening of laser head
lighting, and thus achieve the automatic adjustment on laser output power. The Pin 22
is the pin for outputting DVD laser power drive control, with the specific control
procedure similar to that of VCD.
2. The tray open/close control circuit is shown as the Figure III:
Figure 3
Different from the circuit in former MTK solution, the MT1389 is integrated with
preposition signal processing circuit, so the tray open/close control signals are
accomplished by MT1389, that is to say, the close control signal is accomplished by
the Pin 51 of MT1389, while the open control signal by Pin 39 of MT1389.
When we press the open button, the Pin 51 of MT1389 is in high power level, while
the Pin 39 is in low power level, and then the triode V308 will be on-state. Through
resistor R323, the base of V306 will be made to be in low power le vel, and V306 will
be on-state, with the current direction as the following figure:
Power voltage VCC ? V306E-C junction ? motor negative
terminal LOAD- ? motor positive Load +? V308 C-E
junction ? grounding
So the motor will rotate clockwise to accomplish the action of tray closing.
When we press the open button, the Pin 51 of MT1389 is in low power level, while
the Pin 39 is in high power level, and then the triode V307 will be conducted.
Through resistor R324, the base of V309 will be made to be in low power level, and
V309 will be conducted, with the current direction as the following figure:
Power voltage VCC ? V309E-C junction ? motor negative
terminal LOAD- ? motor positive Load +? V307 C-E
junction? grounding
So the motor will rotate anti-clockwise to accomplish the action of tray opening.
3. The main shaft motor braking circuit is as the Figure IV:
To prolong the lifespan of motor and reduce the influence of start-up impact
current, with the installation of disc, our R&D personnel design the main shaft motor
to be in the state of constant operation, so that even if the STOP button is pressed, the
disc will not be stopped. Therefore, when we press the OPEN button, a braking signal
is required to stop the rotation of main shaft motor immediately to accomplish the
opening action in a short time.
During playing, if we press the OPEN button, the main shaft drive signal will
disappear, and because of inertia, the main shaft motor is still in operation. As the
electromotive force generated in the operation of motor receives the induction voltage
on sampling resistors R321 and R340, which, through the resistor R319 and R320, is
added to the Pin 36 and Pin 35 of MT1389, and outputted from the Pin 34 after
internal processing for amplification in MT1389, and delivered to Pin 47 of MT1389
through R318. After the internal A/D conversion and corresponding processing, an
instant motor reversal braking signal will be outputted from the Pin 37 of MT1389 to
stop the rotation of main shaft motor immediately, so as to ensure the standstill of the
disc when opening the player.
III. Servo drive circuit
The servo drive of the player is accomplished through a piece of 4-channel dedicated
drive circuit BA5954, with the circuit as Figure V:
The 4 servo control signals generated in digital servo circuit processing of MT1389,
i.e. focusing control FOSO, tracking control TRSO, feed control FMSO and main
shaft control DMSO signals, are added to the pins 1, 26, 23 and 5 of BA5954
respectively, and after drive amplification of BA5954, the focusing and tracking drive
signals will be outputted from the pins 13 and 14 and pins 15 and 16 of BA5954
respectively, and added to the focusing and tracking coils to drive the light head to
accomplish the actions of focusing and tracking.
The feed and main shaft drive signals will be outputted from the pins 17 and 18
and pins 11 and 12 of BA5954 respectively, and added to the feed motor and main
shaft motor to drive the light head to move longitudinally and enable the disc to rotate
in constant linear speed.
The STBY on Pin 28 of BA5954 is an output -enabling signal, and only when the pin
is in high power level, there will be output of drive voltage on the output terminal.
Chapter III Operating Principle of Decoding Circuit
The decoding circuit of the player mainly consists of decoding chips (including
MT1389, SDRAM AE45164016 and FLASH ROM 29LV160BE) and audio DAC
CS4360.
I. Control Circuit of System
1. Reset circuit is as the Figure VI:
The reset circuit of the player consists of triode Q204 9014, reset capacitor TC217
100uF/16V and phase inverter U205 HCU04. In starting up, as the terminal voltage of
capacitor cannot be changed suddenly, the basic of Q204 is in low power level. After
the cut-off of Q204, its emission polar is in low power level, after secondary phase
inversion by U205 and regulation, the low power level reset signal is outputted to the
Pin 110 of MT1389 to reset MT 1389.
When the recharging of TC217 is finished, the base of Q204 will be in high power
level, Q204 will be conducted, and the emission polar is in high power level. After the
secondary phase inversion and regulation by U205, a high power level is outputted
and added to the Pin 110 of MT1389 to maintain high power level during its normal
operation.
2. Clock circuit
The crystal oscillator of X201 27MHz, C275/27PF, C276/27PF and phase inverter
HCU04 form into clock oscillation circuit, and the clock signals generated are added
to the pins 229 and 228 of MT1389 through R244 and 4248 to provide operating
clock for MT1389.
3. Data communication circuit
The data communication circuit of the player consists of decoding chip MT1389,
SDRAM, AE45164016 and FLASH ROM 29LV160BE, as the Figure VII:
MT1389 is a piece of super large integrated circuit, with the operation voltage of
+3.3V and +1.8V. Its functions include: RF small signal preposition processing,
digital servo, digital signal processing and accomplishing MPEG decoding and video
coding. The built-in MCU of MT1389 is also the system control circuit of the whole
player .
AE45164016 is a piece of 4M*16bit large capacity SDRAM, with the operation
voltage of +3.3 V. In DV971, the 6ns module is adopted, with high speed and the
maximum operation frequency up to 166MHz. Its main function is for operation
buffer storage of decoding chip MT1389 to store the audio and video data stream in
decoding.
29LV160BE is a piece of 16Mbit FLASH ROM, with the operation voltage of +3.3V,
mainly for storing the user’s information including OSD character information,
operational microcode and LOGO in start-up.
39 38 37 18 17 19 16 20 21
77
26 28 11 15 47 79 66 VD
RY/BY
29LV160BE
BYTE
GND
A0—A21
AD0—AD7
DCE
DRD
DWR
MT1389
DMA0—DMA11
DQ0—DQ15
113
137
156
157
140
139
142
138
145
143
AE45164016
DQML
15
DQMH
CLK
CKE
RAS
CAS
CS
WE
BA1
BA0
Figure 7
II. Audio and Video Output Circuit
1. Video output circuit
ABS530T(RU) can not only output three types of interlacing video signal (including
CVBS composite video, S terminal Y-C signal and Y/Cb/Cr color difference signal),
but also output two types of progressive video signal (including Y/Pb/Pr progressive
color difference signal and VGA progressive signal).
The decoding chip MT1389 has built-in video encoding circuit for direct output of
analogue comp osite video signal CVBS, S terminal, color difference signal and VGA
signal.
The CVBS composite video signal is outputted from the Pin 198 of MT1389, the S
terminal signal Y-C is outputted from the pins 194 and 196 of MT1389, the color
difference signal and the R-B-G signal of VGA port is outputted from the pins 203,
202 and 200 of MT1389, the row and field synchronization signals of VGA port are
outputted from the pins 207 and 205 of MT1389 respectively.
To mention specifically, the interlacing color difference signal, the progressive color
difference signal and progressive R-B-G signal are outputted from the same pin,
therefore the signal output shall be selected according to the ports of TV, otherwise
there will be only sound but without picture display.
2. Audio DAC circuit, as the Figure VIII:
The main function of audio DAC c ircuit is to convert the digital audio signal decoded
from MT1389 into analogue audio signal through D/A converting circuit, and output
the audio signal after buffing and amplification to the next amplifying devices to
restore it to voice.
The digital audio signals ASDATA0 decoded from MT1389 are outputted from the
Pin 217 of MT1389, and delivered to the Pin 2 of audio DAC circuit CS4360. In the
mean time, the left and right sound channel clock signal ALRCK, bit clock signal
ABCK and the external audio clock signal ACLK required in D/A conversion are
outputted from the pins 213, 214 and 215 of MT1389, and added to the pins 5, 3 and 4
of CS4360 respectively.
CS4340 will carry out D/A conversion on the digital audio signals from the channels
of SDATA0 under the control of I2C（SDA, SCL） delivered by MT1389, and output
the 2-way analogue audio signals from the pins 12 and 15 of CS4340 for the
amplification in the next step. The related functions of various signals are as follows:
ASDATA0---- Digital audio signal, including the signals of left and right
channels
ALRCK-----Left and right bit clock signals, for separating left and right
channels
ABCK-----Bit clock signal, for ensuring the accuracy of signal transmission
ACLK-----External clock signal, as the operation clock of CS4340
3. Audio output amplification circuit
The audio digital signals outputted from the decoding board are delivered to the
power amplification part for processing after D/A conversion by IC CS4340.
Power amplification parts:
This model carries 2-channel power amplification, and adopts IC TDA7265 to
amplify the sound channels. In rated power and the load resistance of 8 ohms, the
output power of each sound channel can reach 6W. With the combination of active
The amplifying circuit adopts solely power IC amplification; therefore it has high
integration degree, simple circuit and easy control. The analogue signal outputted
from IC4340 will be amplified by IC 4558, and delivered to N103 IC PT2315 for
electronic sound volume regulating processing after the left and right sound channels
are gated by N102 IC 4052, and then to IC TDA7265 for power amplification, and
output.
IC TDA7265 is a double-channel power amplification IC, with standby and muting
mode, without switching impact, but with the function of overcurrent and overload
protection to prevent the IC from being damaged in abnormalities effectively. The IC
can provide the maximum 30W power output for each channel in normal output mode,
and when adopting BTL output, the power can reach 50W. Besides, the IC has strong
anti-ripple function, and is featured with low power consumption in standby state.
The functions of the pins of IC TDA9843J are as follows:
Mark Pin Function of Pins
-VS 1 Negative supply
OUTPUT1 2 Output of first channel
+VS 3 Positive supply
OUTPUT2 4 Input of second channel
MUTE 5 Mute control line
-VS 6 Negative supply
IN+（2） 7 Channel 2 positive phase
input
IN-（2） 8 Channel 2 antiphase input
GND 9 Grounding pin
IN-（1） 10 Channel 1 antiphase input
IN+（1） 11 Channel 1 positive input
Additionally, ABS530T(RU) also has optical and coaxial digital audio output. The
digital audio signals after the decompressing of MT1389 are outputted from the Pin
225 of MT1389 in the format of IEC958, and added to the corresponding optical and
coaxial terminal output after the regulation by phase inverter HCU04 of U205.
4. Muting and power-off quieting
The muting part of the player is controlled by the SCMUT and LRSWMUT outputted
by MT1389. During starting up till reading out the disc, the two controlling lines will
output high power level to mute the sound channels. After the disc reads out the
signals, MT1389 will alternate the two controlling lines into lower power level to
carry out normal signal output. When the remote control muting is pressed, the two
controlling lines will be alternated into high power level to realize muting. For this
model has just the amplification output of left/right channel, the central mute control
line is applied to control the mute of the Karaoke.
5. Automatic Power-on Function
This model is equipped with the IC M41T81, so that it has the function of a clo ck; just
like a clock, when you power it off, it is supplied with the power from one group of
battery inside it; when the external power is cut off, the internal power supply is
switched on. Therefore, the clock can still work in case of the power cut.
The most distinctive feature of this player is its automatic turnon function. Whenever
you want to turn it on, you just preset the turnon time and then set it to a standby
status. As a result, when the clock runs to the preset turnon time, the player will give a
high level trigger to the STANBY at P50 of 1389, and the player will be turned on.
The preset time is stored in the IC 24C02 while the clock is controlled by the 1389
and IC M41T81.
When the MUTE1 is at the high level, the triode V107 is turned on, so that the triode
V103 and V104 are turned on, and the left/right channel signal is connected with the
grounding, so that the mute is realized therefore.
This mute circuit includes three diodes in parallel connection; among the three control
lines, when there is any one at high level, the MUTE signal outputs at low level, so
that the power amplifier tube TDA7265 works normally; only when the three control
lines are at low level synchronously, the triode V106 cuts off, so that the MUTE
outputs high level and the zener diode on the power board turns on at the reversed
direction while the triode V100 turns on and pulls down the voltage at P5 of
TDA7265, and finally the complete mut ing is realized.
In addition, there is a C128 1U/50V capacitor on the peripheral circuit of IC
TDA7265 and the mute control line. The start-up mute is realized, for the voltage at
both ends of the capacitor can not change abruptly at the very moment when the
player is turned on, so as to make the level at the P5 to be low at the very moment of
turning on the player. When the player is turned off, this capacitor discharges quickly
via the resistor R114 so as to make the level at P5 to become low rapidly, so that the
function of turnoff mut ing is realized.
5. Function of Tuning
ABS530T（RU）has the function of tuning, and can receive RDS signal. The signals of
radio reception, the auxiliary channel input signal and the left and right sound signal
outputted from CS 4360 are gated through N111IC CD4052, and the controlling A and
B are controlled by the low and high power level of AUIN SL0 and AUIN SL1
emitted from MT1389.
The radio head control lines CE, DI, CL and DO are controlled by the array lines
connected to MT1389 for the direct control by 1389. When any one of the controlling
lines is in abnormality, the radio reception will be in malfunction. The RDS signal
received by radio head will be delivered to the dedicated IC SAA6588 for processing.
y and
Chapter IV Operating Principle of Power Circuit
I. Block Diagram
Transf
ormer
output
Service voltage of amplifier
II. Analysis of Operating Principle
The player adopts linear power for power supply, and is featured with high power,
stable power supply and low cost.
After the input voltage is switched via the insulating transformer, the two groups of
AC outputs are rectified via the bridge rectifier composed of the VD100, VD101,
VD102, VD103 and filtered via the C100, C101, C112 and C113, and then a group of
±20V DC supplies the power to the amplifier IC — such voltage outputs the stable ±
12V via the IC 7812 and IC 7912. For the current is purified by two groups of filter
capacitor, and the stabilizing IC is for the voltage stabilizing output, therefore the
output voltage is relatively stable, with low ripple factor. After the rectifying and
filtering, the other group of 8.4V AC voltage outputs +5V CD via the stabilization of
IC 1805, then after the filtering and the stabilization via the stabilizing IC BA033, it
outputs +3.3V to supply the power to the decoding IC. For this model adopts the
linear power supply, and the voltage part and signal amplification part are on the same
board, it’s better to process at the power purifying part in order to keep the effect upon
the signals from the power supply surge. In doing so, the player can be ensured to
have relatively low fluctuation in its service voltage in case of any change to the
public power supply, so that the reliability of the player is ensured. The transformer
has another group of voltage output, with an AC connecting directly to the panel so as
to supply the filament voltage to the display; another group of voltage outputs a group
of +27V DC after the rectifying and filtering, so as to supply the grid voltage to the
display.
Rectif
filtre
Stabilizing
Additionally, this player has the timed power-on function. To ensure some circuits of
this player to work normally without the external voltage so as to realize the purpose
of timed start function, this player is added with a group of lithium battery supplying
3V voltage, so that the clock can still work normally when the player is turned off.
When the power on the player is turned on, the VCC voltage effects on the diode
VD118 and the diode cuts off, so the battery can not supply the power to the entire
player. When the power on the player is turned off, the VCC is at zero without the
external voltage, and the diode is positive ly conducted, so that the battery supplies the
necessary voltage to the working part of the clock on the player to ensure its normal
work.
Chapter 5: Panel control and VFD display circuit
IC6311
The panel mainly consists of VFD screen, driver IC6311, IR sensor HS0038A2
and button and indicator display circuit, mainly for accomplishing man-player
dialogue and display of operation status.
The structural drawing is as follows:
Keystoke
VFD
display
control
U401
VFDST
VFDCK
VFDAT
U201
MT1389
MT1389 will control the U401 IC 6311 to display the operation status of the player
through the VFDST status, VFDCK clock and VFDAT data, under the control of
CPU built in MT1389, receive the user control commands sent by IC 6311, and
control the controlled circuit of the player to limit the player to operate in specified
status.
When the user operates the panel buttons, the control command is sent to the IC 6311
through keyboard-scanning circuit, and through internal decoding drive, the IC 6311
outputs the control data from the pins 5 and 6 (VFDAT) to the built-in CPU of
MT1389, which will realize the control on the controlled circuit, and control the VFD
through IC 6311.
VFD401 is a vacuum fluorescence screen, and its biggest feature is its high brightness.
Its operation principle is similar to the kinescope of TV. The pins 1, 2, 34 and 35 are
for filament power supply; the pins 27-32 are GRID poles, each GRID has 16
different characters of display; the pins 4-19 are SEG poles, and the CPU control the
SEG poles through its control on UPD6311, and display the characters of
corresponding operation status on the screen.
Panel indicator control
Figure 11
Remote
receiving
The remote reception circuit mainly consists of remote receptors HS0038A2, of which
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