BBK 930S, 917S Service Manual

Page 1
SERVICE MANUAL
BBK917S
Page 2
CONTENTS
1. SAFETY PRECAUTIONS
2. PREVENTION OF ELECTRO STATIC DISCHARGE(ESD)TO ELECTROSTATICALLY
SENSITIVE(ES)DEVICES
3. CONTROL BUTTON LOCATIONS AND EXPLANATIONS
4. PREVERTION OF STATIC ELECTRICITY DISCHARGE
5.1 OPTICAL PICKUP UNIT EXPLOSED VIEW AND PART LIST
5.2 BRACKET EXPLOSED VIEW AND PART LIST
5.3 MISCELLANEOUS
6. ELECTRICAL CONFIRMATION
6.1 VIDEO OUTPUT (LUMINANCE SIGNAL) CONFIRMATION
6.2 VIDEO OUTPUT(CHROMINANCE SIGNAL) CONFIRMATION
1
1
2
3 4 4 6 7 8
8
9
7. MPEG BOARD CHECK WAVEFORM
8. IC BLOCK DIAGRAM & DESCRIPTION
8.1 MT1336 11
8.2 MT1379
8.3 AM29LV160D 35
8.4 HY57V641620HG
9. SCHEMATIC & PCB WIRING DIAGRAM
10. SPARE PARTS LIST 55
10 11
19
40
43
Page 3
1.1 GENERAL GUIDELINES
1. SAFETY PREAUTIONS
2.PREVENTION OF ELECTRO STATIC DISCHARGE(ESD)TO  ELECTROSTATICALLY SENSITIVE(ES)DEVICES
1
1. When servicing, observe the original lead dress. if a short circuit is found, replace all parts which have been overheated or damaged by the short circuit.
2. After servicing, see to it that all the protective devices such as insulation barrier, insulation papers shields are properly installed.
3. After servicing, make the following leakage current checks to prevent the customer from being exposed
to shock hazards.
Some semiconductor(solid state)devices can be damaged easily by static electricity. Such components commonly are called Electrostatically Sensitive(ES)Devices. Examples of typical ES devices are integrated circuits and some field-effect transistors and semiconductor chip components. The following techniques should be used to help reduce the incidence of component damage caused by electro static discharge(ESD).
1. Immediately before handling any semiconductor component or semiconductor-equipped assembly, drain off any ESD on your body by touching a known earth ground. Alternatively, obtain and wear a commercially availabel discharging ESD wrist strap, which should be removed for potential shock reasons prior to applying power to the unit under test.
2. After removing an electrical assembly equipped with ES devices,place the assembly on a conductive surface such as alminum foil, to prevent electrostatic charge buildup or exposure of the assembly.
3. Use only a grounded-tip soldering iron to solder or unsolder ES devices.
4. Use only an anti-static solder removal device. Some solder removal devices not classified as anti-static (ESD protected)can generate electrical charge sufficient to damage ES devices.
5. Do not use freon-propelled chemicals. These can generate electrical charges sufficient to damage ES devices.
6. Do not remove a replacement ES device from its protective package until immediately before you are ready to install it. (Most replacement ES devices are packaged with leads electrically shorted together by conductive foam, alminum foil or comparable conductive material).
7. Immediately before removing the protective material from the leads of a replacement ES device, touch the protective material to the chassis or circuit assembly into which the device will be installed. Caution Be sure no power is applied to the chassis or circuit, and observe all other safety precautions.
8. Minimize bodily motions when handling unpackaged replacement ES devices. (Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity(ESD).
notice (1885x323x2 tiff)
Page 4
3. Control Button Locations and Explanations
2
Front Panel Illustration
13 14
1 2 3 4 5 6 7 8 9 10 11 12
POWER SUPPLY INPUT jack
MIC VOLUME knob
2
MIC 1 jack
3
MIC 2 jack
5
POWER switch
REMOTE CONTROL SENSOR hole
6
LED display window
7
OPEN/CLOSE push position
8
PLAY button
9
STOP button
10
PAUSE button
11
CURSOR button
12
PREV button
13
NEXT button
144
Page 5
The laser diode in the traverse unit (optical pickup)may brake down due to static electricity of clothes or human
body. Use due caution to electrostatic breakdown when servicing and handling the laser diode.
Some devices such as the DVD player use the optical pickup(laser diode)and the optical pickup will be damaged
by static electricity in the working environment.Proceed servicing works under the working environment where
1. Put a conductive material(sheet)or iron sheet on the area where the optical pickup is placed,and ground the
3. The flexible cable may be cut off if an excessive force is applied to it.Use caution when handling the cable.
3
4.PREVENTION OF STATIC ELECTRICITY DISCHARGE
4.1.Grounding for electrostatic breakdown prevention
grounding works is completed.
4.1.1. Worktable grounding
sheet.
4.1.2.Human body grounding
1 Use the anti-static wrist strap to discharge the static electricity from your body.
safety_3 (1577x409x2 tiff)
4.1.3.Handling of optical pickup
1. To keep the good quality of the optical pickup maintenance parts during transportation and before installation, the both ends of the laser diode are short-circuited.After replacing the parts with new ones, remove the short circuit according to the correct procedure. (See this Technical Guide).
2. Do not use a tester to check the laser diode for the optical pickup .Failure to do so willdamage the laser diode due to the power supply in the tester.
4.2. Handling precautions for Traverse Unit (Optical Pickup)
1. Do not give a considerable shock to the traverse unit(optical pickup)as it has an extremely high-precise structure.
2. When replacing the optical pickup, install the flexible cable and cut is short land with a nipper. See the optical pickup replacement procedure in this Technical Guide. Before replacing the traverse unit, remove the short pin for preventingstatic electricity and install a new unit.Connect the connector as short times as possible.
4. The half-fixed resistor for laser power adjustment cannot be adjusted. Do not turn the resistor.
Page 6
5.1 Optical pickup Unit Explosed View and Part List
5. Assembling and disassembling the mechanism unit
4
Pic (1)
Page 7
Materials to Pic (1)
5
No. PARTS CODE PARTS NAME Q ty
14692200 SF-HD60 1
1
1EA0311A06300 ASSY, CHASSIS, COMPLETE 1
2
Or
3
4
5
6
7
8
9
10
11
21
Or
31
32
1EA0M10A15500 ASSY, MOTOR, SLED 1
1EA0M10A15501 ASSY, MOTOR, SLED 1
1EA2451A24700 HOLDER, SHAFT 3
1EA2511A29100 GEAR, RACK 1
1EA2511A29200 GEAR, DRIVE 1
1EA2511A29300 GEAR, MIDDLE, A 1
1EA2511A29400 GEAR, MIDDLE, B 1
1EA2744A03000 SHAFT, SLIDE 1
1EA2744A03100 SHAFT, SLIDE, SUB 1
1EA2812A15300 SPRING, COMP, TYOUSEI 3
1EA2812A15400 SPRING, COMP, RACK 1
1EA0B10B20100 ASSY, PWB 1
1EA0B10B20200 ASSY, PWB 1
SEXEA25700--- SPECIAL SCREW BIN+-M2X11 3
SEXEA25900--- SPECIAL SCREW M1.7X2.2 2
33
34
35

Note : This parts list is not for service parts supply.
SFBPN204R0SE- SCR S-TPG PAN 2X4 2
SFSFN266R0SE- SCR S-TPG FLT 2.6X6 1
SWXEA15400--- SPECIAL WASHER 1.8X4 X0.25 2
Page 8
5.2 Bracket Explosed View and Part List
6
Pic (2)
Materials to Pic(2)
1.bracket 14. front silicon rubber
2.belt 15. Back silicon rubber
3.screw 16. Pick-up
4.belt wheel 17. Pick-up
5.gearwheel 18. switch
6.iron chip 19. Five-pin flat plug
7. Immobility mechanism equipment 20. screw
8. Magnet 21. PCB
9. Platen 22. motor
10. Bridge bracket 23. Motor wheel
11. screw 24. screw
12. screw 25.tray
13. Big bracket
Before going process with disassembly and installation, please carefully both peruse the chart and confirm the materials.
Page 9
5.3 MISCELLANEOUS
7
5.3.1 Protection of the LD(Laser diode)
Short the parts of LD circuit pattern by soldering.
5.3.2 Cautions on assembly and adjustment
Make sure that the workbenches,jigs,tips,tips of soldering irons and measuring instruments are
grounded,and that personnel wear wrist straps for ground.
Open the LD short lands quickly with a soldering iron after a circuit is connected.
Keep the power source of the pick-up protected from internal and external sources of electrical noise.
Refrain from operation and storage in atmospheres containing corrosive gases (such as H2S,SO2,
NO2 and Cl2)or toxic gases or in locations containing substances(especially from the organic silicon,cyan,
formalin and phenol groups)which emit toxic gases.It is particularly important to ensure that none of the
above substances are present inside the unit.Otherwise,the motor may no longer run.
Page 10
6.1. Video Output (Luminance Signal) Confirmation
6.Electrical Confirmation
8
DO this confirmation after replacing a P.C.B.
Measurement point
Video output terminal
Measuring equipment,tools
200mV/dir,10 sec/dir
Purpose:To maintain video signal output compatibility.
1.Connect the oscilloscope to the video output terminal and terminate at 75 ohms.
2.Confirm that luminance signal(Y+S)level is 1000mVp-p±30mV
PLAY(Title 46):DVDT-S15 PLAY(Title 12):DVDT-S01
Mode Disc
Color bar 75%
Confirmation value
1000mVp-p±30mV
DVDT-S15
or
DVDT-S01
Page 11
Do the confirmation after replacing P.C.B.
Screwdriver,Oscilloscope
6.2 Video Output(Chrominance Signal) Confirmation 
9
Measurement point
Video output terminal
Measuring equipment,tools Confirmation value
200mV/dir,10 sec/dir
Purpose:To maintain video signal output compatibility.
1.Connect the oscilloscope to the video output terminal and terminate at 75 ohme.
2.Confirm that the chrominance signal(C)level is 621 mVp-p±30mV
PLAY(Title 46):DVDT-S15 PLAY(Title 12):DVDT-S01
Mode Disc
Color bar 75%
621mVp-p±30mV
DVDT-S15
or
DVDT-S01
Page 12
7.MPEG BOARD CHECK WAVEFORM
7.1 27MHz WAVEFORM 
7.2 IC5L0380R PIN.2 WAVEFORM DIAGRAM
10
Page 13
8.1 MT1336
8. IC BLOCK DIAGRAM & DESCRIPTION
11
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1336
GENERAL DESCRIPTION
MT1336 is a high performance CMOS analog front-end IC for both CD_ROM driver up to 48XS and
DVD-ROM driver up to 16XS. It also supports DVD-RAM read up to 4XS Version 2. It contains servo amplifiers to generate focusing error, 3-beam tracking error, 1 beam radial push-pull signal, RF level and SBAD for servo functions. It also includes DPD tracking error signal for DVD_ROM application. For DVD-RAM disks, there are also Differential Push-Pull (DPP) method for generating tracking signal and Differential Astigmatic Detection (DAD) for processing focusing signal. Programmable equalizer and AGC circuits are also incorporated in this chip to optimize read channel performance. In addition, this chip has dual automatic laser power control circuits for DVD-ROM (DVD-RAM) and CD-ROM seperately and reference voltage generators to reduce external components. Programmable functions are implemented by the access of internal register through bi-directional serial port to configure modes selection.
FEATURES
n RF equalizer with programmable
13dB.
n MT1336 supports at least eight different kinds of pick-up heads with versatile input configuration for
both RF input stages and servo signal blocks.
n Versatile on -line AGC.
n 3 beams tracking error signal generator for CD_ROM application.
n One beam differential phase tracking error (DPD) generator for DVD_ROM application.
n Differential push pull tracki ng error (DPP) generator for DVD_RAM application.
n Focusing error signal generator for CD-ROM, DVD-ROM and DVD-RAM (DAD method).
n RF level signal generator.
n Sub-beam added signal for 3 beams CD_ROM.
n One beam push-pull signal generator for central servo application.
n High speed RF envelop detection circuit with bandwidth up to 400KHz for CD-ROM.
n Defect and Blank detection circuits.
from 3MHz to 70 MHz and programmable boost from 3dB to
f
c
n Dual automatic laser power control circuits with programmable level of LD monitor voltage.
n Vref=1.4V voltage and V2ref=2.8V voltage generators.
n V20=2.0V voltage for pick-up head reference.
n Bi-directional serial port to access internal registers.
Page 14
MT1336
12
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
DVDA
CDA
DVDB
CDB
DVDC
CDC
DVDD
CDD
DVDRFIN
DVDRFIP
DPFN DPFO
DPDMUTE
CDFOP CDFON
RFGC RFGCU
RFGCI
AGC1
AGC2
AGC3
RFSUBO
WOBSO
V20
V2REFO
VREFO
MC
TPI TNI
MA MB
MD
OSP OSN
ATTENUATOR
INPUT MUX
AGC
AGC
SA SB
SC SD
IR
VGA
VGA EQ
ENVELOP
ENVELOP
DETECTOR
DETECTOR
DPD
SBAD
TE
PCS
DVD APC
RFOP
RFON
LRFRP
DEFECT HRFRP CRTP CRTPLP
CSO
LVL
TEO
FEO
REFCOS HALLCOS
COSPHI
REFSIN HALLSIN SINPHI
MDI2
LDO2
RF
LEVEL
FE
CD
APC
MDI1
LDO1
CENTRAL
SERVO
UDGATE
WOBBLE
DET
REF and 2VREF
REF and 2VREF
Voltage Generator
Voltage Generator
SERIAL
PORT
IDGATE VFO13
SDATA SLCK
SDEN
MT1336 FUNCTION BLOCKS DIAGRAM
Page 15
13
MT1336
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
WGND
WOBSO
WVDD AGNDX AGNDX
AVDDO
RFOP RFON AGNDO
TM1 TM2 TM3
AGNDT TM4
AVDDT
V2REFO VREFO V20
FEO
LVL CSO
TEO VDDP DEFECT LRFRP HRFRP CRTP CRTPLP
TRLPA
TRLP HTRC
GNDP DPFN DPFO
AGNDX
AGNDX
AGNDX
VDD VFO13
1 2 3 4 5 6 7 8 9 10
11 12
13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
33 34 35 36 37 38
RFSUBO
LDO2
LDO1
127
126
125
128
3940414243
MDI1
124
WAVDD
MDI2
123
AGC1
AGC2
AGC3
121
120
119
122
MT1336
DVD-ROM
DVD_RAM
454647
44
48
WAGND
TNI
SGND
118
117
116
With
Read
495051
525453
CDFOP
SVDD
TPI
CDFON
115
114
113
112
111
555657585960616263
SASBMC
IR
AVDDSCSD
110
109
108
MD
AGND
107
106
105
104
103
102 101 100
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71
70 69 68 67 66 65
64
MB MA
DVDA
DVDB DVDC DVDD
DVDRFIP
DVDRFIN CDA
CDB CDC CDD
OSN OSP RFGC RFGCU RFGCI CEQP CEQN AGNDX AGNDX
MON
MOP
SW1 SW2
SWO SINPHI
REFSIN
HALLSIN
AGNDM REFCOS HALLCOS
COSPHI AVDDM AGNDX AVDDF VCON AGNDF
IO0
GND
UDGATE
HDGATE
IO4
IO1
IO5
IO7
IO8
IO9
IO6
IO3
IO2
IOB
IOA
MT1336 PIN ASSIGNMENT
SCLK
VDDS
XCK16M
RST
SDEN
GNDS
SDATA
AGNDP
AGNDX
AVDDP
DPDMUTE
Page 16
14
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1336
MT1336 PIN DESCRIPTIONS
Pin Numbers Symbol Type Description
LQFP128
RF Flag Interface
23 DEFECT Digital Output Flag of bad data output status
RF SIO interface
56 SCLK Digital Input RF serial clock input
58 SDEN Digital Input RF serial data enable
59 SDATA Digital IO RF serial data IO
60 RST Digital input Reset (active high)
55 XCK16M Digital Input 16.9MHz for verification
RF SERVO interface
40 UDGATE Digital Input Control signal for DVD-RAM
41 IDGATE Digital Input Control signal for DVD -RAM
38 VFO13 Digital Input DVD -RAM Header signal
RF
100 DVDA Analog input AC coupled DVD RF signal input A
99 DVDB Analog Input AC coupled DVD RF signal input B
98 DVDC Analog Input AC coupled DVD RF signal input C
97 DVDD Analog Input AC coupled DVD RF signal input D
95 DVDRFIN Analog Input AC coupled DVD RF signal input RFIN
96 DVDRFIP Analog Input AC coupled DVD RF signal input RFIP
94 CDA Analog Input AC coupled CD RF signal input A
93 CDB Analog Input AC coupled CD RF signal input B
92 CDC Analog Input AC coupled CD RF signal input C
91 CDD Analog Input AC coupled CD RF signal input D
90 OSN Analog RF Offset cancellation capacitor connecting
89 OSP Analog RF Offset cancellation capacitor connecting
85 CEQP Analog RF Offset cancellation capacitor connecting
84 CEQN Analog RF Offset cancellation capacitor connecting
88 RFGC Analog RF AGC loop capacitor connecting for DVD -ROM
Page 17
15
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
87 RFGCU Analog RF AGC loop capacitor connecting for DVD -RAM
86 RFGCI Analog RF AGC loop capacitor connecting for DVD -RAM
101 MA Analog Input DC coupled DVD -RAM main-beam RF signal input A
102 MB Analog Input DC coupled DVD-RAM main-beam RF signal input B 103 MC Analog Input DC coupled DVD-RAM main-beam RF signal input C 104 MD Analog Input DC coupled DVD-RAM main-beam RF signal input D 105 SA Analog Input DC coupled DVD-RAM sub-beam RF signal input A
106 SB Analog Input DC coupled DVD-RAM sub-beam RF signal input B
110 SC Analog Input DC coupled DVD-RAM sub-beam RF signal input C 111 SD Analog Input DC coupled DVD-RAM sub-beam RF signal input D
108 IR Analog External current bias resistor (R=20K)
119 AGC1 Analog Wobble AGC loop1 capacitor 121 AGC2 Analog Wobble AGC loop2 capacitor 122 AGC3 Analog Wobble AGC loop3 capacitor
MT1336
127 RFSUBO Analog output Header push-pull RF output signal
1 WOBSO Digital output Wobble signal output 6 RFOP Analog output RF positive output 7 RFON Analog output RF negative output
TRACKING ERROR
32 DPFN Analog DPD amplifier negative input 33 DPFO Analog DPD amplifier output
61 DPDMUTE Digital input DPD mute control input 116 TNI Analog Input 3 beam satellite PD signal negative input 115 TPI Analog Input 3 beam satellite PD signal positive input
21 TEO Analog Output Tracking error output
FOCUSING ERROR & RF LEVEL & CENTRAL SERVO SIGNAL
112 CDFOP Analog Input CD focusing error positive input 113 CDFON Analog Input CD focusing error negative input
18 FEO Analog Output Focusing error output
19 LVL Analog Output RF level output
20 CSO Analog output Central servo signal output
ALPC
Page 18
16
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1336
124 MDI1 125 LDO1 Analog Ou tput Laser driver output 123 MDI2 126 LDO2 Analog Output Laser driver output
RF RIPPLE
26 CRTP Analog RF top envelop filter capacitor connecting
27 CRTPLP Analog Defect level filter capacitor connecting
25 HRFRP Analog output High frequency RF ripple output or Blank detector’s output
24 LRFRP Analog output Low frequency RF ripple output
POWER
67, 69 AVDD Power Master PLL Filter power 65, 73 AGND GND GND for Master PLL Filter 64 AVDD Power DPD Power 62 AGND GND DPD GND 109 AVDD Power RF path Power 107 AGND GND RF path GND
Analog Input
Analog Input
Laser power monitor input
Laser power monitor input
114 SVDD Power Servo Power 117 SGND GND Servo GND 2,120 WAVDD Power Wobble Power 128,118 WAGND GND Wobble GND 5 AVDDO Power Power for RF output
8 AGNDO GND GND for RF output 14 AVDDT Power Power for Trimming PAD 12 AGNDT GND GND for Trimming PAD 22 VDDP Power Peak Detection Power 31 GNDP GND Peak Detection GND 37,54 VDD Power Serial I/O Power 39,57 GND GND Serial I/O GND
REFERENCE VOLTAGE
16 VREFO Analog output Reference voltage 1.4V
15 V2REFO Analog output Reference voltage 2.8V
17 V20 Analog Output Reference voltage 2.0V
Page 19
17
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
ALPC TRIMMING
9 TM1 Analog input Trimming pin for ALPC1 10 TM2 Analog input Trimming pin for ALPC1 11 TM3 Analog input Trimming pin for ALPC2 13 TM4 Analog input Trimming pin for ALPC2
HIGH SPEED TRACK COUNTING
29 TRLP Analog Low-pass filter capacitor connecting 28 TRLPA Analog Low-pass filter capacitor connecting 30 HTRC Digital output High speed track counting digital output
PCS
74 HALLSIN Analog input Negative input of amplifier for hall sensor signal
75 REFSIN Analog input Positive input of amplifier for hall sensor signal
76 SINPHI Analog output Amplifier output for hall sensor signal
MT1336
71 HALLCOS Analog input Negative input of amplifier for hall sensor signal
72 REFCOS Analog input Positive input of amplifier for hall sensor signal
70 COSPHI Analog output Amplifier output for hall sensor signal
FOR MONITOR ONLY
81 80
66 VCON Analog output 77 SWO Analog output Output from mux of SW1 & SW2 78 SW2 Analog input External input for servo input select 79 SW1 Analog input External input for servo input select
FOR SERIAL I/O
42 43 IO1 44 IO2 45 IO3 46 IO4
MON Analog output
MOP Analog output
IO0
47 IO5
Page 20
18
PRELIMINARY, SUBJ ECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
48 IO6 49 IO7 50 IO8 51 IO9 52 IOA 53 IOB
MT1336
Page 21
19
8.2 MT1379
Specifications are subject to change without notice
n Super Integration DVD player single chip
§
Servo controller and data channel processing
§
MPEG-1/MPEG-2/JPEG video decoding
§
Dolby AC-3/DTS/DVD-Audio audio decoding
§
Unified track buffer and A/V decoding buffer
§
Video processing for scaling and video quality enhancement
§
OSD & Sub-picture decoding
§
Built-in clock generator
§
Built-in TV encoder
§
Built-in progressive video output
§
Video input port and audio/SPDIF input port
n Speed Performance on Servo and Decoding
§
DVD-ROM up to 8XS
§
CD-ROM up to 24XS
§
Built-in a frequency programmable clock to µP and RSPC Decoder to optimize the performance over power
n Channel Data Processor
§
Provides interface with analog front -end processor
§
Analog data slicer for small jitter capability
§
Built-in high performance data PLL for channel data demodulation
§
EFM/EFM+ data demodulation
§
Enhanced channel data frame sync protection & DVD-ROM sector sync protection
n Servo Control and Spindle Motor Control
§
Programmable frequency error gain and phase error gain of spindle PLL to control spindle motor on CLV and CAV mode
§
Provide a varipitch speed control for CLV and CAV mode
§
Built-in ADCs and DACs for digital servo control
§
Provide 2 general PWM
Progressive Scan DVD Player Combo Chip
§
Tray control can be PWM output or digital output
§
Built-in DSP for digital servo control
n Host Micro controller
§
Built-in 8032 micro controller
§
Built-in internal 373 and 8-bit programmable
MT1379
lower address port
§
1024-bytes on-chip RAM
§
Up to 2M bytes FLASH -programming interface
§
Supports 5/3.3-Volt. FLASH interface
§
Supports power-down mode
§
Supports additional serial port
n DVD-ROM/CD-ROM Decoding Logic
§
Supports CD-ROM Mode 1, CD-ROM XA Mode 2 Form 1, CD-ROM XA Mode 2 Form 2, and CD -DA formats
§
High-speed ECC logic capable of correcting one error per each P -codeword or Q-codeword
§
Automatic sector Mode and Form detection
§
Automatic sector Header verification
§
8-bit counter for decode completion check
§
Programmable descrambling and error correction schemes
§
Automatically repeated error corrections
§
8-bit C2 Pointer counter
§
Decoder Error Notification Interrupt that signals various decoder errors
§
Provide error correction acceleration
n Buffer Memory Controller
§
Supports 16Mb/32Mb/64Mb/128Mb SDRAM
§
Supports 16-bit/32-bit SDRAM data bus interface
§
Build in a DRAM interface programmable clock to optimize the DRAM performance
§
Provide the se lf-refresh mode SDRAM
§
Programmable DRAM access cycle and refresh
Page 22
20
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1379
cycle timings
§
Block-based sector addressing
§
Programmable buffering counter for buffer status tracking
§
Maximum DRAM speed is 133MHz
§
Support 5/3.3-Volt. DRAM Interface
n Video Decode
§
Decodes MPEG 1 video and MPEG2 main level, main profile video (720/480 and 720x576)
§
Maximum input bit -rate of 15Mbits/sec
§
Smooth digest view function with I, P and B picture decoding
§
Baseline, extended-sequential and progressive JPEG image decoding
§
RLE and non-RLE BMP image decoding
§
Support CD-G titles
n Video/OSD/SPU/HLI Processor
§
Arbitrary ratio vertical/horizontal scaling of video, from 0.25X to 256X
§
65535/256/16/4/2-color bitmap format OSD,
§
256/16 color RLC format OSD
§
Automatic scrolling of OSD image
§
Provides 4-color/32x32-pixel hardware cursor
§
Fade-in, Fade out, and Wipe functions as specified in the DVD-Audio Specification and other slide show transition effects
§
Progressive scan output
n Audio Processing
§
Decoder format supports:
- Dolby Digital (AC -3) decoding
- DTS decoding
- MLP decoding for DVD -Audio
- MPEG-1 layer 1/layer 2 audio decoding
- MPEG-2 layer1/layer2 2 -channel audio decoding
- Dolby Pro Logic decoding
- High Definition Compatible Digital (HDCD) decoding
§
Up to 6 channel linear PCM output for DVD Audio / DVD Video
§
Downmix function
§
Support IEC 60958/61937 output
- PCM / bit stream / mute mode
- Custom IEC latency up to 2 frames
§
Pink noise and white noise generator
§
Karaoke functions
- Microphone echo with adjustable echo level, echo -depth and delay length
- Microphone tone control with three custom second-order IIR filter
- Vocal mute/vocal assistant
- Key shift up to +/- 8 keys controlled by 1/2 key
§
Channel equalizer
§
3D surround processing include virtual surround and speaker separation
§
Power-down control
§
HDCD certified
n TV Encoder
§
Six 54MHz/12bit DA converters
§
Support NTSC, PAL-BDGHI, PAL-N, PAL-M interlace TV format and 480p, 576p progressive TV format
§
Automatically turn off unconnected channel(s).
§
Support PC monitor (VGA)
§
Support Macrovision 7.1
n Progressive Output
§
Automatic detect film or video source
§
3:2 pull down source detection
§
Advanced Motion adaptive de-interlace
§
Minimum external memory requirement
n Audio/Video Output
§
Line-in/SPDIF-in for versatile audio processing
§
CCIR601/656 video input port
§
Support picture -in-picture for video decoding and input source
n Outline
§
216-pin LQFP package
§
3.3/2.5-Volt. Dual operating voltages
Page 23
The 2nd general PWM output
21
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1379
P
IN DEFINITIONS
Pin Number Symbol Type Description
1 IREF Analog Input Current reference input. It generates reference current for data
2 PLLVSS Ground Ground pin for data PLL and related analog circuitry 3 LPIOP Analog Output Positive output of the low pass filter 4 LPION Analog Output Negative output of the low pass filter 5 LPFON Analog output Negative output of loop filter amplifier 6 LPFIP Analog Input Positive input of loop filter amplifier 7 LPFIN Analog Input Negative input of loop filter amplifier 8 LPFOP Analog Output Positive output of loop filter amplifier
9 JITFO Analog Output RF jitter meter output 10 JITFN Analog Input Negative input of the operation amplifier for RF jigger meter 11 PLLVDD3 Power 3.3V power pin for data PLL and related analog circuitry 12 FOO Analog Output Focus servo output. PDM output of focus servo compensator 13 TRO Analog Output Tracking servo output. PDM output of tracking servo compensator 14 TROPENPWM Analog Output Tray open output, controlled by microcontroller.
15 PWMOUT1 Analog Output The 1st general PWM output 16 PWMOUT2 Analog Output 17 DVDD2 Power 2.5V power pin for internal fully digital circuitry 18 DMO Analog Output Disk motor control output. PWM output 19 FMO Analog Output Feed motor control. PWM output 20 DVSS Ground Ground pin for internal fully digital circuitry 21 FG Input Motor Hall sensor input 22 HIGHA0 Inout
23 HIGHA1 Inout
24 HIGHA2 Inout
25 HIGHA3 Inout
26 HIGHA4 Inout
27 HIGHA5 Inout
28 DVSS Grou nd Ground pin for internal digital circuitry
PLL. Connect an external 100K resistor to this pin and PLLVSS.
This is PWM output for TRWMEN27hRW2=1 or is digital output for TRWMEN27hRW2=0
Microcontroller address 8
2~16MA, SR
PU
Microcontroller address 9
2~16MA, SR
PU
Microcontroller address 10
2~16MA, SR
PU
Microcontroller address 11
2~16MA, SR
PU
Microcontroller address 12
2~16MA, SR
PU
Microcontroller address 13
2~16MA, SR
PU
Page 24
22
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Pin Number Symbol Type Description
29 HIGHA6 Inout
30 HIGHA7 Inout
31 AD7 Inout
32 AD6 Inout
33 AD5 Inout
34 AD4 Inout
35 DVDD3 Power 3.3V power pin for internal digital circuitry 36 AD3 Inout
37 AD2 Inout
38 AD1 Inout
39 AD0 Inout
40 IOA0 Inout
41 IOA1 Inout
42 DVDD2 Power 2.5V power pin for internal digital circuitry 43 IOA2 Inout
44 IOA3 Inout
45 IOA4 Inout
46 IOA5 Inout
47 IOA6 Inout
Microcontroller address 14
2~16MA, SR
PU
Microcontroller address 15
2~16MA, SR
PU
Microcontroller address/data 7
2~16MA, SR
Microcontroller address/data 6
2~16MA, SR
Microcontroller address/data 5
2~16MA, SR
Microcontroller address/data 4
2~16MA, SR
Microcontroller address/data 3
2~16MA, SR
Microcontroller address/data 2
2~16MA, SR
Microcontroller address/data 1
2~16MA, SR
Microcontroller address/data 0
2~16MA, SR
Microcontroller address 0 / IO
2~16MA, SR
PU
Microcontroller address 1 / IO
2~16MA, SR
PU
Microcontroller address 2 / IO
2~16MA, SR
PU
Microcontroller address 3 / IO
2~16MA, SR
PU
Microcontroller address 4 / IO
2~16MA, SR
PU
Microcontroller address 5 / IO
2~16MA, SR
PU
Microcontroller address 6 / IO
2~16MA, SR
PU
MT1379
Page 25
23
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Pin Number Symbol Type Description
48 IOA7 Inout
49 A16 Output
50 A17 Output
51 IOA18 Inout
52 IOA19 Inout
53 IOA20 Inout
54 APLLVSS Ground Ground pin for audio clock circuitry 55 APLLVDD3 Power 3.3V Power pin for audio clock circuitry 56 ALE Inout
57 IOOE# Inout
58 IOWR# Inout
59 IOCS# Inout
60 DVSS Ground Ground pin for internal digital circuitry 61 UP1_2 Inout
62 UP1_3 Inout
63 UP1_4 Inout
64 UP1_5 Inout
65 UP1_6 Inout
66 DVDD3 Power 3.3V power pin for internal digital circuitry
Microcontroller address 7 / IO
2~16MA, SR
PU
Flash address 16
2~16MA, SR
Flash address 17
2~16MA, SR
Flash address 18 / IO
2~16MA, SR
SMT
Flash address 19 / IO
2~16MA, SR
SMT
Flash address 20 / IO
2~16MA, SR
SMT
2~16MA, SR
PU, SMT
2~16MA, SR
SMT
2~16MA, SR
SMT
2~16MA, SR
PU, SMT
4MA, SR PU, SMT
4MA, SR PU, SMT
4MA, SR PU, SMT
4MA, SR PU, SMT
4MA, SR PU, SMT
OR Videoin Data PortB 0
Microcontroller address latch enable
Flash output enable, active low / IO
Flash write enable, active low / IO
Flash chip select, active low / IO
Microcontroller port 1-2
Microcontroller port 1-3
Microcontroller port 1-4
Microcontroller port 1-5
Microcontroller port 1-6
MT1379
Page 26
24
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Pin Number Symbol Type Description
67 UP1_7 Inout
68 UP3_0 Inout
69 UP3_1 Inout
70 INT0# Inout
71 IR Input
72 DVDD2 Power 2.5V power pin for internal digital circuitry 73 UP3_4 Inout Microcontroller port 3-4 74 UP3_5 Inout Microcontroller port 3-5 75 UWR# Inout
76 URD# Inout
77 DVSS Ground Ground pin for internal digital circuitry 78 RD7 Inout DRAM data 7 79 RD6 Inout DRAM data 6 80 RD5 Inout DRAM data 5 81 RD4 Inout DRAM data 4 82 DVDD2 Power 2.5V power pin for internal digital circuitry 83 RD3 Inout DRAM data 3 84 RD2 Inout DRAM data 2 85 RD1 Inout DRAM data 1 86 RD0 Inout DRAM data 0 87 RWE# Output
88 CAS# Output
89 RAS# Output
90 RCS# Output
91 BA0 Output
92 DVSS Ground Ground pin for internal digital circuitry 93 RD15 Inout
Microcontroller port 1-7 4MA, SR PU, SMT
Microcontroller port 3-0 4MA, SR PU, SMT
Microcontroller port 3-1 4MA, SR PU, SMT
Microcontroller interrupt 0, active low
2~16MA, SR
PU, SMT
IR control signal input
SMT
Microcontroller write s trobe, active low
2~16MA, SR
PU, SMT
Microcontroller read strobe, active low
2~16MA, SR
PU, SMT
DRAM Write enable, active low
2~16MA, SR
DRAM columnaddress strobe, active low
2~16MA, SR
DRAM row address strobe, active low
2~16MA, SR
DRAM chip select, active low
2~16MA, SR
DRAM bank address 0
2~16MA, SR
DRAM data 15
2~16MA, SR PU/PD, SMT
MT1379
Page 27
25
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1379
Pin Number Symbol Type Description
94 RD14 Inout
DRAM data 14
2~16MA, SR PU/PD, SMT
95 RD13 Inout
DRAM data 13
2~16MA, SR PU/PD, SMT
96 RD12 Inout
DRAM data 12
2~16MA, SR
PU/PD, SMT 97 DVDD3 Power 3.3V power pin for internal digital circuitry 98 RD11 Inout
DRAM data 11 2~16MA, SR PU/PD, SMT
99 RD10 Inout
DRAM data 10 2~16MA, SR PU/PD, SMT
100 RD9 Inout
DRAM data 9 2~16MA, SR PU/PD, SMT
101 RD8 Inout
DRAM data 8 2~16MA, SR PU/PD, SMT
102 DVSS Ground Ground pin for internal digital circuitry 103 CLK Output
DRAM clock 2~16MA, SR
104 CLE Output
DRAM clock enable 2~16MA, SR
105 RA11 Output
DRAM address bit 11 or audio serial data 3 (channel 7/8) 2~16MA, SR
106 RA9 Output
DRAM address 9 2~16MA, SR
107 RA8 Output
DRAM address 8 2~16MA, SR
108 DMVDD3 Power 3.3V Power pin for DRAM clock circuitry 109 DMVSS Ground Ground pin for DRAM clock circuitry 110 RA7 Output
DRAM address 7 2~16MA, SR
111 DVDD3 Power 3.3V power pin for internal digital circuitry 112 RA6 Output
DRAM address 6 2~16MA, SR
113 RA5 Output
DRAM address 5 2~16MA, SR
114 RA4 Output
DRAM address 4 2~16MA, SR
115 DVSS Ground Ground pin for internal digital circuitry 116 DQM1 Output
Mask for DRAM input/output byte 1 2~16MA, SR
Page 28
26
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Pin Number Symbol Type Description
117 DQM0 Output
118 BA1 Output
119 RA10 Output
120 DVDD2 Power 2.5V power pin for internal digital circuitry 121 RA0 Output
122 RA1 Output
123 RA2 Output
124 RA3 Output
125 DVSS Ground Ground pin for internal digital circuitry 126 RD31 Inout
127 RD30 Inout
128 RD29 Inout
129 RD28 Inout
130 DVDD3 Power 3.3V power pin for internal digital circuitry 131 RD27 Inout
132 RD26 Inout
133 RD25 Inout
134 RD24 Inout
135 DVSS Ground Ground pin for internal digital circuitry 136 DQM3 Output
137 DQM2 Output
Mask for DRAM input/output byte 0 2~16MA, SR
DRAM bank address 0 2~16MA, SR
DRAM address10 2~16MA, SR
DRAM address 0 2~16MA, SR
DRAM address 1 2~16MA, SR
DRAM address 2 2~16MA, SR
DRAM address 3 2~16MA, SR
DRAM data 31 2~16MA, SR PU/PD, SMT
DRAM data 30 2~16MA, SR PU/PD, SMT
DRAM data 29 2~16MA, SR PU/PD, SMT
DRAM data 28 2~16MA, SR PU/PD, SMT
DRAM data 27 2~16MA, SR PU/PD, SMT
DRAM data 26 2~16MA, SR PU/PD, SMT
DRAM data 25 2~16MA, SR PU/PD, SMT
DRAM data 24 2~16MA, SR PU/PD, SMT
Mask for DRAM input/output byte 3 2~16MA, SR
Mask for DRAM input/output byte 2 2~16MA, SR
MT1379
Page 29
27
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Pin Number Symbol Type Description
138 RD23 Inout
139 RD22 Inout
140 DVDD2 Power 2.5V power pin for internal digital circuitry 141 RD21 Inout
142 RD20 Inout
143 RD19 Inout
144 RD18 Inout
145 DVSS Ground Ground pin for internal digital circuitry 146 RD17 Inout
147 RD16 Inout
148 ABCK Output
149 ALRCK Inout
150 DVDD3 Power 3.3V power pin for internal digital circuitry 151 ACLK Inout
152 MC_DATA Input Microphone serial input 153 SPDIF Output
154 ASDATA0 Inout
155 ASDATA1 Inout
156 ASDATA2 Inout
DRAM data 23 / 2~16MA, SR PU/PD, SMT
2~16MA, SR PU/PD, SMT
2~16MA, SR PU/PD, SMT
2~16MA, SR PU/PD, SMT
2~16MA, SR PU/PD, SMT
2~16MA, SR PU/PD, SMT
2~16MA, SR PU/PD, SMT
2~16MA, SR PU/PD, SMT
4MA
4MA,
PD, SMT
4MA
2~16MA,
SR : ON/OFF
4MA
PD SMT
4MA
PD SMT
4MA
PD SMT
Videoin Data PortA 7
DRAM data 22 /
Videoin Data PortA 6
DRAM data 21 /
Videoin Data PortA 5
DRAM data 20 /
Videoin Data PortA 4
DRAM data 19 /
Videoin Data PortA 3
DRAM data 18 /
Videoin Data PortA 2
DRAM data 17 /
Videoin Data PortA 1
DRAM data 16 /
Videoin Data PortA 0
Audio bit clock
(1) Audio left/right channel clock (2) Trap value in power-on reset :
1 : use external 373 0: use internal 373
Audio DAC master clock (384/256 audio sample frequency)
SPDIF output
(1) Audio serial data 0 (left/right channel) (2) Trap value in power-on reset :
1 : manufactory test mode 0 : normal operation
(1) Audio serial data 1 (surround left/surround right channel) (2) Trap value in power-on reset : 1 : manufactory test mode 0 : normal operation (1) Audio serial data 2 (center/left channel) (2) Trap value in power-on reset : 1 : manufactory test mode 0 : normal operation
MT1379
Page 30
Analog Y output
28
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Pin Number Symbol Type Description
157 ASDATA3 Inout
158 ASDATA4 Inout
159 DACVDDC Power 3.3V power pin for VIDEO DAC circuitry 160 VREF Analog input Bandgap reference voltage 161 FS Analog output Full scale adjustment 162 YUV0/CIN Output
163 DACVSSC Ground Ground pin for VIDEO DAC circuitry 164 YUV1/C Output
165 DACVDDB Power 3.3V power pin for VIDEO DAC circuitry 166 YUV2/Y Output
167 DACVSSB Ground Ground pin for VIDEO DAC circuitry 168 YUV3/CVBS Output
169 DACVDDA Power 3.3V power pin for VIDEO DAC circuitry
170 YUV4/G Output
171 DACVSSA Ground Ground pin for VIDEO DAC circuitry 172 YUV5/B Output
173 YUV6/R Output
174 ICE
175 BLANK# Inout
176 VSYN Inout
177 YUV7 Inout
178 DVSS Ground Ground pin for internal digital circuitry 179 HSYN Inout
180 SPMCLK Input Audio DAC master clock of SPDIF input /
(1) Audio serial data 3 (surround left/surround right channel)
4MA
PD SMT
4MA
PD SMT
4MA, SR
4MA, SR
4MA, SR
4MA, SR
4MA, SR
4MA, SR
4MA, SR
Input
PD, SMT
4MA, SR
SMT
4MA, SR
SMT
4MA, SR
SMT
4MA, SR
SMT
(2) Trap value in power-on reset : 1 : manufactory test mode 0 : normal operation OR Videoin Data PortB 1
(1) Audio serial data 4 (center/left channel)
(2) Trap value in power-on reset : 1 : manufactory test mode 0 : normal operation OR Videoin Data PortB 2
Video data output bit 0 /
Compensation capacitor
Video data output bit 1 /
Analog chroma output
Video data output bit 2 /
Video data output bit 3 /
Analog composite output
Video data output bit 4 /
Green or Y
Video data output bit 5 /
Blue or CB
Video data output bit 6 /
Red or CR
Microcontroller ICE mode enable
Video blank area, active low /
Videoin Field_601
Vertical sync /
Videoin Vsync_601
Video data output bit 7 /
Videoin Data PortB 3
Horizontal sync /
Videoin Hsync_601
Videoin Data PortB 4
MT1379
Page 31
RF serial data output
29
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
Pin Number Symbol Type Description
181 SPDATA Input Audio data of SPDIF input /
182 DVDD2 Power 2.5V power pin for internal digital circuitry 183 SPLRCK Input Audio left/right channel clock of SPDIF input /
184 SPBCK Input Audio bit clock of SPDIF input /
185 DVDD3 Power 3.3V power pin for internal digital circuitry 186 XTALO Output Crystal output 187 XTALI Input Crystal input 188 PRST Input
189 DVSS Ground Ground pin for internal digital circuitry 190 VFO13 Output The 1st, 3rd header VFO pulse output 191 IDGATE Output Header detect signal output 192 DVDD3 Power 3.3V power pin for internal digital circuitry 193 UDGATE Output DVD_RAM recording data gate signal output 194 WOBSI Input Wobble signal input 195 SDATA Output 196 SDEN Output RF serial data latch enable 197 SLCK Output RF serial clock output 198 BDO Input Flag of defect data input status 199 ADCVSS Ground Ground pin for ADC circuitry 200 ADIN Analog Input General A/D input 201 RFSUBI Analog Input RF subtraction signal input terminal 202 TEZISLV Analog Input Tracking error zero crossing low pass input 203 TEI Analog Input Tracking error input 204 CSO Analog Input Central servo input 205 FEI Analog Input Focus error input 206 RFLEVEL Analog Input Sub beam add input or RFRP low pass input 207 RFRP_DC A Input RF ripple detect input 208 RFRP_AC Analog Input RF ripple detect input (through AC coupling) 209 HRFZC Analog Input High frequency RF ripple zero crossing 210 PWMVREF A Input A reference voltage input for PWM circuitry. A typical value of 4.0 v 211 PWM2VREF A Input A reference voltage input for PWM circuitry. A typical value of 2.0 v 212 ADCVDD3 Power 3.3V power pin for ADC circuitry 213 RFDTSLVP Analog Output Positive RF data slicer level output 214 RFDTSLVN Analog Output Negative RF data slicer level output 215 RFIN Analog Input Negative input of RF differential signal 216 RFIP Analog Input Positive input of RF differential signal
Videoin Data PortB 5
Videoin Data PortB 6
Videoin Data PortB 7
Power on reset input, active high
PD, SMT
MT1379
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MT1379
26 Jul, 2002
Page 1 of 2
IREF
PLLVSS
LPIOP LPION
LPFON
LPFIP LPFIN
LPFOP
JITFO
JITFN
PLLVDD3
FOO TRO
TROPENPWM
PWMOUT1 PWMOUT2
DVDD2
DMO
FMO
DVSS
HIGHA0 HIGHA1 HIGHA2 HIGHA3 HIGHA4 HIGHA5
DVSS HIGHA6 HIGHA7
AD7 AD6 AD5 AD4
DVDD3
AD3 AD2 AD1
AD0 IOA0 IOA1
DVDD2
IOA2 IOA3 IOA4 IOA5 IOA6 IOA7
IOA18 IOA19 IOA20
APLLVSS
A16 A17
RFRP_AC
RFRP_DC
FEI
RFLEVEL
RFDTSLVN
RFDTSLVP
ADCVDD3
212
213
214
59
58
575655
PWMVREF
210
211
209
626160
RFIN
RFIP
215
216
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
FG
22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
HRFZC
PWM2VREF
CSO
TEI
ADIN
RFSUBI
TEZISLV
200
201
202
203
204
205
206
207
208
717069
686766
656463
BDO
ADCVSS
198
199
SLCK
197
747372
SDEN
196
SDATA
WOBSI
194
195
777675
UDGATE
193
PRST
VFO13
DVDD3
IDGATE
DVSS
XTALI
XTALO
186
187
188
189
190
191
192
MT1379
(216 pins)
84
838281
807978
DVDD3
SPBCK
184
185
878685
DVDD2
SPLRCK
182
183
89
88
SPDATA
SPMCLK
180
181
HSYN
179
929190
DVSS
178
YUV7
177
VSYN
176
959493
BLANK
175
ICE
174
YUV6/R
YUV5/B
172
173
989796
99
YUV4/G
DACVDDA
DACVSSA
169
170
171
102
101
100
DACVSSB
YUV2/Y
YUV3/CVBS
166
167
168
104
103
105
DACVDDB
DACVSSC
YUV1/C
163
164
165
162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112
111 110 109
108
107
106
YUV0/CIN FS VREF DACVDDC ASDATA4 ASDATA3 ASDATA2 ASDATA1 ASDATA0 SPDIF MC_DATA ACLK DVDD3 ALRCK ABCK RD16 RD17 DVSS RD18 RD19 RD20 RD21 DVDD2 RD22 RD23 DQM2 DQM3 DVSS RD24 RD25 RD26 RD27 DVDD3 RD28 RD29 RD30 RD31 DVSS RA3 RA2 RA1 RA0 DVDD2 RA10 BA1 DQM0 DQM1 DVSS RA4 RA5 RA6 DVDD3 RA7 DMVSS
ALE
IOOE#
APLLVDD3
IOCS#
IOWR#
DVSS
UP1_2
UP1_3
UP1_4
UP1_5
UP1_6
DVDD3
UP1_7
UP3_0
UP3_1
INT0#
IR
UP3_4
DVDD2
UP3_5
UWR#
URD#
DVSS
RD7
RD6
RD5
RD4
RD3
DVDD2
RD2
RD1
RD0
RWE#
CAS#
RAS#
RCS#
BA0
DVSS
RD15
RD14
RD13
RD12
RD11
DVDD3
RD10
RD9
RD8
DVSS
CLK
CKE
RA11
RA9
RA8
DMVDD3
Page 33
31
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1379
F
UNCTIONAL BLOCK
IR/
VFD
Servo
IO
Servo
DSP
Playback
Controller
System
Controller
DVD module
Analog
Front end
DRAM
Interface
Spindle
Controller
DPU
Processor
Audio
Channel
Decode
Debug
Port
Audio
Output
CSS/
CPPM
System
Parser
Microphone
Input
Video
Decoder
TV encoder
Video
Output
Servo Controller
The servo control is accomplished through the servo DSP (Servo Digital Signal Processor) and its accessory I/O circuits. This servo DSP is capable of performing complex operations an d also provides a friendly interface for the system controller. By issuing type 1 and type 2 commands from the system controller, the servo DSP can accomplish various complicated servo control functions, such as tracking, seeking and MT1336/MT1376 chip register programming. As for the servo I/O circuits, it provides interface between the input servo signals and the Servo DSP. It has built-in ADCs to digitize the servo control signal and DACs to provide signals for the actuator and sledge motor. It also has a serial interface to communicate with the MT1336/MT1376 chip.
Analog Front End
The analog front end contains a data slicer circuit and a data PLL circuit. The RF analog signal from MT1336/MT1376 is quantized by the data slicer to form the EFM/EFM+ bit stream, from which the channel bit clock is extracted by the data PLL.The EFM/EFM+bit stream and bit clock are then output to DPU for channel bit processing.
DPU
Data path unit (DPU) provides protection on data with lost synchronization patterns and demodulates EFM/EFM+ bit stream into the channel raw data that will be corrected by the decoder. The synchronization protection makes data after the synchronization pattern to be extracted even if the synchronization pattern is not found.
Spindle Controller
The sp indle controller is used to control disc spindle motor. It includes a varipitch CLV clock generator, a CLV/CAV controller, and a PWM generator. The varipitch CLV clock enerator generates a reference colck for the speed of operation. The CLV/CAV
DRAMFlash
Audio DAC
SPDIF
MIC
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PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1379
controller changes the mode and speed of operation according to servo register setting. The PWM generator generates pulse-width-modulated signal to drive disc spindle motor driver.
CSS/CPPM
The CSS/CPPM module provides functions necessary for decoding discs conforming to CSS/CPPM specification.
System Parser
The system parser is used to help the system controller to decode DVD/SVCD/VCD bitstream just after the channel decoder performing error correction. Acting as a DMA master, it moves bitstream data from RSPC buffer to video, audio, or sub-picture buffer according to system controller request. It also decrypts the scramble data of the CSS/CPPM sectors. Another function of system parser is providing system controller/DSP a DRAM memory copy controller to enhance system controller/DSP performance.
Video Decoder
The primary function of MT1379 is to support MPEG1 and MPEG2 video decoding. The video decode engine comprises of variable length decoder (VLD), inverse transformer (IT), motion compensator (MC), and block reconstructor (BR). The video decode engine decodes the variable length encoded symbols in MPEG bitstream and performs inverse scan, inverse quantization, mismatch control and inverse discrete cosine transform onto the variable length decoded data. The motion compensator fetches prediction data from reference picture buffer according to motion vectors and motion prediciton mode for P and B pictures. Finally, the block reconstructor combines both the results of inverse transformer and motion compensator to derive the reconstructed image macroblock and write back to picture buffer.
The video decode engine can also support JPEG and BMP file decoding by common image compression hardware kernels.
Video Output
The Video Output unit contains Video Processor, SPU, OSD, Cursor, TV encoder units, it performs
§
§
§
§
§
§
Video Processor
SPU
Reading decoded video from DRAM buffer Scaling the image Gamma/Brightness/Hue/Saturation adjustment and edge enhancement Reading and decoding SPU and OSD data from DRAM buffer Generating hardware cursor image Merging the video data, SPU, OSD and cursor
The Video Processor unit controls the transfer of video data stored in the DRAM to an internal or external TV encoder. It uses FIFOs to buffer outgoing luminance and chrominance data, and performs YUV420 to YUV422 conversion and arbitrary vertical/horizontal decimation/interpolation, from 1/4x to 256x. With this arbitrary ratio scaling capability, the Video Processor can perform arbitrary image conversion, such as PAL to NTSC, NTSC to PAL, MPEG1 to MPEG2, Letterbox, Pan-Scan conversion or zoom in, zoom out. It is also capible of interlace to progressive conversion.
The Video Processor unit performs the following functions:
§
Requests and receives the decoded picture data from the picture buffer in external DRAM for display
§
Resample vertical data to create 4:2:2 sample format
§
Optionally performs vertical/horizontal resampling of both luminance and chrominance data
§
Performs optional Gamma correction, luminance/chrominance adjustment, and edge enhancement
The V ideo Processor unit contains two 2-tap vertical filters for luminance and chrominance . These filters are used to interpolate and reposition luminance and chrominance line to improve picture quality. These filters are capble of generating up to eight, unique subline value between two consecutive scan lines. The generation of lines depends on the ratio between the height of the source image and the target image. In applications where DRAM bandwidth are critical the filters can be configured as simple line-repeating to reduce the DRAM bandwidth required.
The Video Processor unit integrates two separate horizontal postprocessing filter, a simple 2-tap linear horizontal filter and an 8-tap programmable filter. These filters are provided for scaling images horizontally along the scan line. These two filters is capable of generating up to eight, unique subpixel values between two consecutive pixels on a scan line. The generation of pixels depends on the ratio between the width of the source image and the target image.
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PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
This is a hardware sub-picture decoder. It decodes the compressed SPU image bitstream and CHG_COLCON commands according to SPU header information previously decoded by system controller. The SPU module also allows two SPU objects to be displayed at the same time. SPU image is blended with main video stream.
OSD
The OSD module can operate with 2/4/16/256-color bitmap format (1/2/4/8 bits), and 16/256 color RLC format, all have 16 levels of transparency. In addition, it accepts an special WARP mode, which inserts one programmable RLC code in the bitmap to reduce the image size stored in DRAM. It also features automatic shadow/outline generation in 2-color mode, 2 Hilight areas, 1 ChangeColor area and 1 OSDVoid area. One OSD area can occupy the full or a partial screen, or multiple OSDs can occur in a screen at the same time, only if they don't occupy the same horizontal line. The output image is blended with the video-SPU mixed stream.
Cursor
A hardware cursor generator is integrated in Video Output Unit. The cursor image is a 32x32 4-color bitmap image, each colors are programmable. Cursor can be enlarged by 2 in both vertical and horizontal directions. Cursor image is multiplexed with video-SPU-OSD mixed stream.
Audio Interface
Audio interface consists of Audio Output Interface and Microphone Input Interface.
Audio Output Interface
The MT1379 can support up to 8 channel audio outputs. The output formats can be 16, 24, or 32-bit frames. Left alignment, right alignment, or I2S formats are all supported.
With built-in PLL, MT1379 can provide the audio clock (ACLK) for external audio DAC at 384Fs, where Fs is usually 32KHz,
44.1KHz, 48KHz, 96KHz, or 192KHz. ACLK can also be programmed to be from outside MT1379. When ACLK is input to MT1379, the frequency could be 128*n Fs, where n is from 1 to 7.
Audio raw (encoded) data or cooked (decoded) data can be output on a single line using S/PDIF interface. The output slew rate and driving force of this pad are programmable.
Microphone Input Interface
The MT1379 provides a microphone input interface. Two independent microphones’ data could be input to the MT1379. There are two independent digital volume control for these two input channels. The input data formats can also be left alignment, right alignment, or I2S formats.
MT1379
System Controller
MT1379 uses an embedded Turbo-8032 as System Controller and provide ICE interface to increase the feasibility of F/W development. Also, MT1379 includes an build-in internal 373 to latch lower byte address from 8032 Port 0 and provide a glue-logic free solution. MT1379 supports up to 1M X 16 bits Flash ROM to store 8032 code, H/W related data, User data, etc. F/W upgrade can be achieved either by debug interface or by disk.
Page 36
34
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE
MT1379
E
LECTRICAL CHARACTERISTICS
Absolute Maximum Rating
Symbol Parameters Value Unit
VDD3 3.3V Supply voltage -0.3 to 3.6 V VDD2 2.5V Supply voltage -0.3 to 3.0 V VDDA Analog Supply voltage -0.3 to 3.6 V
VIN Input Voltage -0.3 to 5.5 V
V
Output Voltage -0.3 to VDD3+0.3 V
OUT
Ta Ambient Temperature 0 to 70 °C
DC Charateristics
Symbol Parameters Min Typ Max Unit
VIH Input voltage high 2.4 - 3.6 V
VIL Input voltage low - - 0.8 V VOH Output voltage high 3.0 - VDD3 V VOL Output voltage low - - 0.5 V
IIH High level input current 10 uA
IIL Low level input current -10 uA
PD Power dissapation 1.0 W
P
Power down mode 0.1 W
Down
Page 37
16 Megabit (2 M x 8-Bit/1 M x 16-Bit)
35
8.3 Am29LV160D
CMOS 3.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
Single power supply operation
— Full voltage range: 2.7 to 3.6 volt read and write
operations for battery-powered applications
— Regulated volt age range: 3.0 to 3.6 v olt read and
write operations and for compatibility with high performance 3.3 volt microprocessors
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
Manufactured on 0.23 µm process technology
— Fully compatible with 0.32 µm Am29LV160B device
High performance
— Access times as fast as 70 ns
Ultra low power consumption (typical values at
5MHz)
— 200 nA Automatic Sleep mode current — 200 nA standby mode current — 9 mA read current — 20 mA program/erase current
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
thirty-one 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and
thirty-one 32 Kword sectors (word mode) — Supports full chip erase — Sector Protection features:
A hardware method of locking a sector to prevent
any program or erase operations within that sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
Unlock Bypass Program Command
— Reduces ov erall programming ti me when issuing
multiple program command sequences
Top or bottom boot block configurations
available
Minimum 1,000,000 write cycle guarantee
per sector
20-year data retention at 125°C
— Reliable operation for the life of the system
Package option
— 48-ball FBGA — 48-pin TSOP — 44-pin SO
CFI (Common Flash Interface) compliant
— Provides device-specific information to the
system, allowing host software to easily reconfigure for different Flash devices
Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
Data# Polling and toggle bits
— Provides a soft ware method of detecting program
or erase operation completion
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
program or erase cycle completi on (not av ailable on 44-pin SO)
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being erased, then resumes the erase operation
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
array data
This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This Data Sheet may be revised by subsequent versions or modificat ions due to changes in technical specif ic ations.
Publication# 22358 Rev: B Amendment/+3 Issue Date: November 10, 2000
Page 38
PRODUCT SELECTOR GUIDE
36
Family Part Number Am29LV160D
Speed Option Voltage Range: V
Max access time, ns (t Max CE# access time, ns (t Max OE# access time, ns (t
)7090120
ACC
)7090120
CE
) 303550
OE
= 2.7–3.6 V -70 -90 -120
CC
Note: See “AC Characteristics” for full specifications.
BLOCK DIAGRAM
RY/BY#
V
CC
V
SS
RESET#
WE#
BYTE#
CE#
OE#
State
Control
Command
Register
PGM Voltage
Generator
Sector Switches
Erase Voltage
Generator
Chip Enable
Output Enable
Logic
STB
DQ0
DQ15 (A-1)
Input/Output
Buffers
Latch
Data
A0–A19
VCC Detector
Timer
STB
Address Latch
Y-Decoder
X-Decoder
Y-Gating
Cell Matrix
Am29LV160D
Page 39
CONNECTION DIAGRAMS
37
A15 A14 A13 A12 A11 A10
A9 A8
A19
NC
WE#
RESET#
NC NC
RY/BY#
A18 A17
A7 A6 A5 A4 A3 A2 A1
A16
BYTE#
V
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
V
DQ11
DQ3
DQ10
DQ2 DQ9 DQ1 DQ8 DQ0
OE#
V
CE#
A0
SS
CC
SS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Standard TSOP
Reverse TSOP
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
A16 BYTE# V
SS
DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4
V
CC
DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 OE#
V
SS
CE# A0
A15 A14 A13 A12 A11 A10 A9 A8 A19 NC WE# RESET# NC NC RY/BY# A18 A17 A7 A6 A5 A4 A3 A2 A1
Page 40
CONNECTION DIAGRAMS
38
RESET#
A18 A17
A7 A6 A5 A4 A3 A2 A1 A0
CE#
V
SS
OE# DQ0 DQ8 DQ1 DQ9 DQ2
DQ10
DQ3
DQ11
10 11 12 13 14 15 16 17 18 19 20 21 22
1 2 3 4 5 6 7 8 9
SO
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
WE# A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE# V
SS
DQ15/A-1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 V
CC
FBGA
Top View, Balls Facing Down
A6 B6 C6 D6 E6 F6 G6 H6
A5 B5 C5 D5 E5 F5 G5 H5
A4 B4 C4 D4 E4 F4 G4 H4
A3 B3 C3 D3 E3 F3 G3 H3
A2 B2 C2 D2 E2 F2 G2 H2
A1 B1 C1 D1 E1 F1 G1 H1
Special Handling Instructions
Special handling is required for Flash Memory products in FBGA packages.
BYTE#A16A15A14A12A13
DQ15/A-1 V
SS
DQ13 DQ6DQ14DQ7A11A10A8A9
V
CC
DQ4DQ12DQ5A19NCRESET#WE#
DQ11 DQ3DQ10DQ2NCA18NCRY/BY#
DQ9 DQ1DQ8DQ0A5A6A17A7
CE#A0A1A2A4A3
OE# V
SS
Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time.
A
Page 41
PIN CONFIGURATION
39
A0–A19 = 20 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode),
A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# = Write enable RESET# = H ardware reset pin RY/BY# = Ready/Busy output
(N/A SO 044)
= 3.0 volt-only single power supply
V
CC
(see Product Selector Guide for speed
options and voltage supply toleranc es)
LOGIC SYMBOL
20
A0–A19
CE# OE#
WE# RESET# BYTE# RY/BY#
16 or 8
DQ0–DQ15
(A-1)
(N/A SO 044)
V
SS
= Device ground
NC = Pin not connected internally
Page 42
HY57V641620HG
8.4 HY57V641620HG
40
4 Banks x 1M x 16Bit Synchronous DRAM
DESCRIPTION
The Hyundai HY57V641620HG is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V641620HG is organized as 4banks of 1,048,576x16.
HY57V641620HG is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchro­nized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated by a single control command (Burst length of 1,2,4,8 or Full page), and the burst count sequence(sequential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst
read or write command on any cycle. (This pipelined design is not restricted by a `2N` rule.)
FEATURES
Single 3.3±0.3V power supply
All device pins are compatible with LVTTL interface
JEDEC standard 400mil 54pin TSOP-II with 0.8mm of pin pitch
All inputs and outputs referenced to positive edge of system clock
Data mask function by UDQM or LDQM
Internal four banks operation
Note)
Auto refresh and self refresh
4096 refresh cycles / 64ms
Programmable Burst Length and Burst Type
- 1, 2, 4, 8 or Full page for Sequential Burst
- 1, 2, 4 or 8 for Interleave Burst
Programmable CAS Latency ; 2, 3 Clocks
.
Page 43
PIN CONFIGURATION
41
HY57V641620HG
VDD
DQ0
VDDQ
DQ1 DQ2
VSSQ
DQ3 DQ4
VDDQ
DQ5 DQ6
VSSQ
DQ7
DD
V
LDQM
/WE /CAS /RAS
/CS BA0 BA1
A10/AP
A0 A1 A2 A3
DD
V
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
54pin TSOP II
400mil x 875mil
0.8mm pin pitch
VSS
54
DQ15
53
VSSQ
52
DQ14
51
DQ13
50
VDDQ
49
DQ12
48
DQ11
47
VSSQ
46
DQ10
45
DQ9
44
VDDQ
43
DQ8
42
SS
V
41
NC
40
UDQM
39
CLK
38
CKE
37
NC
36
A11
35
A9
34
A8
33
A7
32
A6
31
A5
30
A4
29
SS
V
28
PIN DESCRIPTION
PIN PIN NAME DESCRIPTION
CLK Clock
CKE Clock Enable
CS Chip Select Enables or disables all inputs except CLK, CKE and DQM
BA0,BA1 Bank Address
A0 ~ A11 Address
Row Address Strobe,
RAS, CAS, WE
LDQM, UDQM Data Input/Output Mask Controls output buffers in read mode and masks input data in write mode DQ0 ~ DQ15 Data Input/Output Multiplexed data input / output pin VDD/VSS Power Supply/Ground Power supply for internal circuits and input buffers VDDQ/VSSQ Data Output Power/Ground Power supply for output buffers NC No Connection No connection
Column Address Strobe, Write Enable
The system clock input. All other inputs are registered to the SDRAM on the rising edge of CLK
Controls internal clock signal and when deactivated, the SDRAM will be one of the states among power down, suspend or self refresh
Selects bank to be activated during RAS activity Selects bank to be read/written during CAS activity
Row Address : RA0 ~ RA11, Column Address : CA0 ~ CA7 Auto-precharge flag : A10
RAS, CAS and WE define the operation Refer function truth table for details
Page 44
FUNCTIONAL BLOCK DIAGRAM
I/O Buffer & Logic
42
1Mbit x 4banks x 16 I/O Synchronous DRAM
HY57V641620HG
Self refresh logic
& timer
CLK
CKE
CS
RAS
CAS
WE
UDQM
LDQM
Row active
State Machine
refresh
Column Active
Internal Row
counter
Row
Pre
Decoders
Column
Pre
Decoders
1Mx16 Bank 3
X decoders
1Mx16 Bank 2
X decoders
X decoders
1Mx16 Bank 1
1Mx16 Bank 0
X decoders
Memory
Y decoders
Cell
Array
Sense AMP & I/O Gate
DQ0 DQ1
DQ14 DQ15
Bank Select
A0 A1
A11 BA0 BA1
Address buffers
Address Registers
Mode Registers
Column Add
Counter
Burst
Counter
CAS Latency
Data Out Control
Pipe Line Control
Page 45
KEY3
FRONT SCHEMATIC DIAGRAM
43
9. SCHEMATIC & PCB WIRING DIAGRAM
KEY2
KEY1
K406K403
K409
K402
K405
K408
K401
K404
K407
K410
1N4148
1N4148
1N4148
1N4148
D401
D402
D403
D404
S2
R401
LED401
1325384115136
S1
LTG-0239M
7B~7F18B~8F
S1
S2
S3
S4
104
G5G7G6
C401
G2
G3
G4
14
15A9B4C6D10E7F2G12
S3
S4
S5
S6
S7
S8
G1
VCC
R405
10K
LEDAT
6
R404
10K
LEDCK
R403
10K
LEDST
GND
XS06
IR
PVCC
23415
XS402
VCC
100uF/16V
TC403
VCC
R402
100
100uF/16V
TC402
104
C403
123
KEY3
S1
S2
S3
S4
S5
S6 S7
12
15
16
PT6961
IR
220uF/16V
TC401
U402
HS0038A2
C402
104
SEG6/KS6
SEG7/KS717SEG8/KS818SEG9/KS9
S8
SEG4/KS414SEG5/KS5
NC13SEG1/KS110SEG2/KS211SEG3/KS3
SEG10/KS10
19
9
SEG12/GR7
SEG11
VDD25GND
GR6
GR524GR427GR3
20
21
22
G7
26
23
G1
28
G3G4G5
G6
51K
2
U401
OSC1DOUT
DIN3CLK4STB5K16K27K38VDD
GND
GND
GR230GR1
29
32
31
VCC
G2
LEDAT
LEDCK
LEDST
KEY1
KEY2
Page 46
FRONT SCHEMATIC DIAGRAM
44
Page 47
!
POWER BOARD SCHEMATIC DIAGRAM
45
~220V
BCN501
T1.6A/250V
F501
SW-SPST
!
!
BC502
~275V 104
104
47uF/50V
C506
TC502
BCN502
33R
R508
D502 D503
47uF/400V
101/1KV
HER107
C502
D505
TC501
D501 D504
39K/2W
103/1KV
R502
C501
~400V 102
BC501
!
~400V 102
AUX5S6NC78
GND
REG
4
! !
L502
~400V 102
BC503
VCC
2RC3
BC502
L503
FB
D
U501
1
!
!
!
L501
!
R501
470K 2W
07D471
473
~275V 104
RV501
C503
BC501
5.1K
R505
R509
0.47 1/4W
TEA152X
!
~400V 221
BC503
3.1K
A
102
R506
C504
LM431A
R
5.1K
2501
U503
K
R512
U502
HER105
D506
R504
!
4.7K R507
75k
1
2
3
4
T501
!
7
8
C508
D507
101
SR560
TC503
1000uF/16V
104
C507
330
R509
20K
R510
104
1000uF/16V
TC505
C509
L504 10uH/2A
LED501
LED
R513
1K
DGND
+9V
Page 48
POWER BOARD SCHEMATIC DIAGRAM
46
Page 49
AOL
OK SCHEMATIC DIAGRAM
47
AOR
L607
L608
541
VR602
50K*2
U606
1
C618
47uF/16V
TC609
C622
104
C623
104
2
100uF/25V
104
10uH
100u
0.1U
18K
+10V
L604
+10VA
220uF/16V
DGND
TC608
C609
R615
+10VA
1
IN
LM78L05CT
GND
OUT
TC615
3
C601
+8V
POWER SUPPLY
JK601
123
1 2
4 3
L605
INDUCTOR2
TC612
104
C611
+10V
+10VA
1
IN
LM78L05CT
GND
OUT
3
VDD
REF
AGND
DGND
CLKO
VCO
CC1
CC2
U604
VCC
LPF1-IN
LPF1-OUT
LPF2-OUT
LPF2-IN
OP2-OUT
OP2-IN
OP1-IN
OP1-OUT
PT2399
+5V
VCC3.3
1 2
R627
0R
2
1
2
3
4
5
6
7
8
U608
1K
103
10K
U603
+10VA
MIC601
L601
FB
TC602
4.7u
R602
C604
R606
GND
16
15
14
13
12
11
10
9
OKA
4.7uF/16V
561
561
104
104
AOR
DET
5
TC607
C610
AOL
560R
7
R620
GND
R604
R632
10K
6
U601B
4558
TC604
4.7uF/16V
1K
15K
C612
10K
C613
10K
C614
392
103
+8V
R611
R625
50K
R622 8.2K
R617 10K
R616 5.6K
10K
R618
R624
R621
C615
C616
22uF/16V
1K
C606
100P
DET
TC606
R608
R610
30K
R619
1K
4.7uF/16V TC624
4.7uF/16V TC621
+8V
VR601
10K
R612
4.7K
8 4
U602A
4558
4.7uF/16V TC613
C608
392
R646
R645
3.9K
4558
4.7u/16V
1K
C619
102
+8V 3
+8V
3.3K
U602B
TC610
R626
L602
FB
R601
1K
C603
103
R605
10k
8 4
U601A
4558
2
1
R614
15K
TC611
4.7uF/16V
R628
4.7K
5
6
7
OKA
3
MIC602
4.7uF
560R
1
TC601
R603
R634
10K
2
TC603
4.7uF/16V
C607 100P
C620
100P
TC605
22uF/16V
R607
1K
+8V
R609 30K
C605 100P
R613
30K
R629
27K
3
2
C602
AGND
TC622
47uF/16V
R650
3.9K
C629 104(DNS)
R638 3.9K
4 3 2 1
100uF/16V
100uF/16V(DNS)
TC620
TC625
R640
10K
C627
104
4.7R
AGND
C631 104
GND IN1+ IN1­OUT1
R644
VCC1
R648
R649
3.3K
3.9K PT2308
IN2+
IN2-
OUT2
VDD
C617
104
10K
AGND
4.7R
L
R
PKYLINE
TC619
47uF/16V
U607
R647
3.9K
5
R637
3.9K
6 7 8
100uF/16V
R639
104
R643
JK602
C626
TC618
AGND
DGND
TC616
47uF/16V
DGND
C625
104
470uUF/10V
VCC1
2
TC614
DGND
C628
104(DNS)
VCC1
3
U605
LM78L05CT
OUT
GND
IN
1
+10VA
C630
104
VD601
1N5819
15uH
L603
10uH
VCC3.3
104
47uF/25V
TC617
C621 223
R623
10K
C624
101
5
R631
10K
ZA3020
R635 16.9K
DGND
L606
Sync8EN7Comp6FB
GND
Vsw
Vin
BS
4
3
2
103
XS09
234156897
XS601
Page 50
OK SCHEMATIC DIAGRAM
48
Page 51
R334
MIAN SCHEMATIC DIAGRAM
49
330K
R336
1R
R333
330K
C341
104
R335
750K
V1P4
SP-
6
C333 27pF
R331
750K
R332
0R
ADIN
OP-
OP+
OPO
U302
BA5954
XS303
XS06
23415
SP+
SL+
SL-
LIMIT
R316
20K
C334 151
FMSO
47uF/16V
104
C337
104
TRSO
V1P4
STBY
104
28
PREGND
VINLD23CTK224CTK125VINTK26BIAS27STBY
VINSL+
VINFFC
VINSL-
VINFC
VOSL
CF12CF2
1
3
4
5
6
V1P4
FOSO
R321 20K
C331 151
DMSO
GND
TC304
C335
C336
22
7
R320 20KR319 10K
VCC
21
PVCC1
8
9
VCC
PGND
10
SL-
VOSL-
11
SP+
SL+
VO2+
12
SP-
1R
1R
VOTK+15VOTK-16VOLD+17VOLD-18PGND19VNFTK20PVCC2
GND GND
VOFC+
VOFC-
13
1R
1R
R312
R313
14
R318
R317
29 30
VCC
C329
104
2341568910711121415161317182021221923
C330
104
TC308
10uF/16V
R330
DR(DNS)
LDO-AVCCAVCC
L323
L324
FBSMT
FBSMT
15R
L327
FBSMT
L320
L321
L322
FBSMT
FBSMT
FBSMT
R315
LDO-AVCC
47uF/16V
R329
DR(DNS)
RFVCCVCC
L319
FBSMT
TC303
FBSMT
L318
L317
FBSMT
FBSMT
RFO
IOADC
2SB1132-S
LDO1
L326
L316
L314
FBSMT
FBSMT
A
B
V302
RVCC
R328 0R(DNS)
RVCCIN
L312
FBSMT
F
FBSMT
R337 0R
DV33
L325
L311
FBSMT
V20
2SB1132-S
L310
FBSMT
E
V301
L308
FBSMT
47uF/16V
LDO2
L307
L306
FBSMT
TC302
L305
L304
10uH
FBSMT
FBSMT
MD11
15R
R314
LDO-AVCC
2SK3018-S
2SK3018-S
L303
V303
V304
24
L301
10uH
FBSMT
C328
104
TC301
220uF/16V
XS301
24P0.5mm
V305
3904-S
AVCC
100K
10K
R308
R309
AVCC
F E
MD11 LDO1 LDO2
15K
R307
R311
R310
RVCCIN
PWMOUT2
RFVCC
100K
URST SDATA SDEN
SCLK
IOA ENDM STBY LIMIT
TRIN
ENDM
STBY
C342
101
C326
68
AGNDF
VCON66AVDDF67AGNDX
DPDMUTE
XCK16M
HDGATE UDGATE
VFO13
VDD
36
37
65
AVDDP
AGNDX
AGNDP
RST
SDATA
SDEN
GNDS
SCLK
VDDS
GND
38
104
C327
104
64 63 62 61 60 59 58 57 56 55 54 53
IOB
52
IOA
51
IO9
50
IO8
49
IO7
48
IO6
47
IO5
46
IO4
45
IO3
44
IO2
43
IO1
42
IO0
41 40 39
D
A
BCC
MC MD SA SB AGND IR AVDD SC SD CDFOP CDFON SVDD TPI TNI SGND WGAND AGC1 WAVDD AGC2 AGC3 MD12 MD11 LDO1 LDO2 RFSUBO WGND
B
102MA101
MB
WOBSO
WVDD
1
2
C318 105
AA#
100
DVDA
AGNDX3AGNDX4AVDDO
C315 105
C316 105
C317 105
C314 105(DNS)RFO
DD#
CC#
BB#
DVDB99DVDC98DVDD97DVDRFIP96DVDRFIN95CDA94CDB93CDC92CDD91OSN90OSP89RFFGC88RFGCU87RFGCI86CEOP85CEON84AGNDX83AGNDX82MON81MOP80SW179SW278SW077SINPHI76REFSIN75HALLSIN74AGNDM
AGNDO
AGNDT
RFON
RFOP
TM19TM210TM3
TM4
5
6
7
8
11
12
C313 104
AVDDT
13
C312 104
V2REFO
14
15
VREFO
V2017FEO18LVL
16
C311 471
MT1376E_128
VDDP
CSO
TEO
19
20
21
U301
DEFECT
22
23
SW1
HRFRP
LRFRP
24
25
CRTP
26
CRTPLP
TRLPA
27
28
TRLP
29
OP+
72
73
REFCOS
HTRC30GNDP
31
OPO
OP-
70
71
AVDDM
COSPHI
HALLCOS
AGNDX34AGNDX35AGNDX
DPFN32DPFO
33
69
A
D
103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
C319
153
121 122 123 124 125 126 127 128
10K
IOA
R322
2.2R
SW301
SW-SPST
102
C343
RVCCIN
47uF/16V
C324
104
C325
104
TC305
C320
104
C321
104
C322
104
C323
104
RVCCIN
RFOP
RFON
C301
104
C302
104
10uF/16V
C303
104TC306
TC307
10uF/16V
V2P8
V1P4
V20
FEO
RFL
CSO
TEO
C304
391
C305
82pF
C306
333
C307
471(DNS)
BDO
RFRP
R301
100K(DNS)
CRTP
HTRC
C308
153
C309
10pF(DNS)
C310 27pF(DNS)
R302
27K(DNS)
R327
DNS
SW1
R325
R326
0R(DNS)
DNS
GND
HSYNC#
R324
0R(DNS)
R305 10K
R306 10K
C338
104
C339
104
Page 52
DRD#
MIAN SCHEMATIC DIAGRAM
50
R2107
DWR#
R2108 33R
DCE#
R2109 33R
GND
PDAT0 VDATA3
DWE# DCAS# DRAS# DCS# BA0
C296
101
C297
101
IR
RXD TXD
DQ7 DQ6 DQ5 DQ4
DQ3 DQ2 DQ1
DQ0
R229 R230 33R R231 33R
R232 33R
R233 33R
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
RA10
118
BA1
R221
A7A6A5A4A3
DQ1
AD8
10R(DNS)
DVDD2
119
DMA10
A8
18
31
AD1
C222
27pF
X201
27MHz
C223
27pF R209
RA0
RA1
120
121
DMA0
A18
A19
DQ10
DQ233DQ3
32
AD2
AD9
0R
RA2
122
DMA1
34
AD10
RA3
123
DMA2
14
DQ11
35
AD3
XO
AD0A0A1A2A3A4A5A6A7
124
DMA3
VP
13
36
R240 0R
100K
R239
0R(DNS)
R255
7 14
HCU04R208
XTALI
AD3
AD2
AD1
AD237AD138AD039IOA040IOA141DVDD242IOA243IOA344IOA445IOA546IOA647IOA748A1649A1750IOA1851IOA19
DVSS
RD31
RD30
RD29
125
126
127
128
DQ31
DQ30
DQ29
R215 4.7K R223 4.7K
R222 4.7K
DWR#
RSET
A20
12
NC10NC
DQ12
DQ540DQ4
Vcc
39
38
37
AD5
AD12
AD4VDAD11
XS203
XS04(DNS)
C2149
10pF(DNS)
A16
A17
A18
A19
52
DVDD3
DVSS
RA6
RA5
RA4
111
112
113
114
115
DMA6
DMA5
DMA4
A5V
A2
24
8M_FLASH(TSOP)
A223A1
Vss
CE26A0
R220
27
25
GND
DCE#
A1
27MHZ
DQM1
DQM0
BA1
116
117
RDQM1
RDQM0
4.7K(DNS)
A619A1717RY/BY15A1816NC
A520A421A322A7
DQ830DQ9
DQ0
29OE28
AD0
DRD#
234
1
DV33
RXD
TXD
GND
C224
104
AV33
R212
4.7R
A20
GND
C226
225
53
APLLVSS54IOA20
55
APLLVDD3
56
ALE
C228
AV33
0R
1K
U205D
HCU04
R2162
R2163
0R(DNS)
DCLK SDCLK
R234
R235
33R
33R
SDCKEDCKE
TC217
10uF/16V
R2158
C2148
102
HCU04
100 101 102 103 104 105 106 107 108
RDQM0
RDQM1
R246
R247
33R
33R
DQM1
DQM0
U205C
A5V
57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
RDQM2
RDQM3 DQM3
R248
R249
33R
33R
DQM2
9014
5 6
47uF/16V
R2159 33R
URST
IOOE# IOWR# IOCS# DVSS UP1_2 UP1_3 UP1_4 UP1_5 UP1_6 DVDD3 UP1_7 UP3_0 UP3_1 INT0# IR DVDD2 UP3_4 UP3_5 UWR# URD# DVSS RD7 RD6 RD5 RD4 DVDD2 RD3 RD2 RD1 RD0 RWE# CAS# RAS# RCS# BA0 DVSS RD15 RD14 RD13 RD12 DVDD3 RD11 RD10 RD9 RD8 DVSS CLK CLE RA11 RA9 RA8 DMVDD3
R254 33RASPDIF SPDIF#
Q204
104
TC237
FB(DNS)
C2146
L206
A5V
DMVSS
RA7
109
R2157
10K
VD201
1N4148
0R
110
DMA7
VD DV33
33R
PRD# PWR# PCE#
VSCK VSDA VSTB SCL
SDA
33R
DCLK DCKE DMA11 DMA9 DMA8
225
R213
4.7R
89
RST#
R260
0R(DNS)
RSET
U205B
AD4
34
RD28
129
DQ28
A9
41
AD13
0R(DNS)
AD5
DVDD3
RD27
130
A10
7
A9
DQ1443DQ13
DQ6
42
AD6
R238
1 2
3 4
AD6
RD26
131
DQ27
A11
DQ7
AD14
104
AD7
RD25
132
DQ26
A12
A12
DQ15/A-1
44
XI
U205A
HCU04
C2113
A14
A15
HIGHA527HIGHA4
DVSS28HIGHA629HIGHA730AD731AD632AD533DVDD335AD336AD4
MT1379E_216
DQM3
RD24
DVSS
133
134
135
DQ25
DQ24
A15
A14
A13
4
A151A142A133A115A106A88A199WE11RESET
BYTE
A16
Vss
45
47
46
GNDA0AD7
331
331
103
A5V
153
104
A12
A13
26
DQM2
136
137
RDQM3
RDQM2
R2160
1K
VD
A16
U214
48
A17
C217
C218
C219
C220
C221
A11
25
U201
RD23
138
DQ23
V1P4
A10
DVDD2
RD22
RD21
139
140
DQ22
UPA[20..0]
FGA8A9
RD20
RD19
RD18
141
142
143
DQ21
DQ20
DQ19
UPD[15..0]
FMSO
R207
15K
144
DQ18
DMSO
10K
DVSS
145
RST#
104
104
104
104
104
104
104
104
PWMOUT2
V25
R2050RR206
16
PWMOUT2
DVDD217DMO18FMO19DVSS20FG21HIGHA022HIGHA123HIGHA224HIGHA3
RD17
RD16
146
147
DQ17
DQ16
R259
0R
C245
C246
C247
C248
C249
C250
C251
C252
TRSO
PWMOUT1
R204
14
15
PWMOUT1
ALRCK
DVDD3
ABCK
148
149
150
ALRCK
ABCK
DV33
L204
FB
SD33
TC206
47uF/16V
FOSO
JITFO
JITFN
C216
101
R202
R203
750K
20K
18K
11
FOO12TRO13TROPENPWM
MC_DATA
ASDATA0
ACLK
SPDIF
151
152
153
ACLK
AMDAT
ASPDIF
NC37NC33DQML14WE
VSS26VSS
50
NC37NC33DQML14WE
VSS26VSS
50
LPFOP
ASDATA1
ASDATA2
154
155
ASDAT0
ASDAT1
LPFIP
C215 103
ASDATA3
157
156
ASDAT2
DQM1
36
DQMH
47
DQM3
36
DQMH
47
C213
103 C214 103
LPION4LPIOP3LPFON5LPFIP6LPFIN7LPFOP8JITFO9JITFN10PLLVDD3
DACVDDC
ASDATA4
VREF
158
159
DACV33C
DQM0
VSSQ4VSSQ10VSSQ41VSSQ
DQM2
VSSQ4VSSQ10VSSQ41VSSQ
LPION
R201
C212 103
8.2K
2
IREF1PLLVSS
RFIP
RFIN RFDTSLVN RFDTSLVP
ADCVDD3
PWM2VREF
PWMVREF
HRFZC RFRP_AC RFRP_DC
RFLEVEL
TEZISLV
RFSUBI
ADIN
ADCVSS
BDO SLCK SDEN
SDATA WOBSI
UDGATE
DVDD3
IDGATE
VFO13
DVSS PRST
XTALI XTALO DVDD3 SPBCK
SPLRCK
DVDD2
SPDATA SPMCLK
HSYN
DVSS YUV7 VSYN
BLAANK#
YUV6/R YUV5/B
DACVSSA
YUV4/G
DACVDDA
YUV3/CVBS
DACVSSB
YUV2/Y
DACVSSB
YUV0/CIN
YUV1/C
DACVSSC
160FS161
162
VREF
Y0
FS
DCAS#
DWE#
15
CAS16CKE
VCCQ13VCCQ
VCCQ38VCCQ
44
DCAS#
DWE#
15
CAS16CKE
VCCQ13VCCQ
VCCQ38VCCQ
44
CSO
ICE
LPIOP
FEI
TEI
7
7
DRAS#
RAS17CS
DRAS#
RAS17CS
C295
104
C240
104
TC204
47uF/16V
216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163
DCS#
18
VCC1VCC
25
DCS#
18
VCC1VCC
25
R252
4.7R
SD33
SD33
SDCKE
34
49
DQ15
SDCKE
34
49
DQ31
AV33
104
104
R251
104
4.7R
104
104
104
GND
RFRPC
C237
104
R214 4.7R(DNS)
BA0
SDCLK
19
35
CLK
DQ1042DQ1143DQ1245DQ1346DQ1448DQ15
DQ11
DQ12
DQ13
DQ14
BA0
SDCLK
19
35
CLK
DQ1042DQ1143DQ1245DQ1346DQ1448DQ15
DQ27
DQ28
DQ29
DQ30
C207
104
C227
C202
104
C253
C203
104
C208
C204
104
C209
C205
104
C210
C206
104
C211
DV33
RFON RFIN
C238 102
C239 102RFOP
RFIP
RFZC
C233
102
RFL FEO CSO TEO
ADIN
BDO SCLK SDEN SDATA
URST XI XO
MDET
HSYNC#
VGND Y7
VSYNC#
BLANK#
Y6 Y5 VGND Y4
DACV33A
Y3 VGND Y2
DACV33B
Y1 VGND
V25
VGND
C229
104(DNS)
R237
1.5K
DMA7
DMA8
DMA9
DMA10
DQ712DQ611DQ59DQ48DQ36DQ25DQ13DQ0
DQ839DQ9
40
DQ7
DQ8
DQ9
DQ10
DMA7
DMA8
DMA9
DMA10
DQ712DQ611DQ59DQ48DQ36DQ25DQ13DQ0
DQ839DQ9
40
DQ23
DQ24
DQ25
DQ26
DMA6
DQ6
DMA6
DQ22
V25
GND
0R
10uF/16V
TC201
C234
104
18K
R236
0R(DNS)
R253
4.7K
FBSMT
DMA4
DMA5
DQ4
DQ5
DMA4
DMA5
DQ20
DQ21
4
WP/RST_3VSS
SCL6SDA
5
SDA
SCL
HTRC
V2P8
R219
RFRP
104
R216
L330
FBSMT
C232
104
47uF/16V
TC215
L329
DMA1
DMA2
DMA3
DQ1
DQ2
DQ3
DMA1
DMA2
DMA3
DQ17
DQ18
DQ19
2
DC/NC1RST_/NC
RST/WP
VCC
8
7
C201
104
R227
1K
R228
1K
RFRPC
R218 0R(DNS)
C230
104
C231
XTALI
AV33
DV33
10uF/16V
TC202
C2137
104
104
DMA0
SDRAM 512*16*2
A021A122A223A324A427A528A629A730A831A932A1020BA/A11
2
DQ0
DMA0
SDRAM 512*16*2
A021A122A223A324A427A528A629A730A831A932A1020BA/A11
2
DQ16
AT24C02/X4050
U202
DV33
R217
100K
V1P4
DACV33C
10uF/16V
TC219
L331
FBSMT
C235
DV33
U203
U204
Page 53
FB
MIAN SCHEMATIC DIAGRAM
51
TC250
10uF/16V
C2108
104
3
68R
A5V
L228
VIN1VCC2GND
R2103
OPTICAL
JK204
VGND
(DNS)
XS201
6
L203
L202
FBSMT
VSDA
DCS#
L201
FBSMT
VSCK
VSTB
SDCKE
10R
FBSMT
GND
SDCLK
CLK38CKE37/CS19/RAS18/CAS17/WE16DQML15DQMH
23415
R211
A5VL218
BA1
#BA1
21
BA1/A12
6P2.0mm
47pF
FBSMT
4.7K
R284
33R
BA0
20
C225
R245
DMA11
R283
33R
DMA10
MA11
DQ1045DQ1147DQ1248DQ1350DQ1451DQ15
DMA9
IR
DMA8
DMA7
DMA6
DMA5
DMA4
DMA3
DMA2
DMA1
A023A124A225A326A429A530A631A732A833A934A10/AP22A1135BA0/A13
DQ02DQ14DQ25DQ37DQ48DQ510DQ611DQ713DQ842DQ9
DMA0
U211
GND
1 2 3
TC208
L223 FBSMT
L209 FBSMT
DET
OKA
8050
104
Q201
C286
L207 FBSMT
L208 FBSMT
AOL
AOR
IN GND OUT
XS202
AGND
FB
C287 104
+10V DV33
U213
WS7805
VCC
RVCC
L205
AV33
#OKA
28
SDRAM 64M
VSS54VSS41VSS
C241
47pF C242
47pF
C243
47pF
VCCVCC3.3
R2420RR241
0R
C2132
104
VSSQ6VSSQ12VSSQ46VSSQ
1 2 3
DV33
DQM1
39NC36NC40
VCCQ3VCCQ9VCCQ43VCCQ
IN GND OUT
DQM0
DWE#
U208
BA033
DRAS#
DCAS#
VCC1VCC14VCC
XS09
234156897
VCC3.3
L224 FB
L225 FB
L226 FB
C2131
104
SPDIF#
U205F
HCU04
R224
0R
1213
U205E
HCU04
1011
R257
0R
R256
330R
R258
91R
1
2
V-OUT6
JK203A
L229
FB
10uF/16V
A5V
VCC
TC255
470R
104
R298
47uF
104
FB
C2144
1
150R
TC256
C2140
1 2 3
A5V+10V
L227
AVCC
R297
ADJ
IN
OUT
IN GND OUT
3
2
U206
WS7805
C283
104
TC203
100uF/16V
A5V V25
U209
LM1117MP-2.5
TC239
100uF/50V
C282
104
C284
104
TC207
220uF/16V
C285
104
TC211
220uF/16V
VCC
V25
220uF/16V
VGND VGND
150R
47pF
47pF
R280
C269
C271
0R
1.8uH
L248
L215
Y6
Q214
3906-S
220uF/16V
VIDEO_V
C270 20pF(DNS)
R281
150R
TC220
VGND
JK205
V-OUT2
150R
VGND VGND
A5V
(OPEN)
47pF
47pF
20pF
R276
C266
C268
C277
FBSMT
RED
L247
0R
L214
1.8uH
L222
3906-S
(OPEN)
Y5
Q220
220uF/16V
B
FBSMT
C276
20pF
BLUE
C267 20pF(DNS)
150R
TC218
VIDEO_U
L221
(OPEN)
111013
R277
20pF
14
C275
150R
VGND VGND
47pF
47pF
A5V
FBSMT
12
GREEN
L220
R273
C263
C265
L213
1.8uH
0R
15
Y4
Q213
3906-S
L246
1000uF/10V
VIDEO_Y1
Y1
C264 20pF(DNS)
R272
150R
TC216
Y2
VGND VGND
150R
Text
47pF
R270
C260
A5V
0R
1.8uH
47pF
L245
L212
C262
3906-S
20pF(OPEN)
VGND
V-OUT6
Y3
Q216
220uF/16V
2.2R
C274
4
FBSMT
3
C261 20pF(DNS)
150R
TC214
R250
L219
R271
JK203B
52
VGND VGND
A5V
104
150R
47pF
47pF
VGND
C236
R274
C257
C259
49
L244
0R
L211
1.8uH
C2141
104
C2142
104
C2143
104
TC213
47uF/16V
3906-S
Q217
SD33
220uF/16V
A5V
27
C258 20pF(DNS)
R275
150R
TC212
SD33
VGND
53
DQ14
DQ15
VGND VGND
A5V
(OPEN) (OPEN)
20pF
20pF
DQ13
47pF
C272
C273
44
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
R262
150R
L243
0R
C254
L210
1.8uH
C256
47pF
Q215
3906-S
VIDEO_C
L217
FBSMT
4
1 2
DQ4
DQ5
DQ6
150R
220uF/16V
VIDEO_Y
L216
FBSMT
3
DQ1
DQ2
DQ3
C255 20pF(DNS)
A5V
R263
TC210
DQ0
JK202
S-VIDEO
Page 54
A/V-O3
MIAN SCHEMATIC DIAGRAM
52
JK201
AGND
R268 33R
R269 33R
C278
104
C279
104
C280
104
ASDAT1
ASDAT2
R295 33R
R296 33R
SDATA1
SDATA2
ALRCK SLRCK
ASDAT0 SDATA0
R293 33R
R294 33R
+8V
AGND
AGND
ACLK SACLK
ABCK SBCLK
R291 33R
R292 33R
47uF/16V
TC234
C2104
104
AGND
3.9K
R279
+10V
R278
3.3K
+8V
+8V
1 2 3
AGND
U212
78L08
IN GND
(DNS)
OUT
TC224
10uF/16V
7
4 8
U221B
4580
5
6
R2150
4.7K
R2151
4.7K
C2127
102
R2155
C2136
122
6.8K
C244
104
MUTE2
MUTE3
VD208
1N4148
VD209
1N4148
R2106
1K
R2105
2.2uF/16V(DNS)
Q211
1015
1K
R265
+8V
0R
101
24K
MUTE1
1K
TC238
R266
C2126
24K
R2156
VD207
1N4148
1K
R2149
AGND
A5V
L237
FB
LOUT
R2128
AGND
4 8
4580
102
+8V
R267
1K
3
C2109
102
R2116
100K Q210
2SC1815-YS
1K
TC223
10uF/16V
1
U221A
3
2
4.7K
4.7K
C2124
C2135
122
10uF/16V
AGND
R2146
R2147
R2154
6.8K
TC230
2
2SC1815-YS
R2127
C2123 101
+8V
24K
1
C2107
102
R2115
100K
Q209
1K
R2126
1K
R2145
4 8
24K
AGND
R2132
10uF/16V
TC229
AOL
FB
ROUT
10uF/16V
U220B
4580
C2121
102
122
L236
R2125
5
C2133
FB
1K
CH-SL
7
4.7K
4.7K
L235
R2124
TC222
6
R2142
R2143
R2153 6.8K
SL#
6
C2105
102
R2114
100K
2SC1815-YS
Q208
R2123
1K
MUTE-1
+8V
C2120
101
10uF/16V
TC228
5
AGND
2SC1815-YS
R2141
24K
SR#
10uF/16V
TC227
4
C2103
102
L234
FB
R2113
100K
Q207
R21211KR2120
R2122
1K
10uF/16V
1
4 8
U220A
4580
3
4.7K
AGND
4.7K
C2118
102
C2130
122
1K
TC221
+8V
2
R2138
R2139
R2152
6.8K
9
C2101
102
L233
FB
R2112
100K
2SC1815-YS
Q206
R21191KR2118
C2117 101
TC226
10uF/16V
8
102
AGND
100K
1K
10uF/16V
R2137
4 8
U219B
4580
24K
AGND
C2115
102
122
TC225
10uF/16V
C299
R2111
2SC1815-YS
TC241
7
5
4.7K
4.7K
C2129
7
AOR
Q205
1K
6
R2134
R2135
R2148 6.8K
DET
A5V
R285
4.7K
AGND
L232
FB
AGND
AGND
R2117
47uF/16V
10uF/16V
AGND
4 8
U219A
4580
AGND
C2112
102
122
AGND
SCL
SDA
RST#
1
3
4.7K
4.7K
C2122
SACLK
R2133
+8V
C2114 101
24K
R282
0R
14
CS4360
VD203
1N4148
3.3K
TC209
TC240
2
R2130
R2131
R2136 6.8K
SLRCK
SBCLK
R289
+8V
102
Q221
S8050
10uF/16V
10K
100K
MDET
C2111 101
C2116
SDATA2
SDATA1
TC205
R286
R288
8550
1K
SDATA0
VLS1SDIN12SDIN23SDIN34SCLK5LRCK6MCLK7VD8GND9RST10SCL11SDA12CS13VLC
OKA
Q222
R290
R2129
24K
C293
104
TC231
10uF/16V
C292
104
U207
R287
10K
A5V
C2102
105
A5V
R225
0R(DNS)
R243
0R
R226
0R
DV33
+8V
Q212
2SC1815-Y
AGND
VD205
1N4148
Q219
1015
R264
150R
AGND
220uF/16V
VD204
1N4148
TC235
1N4148
+8V
1015
MUTE-1
VD206
Q218
U210
78L05
1
C291
104
TC236
10uF/16V
IN
2
GND
3
OUT
A5V
R244
0R
MUTEC1
AOUTA1
AOUTB1
MUTEC2
AOUTA2
AOUTB2
AOUTA3
AOUTB3
MUTEC3
FILT+
GND
28
27
26
25
24
23VA22
21
20
19
18VQ17
C289
TC232
C290
104
TC233
10uF/16V
16M215
LLRSRR
LS
LFE#
MUTE3
C#
MUTE2
MUTE1
RS
LS
C#
LFE#
AGND
104
10uF/16V
Page 55
MIAN SCHEMATIC DIAGRAM
53
Page 56
MIAN SCHEMATIC DIAGRAM
54
Page 57
BBK917SRUMATERIAL LIST
55
10. SPARE PARTS LIST
1. DECODE BOARD
NO
1 SMD RESISTOR 1/16W 0 ±5% 16
2 SMD RESISTOR 1/16W 2.2 ±5% 1
3 SMD RESISTOR 1/16W1±5% 5 R312,R313,R317,R318,R336
4 SMD RESISTOR 1/16W 4.7 ±5% 4 R212,R213,R251,R252
5 SMD RESISTOR 1/16W 10 ±5% 1 R211
6 SMD RESISTOR 1/16W 15 ±5% 2 R314,R315
7 SMD RESISTOR 1/16W 33 ±5% 22
8 SMD RESISTOR 1/16W 91 ±5% 1 R258
9 SMD RESISTOR 1/16W 150 ±5% 5 R264,R270~R271,R297,R298
10 SMD RESISTOR 1/16W 330 ±5% 1 R256
11 SMD RESISTOR 1/16W 1K ±5% 12
12 SMD RESISTOR 1/16W 750 ±5% 3 R2121,R2125,R2128
13 SMD RESISTOR 1/16W 2K ±5% 1 R237
14 SMD RESISTOR 1/16W 2.7K ±5% 1 R278
15 SMD RESISTOR 1/16W 3K ±5% 1 R279
16 SMD RESISTOR 1/16W 3.3K ±5% 1 R289
17 SMD RESISTOR 1/16W 4.7K ±5% 10
18 SMD RESISTOR 1/16W 6.8K ±5% 3 R2152,R2154,R2155
19 SMD RESISTOR 1/16W 8.2K ±5% 1 R201
20 SMD RESISTOR 1/16W 10K ±5% 9
21 SMD RESISTOR 1/16W 15K ±5% 2 R207,R307
22 SMD RESISTOR 1/16W 20K ±5% 4 R203,R316,R320,R321
23 SMD RESISTOR 1/16W 18K ±5% 2 R204,R216
24 SMD RESISTOR 1/16W24K±5% 5
25 PRECISION SMD RESISTOR 1/16W 330K ±1% 2 R333,R334
26 PRECISION SMD RESISTOR 1/16W 750K ±1% 3 R202,R331,R335
27 SMD RESISTOR 1/16W 100K ±5% 8
28 CD CD11C 16V10U±20%4×7 1.5 16
29 CD CD11C 50V4.7U±20%4×7 1.5 1 TC205
30 CD CD11C 25V100U±20%8×9 3.5 2 TC234,TC239
31 CD CD11C 10V220U±20%6×7 2.5 4 TC207,TC214,TC211,TC301
32 CD CD11C 16V47U±20%5×7 2 16
33 SMD CAPACITOR 50V 27P ±5% NPO 0603 3 C222,C223,C333
MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
L245,R205,R219,R225,R236,R23 8,R239,R244,R255,R257,R259,R 282,R332,R337,R2162,R322
R250
R2107~R2109,R2159,R229~R 235,R246,R247,R254,R291~R 294,R283,R284,R268,R269
R227,R228,R266,R267,R290, R2105,R2106,R2122,R2126,R 2127,R2158,R2160
R222,R223,R245,R285,R2138 ,R2139,R2146,R2147,R2150, R2151
R206,R286,R287,R305~R306, R309,R311,R319,R2157
R2132,R2137,R2145,R2149,R 2156
R208,R288,R2113,R2115,R21 16,R217,R308,R310
TC201,TC202,TC217,TC219, TC221,TC223,TC224,TC227, TC229,TC230,TC232,TC233, TC255,TC306~TC308
TC203,TC204,TC206,TC208, TC209,TC213,TC215,TC231, TC235~TC237,TC256,TC302 ~TC305
Page 58
34 SMD CAPACITOR 50V 47P ±5% NPO 0603 7
56
35 SMD CAPACITOR 50V 82P ±5% NPO 0603 1 C305
36 SMD CAPACITOR 50V 101 ±5% NPO 0603 7
37 SMD CAPACITOR 50V 331 ±5% NPO 0603 2 C217,C218
38 SMD CAPACITOR 50V 151 ±5% NPO 0603 2 C331,C334
39 SMD CAPACITOR 50V 391 ±10% 0603 1 C304
40 SMD CAPACITOR 50V 471 ±10% 0603 1 C311
41 SMD CAPACITOR 50V 104 +80%-20% 0603 75
41.1 SMD CAPACITOR 25V 104 +80%-20% 0603 75
42 SMD CAPACITOR 16V 105 +80%-20% 0603 5 C315~C318,C2102
43 SMD CAPACITOR 10V 225 +80%-20% 0805 1 C226
44 SMD CAPACITOR 10V 106+80%-20% 0805 1 C228
45 SMD CAPACITOR 50V 102 ±10% 0603 9
46 SMD CAPACITOR 50V 122 ±10% 0603 6
47 SMD CAPACITOR 50V 103 ±10% 0603 5 C212~C215,C219
48 SMD CAPACITOR 50V 153 ±10% 0603 3 C220,C308,C319
49 SMD CAPACITOR 16V 333 ±10% 0603 1 C306
50 SMD INDUCTOR 10UH ±10% 2012 2 L303,L306
51 SMD INDUCTOR 1.8UH ±10% 1608 1 L212
52 MAGNETIC BEADS INDUCTOR RH354708 7
53 SMD MAGNETIC BEADS FCM1608K-221T05 37
54 SMD DIODE 1N4148 7 VD201,VD203~VD208
SMD DIODE LS4148 7 VD201,VD203~VD208
54.1
SMD DIODE LL4148 7 VD201,VD203~VD208
54.2
55 TRIODE C8050 1 Q221
56 TRIODE 8550C 1 Q222
57 TRIODE 9014C 1 Q204
58 TRIODE C1815Y 1 Q212
C225,C241~C243,C260,C262, C287
C216,C296,C297,C342,C2117,C2 123,C2126
C201~C211,C221,C224,C227, C230~C232,C234,C235,C237, C240,C245~C247,C278~C280 ,C282~C286,C289~C293,C29 5,C301~C303,C312~C313,C3 20~C330,C335~C339,C341,C 2104,C2113,C2131,C2132,C2 137,C2140~C2144,C2146,C23 6,C251~C253
C201~C211,C221,C224,C227, C230~C232,C234,C235,C237, C240,C245~C247,C278~C280 ,C282~C286,C289~C293,C29 5,C301~C303,C312~C313,C3 20~C330,C335~C339,C341,C 2104,C2113,C2131,C2132,C2 137,C2140~C2144,C2146,C23 6,C251~C253
C233,C238,C239,C343,C2116 ,C2118,C2124,C2127,C2148
C2103,C2107,C2109,C2130,C 2135,C2136
L204,L205,L218,L224,L225,L 227,L229
L201~L203,L207~L209,L219, L223,L234,L236,L237,L301,L 304,L305,L307,L308,L310,L3 11,L312,L314,L316~L324,L3 29~L331,R220,R241,L325,L3 26,L327
Page 59
59 SMD TRIODE C1815 3 Q207,Q209,Q210
57
60 TRIODE 2SA1015 3 Q211,Q218,Q219
61 SMD TRIODE 3906 1 Q216
62 SMD TRIODE 3904 1 V305
63 SMD TRIODE 2SK3018 2 V303,V304
64 SMD TRIODE 2SB1132 2 V301,V302
65 IC NJM4558M SOP 2 U220,U221
65.1 IC 4580 SOP 2 U220,U221
65.2 IC 4558 SOP 2 U220,U221
66 IC MM74HCU04M SOP 1 U205
66.1 IC HCU04 SOP 1 U205
67 IC HY57V641620HGT-7 TSOP 1 U211
67.1 IC MT48LC4M16A2-7 SOP 1 U211
68 IC LM1117MP-ADJ SOT-223 1 U209
69 IC CS4360 SSOP 1 U207
70 IC 24C02N SOP 1 U202
71 IC MT1336E-C QFP 1 U301
72 IC MT1379EE-C QFP 1 U201
73 IC BA5954FP HSOP 1 U302
74 IC UTC78L09 TO-92M 1 U212
75 IC BA033FP TO252-3 1 U208
76 CRYSTAL OSCILLATOR 27.00MHz 49-S 1 X201
77 PCB 2917A-1 1
78 TERMINAL SOCKET AV4-8.4-13/PB-08 1 JK201
79 TERMINAL SOCKET AV2-8.4-6G-3 1 JK203
80 TESTING SWITCH DS1-C 1 SW301
TESTING SWITCH ESE11SV1 1 SW301
80.1
81 SOCKET 6P 2.0mm 2 XS201,XS303
82 FLAT CABLE
9P50 2.5 2 SOCKET WITH NEEDLE REVERSE
1 XS202
83 CABLE SOCKET 24P 0.5mm SMD WITH CLASP 1 XS301
2. POWER BOARD
NO
1 CARBON RESISTOR
2 CARBON RESISTOR
MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
1/6W33Ω±5% SHAPED5
1/6W330Ω±5% SHAPED 5
1 R508
1 R509
3 CARBON RESISTOR 1/6W1K ±5% SHAPED 5 1 R513
4 CARBON RESISTOR 1/6W5.1K±5% 1 R505
5 CARBON RESISTOR 1/6W75K±5% 1 R504
6 METAL FILM RESISTOR 1/6W4.7K±1% 1 R507
7 METAL FILM RESISTOR 1/6W20K±1% SHAPED 5 1 R510
8 METAL FILM RESISTOR 1/6W5.1K±1% SHAPED 5 2 R506,R512
10
9
METAL OXIDE FILM RESISTOR
METAL OXIDE FILM RESISTOR
9.1
METAL OXIDE FILM RESISTOR
2W39K±5% SHAPED FLAT 15×9 1 R502
2W39K±5% SHAPED FLAT 15×7 1 R502
1/2W0.47Ω±5% X SHAPED 10
1 R503
11 HIGH VOLTAGE RESISTOR 1/2W680K±5% 1 R501
12 PORCELAIN CAPACITOR 1000V 101 ±10% 7.5mm 1 C502
Page 60
13 PORCELAIN CAPACITOR 50V 100P ±10% 5mm 2 C508,C505
58
14 PORCELAIN CAPACITOR 50V 104 ±20% 5mm 3 C506,C507,C509
15 PORCELAIN CAPACITOR 1000V 103 +80%-20% 7.5mm 1 C501
16 PORCELAIN CAPACITOR 50V 473 ±20% 5mm 1 C503
17 TERYLENE CAPACITOR 50V 102 ±10% 3.5mm 1 C504
17.1 TERYLENE CAPACITOR 100V 102 ±5% 3.5mm 1 C504
18 TERYLENE CAPACITOR 275V 104 ±10% 15mm 1 BC501
19 CD GZ 16V1000U±20%10×20 5 2 TC503,TC505
20 CD ZT 400V22µ±20%φ16×20 7.5 1 TC501
21 CD CD11 50V47U±20%6×12 2.5 1 TC502
22 CERAMIC CAPACITOR Y1 400V AC 221±10%mm 1 BC503
23 MAGNETIC BEADS INDUCTOR RH354708 1 L503
24 CHOKE COIL VERTICAL 10UH 2A 5mm 1 L504
25
26 DIODE HER105 1 D506
27 DIODE 1N4007 4 D501,D502,D503,D504
SWITCHING POWER TRANSFORMER
BCK-2801A-621 1 T501
28 DIODE HER107 1 D505
29 RADIATION DIODE 3R 4SD RED 1 LED501
30 SCHOTTKY DIODE SR560 DO-27 1 D507
31 PCB 5917-0 1
32 IC TEA1523P DIP 1 U501
33 IC LM431ACZ TO-92 1 U503
33.1 IC TL431C TO-226AA(LP) 1 U503
33.2 IC 431L TO-92 1 U503
33.3 IC KA431AZ TO-92 1 U503
34 POWER GRID FILTER UT-20 40mH ±20% 10×13 1 L502
35 PHOTOELECTRIC COUPLER HS817 1 U502
36 FUSE T1.6AL 250V 1 F501
37 FUSE HOLDER BLX-2 1 FOR F501
38 POWER SOCKET SA-4S-2S 1 BCN501
39 CONNECTION CORDS
3. OK BOARD
NO
MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
Φ0.6 SHAPED 10mm
3 J501,L501
1 CARBON FILM RESISTOR 1/6W10K±5% 1 R634
CARBON FILM RESISTOR 1/6W10K±5% SHAPED 7.5 1 R634
1.1
2 PORCELAIN CAPACITOR 50V 103 ±10% 5mm 1 C619
3 ROTATED POTENEIOMETER WHE101N-2-A10K±10% 1 VR601
4 CD CD11 50V4.7U±20%5×11 2 10
5 CD CD11 16V22U±20%5×11 2 2 TC605,TC606
TC601~TC604,TC607,TC610, TC611,TC613,TC621,TC624
Page 61
CD CD11 25V22U±20%5×11 2 2 TC605,TC606
59
5.1
6 CD CD11C 16V100U±20%6×7 2.5 2 TC608,TC615
7 CD CD11C 16V47U±20%5×7 2 1 TC609
8 CD CD110 25V470U±20%10×16 5 4 TC612,TC614,TC616,TC617
9 MAGNETIC BEADS INDUCTOR RH354708 2 L601,L602
10 CHOKE COIL VERTICAL 10UH 2A 5mm 2 L603,L604
11 CHOKE COIL JLB0904 1 L605
12 CHOKE COIL VERTICAL 22uH 2A 5mm 1 L606
13 SCHOTTKY DIODE 1N5819 1 VD601
14 IC HA178L05PA TO-92M 1 U604
15 IC UTC78L09 TO-92M 1 U608
16 IC PT2399 DIP 1 U603
17 IC NJM4558D DIP 2 U601,U602
18 IC ZA3020 SO8 1 U606
19 SOCKET 9P 2.5mm 1 XS601
20 MICROPHONE SOCKET CK3-6.35-24 2 MIC601,MIC602
21 POWER SOCKET DS-210-B 1 JK601
22 CONNECTION CORDS
23 CONNECTION CORDS
24 SMD RESISTOR 1/16W 0 ±5% 1 R627
25 SMD RESISTOR 1/16W 560 ±5% 2 R603,R604
26 SMD RESISTOR 1/16W 1K ±5% 7
27 SMD RESISTOR 1/16W 3.3K ±5% 1 R645
Φ0.6 SHAPED 5mm
Φ0.6 SHAPED 7.5mm
4 JP604~JP606,JP608
5 JP601~JP603,JP607,JP609
R601,R602,R607,R608,R611, R619,R626
28 PRECISION SMD RESISTOR 1/16W 3.9K ± 1% 1 R646
29 SMD RESISTOR 1/16W 4.7K ±5% 2 R612,R628
30 SMD RESISTOR 1/16W 5.6K ±5% 1 R616
31 SMD RESISTOR 1/16W 8.2K ±5% 1 R622
32 SMD RESISTOR 1/16W 10K ±5% 9
33 SMD RESISTOR 1/16W 15K ±5% 2 R614,R618
34 SMD RESISTOR 1/16W 18K ±5% 1 R615
35 SMD RESISTOR 1/16W 27K ±5% 1 R629
36 SMD RESISTOR 1/16W 30K ±5% 3 R609,R610,R613
37 SMD RESISTOR 1/16W 33K ±5% 1 R635
38 SMD RESISTOR 1/16W 47K ±5% 1 R625
39 SMD RESISTOR 50V 101 ±5% NPO 0603 5 C605~C607,C620,C624
40 SMD CAPACITOR 50V 561 ±10% 0603 2 C610,C612
41 SMD CAPACITOR 50V 392 ±10% 0603 2 C608,C615
42 SMD CAPACITOR 50V 223 ±10% 0603 1 C621
43 SMD CAPACITOR 50V 103 ±10% 0603 4 C603,C604,C616,C618
44 SMD CAPACITOR 25V 104 +80%-20% 0603 9
45 PCB 6917A-0 1
R605,R606,R617,R620,R621, R623,R624,R631,R632
C601,C602,C609,C611,C613, C614,C622,C623,C625
Page 62
4. MAIN FRONT PANEL
60
NO
1 SOFT SPONGE SPACER 10×7×5 DOUBLE FACED, HARD 1
MATERIAL SPECIFICATIONS/PART NUMBER QUANTITY LOCATION
CONNECT SENSOR WITH FRONT PANEL PCB
2 CARBON RESISTOR 1/6W100±5% 1 R402
2.1 CARBON RESISTOR
1/6W100Ω±5% SHAPED 10
1 R402
3 CARBON RESISTOR 1/6W10K±5% 3 R403~R405
3.1 CARBON RESISTOR 1/6W10K±5% SHAPED 10 3 R403~R405
4 CARBON RESISTOR 1/6W51K±5% 1
R401
5 PORCELAIN CAPACITOR 50V 104 ±20% 5mm 3 C401~C403
5.1 PORCELAIN CAPACITOR 50V 104 +80%-20% 5mm 3 C401~C403
6 CD CD11C 16V100U±20%6×7 2.5 3 TC401~TC403
7 DIODE 1N4148 4
D401D404
8 IC PT6961 SOP 1 U401
9 LED LTG-0273M 1 LED401
10
LIGHT TOUCH RESTORE SWITCH
11 CONNECTION CORDS
12 CONNECTION CORDS
HORIZONTAL 6×6×1 10
Φ0.6 SHAPED 10mm
Φ0.6 SHAPED5mm
K401K410
2 JP409,JP410
6 JP401~JP404,JP407,JP408
13 CONNECTION CORDS
14 FLAT CABLE
Φ0.6 SHAPED7.5mm
6P80 2.0 2 SOCKET WITH L NEEDLE REVERSE
2 JP405~JP406
1 XS402
15 PCB 4917A-0 1
16 IR SENSOR HS0038B 1 U402
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