ATMEL AT93C66W-10SC, AT93C66W-10SC-2.5, AT93C46R-10SI-2.7, AT93C56W-10SC-2.7, AT93C66-10PI-2.7 Datasheet
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1
Features
•
Low Voltage and Standard Voltage Operation
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 2.5 (VCC = 2.5V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
•
User Selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
– 2K: 256 x 8 or 128 x 16
– 4K: 512 x 8 or 256 x 16
•
3-Wire Serial Interface
•
2 MHz Clock Rate (5V) Compatibility
•
Self-Timed Write Cycle (10 ms max)
•
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
– ESD Protection: >4000V
•
Automotive Grade and Extended Temperature Devices Available
•
8-Pin PDIP, 8-Pin JEDEC and EIAJ SOIC, and 8-Pin TSSOP Packages
Description
The AT93C46/56/57/66 prov ides 1024/2048 /4096 bits of serial elec trically erasa ble
programmable read only memory (EEPROM) org anized as 64/128/256 words of 16
bits each, when the ORG Pin is connecte d to V
CC
and 128/256/512 wor ds of 8 bits
each when it is tied to ground. The devic e is optimiz ed for use in many in dustrial an d
commercial applications where low power and low voltage o perations are essential.
The AT93C46/56/57/66 is available in space saving 8-pin PDIP and 8-pin JEDEC and
EIAJ SOIC packages.
3-Wire Serial
EEPROMs
1K (128 x 8 or 64 x 16)
2K (256 x 8 or 128 x 16)
4K (512 x 8 or 256 x 16)
AT93C46
AT93C56
AT93C57
AT93C66
Rev. 0172K–07/98
3-Wire, 1K
Serial E
2
PROM
Pin Configurations
Pin Name Function
CS Chip Select
SK Serial Data Clock
DI Serial Data Input
DO Serial Data Output
GND Ground
V
CC
Power Supply
ORG Internal Organization
DC Don’t Connect
8-Pin PDIP
1
2
3
4
8
7
6
5
CS
SK
DI
DO
VCC
DC
ORG
GND
8-Pin SOIC
Rotated (R)
(1K JEDEC Only)
1
2
3
4
8
7
6
5
DC
VCC
CS
SK
ORG
GND
DO
DI
8-Pin SOIC
1
2
3
4
8
7
6
5
CS
SK
DI
DO
VCC
DC
ORG
GND
(continued)
8-Pin TSSOP
1
2
3
4
8
7
6
5
CS
SK
DI
DO
VCC
DC
ORG
GND
AT93C46/56/57/66
2
The AT93C46/56/57/66 is enable d through t he Ch ip Selec t
pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (D I), Data Outp ut (DO), an d Shift Cloc k
(SK). Upon receiving a READ instruction at DI, the address
is decoded and the data is clocked out serially on the data
output pin DO. The WRITE cycle is completely self-timed
and no separate ERAS E cycle is required before WRITE.
The WRITE cycle is only enabled when the part is in the
ERASE/WRITE ENAB LE state. Wh en CS is brought “hi gh”
following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part.
The AT93C46 is available in 4.5V to 5.5V, 2.7V to 5.5V,
2.5V to 5.5V, and 1.8V to 5.5V versions. The
AT93C56/57/66 is available in 4.5V to 5.5V, 2.7V to 5.5V,
and 2.5V to 5.5V versions.
Block Diagram
Note: 1. When the ORG pi n is connected to VCC, the x 16 org ani za tio n is selected. When it is connected t o ground, the x 8 organiza-
tion is selected. If the ORG pin is left unconnected, then an internal pullup device (of approximately 1 MΩ) will select the x
16 organiz ation. This featu re is not available on 1.8V devices.
Absolute Maximum Ratings*
Operating Temperature.................................. -55°C to +125°C
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the de vic e. T his is a stress r ating o nly an d
functional opera tion of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reli abi li ty
Storage Temperature..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground.....................................-1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
DC Output Current........................................................5 .0 mA
AT93C46/56/57/66
3
Note: 1. This parameter is characterized and is not 100% tested.
Note: 1. V
IL
min and VIH max are reference only and are not tested.
Pin Capacitance
(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise not ed).
Test Conditions Max Units Conditions
C
OUT
Output Capacitance (DO) 5 pF V
OUT
= 0V
C
IN
Input Capacitance (CS, SK, DI) 5 pF VIN = 0V
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V,
T
AC
= 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted).
Symbol Parameter Test Condition Min Typ Max Unit
V
CC1
Supply Voltage 1.8 5.5 V
V
CC2
Supply Voltage 2.5 5.5 V
V
CC3
Supply Voltage 2.7 5.5 V
V
CC4
Supply Voltage 4.5 5.5 V
I
CC
Supply Current VCC = 5.0V READ at 1.0 MHz 0.5 2.0 mA
WRITE at 1.0 MHz 0.5 2.0 mA
I
SB1
Standby Current VCC = 1.8V CS = 0V 0 0.1
µ
A
I
SB2
Standby Current VCC = 2.5V CS = 0V 6.0 10.0
µ
A
I
SB3
Standby Current VCC = 2.7V CS = 0V 6.0 10.0
µ
A
I
SB4
Standby Current VCC = 5.0V CS = 0V 17 30
µ
A
I
IL
Input Leakage VIN = 0V to VCC 0.1 1.0
µ
A
I
OL
Output Leakage VIN = 0V to VCC 0.1 1.0
µ
A
V
IL1
(1)
V
IH1
(1)
Input Low Voltage
Input High Voltage
4.5V ≤ VCC ≤ 5.5V -0.6
2.0
0.8
V
CC
+ 1
V
V
IL2
(1)
V
IH2
(1)
Input Low Voltage
Input High Voltage
1.8V ≤ VCC ≤ 2.7V -0.6
V
CC
x 0.7
V
CC
x 0.3
V
CC
+ 1
V
V
OL1
V
OH1
Output Low Voltage
Output High Voltage
4.5V ≤ VCC ≤ 5.5V IOL = 2.1 mA 0.4 V
I
OH
= -0.4 mA 2.4 V
V
OL2
V
OH2
Output Low Voltage
Output High Voltage
1.8V ≤ VCC ≤ 2.7V IOL = 0.15 mA 0.2 V
IOH = -100 µAV
CC
- 0.2 V
AT93C46/56/57/66
4
Note: 1. This parameter is characterized and is not 100% tested.
AC Characteristics
Applicable over recommended operating range from TA = -40°C to + 85°C, VCC = As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol Parameter Test Condition Min Typ Max Units
f
SK
SK Clock Frequency
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
0
0
0
0
2
1
0.5
0.25
MHz
t
SKH
SK High Time
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
250
250
500
1000
ns
t
SKL
SK Low Time
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
250
250
500
1000
ns
t
CS
Minimum CS
Low Time
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
250
250
500
1000
ns
t
CSS
CS Setup Time Relative to SK
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
50
50
100
200
ns
t
DIS
DI Setup Time Relative to SK
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
100
100
200
400
ns
t
CSH
CS Hold Time Relative to SK 0 ns
t
DIH
DI Hold Time Relative to SK
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
100
100
200
400
ns
t
PD1
Output Delay to ‘1’ AC Test
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
250
250
500
1000
ns
t
PD0
Output Delay to ‘0’ AC Test
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
250
250
500
1000
ns
t
SV
CS to Status Valid AC Test
4.5V ≤ V
CC
≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
250
250
500
1000
ns
t
DF
CS to DO in High
Impedance
AC Test
CS = V
IL
4.5V ≤ VCC ≤ 5.5V
2.7V ≤ V
CC
≤ 5.5V
2.5V ≤ V
CC
≤ 5.5V
1.8V ≤ V
CC
≤ 5.5V
100
100
200
400
ns
t
WP
Write Cycle Time
0.1 10 ms
4.5V ≤ VCC ≤ 5.5V 1 ms
Endurance
(1)
5.0V, 25°C, Page Mode 1M Write Cycles
AT93C46/56/57/66
5
Instruction Set for the AT93C46
Instruction SB
Op
Code
Address Data
Commentsx 8 x 16 x 8 x 16
READ 1 10 A
6
- A
0
A5 - A
0
Reads data stored in memory, at
specified address.
EWEN 1 00 11XXXXX 11XXXX Write enable must precede all
programming modes.
ERASE 1 11 A
6
- A
0
A5 - A
0
Erase memory location An - A0.
WRITE 1 01 A6 - A
0
A5 - A
0
D7 - D
0
D
15
- D
0
Writes memory location An - A0.
ERAL 1 00 10XXXXX 10XXXX Erases all memory locations. Valid
only at VCC = 4.5V to 5.5V.
WRAL 1 00 01XXXXX 01XXXX D7 - D
0
D
15
- D
0
Writes all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
EWDS 1 00 00XXXXX 00XXXX Disables al l prog ram ming ins tructions .
Instruction Set for the AT93C57
Instruction SB
Op
Code
Address Data
Commentsx 8 x 16 x 8 x 16
READ 1 10 A
7
- A
0
A6 - A
0
Reads data stored in memory, at
specified address.
EWEN 1 00 11XXXXXX 11XXXXX Write enable must precede all
programming modes.
ERASE 1 11 A
7
- A
0
A6 - A
0
Erase memory location An - A0.
WRITE 1 01 A
7
- A
0
A6 - A
0
D7 - D
0
D
15
- D
0
Writes me mory location An - A0.
ERAL 1 0 0 10XXXXXX 10XXXXX Erases all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
WRAL 1 00 01XXXXXX 01XXXXX D
7
- D
0
D
15
- D
0
Writes all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
EWDS 1 00 00XXXXXX 00XXXXX Disables all pr ogr amm ing instructio ns .
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