ATMEL AT93C46, AT93C56, AT93C57, AT93C66 User Manual
3-Wire
Serial CMOS
E2PROMs
1K (128 x 8 or 64 x 16)
2K (256 x 8 or 128 x 16)
4K (512 x 8 or 256 x 16)
0172J
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Features
Low Voltage and Standard Voltage Operation
•
5.0 (VCC = 4.5V to 5.5V)
2.7 (VCC = 2.7V to 5.5V)
2.5 (VCC = 2.5V to 5.5V)
1.8 (VCC = 1.8V to 5.5V)
User Selectable Internal Organization
•
1K: 128 x 8 or 64 x 16
2K: 256 x 8 or 128 x 16
4K: 512 x 8 or 256 x 16
3-Wire Serial Interface
•
2 MHz Clock Rate (5V) Compatibility
•
Self-Timed Write Cycle (1 0 ms max )
•
High Reliabili ty
•
Endurance: 1 Mill io n Cycles
Data Retention: 100 Years
Automotive Grade and Extended Temperatu re Dev ices Available
•
8-Pin PDIP, JEDEC SOIC, and EIAJ SOIC Packag es
•
Description
The AT93C46/56/57/66 provides 1024/2048/4096 bits of serial electrically erasable
programmable read only memory (EEPROM) organized as 64/128/256 words of 16
bits each, when the ORG Pin is connected to V
each when it is tied to ground. The device is optimized for use in many industrial and
commercial applications where low power and low voltage operation are essential.
The AT93C46/56/57/66 is available in space saving 8-pin PDIP and 8-pin JEDEC and
EIAJ SOIC packages.
and 128/256/512 words of 8 bits
CC
(continued)
AT93C46/56/57/66
Pin Configurations
Pin Name Function
CS Chip Select
SK Serial Data Clock
DI Serial Data Input
DO Serial Data Output
GND Ground
V
CC
ORG Internal Organizati o n
DC Don’t Connect
Power Supply
8-Pin SOIC
8-Pin PDIP
AT93C46/56/57/66
8-Pin SOIC
Rotated (R)
(1K JEDEC Only)
2-63
Description (Continued)
The AT93C46/56/57/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface
consisting of Data Input (DI), Data Output (DO), and Shift
Clock (SK). Upon receiving a READ instruction at DI, the
address is decoded and the data is clocked out serially on
the data output pin DO. The WRITE cycle is completely
self-timed and no separate ERASE cycle is required be-
Absolute Maximum Rat ings*
Operating Temperature...................-55°C to +125°C
Storage Temperature...................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground ..................... -1.0V to +7.0V
Maximum Operating Voltage ........................... 6.25V
DC Output Current.........................................5.0 mA
Block Diagram
(1)
fore WRITE. The WRITE cycle is only enabled when the
part is in the ERASE/WRITE ENABLE state. When CS is
brought “high” following the initiation of a WRITE cycle, the
DO pin outputs the READY/BUSY status of the part.
The AT93C46/56/57/66 is available in 4.5V to 5.5V, 2.7V
to 5.5V, 2.5V to 5.5V, and 1.8V to 5.5V versions.
*NOTICE: Stresses beyond those listed unde r “Absolu te Maxi-
mum Ratings” may cause permanent da ma ge to th e de vice .
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of this specification is not
implied. Exposure to absolute maxi mu m rating conditio ns
for extended periods may affect device reliability.
Note: 1. When the ORG pin is connected to V
tion is selected. If the ORG pin is left un co nn ecte d, then an internal pullu p devi ce (of ap pro xi mate ly 1 MΩ) wil l select the x
16 organization. This feature is not available on 1.8V devices.
2-64 AT93C46/56/57/66
, the x 16 organization is selected. When it is connected to ground, the x 8 organiza-
CC
AT93C46/56/57/66
Pin Capacitance
(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Test Conditions Max Units Conditions
C
OUT
C
IN
Note: 1. This parameter is characterized and is not 100% tested.
Output Capacitance (DO) 5 pF V
Input Capacitance (CS, SK, DI) 5 pF VIN = 0V
OUT
= 0V
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V,
= 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted).
T
AC
Symbol Parameter Test Condition Min Typ Max Unit
V
Supply Voltage 1.8 5.5 V
CC1
V
CC2
V
CC3
V
CC4
I
CC
I
SB1
I
SB2
I
SB3
I
SB4
I
IL
I
OL
V
IL1
V
IH1
V
IL2
V
IH2
V
OL1
V
OH1
V
OL2
V
OH2
Note: 1. VIL min and VIH max are reference only and are not tested.
Supply Voltage 2.5 5.5 V
Supply Voltage 2.7 5.5 V
Supply Voltage 4.5 5.5 V
Supply Current VCC = 5.0V
READ at
1.0 MHz
WRITE at
1.0 MHz
0.5 2.0 mA
0.5 2.0 mA
Standby Current VCC = 1.8V CS = 0V 0 0.1 µA
Standby Current VCC = 2.5V CS = 0V 6.0 10.0 µA
Standby Current VCC = 2.7V CS = 0V 6.0 10.0 µA
Standby Current VCC = 5.0V CS = 0V 17 30 µA
Input Leakage VIN = 0V to VCC 0.1 1.0 µA
Output Leakage VIN = 0V to VCC 0.1 1.0 µA
(1)
Input Low Voltage
(1)
Input High Voltage
(1)
Input Low Voltage
(1)
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
4.5V ≤ V
1.8V ≤ V
4.5V ≤ V
1.8V ≤ V
≤ 5.5V
CC
≤ 2.7V
CC
≤ 5.5V
CC
≤ 2.7V
CC
I
= 2.1 mA 0.4 V
OL
I
= -0.4 mA 2.4 V
OH
I
= 0.15 mA 0.2 V
OL
I
= -100 µAVCC - 0.2 V
OH
V
-0.1
2.0
CC
0.0
x 0 .7
V
V
CC
V
0.8
CC
x 0.3
CC
+ 1
+ 1
V
V
2-65
AC Characteristics
Applicable over recommended operating range from TA = -40°C to + 85°C, VCC = As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol Parameter Test Condition Min Typ Max Units
2
1
0.5
0.25
250
250
500
1000
250
250
500
1000
250
250
500
1000
100
100
200
400
f
SK
t
SKH
t
SKL
t
CS
t
CSS
t
DIS
t
CSH
t
DIH
t
PD1
t
PD0
t
SV
t
DF
t
WP
4.5V ≤ V
SK Clock
Frequency
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ V
SK High Time
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ V
SK Low Time
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ V
Minimum CS Low
Time
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
CS Setup Time Relative to SK
DI Setup Time Relative to SK
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
4.5V ≤ V
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ V
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
0
0
0
0
250
250
500
1000
250
250
500
1000
250
250
500
1000
50
50
100
200
100
100
200
400
CS Hold Time Relative to SK 0 ns
DI Hold Time Relative to SK
Output Delay to ‘1’ AC Test
Output Delay to ‘0’ AC Test
CS to Status Valid AC Test
4.5V ≤ V
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ V
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ V
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ V
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
100
100
200
400
4.5V ≤ VCC ≤ 5.5V
CS to DO in High
Impedance
Write Cycle Time
AC Test
CS = V
IL
2.7V ≤ V
2.5V ≤ V
1.8V ≤ V
4.5V ≤ V
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
0.1 10 ms
≤ 5.5V 1 ms
CC
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-66 AT93C46/56/57/66
Instruction Set for the AT93C46
Address Data
Instruction SBOpCode
READ 1 10 A
EWEN 1 00 11XXXXX 11XXXX
ERASE 1 11 A
WRITE 1 01 A
ERAL 1 00 10XXXXX 10XXXX
WRAL 1 00 01XXXXX 01XXXX D
EWDS 1 00 00XXXXX 00XXXX
x 8 x 16 x 8 x 16
- A
6
0
- A
6
0
- A
6
0
A5 - A
A5 - A
A5 - A
0
0
0
D7 - D
- D
7
AT93C46/56/57/66
Comments
Reads data stored in memory, at
specified address.
Write enable must precede all
programming modes.
Erase memory location A
D
0
- D0Writes memory location A
15
Erases all memory locations. Valid
only at V
D
0
15
Writes all memory locations. Valid
- D
0
only at V
= 4.5V to 5.5V.
CC
= 4.5V to 5.5V.
CC
Disables all programming
instructions.
n - A0
n - A0
.
.
Instruction Set for the AT93C57
Address Data
Instruction SBOpCode
READ 1 10 A
EWEN 1 00 11XXXXXX 11XXXXX
ERASE 1 11 A
WRITE 1 01 A
ERAL 1 00 10XXXXXX 10XXXXX
WRAL 1 00 01XXXXXX 01XXXXX D
EWDS 1 00 00XXXXXX 00XXXXX
x 8 x 16 x 8 x 16
- A
7
0
- A
7
0
- A
7
0
A6 - A
A6 - A
A6 - A
0
0
0
D7 - D0D
- D0D
7
Comments
Reads data stored in memory, at
specified address.
Write enable must precede all
programming modes.
Erase memory location A
- D0Writes memory location A
15
Erases all memory locations. Valid
= 4.5V to 5.5V.
CC
= 4.5V to 5.5V.
CC
15
only at V
Writes all memory locations. Valid
- D
0
only at V
Disables all programming
instructions.
n - A0
n - A0
.
.
2-67
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