Asus X407UAR,X407UBR,X407UFR Schematic

SYSTEM PAGE REF.

PAGE

001_Block Diagram

002_System Setting

003_CPU_DISPLAY

004_CPU_DDR4

005_CPU_LPC,SPI,SMB,CLINK

006_CPU_POEWR

008_CPU_MISC,JTAG

009_CPU_CFG,RSVD

010_CPU_POWER_CAP

016_DDR4_SO-DIMM_A_REV

017_DDR4_SO-DIMM_B_STD

018_DDR4_CA_DQ_VOLTAGE

019_DDR4

020_CPU_PCH_CSI2,EMMC

021_CPU_PCH_CGPIO, LPIO, MISC

022_CPU_PCH_AUDIO,SDIO,SDXC

023_CPU_PCH_PCIE,USB,SATA

024_CPU_PCH_CLOCK SIGNALS,RTC

025_CPU_PCH_SYS_POWER

026_CPU_PCH_POEWR,GND

027_CPU_PCH_POEWR,GND

028_PCH-SPI ROM,OTH /DEBUG PORT

029_Silego_Green_CLK_Gen

030_KBC_IT8995E/CX

031_KBC_KB,TP

032_RST_Reset Circuit

036_AUD-ALC3251

037_AUD-HEADPHONE JACK

038_AUD_SPEAKER

042_CardReader Connector

045_eDP Connector

048_HDMI-type D

050_FAN & SENSOR

051_NGFF(KEY-M)_SSD

052_USB 3.0 + 2.0 CONN

053_NGFF(KEY-E)_WLAN

057_DSG_Discharge

058_PRO_Protect

059_Power & WIFI & CAP LED&LID

060_DC_DC & BAT IN

064_

065_ME_Conn & Skew Hole

066_

067_

068_HDD COnnector

069_EMI

070_VGA_nVIDIA_N16V/S_PCIE

071_VGA_nVIDIA_N16V/S_FB-IF

072_VGA_nVIDIA_N16V/S_FB-DDR3

073_VGA_nVIDIA_N16V/S_VDD

074_VGA_nVIDIA_N16V/S_DISPLAY

075_VGA_nVIDIA_N16V/S_ROM,XTAL

076_VGA_nVIDIA_N16V/S_GPIO

077_VGA_nVIDIA_N16V/S_POWER

080_PW_IMVP8 (1) (RT3601BCGQW)
081_PW_IMVP8 (2) (RT3601BCGQW)
083_PW_+1.0VSUS / +1.8VSUS
084_PW_+1.2VS
086_PW_1.35V/+0.675VS (UP9011Q)
087_PW_+3VADSW/+5VSUS (RT8249C)
088_PW_LOAD SWITCH

089.PW_CHARGER(BQ24780)
090_PW_PROTECTION
091_PW_DGPU_2PHASE(RT8815A)

Content

X407UAR/UBR/UFR SCHEMATIC Revision 1.0

BLOCK DIAGRAM

（UAR：UMA）(45W) (Power BOM)
（UBR：DGPU = Nvidia N16V-GMR1, MX110）(65W) (Power BOM)

(UFR：DGPU = Nvidia N16S-GTR, MX130）(65W) (Power BOM)

Touchpad

Page 31

Keyboard

Page 31

Charger

Page 88

CPU
Thermal Sensor

Page 50

DIMM
Thermal Sensor

Page 14

INT. AMIC

Audio Jack

Page 37

Speaker L/R

I2C

SMB0

SMB1

Audio Codec

eDP Panel

HDMI type A

Debug Conn.

SPI

ALC3251

Page 36Page 38

Non Connected Standby

Page 45

Page 48

EC

IT8995E

Page 68

NGFF SSD

Page 51

DDI_2

SPI ROM

W25Q64FVSSIQ

HDD

eDP

DDI_2

DDI_1

SML1

I2C1

LPC

Page 28

Page 30

SPI

Page 28

HDA

SATA_0

Gen3

SATA_2

CPU

Kabylake R- U42

Page 3~9

PCH

8th Generation
Intel Processor Families
I/O for U/Y Platforms

MCP

Page 20~28

Azalia

SATA

Gen2

DDR4
2133MHz

DDR4
2133MHz

SMB

PCIE

USB 2.0

USB 3.0

DDR4 so-dimm

DDR4 so-dimm

PCIE_1~4

PCIE_9/10/11/12

PCIE_6

USB 2.0_8

USB 2.0_6

USB 2.0_2

USB 2.0_4

USB 2.0_1

USB 3.0_1

Page 13~15, 19

Nvidia

MX110/MX130

N16V-GMR1/N16S-GTR

VRAM x32
gDDR5 2GB

NGFF SSD

Page 51

WLAN + BT

Page 53

CMOS Camera

Page 45

USB 2.0 Standard Conn.
1 port

Page 52

Card Reader

Page 42

USB 3.0 Standard Conn.
1 ports

Page 52

Page 70~ 79

Power

+VCCGT
+VCCCORE
+VCCST

+1.0VSUS / +1.8VSUS

+0.95VSG

+VCCPRIM_CORE

+1.2V / +VTT / +2.5V

+3VADSW/+5VSUS

Load Switch

Charger

+VDDC

+VCCSA

Page 80 & 81

Page 83

Page 84

Page 86

Page 87

Page 88

Page 89

Page 91

CPU XDP

Page 7

Discharge Circuit

Reset Circuit

Page 57

Page 32

DC & BATT. Conn.

Skew Holes

Page 60

Page 65

PWM Fan

Page 50

BOM

Title :

Size

Custom

Date: Sheet

Wednesday, March 07, 2018

Block Diagram

Dept.:

Project Name

X407UA/UV

ASUSTeK COMPUTER INC.

Engineer:

Brian Chen

1

Rev

R1.0

102

of

+3VSUS

PR8318

100KOhm

@

VSUS_ON31,58,84,89

PT830* 請放置 PU8302旁;並請放置Trace 上!

PT8303

P_1.0VSUS_HG_30

P_1.0VSUS_LX_30

P_1.0VSUS_LG_30

1

NB_TPC20T

PT8301

1

NB_TPC20T

PT8302

1

NB_TPC20T

12

P_1.0VSUS_LX_30

@

PD8301

BAT54CW

1

3

2

12

PR8303
30KOhm

PR8306

178KOhm

PR8306 close to PU8302

12

PC8313

0.1UF/25V

12

VFB=0.75V

GND GND

P_1.0VSUS_FB_10

12

PR8311
10KOhm

GND

1.0VSUS_PWRGD59

820PF/50V

PC8315

PR8309

3.48KOhm

12

f=420kHz

PR8304
620KOhm

1 2

P_1.0VSUS_FB_10
P_1.0VSUS_LDO_EN_10
P_1.0VSUS_EN_10
P_1.0VSUS_TON_10

GND

12

12

PC8301

0.1UF/25V

GND

P_1.0VSUS_VSENS_10

PU8302

GND

RT8248AGQW

+5VSUS_PWR

PR8321

2.2Ohm
5%

P_1.0VSUS_VSENS_10

P_1.0VSUS_VIN_S

PC8304

0.033UF/16V

12

VDDQ

6

FB

7

S3

8

S5

9

TON

10

PGOOD

VID12VDD13CS14PGND15LGATE

nbs_r0603_h24_000s

1 2

nbs_c0603_h37_000s

12

PC8307
1UF/25V

GND

1

2

3

4

5

GND1

GND4

VTTREF

VTTSNS

VTTGND

GND3
GND2

VTT

VLDOIN

BOOT
UGATE
PHASE

11

GND

P_1.0VSUS_CS_10

P_1.0VSUS_VDDP_30

12

RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA

PR8310

OCP=14~16A

200KOhm

+1.0VSUS (RT8248AGQW)

23
22
21
20
19
18
17

P_1.0VSUS_BST_30

16

P_1.0VSUS_HG_30
P_1.0VSUS_LX_30

20160530 modify

PR8313
10Ohm

PSL8303

0402

@

12

21

P_1.0VSUS_BST_R_30

nbs_r0603_h24_000s

P_1.0VSUS_LG_30

P_1.0VSUS_LOSENS_10

P_1.0VSUS_RESENS_10

PR8315
0Ohm

1 2

5%

PC8302

0.1UF/25V

1 2

nbs_c0603_h37_000s

PR8302
10KOhm
@

1 2

PC8310
2200PF/50V

@

2

c0805,nb_c0805_h57_hdi

22UF/6.3V

PC8303

12

AC_BAT_SYS

+1.0VO

c0805,nb_c0805_h57_hdi

22UF/6.3V

12

+

6mm

Imax=7.45A

PJP8303
3MM_OPEN_5MIL

112

560UF/2.5V

PCE8302

@

+1.0VSUS

@

2

PJP8301
1MM_OPEN_5MIL

112

12

12

12

PCI8301
10UF/25V

nbs_c0805_h57_000s

GND

5

PQH8301

PEA16BA

D

4

G S

123

5

D

4

G S

123

@

12

GND

PSP8301

SHORT_PAD

@

PQL8302

12

PEA16BA

12

12

[HF]CYNTEC/PEUB063T-1R0MS

2 1

7x7x3mm

PC8317

1000PF/50V

nbs_c0603_h37_000s

P_1.0VSUS_SNB_S

PR8320

1Ohm

nbs_r1206_h30_000s

PL8302
1UH
Irat=12A

5%

PCI8303
10UF/25V
@

nbs_c0805_h57_000s

@

@

+

PCE8301
68UF/25V

h=6mm

480mil

c0805,nb_c0805_h57_hdi

c0805,nb_c0805_h57_hdi

22UF/6.3V

22UF/6.3V

PC8305

PCO8306

12

SHORT_PAD

@

12

PSP8302

PC8320

12

12

Imax=1A

+1.8VSUS

1

1

2

2

12

PJP8302

1MM_OPEN_5MIL

@

PC8311
10UF/6.3V
@

+1.8VSUSO

12

PC8309
10UF/6.3V

PSP8303

@

SHORT_PAD

1.8VSUS_PWRGD59

PR8314

12.7KOHM

1 2

12

PC8319
1000PF/50V

3A LDO REF=0.8V

+1.8VSUS [For PCH]

PU8301
APL5930CQBI-TRG

1

POK

2

FB

3

VOUT1

4

VOUT2

5

VOUT36VIN1

PR8312 0Ohm

PD8302

BAT54CW

3

13

GND3

12

GND2

11

GND1

10

VCNTL

9

EN

8

VIN3

7

VIN2

12

12

PC8318

@

1

2

0.1UF/16V
@

GND

+5VSUS

12

PC8316
1UF/16V

+3VA_DSW

12

12

PC8314

PR8307

10UF/6.3V

10KOhm
@

<Variant Name>

Title :

Size

C

Date: Sheet

Wednesday, March 07, 2018

Project Name

X540UVK

PW_+1.0VSUS / +1.8VSUS

Dept.:

NB Power Team

Engineer:

Andy

Rev

R0.1

102

of

84

VSUS_ON31,58,84,89

1.8VSUS_PWRGD
P_1.8VSUS_FB_10 P_1.8VSUS_EN_10

@

12

12

PR8308
10KOhm

BOM

Project Name

X540UVK

Title :

Size

A3

Date: Sheet

Wednesday, March 07, 2018

PW_+1.2VS

Dept.:

NB Power Team

Engineer:

Andy

85

of

Rev

R1.0

102

BOM

Project Name

X540UVK

Title :

Size

Custom

Date: Sheet

Wednesday, March 07, 2018

POWER_+VGFX_CORE

Dept.:

NB Power Team

Engineer:

Andy

86

of

Rev

R1.0

102

TOP VGA NUTTOP CPU NUT

www.teknisi-indonesia.com

H6515

CT189B180D150

GND GND

H6516

CT189B180D150

GND GND

H6501

1

NP_NC1

2

NP_NC2

3

GND2

2D_D110N_DO122X98N

GND GND

1

GND

20171013 Brian
H6503 change to s11705
for 螺絲孔徑2.8mm to 2.3mm.

1

20171013 Brian
H6505 change to s08180

GND GND GND

for 螺絲孔徑2.8mm to 2.3mm.

1
2
3

GND GND

H6517

CT189B180D150

H6518

CT189B180D150

6

GND5

5

GND4

4

GND3

H6503

C315D91

H6505

C315D91

H6507

NP_NC

5

GND1

GND4

4

GND2

GND3

C315D110N

H6504

1

NP_NC

2

5

GND1

GND4

3

4

GND2

GND3

C315D110N

GND GND

H6506

1

NP_NC

2

5

GND1

GND4

3

4

GND2

GND3

C315D110N

H6526

1

NP_NC

2

5

GND1

GND4

3

4

GND2

GND3

C315D110N

GND GND

H6513

CT189B180D150

GND

H6514

CT189B180D150

GND

20180117 Brian
Add H6526 for EMI DIMM-door.

BAT NUT

H6519

CT236CB195D165
nbs_nut_1p_418
13020-03890000

GND

20170814 Brian
H6519 footprint from nbs_nut_1p_414(TOP上件)
to nbs_nut_1p_418(BOT上件).

20171013 Brian
H6519 change 13020-03890000 to 13020-04030000
for 螺絲孔徑2.8mm to 2.3mm.

20171025 Brian
H6519 change to 13020-03890000.

H6508

1

6

NP_NC1

GND5

2

5

NP_NC2

GND4

3

4

GND2

GND3

2D_D110N_D122X98N

GND GND

H6510

1

NP_NC

2

5

GND1

GND4

3

4

GND2

GND3

ST354CB315D110N

GND GND

H6511

1

NP_NC

2

5

GND1

GND4

3

4

GND2

GND3

RT591X571CB315D110N

GND GND

H6509

1

6

NP_NC1

GND5

2

5

NP_NC2

GND4

3

4

GND2

GND3

2D_D110N_D122X98N

GND GND

H6520

1

NP_NC

2

GND1

GND4

3

GND2

GND3

C197D110N

GND GND

5
4

TOP GASKET (6*6)

1

SMD98X118

H6523

H6522

1

1

1

SMD98X118

H6521

1

1

SMD98X118

GND GND GND GND GND

TOP/BOT VRAM GASKET (3*2)

H6524

1

SMD118X118

1

1

SMD118X118

H6525

1

<Variant Name>

ASUSTeK COMPUTER INC. NB4

Size Project Name

D

Date: Sheet

Title :

Engineer:

X507UA/UV

65_ME_Conn & Skew Hole

Bull Tsai

66 102Wednesday, March 07, 2018

Rev

R1.0

of

PT860* 請放置 PU8600旁;並請放置Trace 上!

PT8601

1

P_1V2_HG_30

NB_TPC20T

PT8602

1

P_1V2_LX_30

NB_TPC20T

PT8603

1

P_1V2_LG_30

NB_TPC20T

+1.2V / +VTT / +2.5V[For Memory]

PD8600

PR8630

BAT54AW

0Ohm

PM_SUSC#26,31

1.2V_ON31

DDR_PG_CTRL5

12

1

2

1 2

PR8613
10KOhm

3

PD8601
BAT54CW

PR8616
0Ohm

3

P_1V2_EN_10

12

PC8613

0.22UF/10V

f=420kHz

PR8607
620KOhm

2

1

12

@

P_1V2_LDO_EN_10

12

PC8614

0.1UF/25V
@

1 2

GND

PU8600
RT8248AGQW

P_1V2_FB_10
P_1V2_LDO_EN_10
P_1V2_EN_10

1.2V_PWRGD59

P_1V2_TON_10

PC8615

0.1UF/25V

10

AC_BAT_SYS

12

P_1V2_VSENS_10

P_1V2_VTTREF_10

GND

1

2

3

4

5

GND1

VDDQ

GND4

VTTREF

VTTSNS

VTTGND

GND3

FB
S3
S5
TON
PGOOD

VID12VDD13CS14PGND15LGATE

11

VLDOIN

GND2

VTT

BOOT
UGATE
PHASE

6
7
8
9

+5VSUS

12

PR8601

2.2Ohm

P_1V2_LX_30

PR8621

178KOhm

VFB=0.75V

12

P_1V2_FB_10

PC8612
820PF/50V

12

PR8611

6.2KOhm

12

PR8612
10KOhm

P_1V2_VSENS_10

12

GND GND

nbs_r0603_h24_000s

PC8602
1UF/25V
nbs_c0603_h37_000s

12

PC8611

0.1UF/25V

P_1V2_CS_10

P_1V2_LG_30

P_1V2_VDD_30

5%

GND GND

12

12

PR8603
402KOhm

GND

GND

+VTT

12

12

PC8601

PC8600

10UF/6.3V

nbs_c0805_h37_000s

23
22
21
20
19

+VTT

18

P_1V2_LDOIN_30

17

P_1V2_BST_30

16

P_1V2_HG_30
P_1V2_LX_30

RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA

OCP=13A

10UF/6.3V

nbs_c0805_h37_000s

+1.2V

@

21

PSL8601

0603

nbs_r0603_h24_000s

1 2

12

PC8604
1UF/25V
nbs_c0603_h37_000s

GND

PR8606
0Ohm

PR8609
10Ohm

PSL8602

@

0402

P_1V2_BST_R_30

PC8603

5%

0.1UF/25V

1 2

nbs_c0603_h37_000s

12

21

P_1V2_LOSENS_10

AC_BAT_SYS

12

12

PCI8601

PCI8603

10UF/25V

10UF/25V

GND

20160316

PL8600
1UH
Irat=12A

2 1

7x7x3mm

[HE]CYNTEC/PEUB063T-1R0MS

12

PC8609

1000PF/50V
nbs_c0603_h37_000s
@

P_1V2_SNB_S

12

PR8608

5%

1Ohm
nbs_r1206_h30_000s
@

N/A

nbs_c0805_h57_000s

P_1V2_VO_S

12

+1.2V

h=6mm

Imax= 10.06A

OCP= 13A

+1.2V

PJP8601

12

c0805,nb_c0805_h57_hdi

22UF/6.3V

12

PC8610

112

2

@

3MM_SHORT_PIN

@

+

PCE8601

330UF/2V

480mil

c0805,nb_c0805_h57_hdi

c0805,nb_c0805_h57_hdi

22UF/6.3V

PCO8606

SHORT_PAD

12

12

PSP8600

@

PC8605

22UF/6.3V

12

c0805,nb_c0805_h57_hdi

22UF/6.3V

PC8607

nbs_c0805_h57_000s

5

PQH8601

QM1830M3

D

4

G S

123

12

PR8604
10KOhm
@

5

PQL8602

QM1830M3

D

4

G S

123

12

PC8608

1000PF/50V

@

PSP8601

@

SHORT_PAD

1 2

Imax= 3A

OCP= 4.5A

+2.5V

2

PJP8602

2

1MM_SHORT_PIN

1

1

12

PC8619
10UF/6.3V
@
nbs_c0805_h57_000s

@

+2.5VO

12

PC8616
10UF/6.3V

nbs_c0805_h57_000s

PSP8602

@

SHORT_PAD

12

3A LDO REF=0.8V

2.5V_PWRGD59

PR8623

21.5KOhm

1 2

PC8606
1000PF/50V

+2.5V

PU8601
APL5930CQBI-TRG

1

POK

2

2.5V_PWRGD
P_2.5V_FB_10 P_2.5V_RCEN_10

@

12

12

PR8602
10KOhm

3
4
5

FB
VOUT1
VOUT2
VOUT36VIN1

PD8602

@

PR8615

BAT54AW

0Ohm @

1

3

12

PR8614

PC8620

10KOhm

0.1UF/25V

@

13

GND3

12

GND2

11

GND1

10

VCNTL

9

EN

8

VIN3

7

VIN2

+5VSUS

12

PC8617
1UF/16V

+3VA_DSW

12

12

PC8618

PR8622

10UF/6.3V

10KOhm
@

12

PM_SUSC#

2

1.2V_ON

12

<Core Design>

Title :

Size

A2

Date: Sheet

Wednesday, March 07, 2018

PW_+1.2V/+VTT/+2.5V

Dept.:

NB Power team

Project Name

X540UVK

Engineer:

Andy

Rev

R0.1

102

of

87

+3VA_DSW / +5VSUS [System Power]

www.teknisi-indonesia.com

AC_BAT_SYS

+5VSUS

+5VSUS_PWR

21

0603

PSL8705 is close to PJP8702 0511

PSL8705 @

Imax =9.81A

PJP8702

@

3MM_SHORT_PIN

112

2

PC8723

22UF/6.3V

@

PJP8701
1MM_OPEN_5MIL

112

2

12

PCE8703
220UF/6.3V

V-Chip
h=4.5mm

20160415_Modify 20170517_Modify

@

P_5VSUS_VIN_S

12

PR8701

6.49KOhm

PL8702

3.3UH
Irat=6.5A

7x7x3mm

PC8715
150PF/50V

@

12

PCI8701
10UF/25V

nbs_c0805_h57_000s

PQH8701

QM1830M3

21

PQL8702

QM1830M3

P_5VSUS_FB_10

5

D

4

GS

123

5

D

4

GS

123

1 2

P_5VSUS_LG_30

PC8716

@

2200PF/50V

PCE8702

68UF/25V

h=6mm

[HF]CYNTEC/PEUB063T-3R3MS

+5VSUSO

12

+

P_5VSUS_VSENS_10

PC8709

0.1UF/25V

12

+

SHORT_PAD

12

PSP8705

@

12

12

PR8703
10KOhm

12

+5VSUS IOCP=9.2A

PR8702

1 2

30KOHM

PR8706

1 2

30KOHM

+3VA_DSW IOCP=9.2A

P_5VSUS_HG_30

P_5VSUS_LX_30

P_5VSUS_CS_10
P_5VSUS_FB_10
+3VAO
P_3VADSW_FB_10
P_3VADSW_CS_10

3VADSW_ON31

5VSUS_ON31,58

12

PC8702

4.7UF/6.3V

+3VAO

P_3VADSW_VIN_S

5

D

123

5

D

123

PQH8704

PQL8703

12

QM1830M3

QM1830M3

PT8713

1

P_3VADSW_HG_30

PT8714

1

P_3VADSW_LX_30

PT8715

1

P_3VADSW_LG_30

12

PCI8705
10UF/25V

nbs_c0603_h39_000s

[HF]CYNTEC/PEUB063T-3R3MS

PL8701

3.3UH
Irat=6.5A

7x7x3mm

12

PR8727
680KOhm

P_3VADSW_FBMLCC_10

PC8708

0.01UF/50V

PJP8703
1MM_OPEN_5MIL

112

PCI8707

10UF/25V

21

12

@

2

20160401 Modify

12

12

12

PC8706

0.1UF/25V

P_5VSUS_BST_R

12

PR8705

5%

0Ohm

nbs_r0603_h24_000s

P_5VSUS_HG_30

P_5VSUS_LX_30

P_12VSUS_SKIPSEL_20

P_5VSUS_EN_10

P_5VSUS_BST_30

PU8701

RT8249CGQW

16

17

18

19

20

21

EN1

UG1

GND122GND223GND3

1

CS1

2

FB1

3

LDO3

4

FB2

5

CS2

EN27PGOOD8PHASE29BOOT210UG2

6

P_3VADSW_EN_10

PSL8702

SHORT_LAND

0402

PSL8703

SHORT_LAND

0402

PSL8704

SHORT_LAND

0603

BOOT1

LG1

PHASE1

SKIPSEL

BYP1

LDO5

VIN
LG2

P_3VADSW_HG_30

P_3VADSW_LX_30

P_3VADSW_BST_30

PR8708

5%

0Ohm

nbs_r0603_h24_000s

1 2

P_3VADSW_BST_R

12

PC8714

0.1UF/25V

3VA_DSW_PWRGD 26,31,59

@

21

P_3VADSW_EN_10

@

21

P_5VSUS_EN_10

@

21

15
14
13
12
11

+3VA

P_5VSUS_LG_30
+5VSUSO
+5VAO

P_3VADSW_LG_30

12

PC8705

4.7UF/6.3V

P_3VADSW_HG_30

P_3VADSW_LX_30

P_3VADSW_LG_30

AC_BAT_SYS

P_3VADSW_FB_10

1 2

PC8703
2200PF/50V

4

4

@

G S

G S

PT8716

PT8717

PT8718

Close to PU8701

+3VADSWO

PC8707

390PF/50V

SHORT_PAD

12

PSP8706

@

P_3VADSW_VSENS_10

12

PC8721

PR8704

150PF/50V

6.8KOhm

@

12

PR8707
10KOhm

1

1

1

AC_BAT_SYS

P_5VSUS_HG_30

P_5VSUS_LX_30

P_5VSUS_LG_30

12

PCO8711
22UF/6.3V

12

PC8710

0.1UF/25V

Imax = 9.5A

PJP8704

@

3MM_SHORT_PIN

112

2

12

12

PC8725

22UF/6.3V

PC8726

22UF/6.3V

+3VA_DSW

12

PC8727

22UF/6.3V

@

PSL8701

+12VSUS

12

@

21

0603

P_12VSUS_CP4_20 P_12VSUS_CP3_20

12

PC8724

0.1UF/25V

nbs_c0603_h37_000s

P_12VSUS_CP1_20P_3VADSW_LG_30 +5VSUSO

PC8718

0.1UF/25V

12

P_12VSUS_CP2_20

PC8701

0.1UF/25V

請 check 整份線路 +12VSUS total 並聯對地電阻不得小於10kOhm

6

5

BAT54SDW

PD8701

Adaptor Mode (IMVP8)

CS S4

1

1

1

1

1

1

TPC28T

TPC28T

TPC28T

S3

-

1

-

1

-

1

-

1

-

1

-

1

0

-

PT8708

1

@

+3VADSWO

PT8701

+3VA_DSW

PT8706

1

@

PT8702

1

@

+5VSUS

PT8709

+5VAO

1

2

34

12

PC8722

0.1UF/25V
nbs_c0603_h37_000s

PS_ON 1

3VADSW_ON

3VSUS_ON

5VSUS_ON

1.35V_ON

SUSC_EC#

SUSB_EC#

PT8704

+12VSUS

PT8712

GND

PT8703

GND GND

S5 S5 with USB Charger+S0

DS3

-

-

1

-

1

-

0

-

1

-

0

-

0

-

0

TPC28T

1

@

+3VAO

TPC28T

1

@

+3VA

TPC28T

1

@

GND+5VSUSO

TPC28T

1

@

TPC28T

1

@

1

-

1

0

-

-

1

0

-

-

0

-

PT8705

PT8707

PT8711

PT8710

TPC28T

TPC28T

TPC28T

TPC28T

0

1

@

1

@

1

@

1

@

3VADSW_ON

3VSUS_ON

1.35V_ON

SUSC_EC#

SUSB_EC#

BOM

Title :

Size

Custom

Date: Sheet

Wednesday, March 07, 2018

Battery Mode (IMVP8)

1

PS_ON

1

1

1

1

1

1

PW_+3VA_DSW/+5VSUS

Dept.:

NB Power Team

CS

S3

-

-

-

-5VSUS_ON

-

-

-

Project Name

X540UVK

-

-

-

-

-

-

DS3

1

1

0

110

0

0

Engineer:

S5 S5 with USB Charger+S0

S4

0

0

0

0

0

0

0

0

0

0

0

0

0

Andy

88

1-

0

0

1

0

0

0

Rev

R0.1

102

of

2016/11/18 X542UA_R1.0 #84, Modify to GDDR5

FBA_CLK072
FBA_CLK0#72

FBA_CMD[0:15]72

FBA_DBI[7..0]72

FBA_EDC[7..0]72

FBA Partition Memory (1 of 2)

FBA_D[0:63]72

FBA_D[0:63]

20161215 Byte SWAP

20161216 bitd SWAP

FBA_D7
FBA_D6
FBA_D5
FBA_D4
FBA_D3
FBA_D2
FBA_D1
FBA_D0

FBA_D15
FBA_D14
FBA_D13
FBA_D12
FBA_D11

GND

GND

MF=0 non-Mirror

FBA_D10
FBA_D9
FBA_D8

FBA_D23
FBA_D22
FBA_D21
FBA_D20
FBA_D19
FBA_D18
FBA_D17
FBA_D16

FBA_D31
FBA_D30
FBA_D29
FBA_D28
FBA_D27
FBA_D26
FBA_D25
FBA_D24

FBA_WCK2372
FBA_WCK23#72

FBA_WCK0172
FBA_WCK01#72

R7202 121Ohm1% /VGA
R7203 1KOhm/VGA

R7204 1KOhm/VGA

20161215 SWAP

20161215 SWAP

1 2
1 2

12

FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7

FBA_CLK0

R7239

80.6Ohm
/VGA
1%

1 2

FBA_CLK0#

FBA_CLK1

R7240

80.6Ohm
/VGA
1%

1 2

FBA_CLK1#

X507 remove C7202/C7203

GND

C7204 820PF/50V

MF=0 non-Mirror

U7201

M2

DQ7/DQ31

M4

FBA_D5

DQ6/DQ30

N2

FBA_D0

DQ5/DQ29

N4

FBA_D2

DQ4/DQ28

T2

FBA_D4

DQ3/DQ27

T4

FBA_D7

DQ2/DQ26

U2

FBA_D3

DQ1/DQ25

U4

FBA_D6

DQ0/DQ24

M13

FBA_D1

DQ15/DQ23

M11

FBA_D12

DQ14/DQ22

N13

FBA_D8

DQ13/DQ21

N11

FBA_D15

DQ12/DQ20

T13

FBA_D9

DQ11/DQ19

T11

FBA_D13

DQ10/DQ18

U13

FBA_D14

DQ9/DQ17

U11

FBA_D11

DQ8/DQ16

F13

FBA_D10

DQ23/DQ15

F11

FBA_D18

DQ22/DQ14

E13

FBA_D20

DQ21/DQ13

E11

FBA_D19

DQ20/DQ12

B13

FBA_D23

DQ19/DQ11

B11

FBA_D16

DQ18/DQ10

A13

FBA_D21

DQ17/DQ9

A11

FBA_D17

DQ16/DQ8

F2

FBA_D22

DQ31/DQ7

F4

FBA_D24

DQ30/DQ6

E2

FBA_D26

DQ29/DQ5

E4

FBA_D27

DQ28/DQ4

B2

FBA_D25

DQ27/DQ3

B4

FBA_D31

DQ26/DQ2

A2

FBA_D30

DQ25/DQ1

A4

FBA_D28

DQ24/DQ0

FBA_D29

J5

A12/A13

K4

FBA_CMD9

A0/A10/A8/A7

K5

FBA_CMD6

A1/A9/A11/A6

K10

FBA_CMD7

A3/BA3/A5/BA1

K11

FBA_CMD4

A2/BA0/A4/BA2

H10

FBA_CMD3

A5/BA1/A3/BA3

H11

FBA_CMD1

A4/BA2/A2/BA0

H5

FBA_CMD2

A6/A11/A1/A9

H4

FBA_CMD11

A7/A8/A0/A10

FBA_CMD10

D4

WCK23/WCK01

D5

WCK23#/WCK01#

P4

WCK01/WCK23

P5

WCK01#/WCK23#

R2

EDC0/EDC3

R13

FBA_EDC0

EDC1/EDC2

C13

FBA_EDC1

EDC2/EDC1

C2

FBA_EDC2

EDC3/EDC0

FBA_EDC3

P2

DBI0#/DBI3#

P13

FBA_DBI0

DBI1#/DBI2#

D13

FBA_DBI1

DBI2#/DBI1#

D2

FBA_DBI2

DBI3#/DBI0#

FBA_DBI3

G3

CAS#/RAS#

L3

FBA_CMD12

RAS#/CAS#

FBA_CMD15

J3

CKE#

J11

FBA_CMD14

CK#

J12

FBA_CLK0#

CK

FBA_CLK0

G12

WE#/CS#

L12

FBA_CMD0

CS#/WE#

FBA_CMD5

J13

ZQ

J10

FBA_ZQ1

SEN

FBA_SEN1

J2

RESET#

J1

FBA_CMD13

MF

FBA_MF1

A5

Vpp/NC

U5

Vpp/NC1

A10

VREFD1

U10

VREFD2

1 2

J14

VREFC

FBA_VREFC0

/VGA

J4

ABI#

FBA_CMD8

K4G41325FE-HC28

/VGA

+FBVDDQ

B1

VDDQ1

B3

VDDQ2

B12

VDDQ3

B14

VDDQ4

D1

VDDQ5

D3

VDDQ6

D12

VDDQ7

D14

VDDQ8

E5

VDDQ9

E10

VDDQ10

F1

VDDQ11

F3

VDDQ12

F12

VDDQ13

F14

VDDQ14

G2

VDDQ15

G13

VDDQ16

H3

VDDQ17

H12

VDDQ18

K3

VDDQ19

K12

VDDQ20

L2

VDDQ21

L13

VDDQ22

M1

VDDQ23

M3

VDDQ24

M12

VDDQ25

M14

VDDQ26

N5

VDDQ27

N10

VDDQ28

P1

VDDQ29

P3

VDDQ30

P12

VDDQ31

P14

VDDQ32

T1

VDDQ33

T3

VDDQ34

T12

VDDQ35

T14

VDDQ36

C5

VDD1

C10

VDD2

D11

VDD3

G1

VDD4

G4

VDD5

G11

VDD6

G14

VDD7

L1

VDD8

L4

VDD9

L11

VDD10

L14

VDD11

P11

VDD12

R5

VDD13

R10

VDD14

A1

VSSQ1

A3

VSSQ2

A12

VSSQ3

A14

VSSQ4

C1

VSSQ5

C3

VSSQ6

C4

VSSQ7

C11

VSSQ8

C12

VSSQ9

C14

VSSQ10

E1

VSSQ11

E3

VSSQ12

E12

VSSQ13

E14

VSSQ14

F5

VSSQ15

F10

VSSQ16

H2

VSSQ17

H13

VSSQ18

K2

VSSQ19

K13

VSSQ20

M5

VSSQ21

M10

VSSQ22

N1

VSSQ23

N3

VSSQ24

N12

VSSQ25

N14

VSSQ26

R1

VSSQ27

R3

VSSQ28

R4

VSSQ29

R11

VSSQ30

R12

VSSQ31

R14

VSSQ32

U1

VSSQ33

U3

VSSQ34

U12

VSSQ35

U14

VSSQ36

B5

VSS1

B10

VSS2

D10

VSS3

G5

VSS4

G10

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L5

VSS10

L10

VSS11

P10

VSS12

T5

VSS13

T10

VSS14

GND

GDDR5 X32

FBA_CLK172
FBA_CLK1#72

FBA_CMD[16:31]72

20161214 SWAP

20161214 SWAP

FBA_D[0:63]

GND

GND

MF=0 non-Mirror

FBA_D63
FBA_D62
FBA_D61
FBA_D60
FBA_D59
FBA_D58
FBA_D57
FBA_D56

FBA_D55
FBA_D54
FBA_D53
FBA_D52
FBA_D51
FBA_D50
FBA_D49
FBA_D48

FBA_D47
FBA_D46
FBA_D45
FBA_D44
FBA_D43
FBA_D42
FBA_D41
FBA_D40

FBA_D39
FBA_D38
FBA_D37
FBA_D36
FBA_D35
FBA_D34
FBA_D33
FBA_D32

FBA_WCK4572
FBA_WCK45#72

FBA_WCK6772
FBA_WCK67#72

R7207 121Ohm1% /VGA
R7205 1KOhm/VGA

R7206 1KOhm/VGA

1 2
1 2

12

X507 remove C7206/C7207

GND

C7205 820PF/50V

FBA_D56
FBA_D58
FBA_D59
FBA_D57
FBA_D60
FBA_D63
FBA_D61
FBA_D62
FBA_D54
FBA_D55
FBA_D52
FBA_D53
FBA_D48
FBA_D51
FBA_D49
FBA_D50
FBA_D46
FBA_D40
FBA_D45
FBA_D41
FBA_D47
FBA_D42
FBA_D44
FBA_D43
FBA_D33
FBA_D35
FBA_D32
FBA_D37
FBA_D39
FBA_D36
FBA_D34
FBA_D38

FBA_CMD25
FBA_CMD22
FBA_CMD23
FBA_CMD20
FBA_CMD19
FBA_CMD17
FBA_CMD18
FBA_CMD27
FBA_CMD26

FBA_EDC7

FBA_EDC6

FBA_EDC5

FBA_EDC4

FBA_DBI7

FBA_DBI6

FBA_DBI5

FBA_DBI4

FBA_CMD28
FBA_CMD31

FBA_CMD30
FBA_CLK1#
FBA_CLK1

FBA_CMD16
FBA_CMD21

FBA_ZQ3
FBA_SEN3

FBA_CMD29
FBA_MF3

1 2

FBA_VREFC1

/VGA

FBA_CMD24

FBA Partition Memory (2 of 2)

MF=0 non-Mirror

U7203

M2
M4
N2
N4
T2
T4
U2
U4

M13
M11
N13
N11
T13

T11

U13
U11
F13

F11

E13
E11
B13
B11
A13
A11

F2
F4
E2
E4
B2
B4
A2
A4

J5
K4
K5

K10
K11
H10
H11

H5
H4

D4
D5

P4
P5

R2

R13
C13

C2

P2

P13
D13

D2

G3
L3

J3
J11
J12

G12

L12

J13
J10

J2
J1

A5
U5

A10
U10

J14

J4

DQ7/DQ31
DQ6/DQ30
DQ5/DQ29
DQ4/DQ28
DQ3/DQ27
DQ2/DQ26
DQ1/DQ25
DQ0/DQ24
DQ15/DQ23
DQ14/DQ22
DQ13/DQ21
DQ12/DQ20
DQ11/DQ19
DQ10/DQ18
DQ9/DQ17
DQ8/DQ16
DQ23/DQ15
DQ22/DQ14
DQ21/DQ13
DQ20/DQ12
DQ19/DQ11
DQ18/DQ10
DQ17/DQ9
DQ16/DQ8
DQ31/DQ7
DQ30/DQ6
DQ29/DQ5
DQ28/DQ4
DQ27/DQ3
DQ26/DQ2
DQ25/DQ1
DQ24/DQ0

A12/A13
A0/A10/A8/A7
A1/A9/A11/A6
A3/BA3/A5/BA1
A2/BA0/A4/BA2
A5/BA1/A3/BA3
A4/BA2/A2/BA0
A6/A11/A1/A9
A7/A8/A0/A10

WCK23/WCK01
WCK23#/WCK01#

WCK01/WCK23
WCK01#/WCK23#

EDC0/EDC3
EDC1/EDC2
EDC2/EDC1
EDC3/EDC0

DBI0#/DBI3#
DBI1#/DBI2#
DBI2#/DBI1#
DBI3#/DBI0#

CAS#/RAS#
RAS#/CAS#

CKE#
CK#
CK

WE#/CS#
CS#/WE#

ZQ
SEN

RESET#
MF

Vpp/NC
Vpp/NC1

VREFD1
VREFD2

VREFC

ABI#

K4G41325FE-HC28

/VGA

B1

VDDQ1

B3

VDDQ2

B12

VDDQ3

B14

VDDQ4

D1

VDDQ5

D3

VDDQ6

D12

VDDQ7

D14

VDDQ8

E5

VDDQ9

E10

VDDQ10

F1

VDDQ11

F3

VDDQ12

F12

VDDQ13

F14

VDDQ14

G2

VDDQ15

G13

VDDQ16

H3

VDDQ17

H12

VDDQ18

K3

VDDQ19

K12

VDDQ20

L2

VDDQ21

L13

VDDQ22

M1

VDDQ23

M3

VDDQ24

M12

VDDQ25

M14

VDDQ26

N5

VDDQ27

N10

VDDQ28

P1

VDDQ29

P3

VDDQ30

P12

VDDQ31

P14

VDDQ32

T1

VDDQ33

T3

VDDQ34

T12

VDDQ35

T14

VDDQ36

C5

VDD1

C10

VDD2

D11

VDD3

G1

VDD4

G4

VDD5

G11

VDD6

G14

VDD7

L1

VDD8

L4

VDD9

L11

VDD10

L14

VDD11

P11

VDD12

R5

VDD13

R10

VDD14

A1

VSSQ1

A3

VSSQ2

A12

VSSQ3

A14

VSSQ4

C1

VSSQ5

C3

VSSQ6

C4

VSSQ7

C11

VSSQ8

C12

VSSQ9

C14

VSSQ10

E1

VSSQ11

E3

VSSQ12

E12

VSSQ13

E14

VSSQ14

F5

VSSQ15

F10

VSSQ16

H2

VSSQ17

H13

VSSQ18

K2

VSSQ19

K13

VSSQ20

M5

VSSQ21

M10

VSSQ22

N1

VSSQ23

N3

VSSQ24

N12

VSSQ25

N14

VSSQ26

R1

VSSQ27

R3

VSSQ28

R4

VSSQ29

R11

VSSQ30

R12

VSSQ31

R14

VSSQ32

U1

VSSQ33

U3

VSSQ34

U12

VSSQ35

U14

VSSQ36

B5

VSS1

B10

VSS2

D10

VSS3

G5

VSS4

G10

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

L5

VSS10

L10

VSS11

P10

VSS12

T5

VSS13

T10

VSS14

+FBVDDQ

GND

+FBVDDQ

R7235
549Ohm
/VGA

1 2

FBA_VREFC0

R7236

1.33KOhm
/VGA

1 2

GND

MEM_VREF_CTL77

2

GND

1 2

R7238 0Ohm

/VGA

R7237
931Ohm
/VGA

1 2

61

Q7201A

UM6K1N

/VGA

+FBVDDQ

R7220
549Ohm
@/VGA

1 2

FBA_VREFC1

MEM_VREF_CTL

R7222
931Ohm
@/VGA

1 2

34

Q7201B

5

UM6K1N

/VGA

GND

+FBVDDQ

12

12

C7225
10UF/6.3V

0603

@/VGA

12

C7235

4.7UF/6.3V

0603

/VGA

12

C7251

0.1UF/10V
/VGA

12

12

C7226
10UF/6.3V
/VGA

C7228

C7227

10UF/6.3V

10UF/6.3V

/VGA

/VGA

12

12

12

12

C7237

C7236

C7238

10UF/6.3V

4.7UF/6.3V

1UF/6.3V

/VGA

/VGA

/VGA

12

12

12

C7252

1UF/6.3V

C7254

C7253

2.2UF/6.3V

1UF/6.3V

/VGA

/VGA

/VGA

12

12

12

C7229
10UF/6.3V
@/VGA

12

C7239

C7240

1UF/6.3V

4.7UF/6.3V

/VGA

/VGA

12

C7255

2.2UF/6.3V
/VGA

12

C7231

C7230
10UF/6.3V
@/VGA

C7232

10UF/6.3V

10UF/6.3V
@/VGA

@/VGA

12

12

12

C7241

C7242

C7243

1UF/6.3V

1UF/6.3V

1UF/6.3V

/@VGA

@/VGA

@/VGA

12

12

12

C7256

C7257

1UF/6.3V

C7258

2.2UF/6.3V

2.2UF/6.3V

/VGA

/VGA

LD R1.2 [chip]
Add Ce7201/02

12

12

12

C7233
10UF/6.3V
@/VGA

12

12

C7244

1UF/6.3V

@/VGA

12

C7259

2.2UF/6.3V
/VGA

/VGA

12

+

+

CE7201

C7234
10UF/6.3V
@/VGA

C7245

4.7UF/6.3V
/VGA

CE7202

470uF/2V

470uF/2V

@/VGA

@/VGA

12

12

C7247

C7248

4.7UF/6.3V

1UF/6.3V

/VGA

@/VGA

12

C7261

C7262

1UF/6.3V

1UF/6.3V

/VGA

/VGA

<Variant Name>

Title :

Size

Custom

Date: Sheet

Wednesday, March 07, 2018

12

12

C7249

C7250

1UF/6.3V

1UF/6.3V

@/VGA

/@VGA

12

12

C7263

1UF/6.3V

/VGA

DDR3L

Dept.:

NB2_RD1_EE1

C7264

1UF/6.3V

/VGA

Project Name

X407UA/UV

12

Engineer:

12

C7266

C7265

1UF/6.3V

0.1UF/10V
/VGA

/VGA

GND

Rev

R2.0

Brian Chen

102

of

73

12

C7246
1UF/6.3V
@/VGA

12

12

C7260

2.2UF/6.3V
/VGA

R7221

1.33KOhm
@/VGA

1 2

GND

A/D_DOCK_IN

P_CHG_CMPOUT_1091

A/D_MAX_POWER31 MB_MAX_POWER31

200mil

PC8905
1000PF/50V

1 2

A/D_DOCK_IN

AD : 17.8V

P_CHG_ACDET_1091

PC8917
47PF/50V

SMB0_DAT31,61

SMB0_CLK31,61

P_CHG_CMPIN_1091

PQ8901

QM3056M6AC

D

3

12

2

12

1 2

PR8929
127KOhm

12

1 2

1

G S

P_CHG_ACMOS_G_20

PR8905

1MOhm

P_IMVP8_PSYS_INFO81

PR8909
100KOhm
@

PR8916
0Ohm
5%

PR8924
20KOhm

PSL8901 @

0402

0402

PSL8903 @

P_CHG_ACMOS_S_20

12

PR8937

4.7MOhm

12

P_CHG_REGN_20

AC_IN_OC#31,77

12

1 2

21

21

12

PC8922

0.047UF/50V

nbs_c0603_h37_000s

PR8934

4.02KOHM

PC8912

0.1UF/25V

10m 5m

4

G S

123

4

G S

123

PR8908
10KOhm
@

>=120W

AC_BAT_SYS

5

PQH8901

QM1830M3

D

5

PQL8901

QM1830M3

D

nbs_c0603_h37_000s

nbs_r1206_h30_000s

5%

PR8920
150KOHM

1 2

61

PQ8908A

2

EM6K1-G-T2R

NEW_PWRLIMIT#_CPU

AC_OK

12

PCI8901
10UF/25V

nbs_c0805_h57_000s

PL8901

3.3UH
Irat=6.5A

2 1

[HE]CYNTEC/PEUB063T-3R3MS

12

PC8925

1000PF/50V

P_CHG_SNB_20

12

PR8910

@

1Ohm

PD8902
BAT54CW

2

3

1

PR8913
1MOhm

5

200mil

12

PCI8902
10UF/25V
@

nbs_c0805_h57_000s

@

P_PL_AC_THROTTLE_10

1 2

EM6K1-G-T2R

34

PQ8905B

12

+

PCE8901
68UF/25V

h=6mm

P_CHG_RSENS_SHAPE

1 2

SHORT_PAD

12

PSP8901

@

12

PC8908
270PF/50V

for shipping mode

P_CHG_BATDRV_20

AC_BAT_SYS

PR8926
10mOHM

nbs_r0612_h28_000s

PC8914
2200PF/50V
@

12

PR8940

20KOhm

@

P_CHG_BATSRC_20

SHORT_PAD

12

PSP8902

@

12

P_PL_AC_THROTTLE_GPU_10

PR8923

4.02KOHM

1 2

12

h=6mm

PR8922
1MOhm
@

P_CHG_BATDRV_G_20

1 2

PC8918

0.01UF/50V

PR8906
10OHM
nbs_r0603_h39_000s

1 2

PC8906

12

+

PCE8904
68UF/25V
@

34

PQ8904B

5

EM6K1-G-T2R

34

PQ8908B

5

EM6K1-G-T2R

1 2

VGA_ALERT_P# ---> GPIO9
dGPU_PD# ---> GPIO12

PR8904 0Ohm

61

2

4

G S

10UF/25V

1 2

1 2

1 2

1 2

PR8925

@

0Ohm

PQ8904A
EM6K1-G-T2R

123

240mil

PR8935
0Ohm
@

PR8942
100Ohm

5

D

240mil

12

QM0930M3

PQ8903

10UF/25V

PC8916

12

PWRLIMIT_EC# 31

PWRLIMIT#_CPU 9

VGA_ALERT_P# 77

dGPU_PD# 77

PC8924

AC_BAT_SYS

10UF/25V

PJP8901
3MM_OPEN_5MIL

2

112

BAT_CONBAT

@

<=40W <=120W

PR8938

P_CHG_LX_30

12

nbs_c0603_h37_000s

3

1

12

PC8901

0.1UF/25V

P_CHG_PROCHOT#_10

25m

EPC NB G

PR8927
10KOhm
@

1 2

PC8928

0.047UF/50V

P_CHG_LG_30

PD8901
BAT54CW

2

1 2

+5VS_PWR

PR8917
150KOHM

1 2

PR8901
0Ohm

1 2

PQ8902
QM0930M3

3

D

5

2
1

GS

4

PR8936

4.02KOHM

PSL8902

2 1

0402

@

P_CHG_ACDET_10

+3VACC+3VACC

12

PR8914
100KOhm

PR8903

93.1KOhm

1 2

P_CHG_PATH_19V_SHAPE

12

PR8911

1 2

100KOhm

61

PQ8905A

12

PC8907
47PF/50V

P_CHG_IDCHG_10
P_CHG_PMON_10
P_CHG_PROCHOT#_10
P_CHG_SDA_5
P_CHG_SCL_5

BAT1_IN_OC#31

+3VSUS

PR8828 SET
x : 0V =>0 OHM
30W: 0.4V =>14k
40W: 0.8V =>32k
45W: 1.2V =>57.6k
65W: 1.6V =>93.1k
75W: 2.0V =>150k
90W: 2.4V =>270k
120W: 2.8V =>560k
x : 3.3V =>@

2

EM6K1-G-T2R

P_CHG_IADP_10

PSL8904

0402

A/D_DOCK_IN

AC_OK

21

1 2

10KOhm

BAT

SN2867RUYR

@

PR8933

PC8909

0.1UF/25V

PR8928

1 2

1KOhm

12

PC8910

0.1UF/25V
@

PU8901

8

IDCHG

9

PMON

10

PROCHOT#

11

SDA

12

SCL

13

CMPIN

14

CMPOUT

PD8903
BAT54CW

2

1

12

P_CHG_ACDRV_20

P_CHG_ACOK_10

3

4

5

6

7

IADP

ACOK

ACDET

ACDRV

CMSRC

BATPRES#16TB_STAT#17BATSRC18BATDRV19SRN20SRP21ILIM

15

P_CHG_BATDRV_20

P_CHG_TB_STAT#_10

P_CHG_BATPRES#_10

P_CHG_BATSRC_20

3

1 2

12

PSP8903

SHORT_PAD

@

P_CHG_ACN_10

P_CHG_CMSRC_20

P_CHG_ACP_10

1

2

ACP

ACN

GND6
GND5
GND4
GND3
GND2

PHASE

HIDRV
BTST
REGN

LODRV

GND1

12

P_CHG_SRN_10

P_CHG_SRP_10

PR8932
10Ohm 5%

nbs_r1206_h28_000s

1 2

PR8938
10mOHM
nbs_r0612_h28_000s

PC8903

0.1UF/25V

1 2

33
32
31
30
29
28

VCC

27
26
25
24
23
22

P_CHG_ILIM_10

PR8919
100KOhm

nbs_r0603_h39_000s

1 2

nbs_r0603_h39_000s

1 2

PJ8803.PJ8804
請從PR8806內側中間拉線。

12

PSP8904

SHORT_PAD

@

12

PC8915

0.1UF/25V

P_CHG_VCC_20

P_CHG_VCC_20
P_CHG_LX_30
P_CHG_HG_30
P_CHG_BST_30
P_CHG_REGN_20
P_CHG_LG_30

1 2

PR8921

180KOhm

12

PC8926

0.1UF/25V
@

I limit : Charge 6 A
DisCharge 24A

PR893110OHM

PR891210OHM

P_CHG_VCC_20

12

PC8921
1UF/25V
nbs_c0603_h37_000s

PR8918
0Ohm

1 2

12

PC8920

2.2UF/16V

+3VA

12

PC8913

0.1UF/25V

12

PC8929

0.1UF/25V

P_CHG_BST_R_30

P_CHG_REGN_20

BOM

Title :

Size

A2

Date: Sheet

Wednesday, March 07, 2018

PW_CHARGER

Dept.:

NB Power Team

Project Name

X540UVK

Engineer:

Andy

Rev

R0.1

102

of

90

Address Selection Table

Address

0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70

10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k

PR9001

8.2k 6.2k 6.8k 4.7k 3.6k 2.7kOpen 2k

PR9002

Register Address

Address

R/W

W W W

Temp. alert

Function

threshold setting

0x03 0x04 0x050x00 0x01 0x02

R R R

Sensed temp. data

0x06

R

bit 4 = 0
bit 5 = 0

bit 6 = 0

When ALERT#
assert

Address Selection Table

Address

0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70

10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k

PR9008

PR9009

8.2k 6.2k 6.8k 4.7k 3.6k 2.7kOpen 2k

PTR9000 place near PQ8901
Close to AC FET

PTR9002 place near BAT Connect

105C @ 5k
40C @ 51k

GND

PTR9002 place near PL8901 or PQL8901(CHG page)

105C @ 5k
40C @ 51k

GND

PTR9000
100kOhm

PC9000

0.1UF/25V

PTR9001
100kOhm

PC9001

0.1UF/25V

PTR9002
100kOhm

PC9002

0.1UF/25V

12

12

12

12

12

12

P_TEMPSENS_VCC_30

PR9003
12KOHM

1.0 ~ 3.56V

PR9004
12KOHM

1.0 ~ 3.56V

PR9005
12KOHM

1.0 ~ 3.56V

DC Jack Thermal Latch

PSL9003

SHORT_LAND

0402

P_LATCH_ACDET_10

PR9013
20KOhm

PQ9001B

EM6K1-G-T2R

12

1%

12

1%

12

1%

21

P_LATCH_OUT_10

12

P_TEMPSENS_ADDR_10
P_TEMPSENS_TM3_10
P_TEMPSENS_TM2_10
P_TEMPSENS_TM1_10

34

5

P_LATCH_OUT#_10

GND

P_CHG_ACDET_10 90

PR9001
10KOhm

PR9002
2KOHM

1 2

@

P_CHG_REGN_20

1 2

12

P_TEMPSENS_VCC_30

GNDGND

PR9014

100KOhm

PQ9001A

EM6K1-G-T2R

1
2
3
4

61

GND

PU9000

ALT/ADD
TM3
TM2
TM1

UP1905AMA8

P_CHG_REGN_20

2

ALERT# pull low if sensed temp.
is higher than setting

8

SDA

7

P_TEMPSENS_SDA_30

SCL

6

P_TEMPSENS_SCL_30

GND

5

VCC5

P_TEMPSENS_VCC_30

GND

+5VSUS_PWR

PR9006 2.2Ohm 5%
nbs_r0603_h24_000s

12

PR9017

10KOhm

P_CHG_CMPIN_1090

P_CHG_CMPOUT_10 90

PR9018

1 2

10KOhm

1 2

12

PC9003
1UF/16V
nbs_c0603_h37_000s

GND

PTR9003 place near DC JACK

PC9008

1UF/25V

PC9005
47PF/50V
@

1 2

PSL9001

2 1

0402

PSL9002

@

2 1

0402

@

1 2

PC9004
47PF/50V
@

GND

GND

P_CHG_REGN_20

1 2

12

1 2

GND

PTR9003

100kOhm

PR9022

7.32KOhm

SMB1_DAT 29,31,91

SMB1_CLK 29,31,91

Check 其他頁是否有
pull high 到 3.3V

47KOHM

47KOHM

PTR9004

PC9007

0.1UF/25V

PTR9005

PC9010

0.1UF/25V

PC9012

0.1UF/25V

12

12

12

12

12

P_TEMPSENS_6_VCC_30

PR9007
12KOHM

12

1%

1.0 ~ 3.56V

PR9010
12KOHM

12

1%

1.0 ~ 3.56V

PR9012
12KOHM

12

1%

1.0 ~ 3.56V

PR9008

4.3KOHM

1 2

P_TEMPSENS_6_VCC_30

PR9009

3.6KOhm

1 2

P_TEMPSENS_6_ADDR_10
P_TEMPSENS_6_TM3_10
P_TEMPSENS_6_TM2_10
P_GPU_VRM_TEMP_SENSOR_10

PC9006
47PF/50V
@/VGA

1 2

GND

12

PC9011
1UF/16V
nbs_c0603_h37_000s

GND

PL9001

2 1

0402

PSL9004

2 1

0402

1 2

PC9009
47PF/50V
@/VGA

SMB1_DAT 29,31,91

@/VGA

SMB1_CLK 29,31,91

@/VGA

Check 其他頁是否有
pull high 到 3.3V

GND

GNDGND

PU9001

1
2
3
4

ALT/ADD
TM3
TM2
TM1

UP1905AMA8

8

SDA

7

P_TEMPSENS_6_SDA_30

SCL

6

P_TEMPSENS_6_SCL_30

GND

5

VCC5

P_TEMPSENS_6_VCC_30

GND

+5VSUS

1 2

PR9011 2.2Ohm 5%
nbs_r0603_h24_000s

PTR7807 place near VRAM.

TR7806 place near GPU

105C @ 5k
40C @ 51k

GND

P_GPU_VRM_TEMP_SENSOR_1092

P_GPU_VRM_TEMP_SENSOR_10

105C @ 5k
40C @ 51k

GND

<Variant Name>

Title :

Size

A2

Date: Sheet

Wednesday, March 07, 2018

PW_PROTECTION

Dept.:

NB Power Team

Project Name

X540UVK

Engineer:

Andy

Rev

R0.1

102

of

91

Psys FF=3.2V

www.teknisi-indonesia.com

PR8029
33W - 97.6K / 10G212976214031
45W - 71.5K / 10G212715214030
65W - 49.9K / 10G212499214030
90W - 35.7K / 10G212357214030
120W - 26.7K / 10G212267214031

VREF_0.6V

12

PR8001

12.1KOhm
1%

Frequency=500kHz

12

PR8046

26.1KOhm
1%

12

12

PR8006

18.7KOhm
1%

PR8056

8.25kOhm
1%

PR8018
22KOhm 1%

1 2

1 2

PR8039
30KOHM 1%

Place Close to PL8102

P_IMVP8_CORE_TSEN_R_10

1 2

PR8057

12

12

PR8027

2.61KOHM
1%

12

PR8024
22Ohm
5%

P_IMVP8_CORE1_HG_3082

P_IMVP8_CORE1_LX_3082
P_IMVP8_CORE1_LG_3082

P_IMVP8_GT_HG_3082
P_IMVP8_GT_LX_3082
P_IMVP8_GT_LG_3082

P_IMVP8_CORE_VIN_S82

P_IMVP8_CORE2_PWM_1082

P_IMVP8_CORE_DRVEN_1082

12

12

PR8035

PR8048

11.5KOHM

5.76KOhm
1%

1%

12

12

PR8026

PR8058

49.9Ohm

300Ohm

1%

1%

PR8065
330KOHM
1%

12

PR8033
330KOHM
1%

110KOHM 1%

PTR8002

1 2

100kOhm

1%

Place Close to PQL8102

P_VCCCORE_VCCSENSE_50ohm7

P_VCCCORE_VSSSENSE_50ohm7

P_VCCGT_VCCSENSE_50ohm7

P_VCCGT_VSSSENSE_50ohm7

Skylake IMVP8 Power [For CPU]

PSL8001

PC8026

47PF/50V

PR8060

1 2

0Ohm

PR8042

1 2

0Ohm

+VCCGT

1 2

1 2

0402

PR8029

49.9KOhm

1 2

ADP=65W

PR8020
0Ohm 5%

1 2

1

IMON_MAIN

2

SET1

3

FB_MAIN

4

COMP_MAIN

5

SET2

6

SET3

7

ISEN1N_MAIN

8

ISEN2N_MAIN

9

ISEN2P_MAIN

10

ISEN1P_MAIN

11

TSEN_MAIN

12

VIN

13

VCC

12

PC8065

4.7UF/6.3V

PR8008
1Ohm

nbs_r0603_h24_000s

PR8050
100Ohm

12

PR8059
100Ohm

12

PR8025
100Ohm

1 2

PR8061

0Ohm

PR8044

0Ohm

PR8064

100Ohm

1 2

P_IMVP8_PSYS_INFO90 IMVP8_PWRGD 26,31

P_VCCCORE_VCCSENSE_R_50ohm

12

PR8045

PC8079

1 2

0.01UF/50V

3.6KOhm
1%

P_IMVP8_CORE_IMON_10
P_IMVP8_SET1_10
P_IMVP8_CORE_FB_10
P_IMVP8_CORE_COMP_10
P_IMVP8_SET2_10
P_IMVP8_SET3_10
P_IMVP8_CORE_CSN1_10
P_IMVP8_CORE_CSN2_10
P_IMVP8_CORE_CSP2_10
P_IMVP8_CORE_CSP1_10
P_IMVP8_CORE_TSEN_10

P_IMVP8_VIN_10

P_IMVP8_VCC_20

PR8062
1Ohm

12

+5VSUS_PWR

+5VSUS_PWR

12

1 2

PTRL8002

100kOhm 1%

PR8054
10OHM

12

P_IMVP8_CORE_VIN_S

PC8081

1 2

47PF/50V

Place Close to CPU

+VCCCORE

Place Close to CPU

VREF_0.6V

21

P_IMVP8_PSYS_10

P_IMVP8_CORE_VSN_10

P_IMVP8_CORE_VSEN_10

47

48

49

50

51

52

53

PSYS

GND154GND255GND356GND457GND5

FB_SA

RGND_SA

VSEN_MAIN

RGND_MAIN

BOOT_SA15UGATE_SA16PHASE_SA17LGATE_SA18PVCC19LGATE_MAIN20PHASE_MAIN21UGATE_MAIN22BOOT_MAIN23LGATE_AUXI24PHASE_AUXI25UGATE_AUXI26BOOT_AUXI

14

P_IMVP8_CORE1_LG_30

P_IMVP8_PVCC_20

5%

12

12

PC8053

2.2UF/6.3V

@

PC8023

1 2

1000PF/50V

PC8007
1000PF/50V

12

P_VCCCORE_VSSSENSE_R_50ohm

@

PC8024

1 2

1000PF/50V

P_VCCGT_VCCSENSE_R_50ohm

PC8025
1000PF/50V

12

P_VCCGT_VSSSENSE_R_50ohm

12

PR8030

53.6KOhm
1%

P_IMVP8_SA_CSN_10

P_IMVP8_SA_CSP_10

P_IMVP8_SA_IMON_10

43

44

45

46

IMON_SA

COMP_SA

ISENP_SA

ISENN_SA

VR_READY

VREF06/PSET

PR8037
1Ohm

P_IMVP8_CORE1_BST_30

P_IMVP8_CORE1_LX_30

P_IMVP8_CORE1_HG_30

1 2

PC8030

0.1UF/25V

nbs_c0603_h37_000s

PR8000

3.9Ohm 1%

1 2

IMVP8_PWRGD_L

P_IMVP8_EN_10
P_IMVP8_CORE2_PWM_10

PU8001

40

41EN42

ATK1604ACGQW

DRVEN

PWM_MAIN

VCLK

ALERT#

VDIO

VR_HOT#
IMON_AUXI
ISENP_AUXI
ISENN_AUXI
VSEN_AUXI
COMP_AUXI
RGND_AUXI

FB_AUXI
TSEN_AUXI

P_IMVP8_GT_BST_30

P_IMVP8_GT_LX_30
P_IMVP8_GT_LG_30

12

PR8040

100Ohm

1 2

12

PC8020

1000PF/50V

@

100Ohm

1 2

12

P_IMVP8_VREF_0.6V_S

PC8000

0.47UF/16V

1 2

1 2

PR8031 49.9Ohm

1 2

PR8032 10Ohm

39
38

P_IMVP8_CORE_DRVEN_10

37

P_SVID_CLK_X1

36

P_SVID_ALERT#_X1

35

P_SVID_DATA_X1

34

P_IMVP8_VR_HOT#_10

33

P_IMVP8_GT_IMON_10

32

P_IMVP8_GT_CSP_10

31

P_IMVP8_GT_CSN_10

30

P_IMVP8_GT_VSEN_10 P_VCCGT_VCCSENSE_R_50ohm

29

P_IMVP8_GT_COMP_10

28

P_IMVP8_GT_VSN_10

27

P_IMVP8_GT_FB_10

PR8004
1Ohm

1 2

P_IMVP8_GT_BST_R_30P_IMVP8_GT_HG_30

1 2

PC8010

0.1UF/25V

nbs_c0603_h37_000s

P_IMVP8_CORE1_BST_R_30

PR8043

PC8021

1000PF/50V

@

@

PC8008
220PF/50V

PR8070
10KOhm 1%

+5VSUS_PWR

@

PC8009
220PF/50V

PR8073
10KOhm 1%

+5VSUS_PWR

PC8016

12

82PF/50V

PR8053

54.9KOhm 1%

1 2

12

PSL8006

12

82PF/50V

PR8023
22KOhm 1%

12

1 2

PSL8007

1 2

12

0402

PC8011

0402

12

PC8080

47PF/50V

21

21

1 2

1 2

PR8028
110KOHM 1%

1 2

Place Close to PQL8101

P_IMVP8_CORE_COMP_10P_VCCCORE_VCCSENSE_R_50ohm

P_IMVP8_CORE_FB_10

P_IMVP8_CORE_VSN_10

P_IMVP8_GT_COMP_10

P_IMVP8_GT_FB_10

P_IMVP8_GT_VSN_10

PR8009
0Ohm 5%

PTR8001

100kOhm

1%

Place Close to PU8001

Place Close to PU8001

PR8011

45.3Ohm

P_IMVP8_SVID_VCC_10

12

PR8041
110Ohm

PSL8002

0402

P_IMVP8_GT_TSEN_R_10P_IMVP8_GT_TSEN_10

@

21

174KOhm

PSL8004

21

0402

21

0402

PSL8005

PR8034
1Ohm
nbs_r0603_h24_000s

12

12

12

PR8010

PC8015

0.1UF/25V

100Ohm

nbs_c0603_h37_000s

1 2

PR8074 100Ohm

VREF_0.6V

PR8013

37.4KOhm 1%

1 2

VREF_0.6V

1 2

PR8002

12

PR8019

8.66KOhm
1%

1%

P_IMVP8_CORE_ISEN-_1082

P_IMVP8_CORE_ISEN+_1082

P_IMVP8_CORE_ISEN2-_1082

P_IMVP8_CORE_ISEN2+_1082

5%

12

P_IMVP8_GT_ISEN-_1082

P_IMVP8_GT_ISEN+_1082

U42

U22

ALL_SYSTEM_PWRGD 26,31,59,70

+VCCST

P_SVID_CLK_50OHM_X2 7
P_SVID_ALERT#_50OHM_X2 7
P_SVID_DATA_50OHM_X2 7
IMVP8_VRHOT# 9

Disable SA

Enable SA

PR8063 PR8072 PR8038 PR8052

@@10Kohm

0ohm

P_IMVP8_SA_CSP_10

P_IMVP8_SA_CSN_10

P_IMVP8_GT_CSP_10

P_IMVP8_GT_CSN_10

PR8068

1.1KOhm 1%

1 2

P_IMVP8_CORE_CSP1_10

P_IMVP8_CORE_CSN1_10

PR8069

1.1KOhm 1%

1 2

P_IMVP8_CORE_CSP2_10

P_IMVP8_CORE_CSN2_10

PR8005 PR8075 PR8017

0ohm @ @

PR8067
2KOhm 1%

1 2

/U42

0ohm@ 1Kohm

0ohm

4.7Kohm

PR8055
2KOhm 1%

1 2

P_IMPV8_GT_LX_R_10

PR8016

1.1KOhm 1%

1 2

P_IMPV8_CORE1_LX_R_10

PR8051

1.1KOhm 1%

1 2

P_IMPV8_CORE2_LX_R_10

PR8051 PR8069

1.1Kohm

@

0ohm

2.37Kohm

P_IMVP8_GT_CSP_R_10

/U42

1.1Kohm

@

PR8003 PR8066

1.4Kohm 1.4Kohm

PR8052
0Ohm 5%

1 2

PR8007

2.74KOhm 1%

1 2

1 2

@

PC8002

0.1UF/16V

1 2

PR8014

4.7KOhm 1%

1 2

PTRL8004

1 2

4.7KOhm

3%

Place Close to PL8101

PC8003

0.1UF/16V

1 2

PR8015
590OHM @

1 2

PC8004

0.1UF/16V

1 2

/U42

PR8017
0Ohm /U22

PC8001

@

@

0.1uF/25V

PR8072
1KOhm

1 2

N/A

12

PC8006

0.1UF/25V

12

PC8012

0.1UF/25V

12

PC8018

0.1UF/25V

12

PR8005

/U42

0Ohm

5%

PR8075

/U22

1KOhm

1 2

12

<Variant Name>

+5VSUS_PWR

PC8014

0.1UF/25V
N/A

Title :

Skylake IMVP8

Size

Dept.:

Power team

Custom

Date: Sheet

Wednesday, March 07, 2018

+5VSUS_PWR

Project Name

S430

Engineer:

Rev

R0.9

EE

103

of

81

Title

<Title>

Size Document Number Rev

A

Date: Sheet

<Doc> <RevCode>

, March 07, 2018

2 1Wednesday

of

PCH_CPT
GPIO

For 555 N/A

Need Add EC

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For X541UV N/A

For X541UV N/A

For 555 N/A

For X541UV N/A

X541UV Change

For 555 N/A

For 555 N/A

PCH_IBEX GPIO

GPP_A0

GPP_A1

GPP_A2

GPP_A3

GPP_A4

GPP_A5

GPP_A6

GPP_A7

GPP_A8

GPP_A9

GPP_A10

GPP_A11

GPP_A12

GPP_A13

GPP_A14

GPP_A15

GPP_A16

GPP_A17

GPP_A18

GPP_A19

GPP_A20

GPP_A21

GPP_A22

GPP_A23

GPP_B0

GPP_B1

GPP_B2

GPP_B3

GPP_B4

GPP_B5

GPP_B6

GPP_B7

GPP_B8

GPP_B9

GPP_B10

GPP_B11

GPP_B12

GPP_B13

GPP_B14

GPP_B15

GPP_B16

GPP_B17

GPP_B18

GPP_B19

GPP_B20

GPP_B21

GPP_B22

GPP_B23

GPP_C0

GPP_C1

GPP_C2

GPP_C3

GPP_C4

GPP_C5

GPP_C6

GPP_C7

GPP_C8

GPP_C9

GPP_C10

GPP_C11

GPP_C12

GPP_C13

GPP_C14

GPP_C15

GPP_C16

GPP_C17

GPP_C18

GPP_C19

GPP_C20

GPP_C21

GPP_C22

GPP_C23

GPP_D0

GPP_D1

GPP_D2

GPP_D3

GPP_D4

GPP_D5

GPP_D6

GPP_D7

GPP_D8

GPP_D9

GPP_D10

GPP_D11

GPP_D12

GPP_D13

GPP_D14

GPP_D15

GPP_D16

GPP_D17

GPP_D18

GPP_D19

GPP_D20

GPP_D21

GPP_D22

Power on

DGPU

GLAN

WLAN

Default States

需確認是否具wake 功能

UART1_RTS#

UART1_CTS#

UART0_CTS#

Signal NameUse As

RC_IN#

Native1

Native1

LPC_AD0

LPC_AD1

Native1

LPC_AD2

Native1

Native1

LPC_AD3

LPC_FRAME#

Native1

INT_SERIRQ

Native1

GPO

N/A

PM_CLKRUN#

Native

CLK_KBCPCI_PCH

Native1

Native

CLK_DEBUG

N/A

GPO

N/A

GPO

SUSWARN#

Native1

PCH_SUS_STAT#

Native1

PCH_SUSACK#

Native1

N/A (SD_1P8_SEL)

GPO

N/A (SD_PWR_EN#)

GPO

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

N/A (VCCPRIM_VID0)

Native

N/A (VCCPRIM_VID1)

Native

GPO

N/A

N/A

GPO

N/A

GPO

CK_REQ_P0#

Native

CK_REQ_P1#

Native

CK_REQ_P2#

Native

CK_REQ_P3#

Native

CK_REQ_P4#

Native

CK_REQ_P5#

Native

Native

MPHY_PWREN (N/A)

Native

PCH_SLP_S0#

Native

PLT_RST#

PCH_GPPB14

GPO

GPO

N/A (GSPI0_CS_R#)

GPO

N/A (GSPI0_CLK_R)

GPO

N/A (GSPI0_MISO_R)

N/A (PCH_GPPB18)

GPO

BT_ON/OFF#

GPO

GPU_EVENT#

GPO

GPI

DGPU_FB_CLAMP_GPIO

GPO

PCH_GPPB22

SML1ALERT#

Native

Native

SMB_CK +3VSUS

Native

SMB_DATA

GPP_C2

GPO

GPO

SML0_CK

GPO

SML0_DATA

GPP_C5

GPO

GPO

SML1_CK

GPO

SML1_DATA

N/A (PCH_GPPC8)

GPO

N/A (PCH_GPPC9)

GPO

N/A (PCH_GPPC10)

GPO

N/A (PCH_GPPC11)

GPO

DIMM_SEL0

GPO

DIMM_SEL1

GPO

DIMM_SEL2

GPO

FP_RST#_GPIO

GPO

AOAC_WLANLED(N/A)

GPO

N/A (ALS_INT#)

Native

I2C1_SDA_TCH_PAD

Native

I2C1_SCL_TCH_PAD

DGPU_PWROK

GPI

GPU_RST#

GPO

GPO

DGPU_PWR_EN# +3VSUS

TPanel_INT#

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

GPIO_SMI_ASM1142(N/A)

GPI

SATA_ODD_PWRGT

GPO

SATA_ODD_DA#

GPI

GPO

N/A

N/A

GPO

PCB_ID0

GPI

DMIC_ID

GPI

TOUCHPAD_ID

GPI

TOUCH_PANEL_ID

GPI

TOUCHPAD_INTR#

GPI

WLAN_LED_R

GPO

SNSR_HUB_PWREN

GPO

FP_INT#

GPI

N/A

GPO

N/A

GPO

GPO

(N/A) DMIC_CLK_PCH

GPO

(N/A) DMIC_DATA_PCH

N/A

GPO

N/A

GPO

Int.& Ext
Pull up / down

EXT PU 10K

EXT PU 10K

EXT PU 8.2K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 20K

EXT PU 10K

EXT PD 10K

EXT PU 150K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 10K

EXT PU 10K

EXT PU 10K

PU 4.7K

PU 4.7K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PD 10K

EXT PD 10K

EXT PD 10K

EXT PD 10K

EXT PU 10K

Power

+3VS

+3VS

+3VS

+3VSUS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VSUS

+3VSG

PU at DGPU

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VSG

+3VS

+3VS

+3VS

+3VS

+3VS

PU at EC

For X541UV ADD

For X541UV ADD

PU at DGPU

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 ADD

For 555 ADD

For 555 N/A

PCH_IBEX GPIO

GPP_D23

GPP_E0

GPP_E1

GPP_E2

GPP_E3

GPP_E4

GPP_E5

GPP_E6

GPP_E7

GPP_E8

GPP_E9

GPP_E10

GPP_E11

GPP_E12

GPP_E13

GPP_E14

GPP_E15

GPP_E16

GPP_E17

GPP_E18

GPP_E19

GPP_E20

GPP_E21

GPP_E22

GPP_E23

GPP_F0

GPP_F1

GPP_F2

GPP_F3

GPP_F4

GPP_F5

GPP_F6

GPP_F7

GPP_F8

GPP_F9

GPP_F10

GPP_F11

GPP_F12

GPP_F13

GPP_F14

GPP_F15

GPP_F16

GPP_F17

GPP_F18

GPP_F19

GPP_F20

GPP_F21

GPP_F22

GPP_F23

GPP_G0

GPP_G1

GPP_G2

GPP_G3

GPP_G4

GPP_G5

GPP_G6

GPP_G7

GPD0

GPD1

GPD2

GPD3

GPD4

GPD5

GPD6

GPD7

GPD8

GPD9

GPD10

GPD11

Use As Signal Name

GPO

N/A

DIRECT_ESATA_DETECT_R#

GPO

SATA_ODD_PRSNT_R#

GPO

MSATA_MPCIE_DET#

GPO

N/A

GPO

SATA0_DEVSLP

GPO

SATA1_PHYSLP_DIRECT

GPO

SATA2_DEVSLP

GPO

N/A

GPO

PCH_SATA_LED#

NATIVE

USB_OC_1_2#_R EXT PU 10K

NATIVE

USB_OC_3_4#

GPI

USB_OC_5_6#

GPI

USB_OC_7_8#

GPI

N/A

GPO

HDMI_HP

NATIVE

EXT_SMI# EXT PU 10K

GPO

EXT_SCI#

GPI

EDP_HPD_CON

NATIVE

DDPB_SCL_PCH

GPO

DDPB_SDA_PCH

GPO

DDPC_SCL_PCH

NATIVE

DDPC_SDA_PCH

NATIVE

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

GPO

N/A

GPO

N/A

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A (SDIO_CMD)

GPO

N/A (SDIO_D0)

GPO

N/A (SDIO_D1)

GPO

N/A (SDIO_D2)

GPO

N/A (SDIO_D3)

GPO

N/A (SDIO_CD#)

GPO

N/A (SDIO_CLK)

GPO

N/A (SDIO_WP)

GPOGPO

PM_BATLOW_R#

Native

ME_AC_PRESENT_PCH

Native

PCH_GPD2#

GPO

PM_PWRBTN#

Native

PM_SUSB#

Native

PM_SUSC#

Native

PM_SLP_A_R#

Native

WLAN_ON#

GPO

NA (SUS_CK)

GPO

PCH_SLP_WLAN# (N/A)

GPO

SLP_S5# (N/A)

GPO

LAN_PWREN (N/A)

GPO

Power on
Default States

Int.& Ext

Power

Pull up / down

EXT PU 10K

+3VS

EXT PU 10K

+3VS

EXT PU 10K

+3VS

EXT PU 10K

+3VS

+3VSUS

EXT PU 10K

+3VSUS

EXT PU 10K

+3VSUS

EXT PU 10K

+3VSUS

EXT PD 100K PD at IC of eDP to VGA

EXT PU 1M

EXT PU 10K

EXT PU 10K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 8.2K

EXT PU 100K

EXT PU 10K

EXT PD 100K

EXT PD 100K PD at EC

EXT PD 1K

PD at HDMI conn

+3VS

+3VS

+3VS

PD at LVDS conn

+3VS

+3VS

+3VS

+3VA_DSW

+3VA_DSW

+3VA_DSW

PD at EC

PU at HDMI conn

PU at HDMI conn

VC lose

EC
IT8995
GPIO

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

For 555 N/A

Pin Name

Config

O

OD

OD

Alt

O

Alt

Alt

O

Alt

I

OD

I

O

O

OD

O

Alt

Alt

O

I

I

Alt

I

I

O

Alt

OD

OD

O

Alt

Alt

O

O

O

O

O

I

OD

OD

O

O

Alt

Alt

Alt

Alt

Alt

O

O

O

I

O

Alt

Alt

Alt

O

O

O

O

O

I

I

I

I

I

I

Alt

Alt

I

O

Alt

O

Alt

I

I

OGPJ7

PWR_LED

CHG_LED#

EC_GPA3

EC_GPA4

FAN0_PWM

KB_LED_PWM

EC_GPA7 (N/A)

LID_SW#

(N/A)

PWR_SW#

PS_ON

A20GATE (N/A)

(N/A)

PM_PWRBTN#

BAT1_IN_OC#

(N/A)

PCH_SLP_S0#

ME_AC_PRESENT

BUF_PLT_RST#

EXT_SCI#

EXT_SMI#

OP_SD#

FAN0_TACH

(N/A)

SUSC_EC#

1.2V_ON

N/A

(N/A)

CAP_LED#

PECI_EC

PCH_SPI_OV

DGPU_LIMIT

PCH_SUSACK#

PWRLIMIT_EC#

(N/A)

PM_CLKRUN#

SMB3_CLK

SMB3_DAT

DPWROK_EC

PM_PWROK

PM_SYSPWROK

LCD_BACKOFF#

PM_SLP_SUS#

3VSUS_PWRGD

ALL_SYSTEM_PWRGD

IMVP8_PWRGD

3VA_DSW_PWRGD

ME_SusPwrDnAck_EC

A/D_MAX_POWER

MB_MAX_POWER

EC_WAKE_SCI

PL_REF_EC

WLAN_PWR_EN

EC_GPJ5

N/A

N/A

GPA0

GPA1

GPA2

GPA3

GPA4

GPA5

GPA6

GPA7

GPB0

GPB1

GPB2

GPB3

GPB4

GPB5

GPB6

GPC0

GPC1

GPC2

GPC3

GPC4

GPC5

GPC6

GPC7

GPD0

GPD1

GPD2

GPD3

GPD4

GPD5

GPD6

GPD7

GPE0

GPE1

GPE2

GPE3

GPE4

GPE5

GPE6

GPE7

GPF0

GPF1

GPF2

GPF3

GPF4

GPF5

GPF6

GPF7

GPG0

GPG1

GPG2

GPG6

GPH0

GPH1

GPH2

GPH3

GPH4

GPH5

GPH6

GPH7

GPI0

GPI1

GPI2

GPI3

GPI4

GPI5

GPI6

GPI7

GPJ0

GPJ1

GPJ2

GPJ3

GPJ4

GPJ5

GPJ6

*1: EC config GPI; Function output

Signal Name

N/A

N/A

N/A

N/AIBAT_REF_EC

Default status

LOW

HIGH

HIGH

LOW

LOW

LOW

LOW

HIGH

HIGH

HIGH

LOW

HIGH

HIGH

LOW

HIGH

LOW

LOW

LOW

HIGH

LOW

HIGH

HIGH

LOW

HIGH

LOW

HIGH

HIGH

HIGH

HIGH

LOW

LOW

HIGH

HIGH

LOW

HIGH

HIGH

LOW

HIGH

HIGH

LOW

LOW

HIGH

HIGH

HIGH

HIGH

LOW

LOW

LOW

HIGH

HIGH

LOW

HIGH

HIGH

HIGH

HIGH

LOW

LOW

LOW

HIGH

HIGH

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

HIGH

Ext Pull up / down

EXT 10K PU

EXT 10K PUCHG_FULL_LED#

EXT 10K PU +3VA_EC

EXT 10K PU

EXT 4.7K PUSMB1_DAT

EXT 100K PDPM_SUSC#

EXT 10K PD

EXT 100K PD

EXT 10K PU +3VS

EXT 10K PU +3VS

EXT 10K PU

EXT 10K PU

EXT 10K PDSUSB_EC#

EXT 10K PD

EXT 100K PDPM_SUSB#

EXT 1K PUTHRO_CPU#

EXT 10K PU/ 1M PD5VSUS_ON

EXT 100K PU

EXT 4.7K PU +3VSTP_CLK

EXT 8.2K PU

EXT 10K PDPM_RSMRST#

EXT 10K PD

EXT 100K PD

EXT 10K PD

EXT 10K PU/ 100K PD +3VA_EC

EXT 10K PU +3VS

EXT 10K PU +3VS

EXT 100K PU +3VA_DSW

EXT 0 PD

EXT 100K PU/93.1K PD +3VACC

+VCCSTG

+3VA_EC

+3VA_ECVSUS_ON

+3VA_ECEXT 4.7K PUSMB0_CLK

+3VA_ECEXT 4.7K PUSMB0_DATA

+3VSEXT 4.7K PUTP_DAT

+3VA_ECEXT 100K PU

+3VA_ECEXT 100K PU3VADSW_ON

+3VS

Power

+3VA_EC

+3VA_EC

+3VA_ECEXT 10K PU

+3VAEXT 10K PUAC_IN_OC#

+3VAEXT 10K PU

+3VA

+3VSEXT 10K PU

+3VSEXT 10K PURC_IN#

+3VA_ECEXT 4.7K PUSMB1_CLK

+3VA_EC

+3VSEXT 10K PUEC_GPC4 (N/A)

+3VA_DSWEXT 100K PU

+3VS

+3VS

+3VS

PCI Express

PCIE 1

PCIE 2

PCIE 3

PCIE 4

PCIE 5

PCIE 6

PCIE 9

PCIE 10

PCIE 11

PCIE 12

PCI CLK

CLK0

CLK1

CLK2

CLK3

CLK4

CLK5

USB Port

USB 1

USB 2

USB 3

USB 4

USB 5

USB 6

USB 7

USB 8

USB 9

USB 10

Device Identification

CPU Thermal Senser

1st

2nd

For X540UPR ADD

Design IP Source:

SM_BUS ADDRESS :

PCH Master

SM-Bus Device

EC Master (SMB1)

SM-Bus Device

CPU Thermal Sensor 90h

DGPU

WLAN

DGPUx4

WLAN

USB 2.0 Port

USB 2.0 Port

Cardreader

CAMERA

WLAN/BT

06G023123010

NCT7717U

BOM

Title :

System Setting

Size

Dept.:

ASUSTeK COMPUTER INC.

D

Date: Sheet

Wednesday, March 07, 2018

SM-Bus Address

SM-Bus Address

9AhDIMM TEMP.

USB3 Port

USB3_1

USB3_2

USB3_3

USB3_4

SATA Port

SATA 0

SATA 1A

USB 3.0 Port 0

Project Name

USB 3.0 Port 0

Engineer:

HDD

SSD

Brian Chen

3

Rev

R1.0X407UA/UV

102

of

Main Board

Display Port

B

C HDMI

HDMI_DATA2N_PCH49
HDMI_DATA2P_PCH49
HDMI_DATA1N_PCH49
HDMI_DATA1P_PCH49
HDMI_DATA0N_PCH49
HDMI_DATA0P_PCH49
HDMI_CLKN_PCH49
HDMI_CLKP_PCH49

PDG#543016 DDI1 mapping DDPB
DDI2 mapping DDPC

+VCCSA

R0301

20170717 Brian

24.9Ohm

Change R0301.2 +VCCIO_CPU to +VCCSA for CPU VCORE plane.

1%

1 2

COMPENSATION PU FOR DP

EDP_COMP

ASUS P/NIntel Version

EDPA

U0301A

DDPC_SCL_PCH49
DDPC_SDA_PCH49

DDPB_SCL_PCH
DDPB_SDA_PCH

EDP_COMP

E55

DDI1_TXN[0]

F55

DDI1_TXP[0]

E58

DDI1_TXN[1]

F58

DDI1_TXP[1]

F53

DDI1_TXN[2]

G53

DDI1_TXP[2]

F56

DDI1_TXN[3]

G56

DDI1_TXP[3]

C50

DDI2_TXN[0]

D50

DDI2_TXP[0]

C52

DDI2_TXN[1]

D52

DDI2_TXP[1]

A50

DDI2_TXN[2]

B50

DDI2_TXP[2]

D51

DDI2_TXN[3]

C51

DDI2_TXP[3]

L13

GPP_E18/DDPB_CTRLCLK

L12

GPP_E19/DDPB_CTRLDATA

N7

GPP_E20/DDPC_CTRLCLK

N8

GPP_E21/DDPC_CTRLDATA

N11

GPP_E22/DDPD_CTRLCLK

N12

GPP_E23/DDPD_CTRLDATA

E52

EDP_RCOMP

SKL-ULT

DDI

DISPLAY SIDEBANDS

EDP

EDP_DISP_UTIL

GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2

GPP_E16/DDPE_HPD3

GPP_E17/EDP_HPD

EDP_BKLTCTL

EDP_TXN[0]

EDP_TXP[0]

EDP_TXN[1]

EDP_TXP[1]

EDP_TXN[2]

EDP_TXP[2]

EDP_TXN[3]

EDP_TXP[3]

EDP_AUXN
EDP_AUXP

DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP

EDP_BKLTEN

EDP_VDDEN

C47
C46
D46
C45
A45
B45
A47
B47

E45
F45

B52

DP_UTIL

G50
F50
E48
F48

DDI2_AUX_DN

G46

DDI2_AUX_DP

F46

L9
L7
L6
N9

EXT_SMI#

L10

EXT_SCI#_X1

EDP_HPD_CON

R12
R11

LCD_BACKEN_PCH_X1

U13

L_BKLTCTL_PCH_X1

L_VDDEN_PCH_X1

R0302 0Ohm@

1 2

T0301

1

T0302

1

SL0304

SL0301
SL0302
SL0303

0402

EDP_TXN0 46
EDP_TXP0 46
EDP_TXN1 46
EDP_TXP1 46

EDP_AUXN 46
EDP_AUXP 46

HDMI_HP 49

EXT_SMI# 31

21

EXT_SCI# 31
EDP_HPD_CON 46

21

0402

21

0402

21

0402

L_BKLT_EN 46
EDP_BRIGHTNESS 46
L_VDDEN_PCH 46

R0305 10KOhm

EXT_SMI#

EXT_SCI#_X1

DDPB_SCL_PCH
DDPB_SDA_PCH

20160217 X541UV/UA R1.1
Unstuff R0304

20170505 X540UPR2 DEL DSUB CONN

20170511 X506UA Del R0303
/Chane R0307 to @

R0306 10KOhm

R0304 10KOhm@

R0307 10KOhm@

1 2
1 2

1 2
1 2

+3VS

BOM

Project Name

X407UA/UV

Title :

CPU_DISPLAY

Size

Dept.:

Custom

Date: Sheet

Wednesday, March 07, 2018

ASUSTeK COMPUTER INC.

Engineer:

Brian Chen

4

Rev

R1.0

102

of

Main Board

U0301E

1 2

SPI_CLK_SPI_229
SPI_SO_SPI_229
SPI_SI_SPI_229
PCH_SPI_DQ229
PCH_SPI_DQ329

SPI_CS#0_SPI_229

R0503 15Ohm

1 2

R0510 15Ohm

1 2

R0509 15Ohm

1 2

R0539 15Ohm

1 2

R0540 15Ohm

2 1

SL0504

0402

RC_IN#31,70

INT_SERIRQ31

SPI_CLK_SPI_2_X1
SPI_SO_SPI_2_X1
SPI_SI_SPI_2_X1
PCH_SPI_DQ2_X1
PCH_SPI_DQ3_X1
SPI_CS#0_SPI_2_X1

T0502
T0501
T0503

1
1
1

INT_SERIRQ

CL_CK
CL_DATA
CL_RST#

AW13

AV2

AW3

AV3
AW2
AU4
AU3
AU2
AU1

AY11

SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#

M2

GPP_D1/SPI1_CLK

M3

GPP_D2/SPI1_MISO

J4

GPP_D3/SPI1_MOSI

V1

GPP_D21/SPI1_IO2

V2

GPP_D22/SPI1_IO3

M1

GPP_D0/SPI1_CS#

G3

CL_CLK

G2

CL_DATA

G1

CL_RST#

GPP_A0/RCIN#

GPP_A6/SERIRQ

SKL-ULT

REV = <REV>

SPI - FLASH

SPI - TOUCH

LPC

C LINK

SMBUS, SMLINK

GPP_B23/SML1ALERT#/PCHHOT#

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_A8/CLKRUN#

R7
R8

SMB_CK

R10

SMB_DATA

GPP_C2

R9
W2

SML0_CK

W1

SML0_DATA

GPP_C5

W3
V3
AM7

SML1ALERT#

AY13
BA13
BB13
AY12
BA12
BA11

AW9
AY9

CLK_KBCPCI_PCH_X1

AW11

CLK_TPMPCI_PCH_X1

PM_CLKRUN#

+3VSUS +3VS

SML1_CK 29
SML1_DATA 29

LPC_AD0 29,31
LPC_AD1 29,31
LPC_AD2 29,31
LPC_AD3 29,31

LPC_FRAME# 29,31

1 2

R0512 33Ohm

1 2

R0514 22Ohm

/DEBUG

X507 Modify R0514 optional to /DEBUG

TO DIMM / VGA / TP

1

T0504

CLK_KBCPCI_PCH 31
CLK_DEBUG 29

PM_CLKRUN# 31

+3VS

R0522 8.2KOhm

1 2

R0519 10KOhm

+3VSUS

1 2

R0508 150KOHM

RN0501B 2.2KOHM

RN0501A 2.2KOHM

RN0502B 2.2KOHM

RN0502A 2.2KOHM

3 4

1 2

3 4

1 2

+12VS

12

RN0503A

12

PM_CLKRUN#

INT_SERIRQ

SML1ALERT#

SML1_CK

SML1_DATA

SML0_CK

SML0_DATA

2.2KOHM

SMB_CK

SMB_DATA

34

RN0503B

2.2KOHM

2

Q0501A

EM6K1-G-T2R

61

EM6K1-G-T2R

34

Q0501B

SMB_CK_S3

5

SMB_DATA_S3

RN0504A

2.2KOHM

34

12

RN0504B

2.2KOHM

SMB_CK_S3 17,18

TO DIMM

SMB_DATA_S3 17,18

Transport Layer Security (TLS) Confidentiality

+3VSUS +3VSUS

@

R0507 10KOhm

1 2

GPP_C5: weak internal pull down

PU

PD

SPI BUS

LPC is selected for EC (Default)

GPP_C5 GPP_C2

GPP_C2: weak internal pull down

PU Enable

PD

@

R0506 10KOhm

1 2

Disable Intel ME TLS ipher suite
( no confodentiality)(Default)

BOM

Title :

CPU_LPC,SPI,SMB,CLINK

Size

Dept.:

Custom

Date: Sheet

Wednesday, March 07, 2018

Project Name

ASUSTeK COMPUTER INC.

Engineer:

Brian Chen

6

Rev

R1.0X407UA/UV

102

of

+VCCCORE +VCCCORE

U0301L

CPU POWER 1 OF 4

A30

VCC_A30

A34

VCC_A34

A39

VCC_A39

A44

VCC_A44

AK33

VCC_AK33

AK35

VCC_AK35

AK37

VCC_AK37

AK38

VCC_AK38

AK40

VCC_AK40

AL33

VCC_AL33

AL37

VCC_AL37

AL40

VCC_AL40

AM32

VCC_AM32

AM33

VCC_AM33

AM35

VCC_AM35

AM37

VCC_AM37

AM38

VCC_AM38

G30

VCC_G30

K32

RSVD_K32

AK32

RSVD_AK32

AB62

VCCOPC_AB62

P62

VCCOPC_P62

V62

VCCOPC_V62

H63

VCC_OPC_1P8_H63

G61

VCC_OPC_1P8_G61

REV = <REV>

AC63

VCCOPC_SENSE

AE63

VSSOPC_SENSE

AE62

VCCEOPIO_1

AG62

VCCEOPIO_2

AL63

VCCEOPIO_SENSE

AJ62

VSSEOPIO_SENSE

SKL-ULT

CPU W/OPC

+VCCIO +VCCSTG

SL0630

Volume Segment
+VCCIO is supplied +1.0VS (shared with +VCCSTG)

G32

VCC_G32

G33

VCC_G33

G35

VCC_G35

G37

VCC_G37

G38

VCC_G38

G40

VCC_G40

G42

VCC_G42

J30

VCC_J30

J33

VCC_J33

J37

VCC_J37

J40

VCC_J40

K33

VCC_K33

K35

VCC_K35

K37

VCC_K37

K38

VCC_K38

K40

VCC_K40

K42

VCC_K42

K43

VCC_K43

E32

VCC_SENSE

VSS_SENSE

VCCSTG_G20

21

0.04A

0603

VIDALERT#

VIDSCK

VIDSOUT

P_VCCCORE_VCCSENSE_50OHM 81

E33

P_VCCCORE_VSSSENSE_50OHM 81

B63
A63

P_SVID_ALERT#_X3

D64

P_SVID_CLK_X3
P_SVID_DATA_X3

G20

+VCCSTG

SVID DATA

SL0609

P_SVID_DATA_X3

20151230 LAUOYUT 此3組訊號請將 SVID ALERT 擺中間

0402

SVID ALERT

1 2

P_SVID_ALERT#_X3

R0604 220Ohm

SVID CLOCK

P_SVID_CLK_X3

SL0617

R0655

0Ohm

/U42

10114-00193000

R0656

1 2

0Ohm
/U22

U22_VCCGT_U42_VCCCORE

P_VCCGT_VCCSENSE_50OHM81
P_VCCGT_VSSSENSE_50OHM81

12

C0604

C0620

10UF/6.3V

10UF/6.3V

@

12

C0629
1UF/6.3V

@

12

C0613

1UF/6.3V

U22_VCCGT

@

C0630
1UF/6.3V

C0656

1UF/6.3V

+VCCGT

R0657

0Ohm
/U22f

12
12

12

C0659

10UF/6.3V

12

C0638

1UF/6.3V

R0658

1 2

0Ohm
/U22f

P_VCCGT_VCCSENSE_50OHM
P_VCCGT_VSSSENSE_50OHM

+1.2V

+VCCCORE+VCCGTX

U0301M

CPU POWER 2 OF 4

A48

VCCGT1

A53

VCCGT2

A58

VCCGT3

A62

VCCGT4

A66

VCCGT5

AA63

VCCGT6

AA64

VCCGT7

AA66

VCCGT8

AA67

VCCGT9

AA69

VCCGT10

AA70

VCCGT11

AA71

VCCGT12

AC64

VCCGT13

AC65

VCCGT14

AC66

VCCGT15

AC67

VCCGT16

AC68

VCCGT17

AC69

VCCGT18

AC70

VCCGT19

AC71

VCCGT20

J43

VCCGT21

J45

VCCGT22

J46

VCCGT23

J48

VCCGT24

J50

VCCGT25

J52

VCCGT26

J53

VCCGT27

J55

VCCGT28

J56

VCCGT29

J58

VCCGT30

REV = <REV>

J60

VCCGT31

K48

VCCGT32

K50

VCCGT33

K52

VCCGT34

K53

VCCGT35

K55

VCCGT36

K56

VCCGT37

K58

VCCGT38

K60

VCCGT39

L62

VCCGT40

L63

VCCGT41

L64

VCCGT42

L65

VCCGT43

L66

VCCGT44

L67

VCCGT45

L68

VCCGT46

L69

VCCGT47

L70

VCCGT48

L71

VCCGT49

M62

VCCGT50

N63

VCCGT51

N64

VCCGT52

N66

VCCGT53

N67

VCCGT54

N69

VCCGT55

J70

VCCGT_SENSE

J69

VSSGT_SENSE

SKL-ULT

12

12

12

@

C0607

10UF/6.3V

C0609

C0608

10UF/6.3V

10UF/6.3V

@

@

@

12

12

C0631

C0632

1UF/6.3V

1UF/6.3V

@

@

12

C0667

1UF/6.3V

VCCGTX_AK42
VCCGTX_AK43
VCCGTX_AK45
VCCGTX_AK46
VCCGTX_AK48
VCCGTX_AK50
VCCGTX_AK52
VCCGTX_AK53
VCCGTX_AK55
VCCGTX_AK56
VCCGTX_AK58
VCCGTX_AK60
VCCGTX_AK70
VCCGTX_AL43
VCCGTX_AL46
VCCGTX_AL50
VCCGTX_AL53
VCCGTX_AL56
VCCGTX_AL60
VCCGTX_AM48
VCCGTX_AM50
VCCGTX_AM52
VCCGTX_AM53
VCCGTX_AM56
VCCGTX_AM58
VCCGTX_AU58
VCCGTX_AU63
VCCGTX_BB57
VCCGTX_BB66

VCCGTX_SENSE

VSSGTX_SENSE

12

12

C0610

C0611

10UF/6.3V

10UF/6.3V

@

@

12

12

C0643

C0652

1UF/6.3V

1UF/6.3V

@

@

VCCGT56
VCCGT57
VCCGT58
VCCGT59
VCCGT60
VCCGT61
VCCGT62
VCCGT63
VCCGT64
VCCGT65
VCCGT66
VCCGT67
VCCGT68
VCCGT69
VCCGT70
VCCGT71
VCCGT72
VCCGT73
VCCGT74
VCCGT75
VCCGT76
VCCGT77
VCCGT78
VCCGT79
VCCGT80

+VCCGT

N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62

AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66

AK62
AL61

12

C0626

10UF/6.3V

@

12

C0654
1UF/6.3V

@

R0634 0Ohm /@
R0635 0Ohm /@

12

C0617

10UF/6.3V

@

12

C0636
1UF/6.3V

@

U42_VCCCORE

12

12

1 2

C0660

10UF/6.3V

C0666

1UF/6.3V

SL0610

0603

20160119 X541UV SL0633-->R0633

+1.2V

R0633 0Ohm

R0659

0Ohm

/U42

1 2

+VCCSA

21

+VDDQ_CPU_CLK

12

+VCCPLL_OC

1 2

nbs_r0603_h24_000s

12

C0663

@

1UF/6.3V

+1.2V

+VCCST

21

SL0634

0603

7.94A 318mil
to PJP8104 4.5A 180mil
to U0301N 3.4A 136mil
to SL0630 0.04A 1.6mil

21

SL0601

0805

21

SL0603

0805

CPU - VCCSA DECAPS- Underneath the package

5.1A

+1.2V

C0615

10UF/6.3V

+1.0V_VCCST

+VDDQ_CPU_CLK

+VCCSTG

+1.0V_VCCPLL

CPU - VDDQ DECAPS- Place close to the package

2A

12

C0662

@

10UF/6.3V

20170727 Brian
Unmount C0603/C0662 For POI cost down.

+1.0V_VCCST

120mA 120mA

12

C0616
1UF/6.3V

+VCCSA+VCCIO

CPU - VCCIO DECAPS- Place close to the package

3.1A

12

12

C0625
10UF/6.3V

@

U0301N

CPU POWER 3 OF 4

AU23

VDDQ_AU23

AU28

VDDQ_AU28

AU35

VDDQ_AU35

AU42

VDDQ_AU42

BB23

VDDQ_BB23

BB32

VDDQ_BB32

BB41

VDDQ_BB41

BB47

VDDQ_BB47

BB51

VDDQ_BB51

AM40

VDDQC

A18

VCCST

A22

VCCSTG_A22

AL23

VCCPLL_OC

K20

VCCPLL_K20

K21

VCCPLL_K21

SKL-ULT

REV = <REV>

12

12

12

C0603

C0606

C0618

@

10UF/6.3V

10UF/6.3V

10UF/6.3V

21

SL0602

0603

20170717 Brian
Change SL0601.2 +VCCIO_CPU to +VCCSA
for CPU VCORE plane.

12

C0622
1UF/6.3V

12

C0649

C0612

10UF/6.3V

10UF/6.3V

@

@

AK28

VCCIO1

AK30

VCCIO2

AL30

VCCIO3

AL42

VCCIO4

AM28

VCCIO5

AM30

VCCIO6

AM42

VCCIO7

AK23

VCCSA1

AK25

VCCSA2

G23

VCCSA3

G25

VCCSA4

G27

VCCSA5

G28

VCCSA6

J22

VCCSA7

J23

VCCSA8

J27

VCCSA9

K23

VCCSA10

K25

VCCSA11

K27

VCCSA12

K28

VCCSA13

K30

VCCSA14

AM23

VCCIO_SENSE

AM22

VSSIO_SENSE

H21

VSSSA_SENSE

H20

VCCSA_SENSE

12

12

N/A

N/A

C0614

C0658

22UF/6.3V

22UF/6.3V

nbs_c0603_h39_000s

nbs_c0603_h39_000s

+1.0V_VCCPLL+VCCST

12

C0602
1UF/6.3V

20170718 Brian
Remove C0621/C0619/C0605/C0635 and
C0637/0655 change to mount for CPU Vcore.

12

C0650
10UF/6.3V

@

+VCCSA

20170717 Brian
Change +VCCIO_CPU to +VCCSA
for CPU VCORE plane.

+VCCSA

12

N/A
C0648
22UF/6.3V
nbs_c0603_h39_000s

+VCCCORE

+1.0V_VCCST

R1.0-3

R0606

100Ohm

1%

1 2

21

21

0402

+1.0V_VCCST

R0605

56Ohm

1 2

P_SVID_DATA_50OHM_X2 81

P_SVID_ALERT#_50OHM_X2 81

P_SVID_CLK_50OHM_X2 81

CPU - VCCGT DECAPS- Underneath the package

+VCCGT

31A 2+2

+VCCGT

1 2

R0654
0Ohm

nbs_r0603_h24_000s

12

C0601

10UF/6.3V

12

C0628
1UF/6.3V

@

12

C0640

1UF/6.3V

1 2

/U22

12

12

12

CPU - VCCGT DECAPS- Place close to the package

+VCCGT

CAP above 22UF move to PWR page

12

12

C0651

1UF/6.3V

+VCCSA

CPU - VCCSA DECAPS- Place close to the package

12

C0664

10UF/6.3V

12

C0633

C0653

1UF/6.3V

1UF/6.3V

12

12

C0639

10UF/6.3V

C0641

10UF/6.3V

12

C0637
1UF/6.3V

12

C0668

10UF/6.3V

C0657

C0655

1UF/6.3V

1UF/6.3V

@

BOM

Project Name

Title :

CPU_POEWR

Size

Dept.:

ASUSTeK COMPUTER INC.

D

Date: Sheet

Wednesday, March 07, 2018

Engineer:

Brian Chen

7

Rev

R1.0X407UA/UV

102

of

12

12

CPU XDP connector

BOM

Title :

Size

C

Date: Sheet

Wednesday, March 07, 2018

Dept.:

CPU_XDP

Project Name

ASUSTeK COMPUTER INC.

Engineer:

Brian Chen

8

Rev

R1.0X407UA/UV

102

of

Main Board

+1.0V_VCCST

1 2

R0802 1KOhm1%

PECI_EC31

R0813

49.9Ohm
1%

1 2

CPU SIDEBAND SIGNALS

H_PROCHOT_D#

1 2

R0808

499OHM

T0801

T0803
T0804

U0301D

1 2

R0810

49.9Ohm
1%

D63

CATERR#

A54

PECI

C65

PROCHOT#

C63

THERMTRIP#

A65

AT16
AU16

C55
D55

B54

C56

A6
A7

BA5

AY5

H66
H65

SKL-ULT

SKTOCC#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

PROC_POPIRCOMP
PCH_OPIRCOMP
OPCE_RCOMP
OPC_RCOMP

REV = <REV>

CPU MISC

20150108
Checking
SL0801~0803 near device side

2 1

SL0802

0402

2 1

SL0801

0402

2 1

SL0803

0402

JTAG

PROC_TCK

PROC_TDI
PROC_TDO
PROC_TMS

PROC_TRST#

PCH_JTAG_TCK

PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS

PCH_TRST#

OD

THRO_CPU# 31

IMVP8_VRHOT# 81

PWRLIMIT#_CPU 90

JTAGX

B61
D60

XDP_TCLK_CPU

A61

XDP_TDI_CPU

C60

XDP_TDO_CPU

B59

XDP_TMS_CPU

XDP_TRST_CPU#

B56
D59

PCH_JTAG_TCK

A56

PCH_JTAG_TDI

C59

PCH_JTAG_TDO

C61

PCH_JTAG_TMS

A59

PCH_TRST#
XDP_TCK_JTAGX

20160218 X541UV
R0803,R0804,R0805,R0807,R0814,R0820,R0806 unstuff

XDP_TDI_CPU PCH_JTAG_TDI

XDP_TDO_CPU PCH_JTAG_TDO

XDP_TMS_CPU PCH_JTAG_TMS

XDP_TRST_CPU# PCH_TRST#

1

T0802

@

1 2

R0803 0Ohm

1 2

R0804 0Ohm@

1 2

R0805 0Ohm@

1 2

R0807 0Ohm@

1 2

R0814 0Ohm@

XDP_TDO_CPUXDP_TCLK_CPU XDP_TCK_JTAGX

XDP_TCLK_CPU

@

1 2

R0820 51Ohm

@

1 2

R0806 51Ohm

+VCCSTG

1

H_CATERR#
PECI_EC
H_PROCHOT_D#
THERMTRIP#

1
1

XDP_BPM2
XDP_BPM3

R0812

49.9Ohm
1%

1 2

+VCCSTG

R0811

49.9Ohm
1%

1 2

12

R0809
1KOhm

H_PROCHOT_D#_R

12

C0801

43PF/50V

@

BOM

Title :

CPU_MISC,JTAG,CLK

Size

Dept.:

B

Date: Sheet

Wednesday, March 07, 2018

Project Name

ASUSTeK COMPUTER INC.

Engineer:

Brian Chen

9

Rev

R1.0X407UA/UV

102

of

Main Board

U0301S

E68

CFG[0]

B67

CFG[1]

D65

CFG[2]

D67

CFG[3]

E70

CFG[4]

BA70
BA68

C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70

E63
F63

E66
F66

E60

AY2
AY1

K46
K45

AL25
AL27

C71
B70

F60

A52

J71
J68

F65
G65

F61
E61

E8

D1
D3

REV = <REV>

SKL-ULT

CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]

CFG[16]
CFG[17]

CFG[18]
CFG[19]

CFG_RCOMP

ITP_PMODE

RSVD_AY2
RSVD_AY1

RSVD_D1
RSVD_D3

RSVD_K46
RSVD_K45

RSVD_AL25
RSVD_AL27

RSVD_C71
RSVD_B70

RSVD_F60

RSVD_A52

RSVD_TP_BA70
RSVD_TP_BA68

RSVD_J71
RSVD_J68

VSS_F65
VSS_G65

RSVD_F61
RSVD_E61

CFG4 XTAL24_U42_OUT

R0902

49.9Ohm
1%

1 2

RESERVED SIGNALS-1

RSVD_TP_BB68
RSVD_TP_BB69

RSVD_TP_AK13
RSVD_TP_AK12

RSVD_TP_AW71
RSVD_TP_AW70

PROC_SELECT#

RSVD_BB2
RSVD_BA3

RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2

RSVD_B3
RSVD_A3

RSVD_AW1

RSVD_E1
RSVD_E2

RSVD_BA4
RSVD_BB4

RSVD_A4
RSVD_C4

RSVD_A69
RSVD_B69

RSVD_AY3

RSVD_D71
RSVD_C70

RSVD_C54
RSVD_D54

VSS_AY71

ZVM#

MSM#

BB68
BB69

AK13
AK12

BB2
BA3

AU5

TP5

AT5

TP6

D5
D4
B2
C2

B3
A3

AW1

E1
E2

BA4
BB4

A4
C4

BB5

TP4

A69
B69

AY3

D71
C70

C54
D54

AY4

TP1

BB3

TP2

AY71
AR56

AW71
AW70

AP56
C64

R0905

1 2

@

100KOhm

+1.0V_VCCST

0402

SL0901

2 1

0402

SL0902

2 1

12

20171023 Jack Add XTAL 24M for KBL-R.

12

C0901
1UF/6.3V
@

XTAL 24MHz

XTAL24_U42_IN

C0902
1UF/6.3V
@

U0301T

AW69

RSVD_AW69

AW68

RSVD_AW68

AU56

RSVD_AU56

AW48

RSVD_AW48

C7

RSVD_C7

U12

RSVD_U12

U11

RSVD_U11

H11

RSVD_H11

REV = <REV>

SKL-ULT

R0904 0OHM

1 2

/U42

SPARE

F6

RSVD_F6

E3

RSVD_E3

C11

RSVD_C11

RSVD_B11

RSVD_A11
RSVD_D12
RSVD_C12

RSVD_F52

12

R0907
1MOhm
/U42

XTAL24_OUT_X2XTAL24_U42_OUT

XTAL24_U42_IN

B11
A11
D12
C12
F52

07009-00062000

X0902
24Mhz
/U42

C0903

12

27PF/50V
/U42

4

2

C0904

1 3

27PF/50V
/U42

12

GND

CFG STRAPS

CFG4

CFG0

CFG4

1 2

R0901 1KOhm

01 NOTE

STALL RESET SEQUENCE
AFTER PCU PLL LOCK
UNTIL DE-ASSERTEDNO STALL STALL

eDP ENABLEDISABLE ENABLE

BOM

Title :

CPU_CFG,RSVD

Size

Dept.:

Custom

Date: Sheet

Wednesday, March 07, 2018

Project Name

ASUSTeK COMPUTER INC.

Engineer:

Brian Chen

10

Rev

R1.0X407UA/UV

102

of

CPU - VCC DECAPS- Underneath the package

+VCCCORE

28A 2+2

CAP above 22UF move to PWR page

12

12

C1028
1UF/6.3V

C1046
1UF/6.3V
@

12

12

C1030
1UF/6.3V
@

C1068
1UF/6.3V
@

12

12

C1031
1UF/6.3V
@

C1048
1UF/6.3V
@

12

C1034
1UF/6.3V
@

12

C1049
1UF/6.3V

CPU - VCC DECAPS- Place close to the package

+VCCCORE

CAP above 22UF move to PWR page

12

C1043

C1041

1UF/6.3V

1UF/6.3V

12

C1062
1UF/6.3V
@

12

12

C1061
1UF/6.3V

C1063
1UF/6.3V
@

12

12

C1065

C1064

1UF/6.3V

1UF/6.3V

@

12

C1044

C1045

1UF/6.3V

1UF/6.3V

@

@

12

12

C1067
1UF/6.3V

C1066
1UF/6.3V

12

12

BOM

Title :

Size

Dept.:

C

Date: Sheet

Wednesday, March 07, 2018

CPU_POWER_CAP

ASUSTeK COMPUTER INC.

Project Name

Engineer:

Brian Chen

11

Rev

R1.0X407UA/UV

102

of

BOM

Project Name

X407UA/UV

Title :

Size

Dept.:

D

Date: Sheet

Wednesday, March 07, 2018

ASUSTeK COMPUTER INC.

Engineer:

Brian Chen

12

of

Rev

R1.0

102

BOM

www.teknisi-indonesia.com

Project Name

X407UA/UV

Title :

Size

Dept.:

C

Date: Sheet

Wednesday, March 07, 2018

ASUSTeK COMPUTER INC.

Engineer:

13

of

Rev

R1.0

102

<Variant Name>

Title :

Size Project Name

C

Date: Sheet

Engineer:

DDR4_TERMINATION_A

Brian Chen

of

14 102Wednesday, March 07, 2018

Rev

R1.0X407UA/UV

<Variant Name>

Title :

Size Project Name

C

Date: Sheet

Engineer:

DDR4_ON-BOARD_A_L32

Brian Chen

of

15 102Wednesday, March 07, 2018

Rev

R1.0X407UA/UV

<Variant Name>

Title :

Engineer:

Size Project Name

C

Date: Sheet

X407UA/UV

DDR4_ON-BOARD_A_H32

Brian Chen

16 102Wednesday, March 07, 2018

of

Rev

R1.0

2016/11/23 X542UA_#86, Add SO-DIMM (ChA), remove P13, P14 & P15 DRAM

M_A_CLK_DDR05
M_A_CLK_DDR#05
M_A_CLK_DDR15
M_A_CLK_DDR#15

M_A_CKE05
M_A_CKE15

M_A_CS#05
M_A_CS#15

M_A_ODT05
M_A_ODT15

M_A_BG05
M_A_BG15
M_A_BA05
M_A_BA15
M_A_A[13:0]5

M_A_VREFCA

12

C1617

0.1UF/10V

GND GND

+1.2V

12

1 2

C1612

2.2UF/10V

R1605

240Ohm

M_A_WE#5
M_A_CAS#5
M_A_RAS#5

M_A_ACT#5

M_A_PAR5

M_A_ALERT#5

DDR4_DRAMRST#5,18,70

SMB_DATA_S36,18
SMB_CK_S36,18

Place close to SO-DIMM

+1.2V

For ECC

T1601
T1602

'EVENT_N': INDICATES THERMAL EVENT ON DIMM.
NON-ECC DIMM: NOT CONNECTED

EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH

M_A_DIMM0_EVENT#

M_A_DIMM0_SA2
M_A_DIMM0_SA1
M_A_DIMM0_SA0

1
1

M_A_DIMM0_S2
M_A_DIMM0_S3

J1601A

137

CK0_T

139

CK0_C

138

CK1_T

140

CK1_C

109

CKE0

110

CKE1

149

S0*

157

S1*

155

ODT0

161

ODT1

115

BG0

113

BG1

150

BA0

145

BA1

144

A0

133

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10_AP

120

A11

119

A12

158

A13

151

A14_WE*

156

A15_CAS*

152

A16_RAS*

114

ACT*

143

PARITY

116

ALERT*

134

EVENT*

108

RESET*

164

VREFCA

254

SDA

253

SCL

166

SA2

260

SA1

256

SA0

92

CB0_NC

91

CB1_NC

101

CB2_NC

105

CB3_NC

88

CB4_NC

87

CB5_NC

100

CB6_NC

104

CB7_NC

12

DM0*/DBI0*

33

DM1*/DBI1*

54

DM2*/DBI2*

75

DM3*/DBI3*

178

DM4*/DBI4*

199

DM5*/DBI5*

220

DM6*/DBI6*

241

DM7*/DBI7*

96

DM8*/DBI8*

162

S2*/C0

165

S3*/C1

DDR4_DIMM_260P

12002-00082100

20170707 Brian
Change J1601 12002-00080100 to 12002-00082100(5.2H).

DQS0_T
DQS1_T
DQS2_T
DQS3_T
DQS4_T
DQS5_T
DQS6_T
DQS7_T
DQS8_T

DQS0_C
DQS1_C
DQS2_C
DQS3_C
DQS4_C
DQS5_C
DQS6_C
DQS7_C
DQS8_C

8

DQ0

7

DQ1

20

DQ2

21

DQ3

4

DQ4

3

DQ5

16

DQ6

17

DQ7

28

DQ8

29

DQ9

41

DQ10

42

DQ11

24

DQ12

25

DQ13

38

DQ14

37

DQ15

50

DQ16

49

DQ17

62

DQ18

63

DQ19

46

DQ20

45

DQ21

58

DQ22

59

DQ23

70

DQ24

71

DQ25

83

DQ26

84

DQ27

66

DQ28

67

DQ29

79

DQ30

80

DQ31

174

DQ32

173

DQ33

187

DQ34

186

DQ35

170

DQ36

169

DQ37

183

DQ38

182

DQ39

195

DQ40

194

DQ41

207

DQ42

208

DQ43

191

DQ44

190

DQ45

203

DQ46

204

DQ47

216

DQ48

215

DQ49

228

DQ50

229

DQ51

211

DQ52

212

DQ53

224

DQ54

225

DQ55

237

DQ56

236

DQ57

249

DQ58

250

DQ59

232

DQ60

233

DQ61

245

DQ62

246

DQ63

13
34
55
76
179
200
221
242
97

11
32
53
74
177
198
219
240
95

2016/12/05 X542UA_R1.0 #98, DDR SWAP

2016/12/07 X542UA_R1.0 #A3, DDR SWAP

SWAP

M_A_DQ4
M_A_DQ1
M_A_DQ7
M_A_DQ3
M_A_DQ0
M_A_DQ5
M_A_DQ6
M_A_DQ2

M_A_DQ8
M_A_DQ13
M_A_DQ10
M_A_DQ11
M_A_DQ9
M_A_DQ12
M_A_DQ15
M_A_DQ14

M_A_DQ18
M_A_DQ17
M_A_DQ16
M_A_DQ23
M_A_DQ20
M_A_DQ21
M_A_DQ19
M_A_DQ22

M_A_DQ28
M_A_DQ27
M_A_DQ30
M_A_DQ25
M_A_DQ24

M_A_DQ29
M_A_DQ31
M_A_DQ26

M_A_DQ35
M_A_DQ36
M_A_DQ39
M_A_DQ33

M_A_DQ32
M_A_DQ37
M_A_DQ38
M_A_DQ34

M_A_DQ41
M_A_DQ44
M_A_DQ47
M_A_DQ43
M_A_DQ40
M_A_DQ45
M_A_DQ46
M_A_DQ42

M_A_DQ48
M_A_DQ52
M_A_DQ55
M_A_DQ50
M_A_DQ51
M_A_DQ53
M_A_DQ54
M_A_DQ49

M_A_DQ57
M_A_DQ58
M_A_DQ63
M_A_DQ62
M_A_DQ60
M_A_DQ56
M_A_DQ61
M_A_DQ59

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

D0

D1

D2

D3

D4

D5

D6

D7

X507/2017/06/06 SWAP

X507/2017/06/06 SWAP

M_A_DQ[63:0] 5

2017/0606 X507 SWAP

2017/0606 X507 SWAP

2017/0606 X507 SWAP

2017/0606 X507 SWAP

2017/0606 X507 SWAP

2017/0606 X507 SWAP

2017/0606 X507 SWAP

2017/0606 X507 SWAP

M_A_DQS[7:0] 5

M_A_DQS#[7:0] 5

+VTT

J1601B

163

VDD19

160

VDD18

159

VDD17

154

VDD16

153

VDD15

148

VDD14

147

VDD13

142

VDD12

141

VDD11

136

VDD10

135

VDD9

130

VDD8

129

VDD7

124

VDD6

123

VDD5

118

VDD4

117

VDD3

112

VDD2

111

VDD1

251

VSS1

247

VSS2

243

VSS3

239

VSS4

235

VSS5

231

VSS6

227

VSS7

223

VSS8

217

VSS9

213

VSS10

209

VSS11

205

VSS12

201

VSS13

197

VSS14

193

VSS15

189

VSS16

185

VSS17

181

VSS18

175

VSS19

171

VSS20

167

VSS21

107

VSS22

103

VSS23

99

VSS24

93

VSS25

89

VSS26

85

VSS27

81

VSS28

77

VSS29

73

VSS30

69

VSS31

65

VSS32

61

VSS33

57

VSS34

51

VSS35

47

VSS36

43

VSS37

39

VSS38

35

VSS39

31

VSS40

27

VSS41

23

VSS42

19

VSS43

15

VSS44

9

VSS45

5

VSS46

1

VSS47

DDR4_DIMM_260P

GND GND

VDDSPD

NP_NC1
NP_NC2

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

258

VTT

259

VPP2

257

VPP1

255

12

C1628

0.1UF/10V

GND GND

263
264

261

MT1

262

MT2

252
248
244
238
234
230
226
222
218
214
210
206
202
196
192
188
184
180
176
172
168
106
102
98
94
90
86
82
78
72
68
64
60
56
52
48
44
40
36
30
26
22
18
14
10
6
2

+2.5V+1.2V

+3VS

SL1604

21

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

0402

12

C1627

2.2UF/10V

20170719 Brian
Remove CE1601 and add C1629/C1630/C1631.

Place close to SO-DIMM

+VTT

nbs_c0603_h37_000s

12

12

C1603
10UF/6.3V

nbs_c0603_h37_000s

Place close to SO-DIMM Socket
(+VTT Pin)

+1.2V

nbs_c0603_h37_000s

12

20170727 Brian
Add C1605/C1621/C1624 For POI cost down.

2017/02/06 X542UA_R1.1 #26, EMI solution

12

C1606

10UF/6.3V

C1616

0.1UF/16V
@/EMI

C1619

10UF/6.3V

@

12

@
C1631
22UF/6.3V
nbs_c0603_h39_000s

GND

12

@

nbs_c0603_h37_000s

12

12

GND GNDGNDGND GNDGNDGND

C1618

C1605
1UF/6.3V

10UF/6.3V

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

2017/03/16 X542UA_R2.0 #03, Modify SA0 to pull down

R1601

@

0Ohm

1 2

21

SL1603

0402

GND GND GND

C1622

0.1UF/16V
@/EMI

12

@
C1629
22UF/6.3V
nbs_c0603_h39_000s

GND GND

Place close to SO-DIMM Socket (VDD Pin)

12

C1613

10UF/6.3V

GNDGNDGND GND

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

C1611
1UF/6.3V

GNDGNDGND GND GNDGNDGNDGND

+3VS+3VS+3VS

R1609

R1602

@

@

0Ohm

1 2

21

0Ohm

1 2

M_A_DIMM0_SA2
M_A_DIMM0_SA1
M_A_DIMM0_SA0

21

SL1601

SL1602

0402

0402

WRITE ADDRESS: 0X

+2.5V

nbs_c0603_h37_000s

12

C1608
10UF/6.3V

nbs_c0603_h37_000s

Place close to SO-DIMM Socket
(+VPP Pin)

2017/02/06 X542UA_R1.1 #26, EMI solution2017/02/06 X542UA_R1.1 #26, EMI solution

12

@
C1630
22UF/6.3V
nbs_c0603_h39_000s

12

12

C1626

C1614

10UF/6.3V

10UF/6.3V

@

GND

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

12

C1621

C1625

2.2UF/6.3V

1UF/6.3V

12

12

GND

12

C1604

10UF/6.3V

@

C1610
10UF/6.3V

@

nbs_c0603_h37_000s

C1624
1UF/6.3V

12

C1607

0.1UF/16V
@/EMI

12

C1602

10UF/6.3V

nbs_c0603_h37_000s

12

C1609
1UF/6.3V

@/EMI

12

C1615

0.1UF/16V
@/EMI

12

C1620

10UF/6.3V

GNDGND

12

C1623
1UF/6.3V

BOM

Title :

Size

C

Date: Sheet

Wednesday, March 07, 2018

DDR3_ON-BOARD_B_L32

Dept.:

NB2_RD1_EE1

Project Name

Engineer:

Bull Tsai

17

Rev

R2.0X507UA/UV

102

of

2016/11/16 X542UA_#78, Remove R1709

+1.2V

M_B_VREFCA

12

12

C1704

0.1UF/10V

GND GND

Place close to SO-DIMM

1 2

C1701

2.2UF/10V

R1707

240Ohm

J1701A

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

137

CK0_T

139

CK0_C

138

CK1_T

140

CK1_C

109

CKE0

110

CKE1

149

S0*

157

S1*

155

ODT0

161

ODT1

115

BG0

113

BG1

150

BA0

145

BA1

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10_AP

120

A11

119

A12

158

A13

151

A14_WE*

156

A15_CAS*

152

A16_RAS*

114

ACT*

143

PARITY

116

ALERT*

134

EVENT*

108

RESET*

164

VREFCA

254

SDA

253

SCL

166

SA2

260

SA1

256

SA0

92

CB0_NC

91

CB1_NC

101

CB2_NC

105

CB3_NC

88

CB4_NC

87

CB5_NC

100

CB6_NC

104

CB7_NC

12

DM0*/DBI0*

33

DM1*/DBI1*

54

DM2*/DBI2*

75

DM3*/DBI3*

178

DM4*/DBI4*

199

DM5*/DBI5*

220

DM6*/DBI6*

241

DM7*/DBI7*

96

DM8*/DBI8*

162

S2*/C0

165

S3*/C1

DDR4_DIMM_260P

M_B_CLK_DDR05
M_B_CLK_DDR#05
M_B_CLK_DDR15
M_B_CLK_DDR#15

M_B_CKE05
M_B_CKE15

M_B_CS#05
M_B_CS#15

M_B_ODT05
M_B_ODT15

M_B_BG05
M_B_BG15
M_B_BA05
M_B_BA15
M_B_A[13:0]5

M_B_WE#5
M_B_CAS#5
M_B_RAS#5

M_B_ACT#5

M_B_PAR5

M_B_ALERT#5

DDR4_DRAMRST#5,17,70

SMB_DATA_S36,17
SMB_CK_S36,17

+1.2V

'EVENT_N': INDICATES THERMAL EVENT ON DIMM.
NON-ECC DIMM: NOT CONNECTED

For ECC

T1702
T1701

M_B_DIMM0_EVENT#

M_B_DIMM0_SA2
M_B_DIMM0_SA1
M_B_DIMM0_SA0

1
1

M_B_DIMM0_S2
M_B_DIMM0_S3

EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH

DQS0_T
DQS1_T
DQS2_T
DQS3_T
DQS4_T
DQS5_T
DQS6_T
DQS7_T
DQS8_T

DQS0_C
DQS1_C
DQS2_C
DQS3_C
DQS4_C
DQS5_C
DQS6_C
DQS7_C
DQS8_C

8

DQ0

7

DQ1

20

DQ2

21

DQ3

4

DQ4

3

DQ5

16

DQ6

17

DQ7

28

DQ8

29

DQ9

41

DQ10

42

DQ11

24

DQ12

25

DQ13

38

DQ14

37

DQ15

50

DQ16

49

DQ17

62

DQ18

63

DQ19

46

DQ20

45

DQ21

58

DQ22

59

DQ23

70

DQ24

71

DQ25

83

DQ26

84

DQ27

66

DQ28

67

DQ29

79

DQ30

80

DQ31

174

DQ32

173

DQ33

187

DQ34

186

DQ35

170

DQ36

169

DQ37

183

DQ38

182

DQ39

195

DQ40

194

DQ41

207

DQ42

208

DQ43

191

DQ44

190

DQ45

203

DQ46

204

DQ47

216

DQ48

215

DQ49

228

DQ50

229

DQ51

211

DQ52

212

DQ53

224

DQ54

225

DQ55

237

DQ56

236

DQ57

249

DQ58

250

DQ59

232

DQ60

233

DQ61

245

DQ62

246

DQ63

13
34
55
76
179
200
221
242
97

11
32
53
74
177
198
219
240
95

2016/12/05 X542UA_R1.0 #99, DDR SWAP

SWAP

M_B_DQ8
M_B_DQ12
M_B_DQ15
M_B_DQ11
M_B_DQ13
M_B_DQ9
M_B_DQ10
M_B_DQ14

M_B_DQ4
M_B_DQ5
M_B_DQ7
M_B_DQ6
M_B_DQ1
M_B_DQ0
M_B_DQ3
M_B_DQ2

M_B_DQ20
M_B_DQ17
M_B_DQ21
M_B_DQ22
M_B_DQ19
M_B_DQ16
M_B_DQ23
M_B_DQ18

M_B_DQ28
M_B_DQ24
M_B_DQ26
M_B_DQ27

M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ30

M_B_DQ36

M_B_DQ32
M_B_DQ39
M_B_DQ34
M_B_DQ33
M_B_DQ37
M_B_DQ38
M_B_DQ35

M_B_DQ41
M_B_DQ40
M_B_DQ42
M_B_DQ47
M_B_DQ45
M_B_DQ44
M_B_DQ43
M_B_DQ46

M_B_DQ55
M_B_DQ53
M_B_DQ54
M_B_DQ48
M_B_DQ52
M_B_DQ49
M_B_DQ51
M_B_DQ50

M_B_DQ57
M_B_DQ59
M_B_DQ62
M_B_DQ61
M_B_DQ58
M_B_DQ56
M_B_DQ60
M_B_DQ63

M_B_DQS1
M_B_DQS0
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_DQS#1
M_B_DQS#0
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

12002-00080300

20170707 Brian
Change J1701 12002-00082500 to 12002-00080300(4H).

M_B_DQ[63:0] 5

D1

2017/0606 X507 SWAP

D0

2017/0606 X507 SWAP

D2

2017/0606 X507 SWAP

D3

2017/0606 X507 SWAP

D4

2017/0606 X507 SWAP

D5

2017/0606 X507 SWAP

D6

2017/0606 X507 SWAP

D7

2017/0606 X507 SWAP

M_B_DQS[7:0] 5

20161205 swap

M_B_DQS#[7:0] 5

20161205 swap

+VTT

J1701B

163

VDD19

160

VDD18

159

VDD17

154

VDD16

153

VDD15

148

VDD14

147

VDD13

142

VDD12

141

VDD11

136

VDD10

135

VDD9

130

VDD8

129

VDD7

124

VDD6

123

VDD5

118

VDD4

117

VDD3

112

VDD2

111

VDD1

251

VSS1

247

VSS2

243

VSS3

239

VSS4

235

VSS5

231

VSS6

227

VSS7

223

VSS8

217

VSS9

213

VSS10

209

VSS11

205

VSS12

201

VSS13

197

VSS14

193

VSS15

189

VSS16

185

VSS17

181

VSS18

175

VSS19

171

VSS20

167

VSS21

107

VSS22

103

VSS23

99

VSS24

93

VSS25

89

VSS26

85

VSS27

81

VSS28

77

VSS29

73

VSS30

69

VSS31

65

VSS32

61

VSS33

57

VSS34

51

VSS35

47

VSS36

43

VSS37

39

VSS38

35

VSS39

31

VSS40

27

VSS41

23

VSS42

19

VSS43

15

VSS44

9

VSS45

5

VSS46

1

VSS47

DDR4_DIMM_260P

GND GND

VDDSPD

NP_NC1
NP_NC2

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

258

VTT

259

VPP2

257

VPP1

255

12

C1705

0.1UF/10V

GND GND

263
264

261

MT1

262

MT2

252
248
244
238
234
230
226
222
218
214
210
206
202
196
192
188
184
180
176
172
168
106
102
98
94
90
86
82
78
72
68
64
60
56
52
48
44
40
36
30
26
22
18
14
10
6
2

+2.5V+1.2V

+3VS

SL1704

21

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

0402

12

C1709

2.2UF/10V

Place close to SO-DIMM

+VTT

nbs_c0603_h37_000s

12

C1711
10UF/6.3V

nbs_c0603_h37_000s

Place close to SO-DIMM Socket
(+VTT Pin)

2017/02/06 X542UA_R1.1 #26, EMI solution

+1.2V

12

12

C1726

10UF/6.3V

@

GND GNDGNDGND GNDGNDGND

20170707 Brian
Remove CE1701 for no-location.

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

R1703

@

0Ohm

1 2

21

SL1703

0402

GND

C1717

0.1UF/16V
@/EMI

+3VS+3VS+3VS

21

SL1702

R1704

@

0Ohm

0402

1 2

M_B_DIMM0_SA2
M_B_DIMM0_SA1
M_B_DIMM0_SA0

21

SL1701

R1701

@

0Ohm

0402

1 2

GND GND

WRITE ADDRESS: 0XA4

+2.5V

nbs_c0603_h37_000s

12

C1725
10UF/6.3V

nbs_c0603_h37_000s

Place close to SO-DIMM Socket
(+VPP Pin)

12

12

C1710

10UF/6.3V

@

C1727
1UF/6.3V

@

12

C1721
1UF/6.3V

@

Place close to SO-DIMM Socket (VDD Pin)

12

12

C1712

10UF/6.3V

@/EMI

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

C1708
1UF/6.3V

@

20170727 Brian
Add C1703/C1716 and unmount C1715/C1719 For POI cost down.

2017/02/06 X542UA_R1.1 #26, EMI solution

12

C1715

10UF/6.3V

10UF/6.3V

@

GNDGNDGND GND

nbs_c0603_h37_000s

12

12

C1718

0.1UF/16V
@/EMI

GNDGNDGND GND GNDGNDGNDGND

C1707

nbs_c0603_h37_000s

C1702
1UF/6.3V

12

12

C1722

10UF/6.3V

@/EMI

nbs_c0603_h37_000s

C1714
1UF/6.3V

12

GND

12

C1719

10UF/6.3V

@

nbs_c0603_h37_000s

C1723

0.1UF/16V
@/EMI

12

GND

12

C1703
10UF/6.3V

nbs_c0603_h37_000s

C1724
1UF/6.3V

@

12

C1716

10UF/6.3V

nbs_c0603_h37_000s

12

C1720
1UF/6.3V

12

C1706

10UF/6.3V

GNDGND

12

C1713
1UF/6.3V

<Variant Name>

Title :

Size

C

Date: Sheet

Wednesday, March 07, 2018

DDR4_SO-DIMM_1

Dept.:

Project Name

Engineer:

Bull Tsai

18

Rev

R2.0X507UA/UV

102

of

BOM

Project Name

X407UA/UV

Title :

Size

Dept.:

C

Date: Sheet

Wednesday, March 07, 2018

ASUSTeK COMPUTER INC.

Engineer:

Brian Chen

20

of

Rev

R1.0

102

A36
B36
C38
D38
C36
D36
A38
B38

C31
D31
C33
D33
A31
B31
A33
B33

A29
B29
C28
D28
A27
B27
C27
D27

U0301I

CSI-2

CSI2_DN0
CSI2_DP0
CSI2_DN1
CSI2_DP1
CSI2_DN2
CSI2_DP2
CSI2_DN3
CSI2_DP3

CSI2_DN4
CSI2_DP4
CSI2_DN5
CSI2_DP5
CSI2_DN6
CSI2_DP6
CSI2_DN7
CSI2_DP7

CSI2_DN8
CSI2_DP8
CSI2_DN9
CSI2_DP9

REV = <REV>

CSI2_DN10
CSI2_DP10
CSI2_DN11
CSI2_DP11

SKL-ULT

CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3

CSI2_COMP

GPP_D4/FLASHTRIG

EMMC

GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7

GPP_F21/EMMC_RCLK

GPP_F22/EMMC_CLK

GPP_F12/EMMC_CMD

EMMC_RCOMP

C37
D37
C32
D32
C29
D29
B26
A26

E13
B7

AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1

AM2
AM3
AP4

AT1

R2002 100Ohm@

1 2

R2001 200Ohm@

12

GND

GND

BOM

Project Name

Title :

Size

B

Date: Sheet

CPU_PCH_CSI2,EMMC

Dept.:

ASUSTeK COMPUTER INC.

Wednesday, March 07, 2018

Engineer:

Brian Chen

of

21

Rev

R1.0X407UA/UV

102

Main Board

www.teknisi-indonesia.com

20170720 Brian
Remove SL2138 for EMI Xtal 0ohm space.

FingerPrint

BT_ON/OFF#54

20150105
Checking
R2138 change to SL
R2171 / R2173 / R2118
R2114 / R2136 / R2131
remove (GPU side reserve)

Touch Panel ID
GPP_D12

TOUCH_PANEL_ID TOUCHPAD_ID

PCB ID0 GPP_D9

GPU_EVENT#77
DGPU_FB_CLAMP_GPIO77,78

2016/03/08 X540UP no GC6

DGPU_PWROK25,78,94 TOUCHPAD_INTR# 32

GPU_RST#71
DGPU_PWR_EN#78

20170630 Brian
Remove I2C2_SDA_TCHPANEL /
I2C2_SCL_TCHPANEL and TPanel_INT#
for Non-Touch Panel.

20160216 X541UV/UA
I2C1_SDA_TCH_PAD,I2C1_SCL_TCH_PAD Change port 1

Touch Pad ID
GPP_D11

12

R2111
10KOhm
@

12

R2137
10KOhm

+3VSUS +3VSUS

20170627 Brian
change from +3VS to +3VSUS

R2120

10KOhm

@

PCB_ID0 DMIC_ID

1 2

R2121

10KOhm

1 2

I2C1 SELECTION

+3VS

12

12

R2155

R2158

4.7KOhm

4.7KOhm

I2C1_SCL_TCH_PAD

I2C1_SDA_TCH_PAD

FP_GSPI0_CS#32
FP_GSPI0_CLK32
FP_GSPI0_MISO32

FP_GSPI0_MOSI32

SL2101@

+3VSUS+3VSUS

12

R2139
10KOhm
@

12

R2140
10KOhm

PCB ID1 GPP_D10

FOR I2C 1.8V FROM LPSS RA AND
RB SHOULD BE UNSTUFFED AND RC
AND RD SHOULD BE STUFFED

12

C2103
1UF/6.3V

@

21

0402

PCH_GPPB18

PCH_GPPB22

I2C1_SDA_TCH_PAD
I2C1_SCL_TCH_PAD

NFC ID
GPP_A21

20151223 X541UV
Del NFC ID

H: no NFC

L: NFC

20160216 X541UV/UA
PCB-ID:
GPP_D9 => PCB_ID0
GPP_D10=> PCB_ID1
20160223
GPP_D10=>DMIC_ID

R2123

10KOhm

@

1 2

R2124

10KOhm

1 2

20160218 X541UV
C2103 unstuff for cost

I2C1_SCL_TCH_PAD 32

I2C1_SDA_TCH_PAD 32

AN8
AP7
AP8
AR7

AM5

AN7
AP5
AN5

AB1
AB2

W4

AB3

AD1
AD2
AD3
AD4

U7
U6

U8
U9

AH9

AH10

REV = <REV>

AH11

AH12

AF11
AF12

SKL-ULT

U0301F

LPSS ISH

GPP_B15/GSPI0_CS#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI

GPP_B19/GSPI1_CS#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI

GPP_C8/UART0_RXD
GPP_C9/UART0_TXD
GPP_C10/UART0_RTS#
GPP_C11/UART0_CTS#

GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#

GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL

GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL

GPP_F4/I2C2_SDA
GPP_F5/I2C2_SCL

GPP_F6/I2C3_SDA
GPP_F7/I2C3_SCL

GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL

MEM ID

SEL0 (GPIO18)

SEL1 (GPIO19)

0

0

0

0

1

0

0 1

1

1

0

0

11

PCB ID (AMIC DMIC SEL)

PCB_ID0(GPP_D9)

DMIC_ID(GPP_D10)

0

0

1

0

1

0

11

I2C2 SELECTION

20170630 Brian
Remove R2190/R2191/C2104 for Non-Touch Panel.

GPP_D13/ISH_UART0_RXD

GPP_D14/ISH_UART0_TXD

GPP_D16

GPP_C14

GPP_C15

SEL2 (GPIO20)

0

0

1

0

11

0

111

NOTE

AMIC

DMIC

GPP_D9
GPP_D10
GPP_D11
GPP_D12

GPP_D5/ISH_I2C0_SDA

GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA

GPP_D8/ISH_I2C1_SCL

GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL

/SML0BDATA/I2C4B_SDA

/SML0BCLK/I2C4B_SCL

GPP_D15/ISH_UART0_RTS#

/ISH_UART0_CTS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD

/UART1_RTS#/ISH_UART1_RTS#
/UART1_CTS#/ISH_UART1_CTS#

GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5

GPP_A12/BM_BUSY#/ISH_GP6

NOTE

03012-00010200
SAMSUNG/K4A4G085WE-BCPB

03012-00030000
SAMSUNG/K4A8G085WB-BCPB

0G

03012-00030100
MICRON/MT40A1G8WE-083E:B

03012-00010300
MICRON/MT40A512M8RH-083E:B

03012-00030300
HYNIX/H5AN8G8NMFR-TFC

03012-00010000
HYNIX/H5AN4G8NAFR-TFC

FOR I2C 1.8V FROM LPSS RA AND
RB SHOULD BE UNSTUFFED AND RC
AND RD SHOULD BE STUFFED

P2
P3

PCB_ID0

P4

DMIC_ID

P1

TOUCHPAD_ID

TOUCH_PANEL_ID

M4
N3

SATA_ODD_PWRGT

SATA_ODD_DA#

N1
N2

AD11
AD12

U1
U2

TOUCHPAD_INTR#

U3

WLAN_LED_R

U4

SNSR_HUB_PWREN

AC1
AC2

DIMM_SEL0

AC3

DIMM_SEL1

AB4

DIMM_SEL2

AY8
BA8
BB7
BA7
AY7
AW7
AP13

Onboard Memory PCB-ID:
GPP_12 => DIMM_SEL0
GPP_13 => DIMM_SEL1
GPP_14 => DIMM_SEL2

1 2

1 2

R2181

10KOhm

@/MEMID_H0

R2180

10KOhm

@/MEMID_L0

1

T2112

1

T2113

1

T2114

FP_INT# 32

FP_RST#_GPIO 32

1 2

1 2

R2183

10KOhm

@/MEMID_H1

DIMM_SEL2DIMM_SEL1DIMM_SEL0

R2182

10KOhm

@/MEMID_L1

+3VSUS

R2185

10KOhm

@/MEMID_H2

1 2

R2184

10KOhm

@/MEMID_L2

1 2

No Reboot

PCH_GPPB18

NOTE: Enable No Reboot
PCH will disable the TCO
Timer system reboot feature.
This function is useful when running ITP/XDP.

PCH_GPPB18: weak internal pull down

PU Enable

PD Disable

20150106
Checking
Add for GPU_RST#
& DGPU_PWR_EN#

20170720 Brian
Remove R2168 for EMI Xtal 0ohm space.

+3VSUS

12

R2125

10KOhm

@

12

R2149

1KOhm

@

20170630 Brian
Remove TPanel_INT#(R2169)
for Non-Touch Panel.

TOUCHPAD_INTR#

GPU_RST#

DGPU_PWR_EN#

R2154 10KOhm

R2102 10KOhm@/VGA

R2101 10KOhm

WLAN_LED_R
SNSR_HUB_PWREN

R2122 10KOhm/VGA

Boot BIOS Strap Bit BBS

PCH_GPPB22

PCH_GPPB22: weal internal pull down

LPC

SPI (Default)

1 2

1 2

1 2

@/VGA

R2150 10KOhm@
R2153 10KOhm@

1 2

+3VSUS

12

12

1 2
1 2

R2160

10KOhm

@

R2161

1KOhm

@

+3VS

+3VSUS

+3VSUS

<Variant Name>

Title :

Size

Custom

Date: Sheet

Wednesday, March 07, 2018

CPU_CFG,RSVD,GND

Dept.:

ASUSTeK COMPUTER INC.

Project Name

Engineer:

Brian Chen

22

Rev

R1.0X407UA/UV

102

of