Apple iPhone SE Schematic

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

N69 MLB - EVT

7

6 5 4 3

2 1

ECNREV DESCRIPTION OF REVISION

CK
APPD

DATE

2015-08-2400047524174 ENGINEERING RELEASED

D

C

B

LAST_MODIFICATION=Wed Aug 19 11:42:47 2015

PAGE DATE PAGE DATECONTENTS

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11
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13
14
15
16
17
18
19
20
21
22
23
24
25
26
27 WIFI/BT: MODULE AND FRONT END
28

30

<CSA>

1

3

4

5

6

7

8

9

10

11

12

13

15

20

21

22

23

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30

31

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TABLE OF CONTENTS
SYSTEM:BOM TABLES
SYSTEM:N69 SPECIFIC [4]

SYSTEM:MECHANICAL
SOC:JTAG,USB,XTAL

SOC:PCIE
SOC:CAMERA & DISPLAY
SOC:SERIAL & GPIO
SOC:OWL
SOC:POWER (1/3)
SOC:POWER (2/3)
SOC:POWER (3/3)
NAND
SYSTEM POWER:PMU (1/3)
SYSTEM POWER:PMU (2/3)
SYSTEM POWER:PMU (3/3)
SYSTEM POWER:CHARGER
SYSTEM POWER:BATTERY CONN
SENSORS:MOTION SENSORS
CAMERA:FOREHEAD FLEX B2B
CAMERA:REAR CAMERA B2B
CAMERA:STROBE DRIVER
AUDIO:CALTRA CODEC (1/2)
AUDIO:CALTRA CODEC (2/2)
AUDIO:SPEAKER DRIVER
DISPLAY:POWER
MESA POWER AND IO FILTERS
DISPLAY FLEX
D403 (TOUCH B2B, DRIVER ICS)29
I/O:TRISTAR 2

31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59

w w w . c h i n a f i x . c o m

60

<CSA>

46

49

50

51

CONTENTS SYNCSYNC

I/O:DOCK FLEX B2B
I/O:BUTTON FLEX B2B
BASEBAND:RADIO SYMBOL
page1
CELL:ALIASES
AP INTERFACE & DEBUG CONNECTORS
BASEBAND PMU (1 0F 2)
BASEBAND PMU (2 OF 2)
BASEBAND (1 OF 2)
BASEBAND (1 OF 2)
MOBILE DATA MODEM (2 OF 2)
RF TRANSCEIVER (1 0F 3)
RF TRANSCEIVER (2 OF 3)
RF TRANSCEIVER (3 OF 3)
QFE DCDC
2G PA
VERY LOW BAND PAD
LOW BAND PAD
MID BAND PAD
HIGH BAND PAD
ANTENNA SWITCH
HIGH BAND SWITCH
RX DIVERSITY
RX DIVERSITY (2)
GPS
ANTENNA FEEDS

STOCKHOLM
OMIT_TABLE_RF
Radio Subdesign Ports

D

C

B

A

SCH 051-00648
BRD 820-00282

MCO 056-01352

BOM 639-00931 (N69 BETTER)
BOM 639-01012 (N69H BETTER)

BOM 639-01231 (N69 BEST)
BOM 639-01232 (N69H BEST)
BOM 639-01271 (N69 ULTRA)
BOM 639-01272 (N69H ULTRA)

TABLE OF CONTENTS

DRAWING TITLE

SCH,MLB,N69

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

1 OF 49

SHEET

1 OF 60

A

SIZEDRAWING NUMBER

D

3

1245678

345678

2 1

D

C

B

SCHEMATIC & PCB BOM CALLOUTS

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

SCHSCH,MLB,N69051-00648 1 CRITICAL

PCBF,MLB,N69820-00282 PCB CRITICAL

1

EEEE CODE FOR 639-00931 16GB825-6838 CRITICAL1 EEEE_GH6K

1 EEEE_GJYD825-6838 CRITICAL

EEEE CODE FOR 639-01012 16GB

EEEE CODE FOR 639-01231 32GB CRITICAL

EEEE_GN7J1825-6838

EEEE CODE FOR 639-01232 32GB825-6838 1 CRITICALEEEE_GN7H

825-6838 EEEE CODE FOR 639-01271 64GB EEEE_GP3V

825-6838

1 CRITICAL

CRITICALEEEE_GP3WEEEE CODE FOR 639-01272 64GB1

S3E NAND BOM OPTIONS

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

335S00054 U1500 CRITICAL1

335S00072

335S00076 1 CRITICAL

NAND,1YNM,16GX8,S3E,64G,T,SLGA70

NAND,1YNM,32GX8,S3E,64G,T,SLGA70

NAND,1YNM,64GX8,S3E,TLC,128G,H,ULGA70

PART NUMBER

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

U15001

U1500

CRITICAL

TABLE_ALT_HEAD

TABLE_ALT_ITEM

335S00054 NAND_16G U1500335S00071 HYNIX 16G SLGA70

TABLE_ALT_ITEM

335S00085 NAND_32G U1500 TOSHIBA 16G SLGA70335S00072

CARBON BOM OPTIONS

PART# DESCRIPTIONQTY

1132S0316 INVENSENSE_CARBONC3020

132S0316

1

117S0202 1

1 INVENSENSE_CARBON117S0202

1 U3010 INVENSENSE_CARBON_1_1338S00087

IC,CARBON,MPU-6700-12,LGA16

IC,ACCEL,3-AXIS,DIG,BMA282,LGA14

CAP,CER,X5R,0.1UF,20%,6.3V,01005

CAP,CER,X5R,1UF,20%,6.3V,0201

CAP,CER,X5R,0.1UF,20%,6.3V,01005

RES,MF,20OHM,5%,1/32W,01005

RES,MF,20OHM,5%,1/32W,01005

RES,MF,20OHM,5%,1/32W,01005

IC,CARBON,MPU-6800-00,LGA16

U3010338S00017 1 INVENSENSE_CARBON

C3021 INVENSENSE_CARBON138S0692 1

C3022 INVENSENSE_CARBON1

R3022

BOM OPTIONREFERENCE DESIGNATOR(S)

INVENSENSE_CARBONU3020338S1163 1

INVENSENSE_CARBONR3020117S0202

INVENSENSE_CARBONR3021

COMPASS PART NUMBER

PART# DESCRIPTIONQTY

338S00084 U3000 COMMON1

IC,COMPASS,MAGNESIUM,601A-19,FLGA14

BOM OPTIONREFERENCE DESIGNATOR(S)

SHIELD PART NUMBERS

PART# DESCRIPTIONQTY

SHIELD,EMI,UPPER FRONT,N69

806-03630 1 COMMONSH0501

SHIELD,EMI,LOWER FRONT,N69

SHIELD,EMI,BACK,N69

SH0500 COMMON1806-03629

SH05031 COMMON806-03556

BOM OPTIONREFERENCE DESIGNATOR(S)

BOM OPTIONCRITICAL

?

?

EEEE_16G

EEEE_16GH

EEEE_32G

EEEE_32GH

EEEE_64G

EEEE_64GH

BOM OPTIONCRITICAL

NAND_16G

NAND_32G

NAND_64G

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

ALTERNATE BOM OPTIONS

PART NUMBER

138S0831138S00032 ALTERNATE TY,2.2UF,0201C0610

138S0831 KYOCERA,2.2UF,0201ALTERNATE C0610138S00049

138S00003 ALTERNATE138S00005 TY,15UF,0402C1500

118S0764

ALTERNATE L2060 CYNTEC,1UH,1608152S1929152S2052

155S0453 FL3101 TY,FERR,120-OHM,01005ALTERNATE155S0773

377S0168 377S0140 DZ3150ALTERNATE

ALTERNATE FL4200155S0581155S00067

155S00009155S00012 L3100ALTERNATE

138S0739138S0706

ALTERNATE138S0945

ALTERNATE155S00095 FL1280155S00068

138S0652 ALTERNATE

132S0436132S0400 ALTERNATE C1280

ALTERNATE

ALTERNATE138S0986

335S00066

ALTERNATE335S0946 U0900

138S0867138S00020 C1100ALTERNATE

FL3100155S0513 ALTERNATE MURATA,FERR,22-OHM155S0660

R2250ALTERNATE118S0717

C5302_RFALTERNATE

C5302_RF138S0739

C3650138S0648

FL3151155S0941155S0960

C5201_RF138S00024

C1100138S0867138S00022 ALTERNATE

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

KYOCERA,15UF,0402C1500138S00048 138S00003 ALTERNATE

PANASONIC,3.92K-OHM,0201

TY,4.3UF,0402ALTERNATE138S0835 C1106138S00006

TDK,VARISTOR,6.8V,100PF,01005

TDK,FERR,240-OHM,0201

MURATA,CHOKE,65-OHM,0605

MURATA,CAP,CER,1UF,20%,10V,X5R,0201

KYOCERA,CAP,CER,1UF,20%,10V,X5R,0201

FERR BD,100 OHM,25%,100MA,2 OHM,01005

TY,4.7UF,0402

CAP,CER,X5R,0.22UF,20%,6.3V,01005

FERR BD,70 OHM,25%,300MA,0.4 DCR,01005

CAP,CER,3-TERM,7.5UF,20%,4V,0402

IC,EEPROM,16KX8,1.8V,I2C,WLCSP4

DIODES INC. ACT DIODEALTERNATE376S00047 Q2300376S00106

CUMULUS 2ND FLOWALTERNATE U4301343S0638343S0688

TY,10UF,0402

MURATA,10UF,0402

PMU/SOC BOM OPTIONS

PART# DESCRIPTIONQTY

POP,MALTA+2GB 25NM DDR,A1,M,DEV

339S00121 MALTA

PART# DESCRIPTIONQTY

339S00096 1 U0600 MAUI

118S0631

131S0307 C07301 MAUI

117S0161 R06511 MAUI

132S0316 1 C0731

1 U0600

RES,MF,3.01KOHM,1%,1/32W,01005

1 MALTA

1 NOSTUFFC0730131S0307

CAP,CER,NPO/COG,100PF,5%,16V,01005

RES,MF,330OHM,1%,1/32W,01005

CAP,CER,X5R,0.1UF,20%,6.3V,01005

IC,PMU,ANTIGUA,D2255A1,OTP-BG

1338S00170 U2000 MALTA

POP,MAUI+2GB 25NM DDR,C0,H,DEV

w w w . c h i n a f i x . c o m

RES,MF,100OHM,1%,1/32W,01005

1 R0730 MAUI

CAP,CER,NPO/COG,100PF,5%,16V,01005

RES,MF,0OHM,1/32W,01005

CAP,CER,X5R,0.1UF,20%,6.3V,01005

IC,PMU,ANTIGUA,D2255A1,OTP-YG

R0730118S00009

C0731132S0316 NOSTUFF1

U20001 MAUI338S00171

BOM OPTIONREFERENCE DESIGNATOR(S)

MALTA1 R0651118S00025

BOM OPTIONREFERENCE DESIGNATOR(S)

MAUI

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

NOT ALL REFERENCE DESIGNATORS LISTED.
USED 91 TIMES IN DESIGN.

USED 91 TIMES IN DESIGN.

USED 5 TIMES IN DESIGN.

USED 61 TIMES IN DESIGN.

USED 61 TIMES IN DESIGN.

USED 1 TIME IN DESIGN.

USED 20 TIMES IN DESIGN.

USED 1 TIME IN DESIGN.

USED 35 TIMES IN DESIGN.

USED 9 TIMES IN DESIGN.

USED 5 TIMES IN DESIGN.

USED 10 TIMES IN DESIGN.
USED 4 TIMES IN DESIGN.

USED 4 TIMES IN DESIGN.

USED 1 TIME IN DESIGN.

USED 9 TIMES IN DESIGN.
USED 1 TIME IN DESIGN.

USED 8 TIMES IN DESIGN.

USED 1 TIME IN DESIGN.

USED 1 TIME IN DESIGN.

USED 1 TIME IN DESIGN.
USED 1 TIME IN DESIGN.

USED 51 TIMES IN DESIGN.

USED 51 TIMES IN DESIGN.

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

D

C

B

A

POWER INDUCTOR ALTERNATES

PART NUMBER

152S00121 152S00081 L2001 TAIYO 2012 0.47UH?

152S00120 152S00077

152S00123 TAIYO 3225 15UH? L4020152S1936

?152S00117 L2000 TAIYO 2016 1.0UH152S00074

L2070?

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TAIYO 2016 1.0UH 0.65MM

TAIYO 2016 1.2UHL3700152S00075152S00118 ?

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

SOC ALTERNATES

PART NUMBER

ALTERNATE339S00122 339S00121

339S00123 339S00121

PART NUMBER

ALTERNATE339S00096339S00097 U0600

339S00098

U0600

U0600ALTERNATE339S00096

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

MALTA DEV, H DRAM

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

MAUI DEV, M DRAM

MAUI DEV, S DRAM

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

SYNC_MASTER=N/A

PAGE TITLE

SYSTEM:BOM TABLES

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=N/A

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

3 OF 49

SHEET

2 OF 60

A

8 7 5 4 2 1

36

345678

2 1

D

TESTPOINTS

POWER

31 30 17

33 18 17

PP5V0_USB

PP_BATT_VCC

TP00

1

TP-P6

ROOM=TEST

TP01

1

TP-P6

ROOM=TEST

TP02

1

TP-P6

ROOM=TEST

TP03

1

TP-P6

ROOM=TEST

TP05

1

TP-P55

ROOM=TEST

N69 I2C DEVICE MAP

I2C BUS

I2C0

AMUX

TP16

PMU_AMUX_AY

A

POWER GROUND

16

1

TP-P55

ROOM=TEST

A

I2C1

TP17

PMU_AMUX_BY

A

VBUS

16

1

TP-P55

ROOM=TEST

A

MOJAVE

A

VBATT

A

TP24

A

1

TP-P55

ROOM=TEST

A

TP 24 FOR USB

FIXTURE SI

27 26

27 26

MESA_TO_BOOST_EN

PP11V3_MESA

TP18

1

TP-P55

ROOM=TEST

TP19

1

TP-P55

ROOM=TEST

LCM

A

A

I2C2

OWL

ISP I2C0

DEVICE

ANTIGUA PMU
CHESTNUT
BACKLIGHT

TIGRIS

SPEAKER AMP
TRISTAR

ALS

REAR CAM

BINARY

0100111X
1100010X

1110101X

0011010X 0X1A

0101001X

TBD TBDTBD

7-BIT HEX

8-BIT HEX

0X741110100X

0X62 0XC4

0X75

0X401000000X

0X29

N/AN/AUNUSED

0XE8
0X4E0X27

D

0XEA

0X80
0X34

0X52

N/A

C

16 9 5

28 21 20 14 13 12 9 8 7 6 5 3

PMU_TO_SYSTEM_COLD_RESET_L

FORCE_DFU

8

PP1V8

29

DFU_STATUS

8

RESET

TP06

1

TP-P55

ROOM=TEST

DFU

TP07

1

TP-P55

ROOM=TEST

PP07

P4MM-NSM

SM

1

PP

ROOM=TEST

PP08

P4MM-NSM

SM

1

PP

ROOM=TEST

TP20

PP_LCM_BL_CAT1_CONN

28

PP_LCM_BL_CAT2_CONN

28

A

SOC & BB RESET

1

TP-P55

ROOM=TEST

TP21

1

TP-P55

ROOM=TEST

A

ISP I2C1

A

FRONT CAM

TOUCH I2C

1100011XLED DRIVER

0110110X

N/A

0X63

0XC6

0X6C0X36

N/AN/AUNUSED

C

TP22

PP_LCM_BL_ANODE_CONN

28

FORCE DFU PROCEDURE:

A

28

LCD_TO_AP_PIFA_CONN

1. FROM OFF MODE SHORT TP07 TO PP07

1

TP-P55

ROOM=TEST

TP23

1

TP-P55

ROOM=TEST

A

0xA20x511010001XSEP EEPROMSEP I2C

A

2. PLUG IN E75 CABLE TO FORCE DFU

BOOTSTRAPPING:BOARD REV

BOARD ID
BOOT CONFIG

B

A

90_TRISTAR_DP1_CONN_P

31 30

90_TRISTAR_DP1_CONN_N

31 30

90_TRISTAR_DP2_CONN_P

31 30

90_TRISTAR_DP2_CONN_N

31 30

31 30

31 30

31 30

PP_TRISTAR_ACC1

PP_TRISTAR_ACC2

TRISTAR_CON_DETECT_L

E75

TP08

1

TP-P55

ROOM=TEST

TP09

1

TP-P55

ROOM=TEST

TP10

1

TP-P55

ROOM=TEST

TP11

1

TP-P55

ROOM=TEST

TP12

1

TP-P55

ROOM=TEST

TP13

1

TP-P55

ROOM=TEST

TP14

1

TP-P55

ROOM=TEST

TP15

1

TP-P55

ROOM=TEST

8

OUT

A

TRISTAR USB

A

A

w w w . c h i n a f i x . c o m

8

OUT

8

OUT

8

OUT

BOARD_REV3

BOARD_REV2

BOARD_REV1

BOARD_REV0

R0400
R0401

NOSTUFF

R0402

01005 MF

NOSTUFF

R0403

TRISTAR DEBUG UART

A

8

OUT

A

8

OUT

BOARD_ID4

BOARD_ID3

TRISTAR ACCESSORY ID

A

A

A

ACCESSORY POWER

8

BI

8

8

OUT

8

OUT

8

OUT

8

BOARD_ID2

BOARD_ID0

BOOT_CONFIG2

BOOT_CONFIG1

BOOT_CONFIG0

RESISTOR STUFF = HIGH '1'
RESISTOR NOSTUFF = LOW '0'

NOSTUFF

R0404

01005 MF

NOSTUFF

R0405

01005

NOSTUFF

R0406

R0407

01005

NOSTUFF

R0408

NOSTUFF

R0409

01005 MF

R0410

01005

R0411

01005

ROOM=SOC

1 2

MF01005 1/32W

5%

ROOM=SOC

1 2

5%

ROOM=SOC

1 2

5%

ROOM=SOC

1 2

MF01005

5%

ROOM=SOC

1 2

5%

ROOM=SOC

1 2

MF 1/32W

5%

ROOM=SOC

1 2

MF01005

5%

ROOM=SOC

1 2

MF 1/32W

5%

ROOM=SOC

1 2

5%

ROOM=SOC

1 2

5%

ROOM=SOC

1 2

5%

ROOM=SOC

1 2

MF 1/32W

5%

1.00K

1.00K

1/32WMF01005

1.00K

1/32W

1.00K

1/32W

1.00K

1/32W

1.00K

1.00K

1/32W

1.00K

1.00K

1/32W01005 MF

1.00K

1/32W

1.00K

1/32WMF

1.00K

PP1V8

29

28 21 20 14 13 12 9 8 7 6 5 3

BOARD_REV[3:0]

FLOAT=LOW, PULLUP=HIGH
1111 PROTO0 MLB

1110 PROTO1
1101 PROTO2

SELECTED -->

1100 EVT
XXXX CARRIER
XXXX DVT

BOARD_ID[4:0]

FLOAT=LOW, PULLUP=HIGH

SELECTED -->

00010 N69 MLB
00011 N69 DEV

BOOT_CONFIG[2:0]

FLOAT=LOW, PULLUP=HIGH
000 SPI0

001 SPI0 TEST MODE
010 NVME0 x2 MODE

SELECTED -->

011 NVME0 x2 TEST MODE
100 NVME0 x1 MODE
101 NVME0 x1 TEST MODE
110 SLOW SPI0 TEST MODE
111 FAST SPI0 TEST MODE

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

SYSTEM:N69 SPECIFIC [4]

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

4 OF 49

SHEET

3 OF 60

D

B

A

8 7 5 4 2 1

36

D

1

C0510

100PF

5%

16V

2

NP0-C0G
01005

1

C0511

56PF

5%

16V

2

NP0-C0G
01005

BOARD STANDOFFS

AND AC COUPLING CAPS FOR

COMPASS RETURN CURRENTS

EAST_STANDOFF_AC_GND_SCREW

1

C0512

3.3PF

+/-0.1PF

16V

2

CERM
01005

1

C0513

56PF

5%

16V

2

NP0-C0G
01005

WEST_STANDOFF_AC_GND_SCREW

TOP-SIDE, EAST

1

BS0501

STDOFF-2.7OD1.4ID-1.04H-SM-1

TOP-SIDE, WEST

1

SHIELDS

UPPER FRONT SHIELD

1

SH0500

SM

SHLD-EMI-UPPER-FRONT-N69

OMIT_TABLE

LOWER FRONT SHIELD

1

SH0501

SM

SHLD-EMI-LOWER-FRONT-N69

OMIT_TABLE

345678

2 1

FIDUCIALS

FD0501

FID

0P5SM1P0SQ-NSP

1

ROOM=ASSEMBLY

FD0502

FID

0P5SM1P0SQ-NSP

1

ROOM=ASSEMBLY

FD0503

FID

0P5SM1P0SQ-NSP

1

ROOM=ASSEMBLY

FD0505

FID

0P5SM1P0SQ-NSP

1

ROOM=ASSEMBLY

D

C

1

C0520

100PF

5%

16V

2

NP0-C0G
01005

1

C0521

56PF

5%

16V

2

NP0-C0G
01005

1

C0522

3.3PF

+/-0.1PF

16V

2

CERM
01005

1

C0523

56PF

5%

16V

2

NP0-C0G
01005

BS0502

STDOFF-2.7OD1.4ID-1.04H-SM-1

PLATED SHIELD SLOT

SL0501

TH-NSP

1

SL-1.20X0.40-1.50X0.70-NSP

TOP-SIDE, GROUND SPRING

SPRING-SUPER-COWLING-GROUND-X145

SP0502

1

CLIP-SM

FD0510

FID

0P5SQ-SMP3SQ-NSP

1

ROOM=ASSEMBLY

FD0511

FID

0P5SQ-SMP3SQ-NSP

1

ROOM=ASSEMBLY

FD0512

FID

0P5SQ-SMP3SQ-NSP

1

ROOM=ASSEMBLY

FD0514

FID

0P5SQ-SMP3SQ-NSP

1

ROOM=ASSEMBLY

FD0515

FID

0P5SQ-SMP3SQ-NSP

1

C

B

NORTH WIFI UNDERFILL BLOCKING

CKPLUS_WAIVE=TERMSHORTED

R0500
R0501

01005

CKPLUS_WAIVE=TERMSHORTED

1 2

MF01005

0%

1 2

MF

0%

0.00

1/32W

0.00

1/32W

ROOM=ASSEMBLY

FD0504

FID

0P5SM1P0SQ-NSP

1

ROOM=ASSEMBLY

FD0516

FID

0P5SQ-SMP3SQ-NSP

1

ROOM=ASSEMBLY

B

w w w . c h i n a f i x . c o m

A

COMPASS AC GROUNDING CAPS

COMPASS_AC_GND_SCREW

1

C0540

0.01UF

10%

25V

2

X5R-CERM
0201

ROOM=ASSEMBLY

1

C0541

100PF

2%

50V

2

C0G
0201

ROOM=ASSEMBLY

1

C0542

56PF

2%

50V

2

NP0-C0G-CERM
0201

ROOM=ASSEMBLY

1

C0543

3.3PF

+/-0.1PF

25V

2

C0G-CERM
0201

ROOM=ASSEMBLY

SM

1

PP0501

PP

P4MM-NSM

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

SYSTEM:MECHANICAL

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

5 OF 49

SHEET

4 OF 60

D

A

8 7 5 4 2 1

36

SOC - USB, JTAG, XTAL

345678

2 1

D

15 7 6

VDD12_PLL_LPDP:1.14-1.26V @2mA MAX
VDD12_PLL_SOC: 1.14-1.26V @12mA MAX
VDD12_PLL_CPU: 1.14-1.26V @2mA MAX

R0600

0.00

PP1V2

1 2

0%

1/32W

MF

01005

ROOM=SOC

PP1V2_PLL PP1V8

C0600

1

0.1UF

20%

2

X5R-CERM
01005

ROOM=SOC

C0601

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

C0604

0.22UF

20%

6.3V

2

X5R
0201

ROOM=PMU

C0602

1

0.01UF

10%

6.3V

26.3V

X5R
01005

ROOM=SOC

C0603

1

0.01UF

10%

6.3V

2

X5R
01005

ROOM=SOC

AP21

C15

F22

U20

T19

W19

AF13

AL21

1

C0612

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

AN20

PP1V8_XTAL

AL34

1

C0611

0.1UF

20%

2

X5R-CERM
01005

ROOM=SOC

PP3V3_USB

1

C0620

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

VDD18_USB: 1.71-1.89V @20mA MAX
VDD18_XTAL:1.62-1.98V @2mA MAX

FL0610

1KOHM-25%-0.2A

1 2

0201

1

C0610

2.2UF

20%

6.3V

26.3V

X5R-CERM
0201

ROOM=SOC

15

VDD33_USB:3.14-3.46V @5mA MAX

ROOM=SOC

D

29 28 21 20 14 13 12 9 8 7 6 3

C

33

33

30

30

VDD33_USB

VDD18_XTAL

C

PP0620

P2MM-NSM

SM

1

PP

ROOM=SOC

VDD12_PLL_LPDP

VDD12_UH1_HSIC0

VDD12_UH2_HSIC1

VDD12_PLL_SOC

VDD18_USB

VDD12_PLL_CPU

OMIT_TABLE

CRITICAL

U0600

MAUI-2GB-25NM-DDR-H

NC
NC

NC
NC
NC

AN22
AN21

C16
D15

Y32

AC32
AB31
AA32
AB32
AA31

UH1_HSIC0_DATA
UH1_HSIC0_STB

UH2_HSIC1_DATA
UH2_HSIC1_STB

JTAG_SEL

JTAG_TRST*
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK

BI
BI

BI

IN

50_AP_BI_BB_HSIC0_DATA
50_AP_BI_BB_HSIC0_STB

PP0621

P2MM-NSM

SM

1

PP

ROOM=SOC

SWD_DOCK_BI_AP_SWDIO
SWD_DOCK_TO_AP_SWCLK

FCMSP

SC58980X0B-A040

SYM 1 OF 14

ROOM=SOC

ANALOGMUX_OUT

USB_D_P
USB_D_N

USB_VBUS

USB_ID

AP24

AT20
AT19

AP19

AR19

AP_TO_PMU_AMUX_OUT

90_USB_AP_DATA_AP_P
90_USB_AP_DATA_AP_N

USB_VBUS_DETECT

NC

16

OUT

L0601

15NH-250MA

1 2

ROOM=TRISTAR

0201

17

IN

L0602

15NH-250MA

1 2

0201

ROOM=TRISTAR

90_USB_AP_DATA_P
90_USB_AP_DATA_N

30

BI

30

BI

B

PP0610

30 26 16 9

ROOM=SOC

P3MM-NSM

SM

1

PP

16 9 3

16

13

IN

IN

OUT

OUT

PMU_TO_SYSTEM_COLD_RESET_L
PMU_TO_OWL_ACTIVE_READY
AP_TO_PMU_TEST_CLKOUT

AP_TO_NAND_RESET_L

AC31

H33

AR23

AN23

H32
AF6

AL22

AG25

COLD_RESET*
CFSB
TST_CLKOUT

S3E_RESET*

HOLD_RESET
TESTMODE
FUSE1_FSRC

FUSE2_FSRC

XI0

XO0

AP18

Y33

AK35
AL35

USB_REXT

w w w . c h i n a f i x . c o m

WDOG

USB_REXT

AP_TO_PMU_WDOG_RESET

45_XTAL_AP_24M_IN
45_XTAL_AP_24M_OUT

OUT

16

1

R0650

2

511K

1%
1/32W
MF
01005

ROOM=SOC

1

R0640

200

1%
1/32W
MF
01005

2

ROOM=SOC

1 2

OMIT_TABLE

R0651

0.00

0%

1/32W

MF

01005

ROOM=SOC

24.000MHZ-30PPM-9.5PF-60OHM

45_SOC_24M_O

1

C0650

12PF

5%
16V

2

CERM
01005

ROOM=SOC

CRITICAL

ROOM=SOC

Y0600

1.60X1.20MM-SM

1 3

2 4

45_AP_XTAL_GND

1

C0651

12PF

5%
16V

2

CERM
01005

ROOM=SOC

XW0650

SHORT-10L-0.1MM-SM

1 2

ROOM=SOC

B

A

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

SOC:JTAG,USB,XTAL

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

6 OF 49
5 OF 60

A

D

D

SOC - PCIE INTERFACES

VDD12_PCIE_REFBUF:1.08-1.26V @50mA MAX

15 7 5

VDD12_PCIE_TXPLL: 1.08-1.32V @10mA MAX
VDD12_PCIE: 1.14-1.26V @115mA MAX

PP1V2

1

C0740

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C0741

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=SOC

1

C0742

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

XW0740

SHORT-10L-0.1MM-SM

1 2

ROOM=SOC

1

C0744

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

PP1V2_PCIE_TXPLL

1

C0743

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

C0731

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

OMIT_TABLE

AK28

AK25

AL24

AL27

AL26

AJ26

AH28

AJ25

AL23

AJ29

AL29

AJ24

AK27

AJ27

1

C0752

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

345678

VDD085_PCIE:0.802-TBDV @TBDmA MAX

PP_FIXED

1

C0751

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=SOC

1

C0750

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

2 1

14 11 7

D

C

13

IN

13

IN

13

OUT

13

OUT

13

IN

13

13

13

IN

OUT
OUT

PCIE LINK 0PCIE LINK 1

90_PCIE_NAND_TO_AP_RXD0_P
90_PCIE_NAND_TO_AP_RXD0_N

90_PCIE_AP_TO_NAND_TXD0_P
90_PCIE_AP_TO_NAND_TXD0_N 90_PCIE_AP_TO_NAND_TXD0_C_N

90_PCIE_NAND_TO_AP_RXD1_P 90_PCIE_NAND_TO_AP_RXD1_C_P
90_PCIE_NAND_TO_AP_RXD1_N

90_PCIE_AP_TO_NAND_TXD1_P
90_PCIE_AP_TO_NAND_TXD1_N

C0701

ROOM=SOC

C0702

ROOM=SOC

C0703

ROOM=SOC

C0704

ROOM=SOC

C0705

ROOM=SOC

C0706

ROOM=SOC

C0707

ROOM=SOC

C0708

ROOM=SOC

1 2

20%

6.3V

1 2

20%

6.3V

1 2

20%

6.3V

1 2

6.3V

1 2

20%

6.3V

1 2

6.3V

1 2

20%

6.3V

1 2

20%

6.3V

0.1UF

X5R-CERM

01005

0.1UF

X5R-CERM

01005

0.1UF

X5R-CERM

01005

0.1UF

X5R-CERM20%
01005

0.1UF

X5R-CERM
01005

0.1UF

X5R-CERM20%
01005

0.1UF

X5R-CERM
01005

0.1UF

X5R-CERM
01005

PCIE_EXT_C

90_PCIE_NAND_TO_AP_RXD0_C_P
90_PCIE_NAND_TO_AP_RXD0_C_N

90_PCIE_AP_TO_NAND_TXD0_C_P

90_PCIE_NAND_TO_AP_RXD1_C_N

90_PCIE_AP_TO_NAND_TXD1_C_P
90_PCIE_AP_TO_NAND_TXD1_C_N

AP29

AM30

AN30

AT32
AR32

AM28

AN28

AT31
AR31

PCIE_EXT_C

PCIE_RX0_P
PCIE_RX0_N

PCIE_TX0_P
PCIE_TX0_N

PCIE_RX1_P
PCIE_RX1_N

PCIE_TX1_P
PCIE_TX1_N

VDD12_PCIE

VDD12_PCIE_TXPLL

MAUI-2GB-25NM-DDR-H

VDD085_PCIE

VDD12_PCIE_REFBUF

OMIT_TABLE

CRITICAL

U0600

FCMSP

SC58980X0B-A040

SYM 2 OF 14

ROOM=SOC

PCIE_REF_CLK0_P
PCIE_REF_CLK0_N

PCIE_REF_CLK1_P
PCIE_REF_CLK1_N

PCIE_REF_CLK2_P
PCIE_REF_CLK2_N

PCIE_REF_CLK3_P
PCIE_REF_CLK3_N

PCIE_CLKREQ0*
PCIE_CLKREQ1*
PCIE_CLKREQ2*
PCIE_CLKREQ3*

AN35

AP35

AN34

AP34

AM32

AN32

AM31
AN31

AT11
AP12
AR12
AT12

NC
NC

NC
NC

NC
NC

90_PCIE_AP_TO_NAND_REFCLK_P
90_PCIE_AP_TO_NAND_REFCLK_N

90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N

OUT
OUT

OUT
OUT

13

13

33

33

1

2

P2MM-NSM

P2MM-NSM

R0720

100K

5%
1/32W
MF
01005

ROOM=SOC

SM

1

PP

SM

1

PP

1

2

PP0700

PP0701

R0721

100K

5%
1/32W
MF
01005

ROOM=SOC

PP1V8

PCIE_NAND_TO_AP_CLKREQ_L
PCIE_WLAN_TO_AP_CLKREQ_L

29 28 21 20 14 13 12 9 8 7 5 3

C

13

BI

33

BI

B

33

33

33

33

IN
IN

OUT
OUT

90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N

90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N

C0709

ROOM=SOC

C0710

ROOM=SOC

C0711

ROOM=SOC

C0712

ROOM=SOC

1 2

20%

6.3V

20%

6.3V 01005

20%

6.3V

20%

1 2

1 2

1 2

X5R-CERM
01005

X5R-CERM

X5R-CERM
01005

X5R-CERM

010056.3V

0.1UF

0.1UF

0.1UF

0.1UF

90_PCIE_WLAN_TO_AP_RXD_C_P
90_PCIE_WLAN_TO_AP_RXD_C_N

90_PCIE_AP_TO_WLAN_TXD_C_P
90_PCIE_AP_TO_WLAN_TXD_C_N

NC
NC

NC
NC

AR10
AT10
AP11
AR11

AR33

AT33

AT29

AR29

NC
NC

AM27

AN27

AT28
AR28

AM26

AN26

PCIE_RX2_P
PCIE_RX2_N

PCIE_TX2_P
PCIE_TX2_N

PCIE_RX3_P
PCIE_RX3_N

PCIE_PERST0*
PCIE_PERST1*
PCIE_PERST2*
PCIE_PERST3*

PCIE_EXT_REF_CLK_P
PCIE_EXT_REF_CLK_N

PCIE_RX_TX_BYPASS_CLK_P
PCIE_RX_TX_BYPASS_CLK_N

w w w . c h i n a f i x . c o m

AT26
AR26

PCIE_TX3_P
PCIE_TX3_N

1

R0700

100K

5%
1/32W
MF
01005

2

ROOM=SOC

1

R0701

100K

5%
1/32W
MF
01005

2

ROOM=SOC

PCIE_AP_TO_NAND_RESET_L
PCIE_AP_TO_WLAN_RESET_L

OUT
OUT

13

33

B

A

NC
NC

NC
NC

AM25

AN25

AR24
AT24

PCIE_RX4_P
PCIE_RX4_N

PCIE_TX4_P
PCIE_TX4_N

PCIE_RCAL_P
PCIE_RCAL_N

AT30

AR30

45_PCIE_RCAL_N

1

R0730

3.01K

1%
1/32W
MF
01005

2

ROOM=SOC

OMIT_TABLE

1

C0730

100PF

5%
16V

2

NP0-C0G
01005

ROOM=SOC

OMIT_TABLE

PAGE TITLE

SOC:PCIE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=N/ASYNC_MASTER=N/A

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

7 OF 49

SHEET

6 OF 60

A

8 7 5 4 2 1

36

SOC - CAMERA & DISPLAY INTERFACES

345678

2 1

D

C

B

28

28

21

21

21

21

21

21

21

21

21

21

28

28

28

28

OUT
OUT

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

OUT
OUT

OUT
OUT

0.756-0.893V @11mA MAX

14 11 6

PP_FIXED

1

2

90_MIPI_RCAM_TO_AP_DATA0_CONN_P
90_MIPI_RCAM_TO_AP_DATA0_CONN_N

90_MIPI_RCAM_TO_AP_DATA1_CONN_P
90_MIPI_RCAM_TO_AP_DATA1_CONN_N

90_MIPI_RCAM_TO_AP_DATA2_CONN_P
90_MIPI_RCAM_TO_AP_DATA2_CONN_N

90_MIPI_RCAM_TO_AP_DATA3_CONN_P
90_MIPI_RCAM_TO_AP_DATA3_CONN_N

90_MIPI_RCAM_TO_AP_CLK_CONN_P
90_MIPI_RCAM_TO_AP_CLK_CONN_N

45_RCAM_REXT

90_MIPI_AP_TO_LCM_DATA0_P
90_MIPI_AP_TO_LCM_DATA0_N

90_MIPI_AP_TO_LCM_DATA1_P
90_MIPI_AP_TO_LCM_DATA1_N

90_MIPI_AP_TO_LCM_CLK_P
90_MIPI_AP_TO_LCM_CLK_N

45_LCM_REXT

C0814

0.1UF

20%

6.3V
X5R-CERM
01005

ROOM=SOC

1

C0801

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

NC
NC

NC
NC

B8

MIPI0C_DATA0_P

A8

MIPI0C_DATA0_N

A9

MIPI0C_DATA1_P

B9

MIPI0C_DATA1_N

A13

MIPI0C_DATA2_P

B13

MIPI0C_DATA2_N

B14

MIPI0C_DATA3_P

A14

MIPI0C_DATA3_N

A12

MIPI0C_CLK_P

B12

MIPI0C_CLK_N

D12

MIPI0C_REXT

A3

MIPID_DATA0_P

B3

MIPID_DATA0_N

B4

MIPID_DATA1_P

A4

MIPID_DATA1_N

B6

MIPID_DATA2_P

A6

MIPID_DATA2_N

A7

MIPID_DATA3_P

B7

MIPID_DATA3_N

A5

MIPID_CLK_P

B5

MIPID_CLK_N

D9

MIPID_REXT

E10

E13E8D13

E7D8E11

VDD085_MIPI

OMIT_TABLE

E14

VDD18_MIPI

D10

U0600

MAUI-2GB-25NM-DDR-H

FCMSP

SC58980X0B-A040

SYM 3 OF 14

ROOM=SOC

CRITICAL

SENSOR0_ISTRB

SENSOR0_XSHUTDOWN

SENSOR1_ISTRB

SENSOR1_XSHUTDOWN

MIPICSI_MUXSEL

MIPI1C_DATA0_P

MIPI1C_DATA0_N

MIPI1C_DATA1_P

MIPI1C_DATA1_N

ISP_I2C0_SCL

ISP_I2C0_SDA

ISP_I2C1_SCL

ISP_I2C1_SDA

SENSOR0_CLK
SENSOR0_RST

SENSOR1_CLK
SENSOR1_RST

MIPI1C_REXT

MIPI1C_CLK_P
MIPI1C_CLK_N

G31
G32

F35
G34

D33
D32

F33
E34

D34
F32

C35
C34

G35
D14
B17

A17

B19
A19

A18
B18

1.62-1.98V @23mA MAX

1

C0802

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

2

1

R0804

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

PP1V8

C0815

0.1UF

20%

6.3V
X5R-CERM
01005

ROOM=SOC

1

2

R0805

1.00K

5%
1/32W
MF
01005

ROOM=SOC

29

45_AP_TO_RCAM_CLK_R
AP_TO_RCAM_SHUTDOWN_L

45_AP_TO_FCAM_CLK_R
AP_TO_FCAM_SHUTDOWN_L

NC

AP_TO_STOCKHOLM_DWLD_REQUEST

NC

AP_TO_MUON_BL_STROBE_EN

NC

45_FCAM_REXT
90_MIPI_FCAM_TO_AP_DATA0_P

90_MIPI_FCAM_TO_AP_DATA0_N

NC
NC

90_MIPI_FCAM_TO_AP_CLK_P

w w w . c h i n a f i x . c o m

90_MIPI_FCAM_TO_AP_CLK_N

1

R0806

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

21

OUT

20

OUT

2821 20 14 13 12 9 8 7 6 5 3

1

R0807

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

R0809

33.2

1 2

MF1%

01005

ROOM=SOC

33

OUT

26

OUT

20

IN

20

IN

20

IN

20

IN

PP1V8

29

I2C_ISP_TO_RCAM_SCL
I2C_ISP_BI_RCAM_SDA

I2C_ISP_TO_FCAM_SCL
I2C_ISP_BI_FCAM_SDA

R0808

33.2

1 2

MF1%

01005

ROOM=SOC

1/32W

45_AP_TO_RCAM_CLK

1/32W

45_AP_TO_FCAM_CLK

D

NOTE:VDD12_LPDP SHOULD BE POWERED

EVEN WHEN LPDP IS NOT USED

15 6 5

28 21 20 14 13 12 9 8 7 6 5 3

OUT

BI

22 21

22 21

PP1V2

E25

E27

E23

VDD12_LPDP

OMIT_TABLE

F24

C

U0600

OUT

BI

OUT

OUT

20

21

20

20

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC
NC
NC

A29

LPDP_AUX_P

B29

LPDP_AUX_N

A33

LPDP_TX0_P

B33

LPDP_TX0_N

A32

LPDP_TX1_P

B32

LPDP_TX1_N

A31

LPDP_TX2_P

B31

LPDP_TX2_N

A30

LPDP_TX3_P

B30

LPDP_TX3_N

D24

LPDP_CAL_DRV_OUT

D25

LPDP_CAL_VSS_EXT

AL4

EDP_HPD

H35

DP_WAKEUP

MAUI-2GB-25NM-DDR-H

FCMSP

SC58980X0B-A040

SYM 4 OF 14

ROOM=SOC

CRITICAL

B

R0801

4.02K

1%

1/32W

MF

01005

ROOM=SOC

1

R0802

2

4.02K

1%

1/32W

MF

01005

ROOM=SOC

1

2

1

R0803

4.02K

1%
1/32W
MF
01005

2

ROOM=SOC

A

PAGE TITLE

SOC:CAMERA & DISPLAY

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=N/ASYNC_MASTER=N/A

051-00648

4.0.0

8 OF 49
7 OF 60

A

D

SOC - GPIO & SERIAL INTERFACES

345678

2 1

D

C

B

32 16

32 16

25

25

33

33

33

22

29

28

16

33

33

33 29 28 9

33

33

33

33

24 16

33

13

29

33

33

32 16 8

33

21

R0900

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

2

R0901

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

R0902

2.2K

1/32W
01005

2

ROOM=SOC

5%
MF

1

R0903

2.2K

1/32W
01005

2

ROOM=SOC

5%
MF

1

R0904

1.33K

1/32W

2

01005

ROOM=SOC

1%
MF

1

R0905

1.33K

1/32W

2

01005

ROOM=SOC

1%
MF

PP1V8

1

2

29

28 21

20 14 13 12 9 8 7 6 5 3

D

R0920

33.2

24

OUT

C1
D2
D1

F1
E2
F3
F2

H3
G3

J1

H4

K1

J3
K2

J4

L2
K3

L3

N1
AH2
AH3
AH4

AJ1
AJ2
AJ3

AJ4
AK1
AP3
AN4
AP4
AP5
AR2
AR3
AR4
AP6

AT3

AT4
AR6
AP7

AT5
AP8
AP9

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42

MAUI-2GB-25NM-DDR-H

SC58980X0B-A040

CRITICAL

NC

IN
IN
IN

OUT
OUT
OUT
OUT
OUT
OUT
OUT

IN

OUT

3

IN

3

IN

OUT

IN
IN
IN

OUT

IN

3

IN

3

IN

3

OUT

3

IN

3

IN

IN
OUT
OUT

IN

3

IN

3

IN

3

IN

3

IN
OUT

IN

IN
OUT
OUT

BUTTON_VOL_UP_L
BUTTON_VOL_DOWN_L
SPEAKERAMP_TO_AP_INT_L

AP_TO_SPEAKERAMP_RESET_L
AP_TO_BT_WAKE
AP_TO_BB_RESET_L
PCIE_AP_TO_WLAN_DEV_WAKE
AP_TO_LED_DRIVER_EN
AP_TO_TOUCH_RESET_L
AP_TO_LCM_RESET_L
PMU_TO_AP_IRQ_L

AP_TO_STOCKHOLM_DEV_WAKE
BOARD_ID3

BOOT_CONFIG0
AP_TO_BB_WAKE_MODEM
LCM_TO_AP_HIFA_BSYNC
BB_TO_AP_HSIC_DEVICE_RDY
BB_TO_AP_GPS_TIME_MARK
AP_TO_BB_HSIC_HOST_RDY
BB_TO_AP_RESET_DETECT_L
BOOT_CONFIG1
FORCE_DFU
DFU_STATUS
BOOT_CONFIG2
BOARD_ID4
CODEC_TO_AP_PMU_INT_L
AP_TO_BB_RADIO_ON_L
AP_TO_NAND_FW_STRAP
TOUCH_TO_AP_INT_L
BOARD_REV3
BOARD_REV2
BOARD_REV1
BOARD_REV0
AP_TO_BB_COREDUMP
BB_TO_AP_IPC_GPIO
BUTTON_RINGER_A
AP_TO_BB_MESA_ON
CAM_EXT_LDO_EN

NC

NC

NC

NC

AP10

OMIT_TABLE

U0600

FCMSP

SYM 5 OF 14

ROOM=SOC

TMR32_PWM0
TMR32_PWM1
TMR32_PWM2

UART0_RXD

UART0_TXD

UART1_CTS*
UART1_RTS*

UART1_RXD

UART1_TXD

UART2_CTS*
UART2_RTS*

UART2_RXD

UART2_TXD

UART3_CTS*
UART3_RTS*

UART3_RXD

UART3_TXD

UART4_CTS*
UART4_RTS*

UART4_RXD

UART4_TXD

UART5_RTXD

UART6_RXD

UART6_TXD

UART7_RXD

UART7_TXD

AE1
AF2
AF3

AE3
AE4

K31
K32
L33
L32

AT23
AR20
AP23
AP22

N4
P3
R3
R2

J33
J34
J35
K33

T32

AF1
AE2

J31
J32

NC

AP_TO_VIBE_TRIG

NC

UART_AP_DEBUG_RXD
UART_AP_DEBUG_TXD

UART_BT_TO_AP_CTS_L
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_RXD
UART_AP_TO_BT_TXD

UART_STOCKHOLM_TO_AP_CTS_L
UART_AP_TO_STOCKHOLM_RTS_L
UART_STOCKHOLM_TO_AP_RXD
UART_AP_TO_STOCKHOLM_TXD

UART_BB_TO_AP_CTS_L
UART_AP_TO_BB_RTS_L
UART_BB_TO_AP_RXD
UART_AP_TO_BB_TXD

UART_WLAN_TO_AP_CTS_L
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_TXD

SWI_AP_BI_TIGRIS

UART_ACCESSORY_TO_AP_RXD
UART_AP_TO_ACCESSORY_TXD

NC
NC

25

OUT

45_I2S_AP_TO_CODEC_MCLK

45_I2S_AP_TO_SPEAKERAMP_MCLK

32

OUT

30

IN

30

OUT

33

IN

33

OUT

33

IN

33

OUT

33

IN

33

OUT

33

IN

33

OUT

33

IN

33

OUT

33

IN

33

OUT

33

IN

33

OUT

33

IN

33

OUT

17 9

30

30

29

27

OUT

OUT

BI

IN

OUT

SPI_AP_TO_TOUCH_SCLK

SPI_AP_TO_MESA_SCLK

01005

01005

w w w . c h i n a f i x . c o m

1 2

1/32W
01005

ROOM=SOC

R0922

33.2

1 2

1/32W

01005

ROOM=SOC

ROOM=SOC

R0960

0.00

1 2

0%

ROOM=SOC

R0930

0.00

1 2

0%

1%
MF

1%
MF

1/32W MF

1/32W MF

24 9

24 9

24 9

24

33

33

33

33

25 24

25 24

25 24

25 24

20

33

33

33

33

30 16

24

24

24

24

24 8

24 8

24 8

24

29 8

29 8

29

27

27

27

OUT
OUT

IN

OUT

OUT
OUT

IN

OUT

OUT
OUT

IN

OUT

IN
OUT
OUT

IN
OUT

IN
OUT
OUT

IN
OUT

3

IN

3

IN

3

IN

IN
OUT
OUT
OUT

IN
OUT

OUT

IN
OUT

IN

45_I2S_AP_TO_CODEC_MCLK_R
45_I2S_AP_OWL_TO_CODEC_XSP_BCLK
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
I2S_CODEC_TO_AP_OWL_XSP_DIN
I2S_AP_TO_CODEC_XSP_DOUT

45_I2S_AP_TO_BT_BCLK
I2S_AP_TO_BT_LRCLK
I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_DOUT

45_I2S_AP_TO_SPEAKERAMP_MCLK_R
45_I2S_AP_TO_CODEC_ASP_BCLK
I2S_AP_TO_CODEC_ASP_LRCLK
I2S_CODEC_TO_AP_ASP_DIN
I2S_AP_TO_CODEC_ASP_DOUT

ALS_TO_AP_INT_L
45_I2S_AP_TO_BB_BCLK
I2S_AP_TO_BB_LRCLK
I2S_BB_TO_AP_DIN
I2S_AP_TO_BB_DOUT

TRISTAR_TO_AP_INT
45_I2S_AP_TO_CODEC_MSP_BCLK
I2S_AP_TO_CODEC_MSP_LRCLK
I2S_CODEC_TO_AP_MSP_DIN
I2S_AP_TO_CODEC_MSP_DOUT

BOARD_ID2
BOARD_ID1
BOARD_ID0

SPI_CODEC_TO_AP_MISO
SPI_AP_TO_CODEC_MOSI
SPI_AP_TO_CODEC_SCLK
SPI_AP_TO_CODEC_CS_L

SPI_TOUCH_TO_AP_MISO
SPI_AP_TO_TOUCH_MOSI
SPI_AP_TO_TOUCH_SCLK_R
SPI_AP_TO_TOUCH_CS_L

SPI_MESA_TO_AP_MISO
SPI_AP_TO_MESA_MOSI
SPI_AP_TO_MESA_SCLK_R
MESA_TO_AP_INT

NC

NC

P34
R34
N34
N35

M33

M4
M3

P1
N3

L4

U32
V33
U33

T33

V34

AM3
AM4

AN2
AP1
AN1

R32
R31
V32
P31
P32

AD4
AC3
AB2
AD3

P33
V35
N32

M31

E33
E35

F34
F31

AA2

Y2
AA3
AC4

I2S0_MCK
I2S0_BCLK
I2S0_LRCK
I2S0_DIN
I2S0_DOUT

I2S1_MCK
I2S1_BCLK
I2S1_LRCK
I2S1_DIN
I2S1_DOUT

I2S2_MCK
I2S2_BCLK
I2S2_LRCK
I2S2_DIN
I2S2_DOUT

I2S3_MCK
I2S3_BCLK
I2S3_LRCK
I2S3_DIN
I2S3_DOUT

I2S4_MCK
I2S4_BCLK
I2S4_LRCK
I2S4_DIN
I2S4_DOUT

SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN

SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN

SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN

SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN

OMIT_TABLE

U0600

FCMSP

SC58980X0B-A040

SYM 6 OF 14

MAUI-2GB-25NM-DDR-H

ROOM=SOC

CRITICAL

SEP_SPI0_SCLK
SEP_SPI0_MISO
SEP_SPI0_MOSI

SEP_I2C_SCL

SEP_I2C_SDA

CPU_ACTIVE_STATUS

CLK32K_OUT

NAND_SYS_CLK

I2C0_SCL
I2C0_SDA

I2C1_SCL
I2C1_SDA

I2C2_SCL
I2C2_SDA

SEP_GPIO0
SEP_GPIO1

SOCHOT0

SOCHOT1

BUTTON PULL-UP RESISTORS AND BUFFERS

E31
D35

AH1
AG4

L31
M32

W3
AA4
U2

V3
Y4

Y3
AB4

NC
NC
NC

NC
NC

R0906

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

R0907

2

ROOM=SOC

2.2K

5%

1/32W

MF

01005

R0941

1/32W
01005

ROOM=SOC

PP1V8

1

2

29

I2C_SEP_TO_EEPROM_SCL
I2C_SEP_BI_EEPROM_SDA

PP1V8_ALWAYS

PP1V8

NOSTUFF

10K

5%
MF

1

2

R0910

ROOM=SOC

10K

5%

1/32W

MF

01005

1

2

1

R0909

10K

5%
1/32W
MF
01005

2

ROOM=SOC

ROOM=SOC

I2C0_AP_SCL
I2C0_AP_SDA

I2C1_AP_SCL
I2C1_AP_SDA

I2C2_AP_SCL
I2C2_AP_SDA

28 21 20 14 13 12 9 8 7 6 5 3

8

OUT

8

BI

17 15 12 8

29

28 21 20 14 13 12 9 8 7 6 5 3

R0940

AM1

PMU_TO_AP_SOCHOT0_R_L PMU_TO_AP_SOCHOT0_L

AM2

H31

NC

H34

AM24

45_AP_TO_TOUCH_CLK32K_RESET_L

AP_TO_NAND_SYS_CLK_R

OUT

0.00

1 2

MF0%

01005

29

1/32W

AP_TO_PMU_SOCHOT1_L

R0945

0.00

1 2

0%

1/32W

MF

01005

ROOM=SOC

AP_TO_NAND_SYS_CLK

OUT

OUT

BI

OUT

BI

OUT

BI

13

26 16 8

26 16 8

30 25 17 8

30 25 17 8

20 8

20 8

C

16

IN

16

OUT

B

A

28 21 20 14 13 12 9 8 7 6 5 3

29

PP1V8

ANTI-ROLLBACK EEPROM

128kbit

APN:335S0946

1

C0900

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=SOC

U0900

M34128-FCS6_P/T

B1 A2

SCL

CRITICAL

A1B2

ROOM=SOC

VCCVSS

WLCSP

SDA

I2C_SEP_BI_EEPROM_SDA
I2C_SEP_TO_EEPROM_SCL

PP1V8_SDRAM

1

R0951

100K

5%
1/32W
MF
01005

2

ROOM=SOC

32 16 8

27

IN

8

BI

8

IN

32

IN

BUTTON_RINGER_A

BUTTON_MENU_KEY_L

BUTTON_HOLD_KEY_L

1

R0950

392K

1%
1/32W
MF
01005

2

1

R0952

392K

1%
1/32W
MF
01005

2

PP1V8_SDRAM

U0901

74LVC1G34GX

5

SOT1226

2

1

NC

4

3

PP1V8_ALWAYS

U0902

74LVC1G34GX

5

SOT1226

2

NC NC

1

NC

4

3

BUTTON_MENU_KEY_BUFF_L

17 15 12 8

BUTTON_HOLD_KEY_BUFF_L

33 30 26 24 17 16 15 14 12 8

ROOM=SOC

PP0906

P2MM-NSM

SM

1

SPI_TOUCH_TO_AP_MISO

PP

ROOM=SOC

I2C PROBE POINTS

33 30 26 24 17 16 15 14 12 8

ROOM=SOC

P3MM-NSM

SM

1

PP

1

PP

SM

P3MM-NSM

ROOM=SOC

ROOM=SOC

P3MM-NSM

SM

1

PP

1

PP

SM

P3MM-NSM

ROOM=SOC

ROOM=SOC

P3MM-NSM

SM

1

PP

1

PP

SM

P3MM-NSM

ROOM=SOC

PP0900
PP0901

PP0902
PP0903

PP0904
PP0905

OUT

OUT

26 16 8

26 16 8

16 9

30 25 17 8

30 25 17 8

16 9

I2C0_AP_SCL
I2C0_AP_SDA

I2C1_AP_SCL
I2C1_AP_SDA

20 8

20 8

I2C2_AP_SCL
I2C2_AP_SDA

PP0907

P2MM-NSM

SM

1

SPI_AP_TO_TOUCH_MOSI

PP

SYNC_MASTER=N/A

PAGE TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SPI PROBE POINTS

ROOM=SOC

PP0908

P2MM-NSM

SM

1

29 8

ROOM=SOC

SPI_CODEC_TO_AP_MISO

PP

PP0909

P2MM-NSM

SM

1

29 8

ROOM=SOC

SPI_AP_TO_CODEC_MOSI

PP

PP09010

P2MM-NSM

SM

1

SPI_AP_TO_CODEC_SCLK

PP

SOC:SERIAL & GPIO

DRAWING NUMBER SIZE

Apple Inc.

R

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=N/A

051-00648

4.0.0

9 OF 49
8 OF 60

24 8

24 8

24 8

A

D

8 7 5 4 2 1

36

.

D

SOC - OWL

345678

2 1

POWER STATE CONTROL PROBE POINTS

ROOM=SOC

P3MM-NSM

SM

16 9

30 26 16 9 5

16 9

16 11 9

OWL_TO_PMU_ACTIVE_REQUEST

PMU_TO_OWL_ACTIVE_READY

OWL_TO_PMU_SLEEP1_REQUEST

PMU_TO_OWL_SLEEP1_READY

1

PP

ROOM=SOC

P3MM-NSM

SM

1

PP

ROOM=SOC

P3MM-NSM

SM

1

PP

ROOM=SOC

P3MM-NSM

SM

1

PP

PP1020

PP1021

PP1022

PP1023

D

C

B

16 9

16 11 9

19 9

19

19

19

19 9

19

33 29 28 8

19 9

19

19 9

19 9

19 9

33

33

33

33

24 8

24 8

24 8

OUT

IN

OUT

IN
IN
IN

OUT

IN

IN

OUT

IN

IN
OUT
OUT

IN
OUT

OUT
OUT

OUT

IN

OUT

OWL_TO_PMU_SLEEP1_REQUEST
PMU_TO_OWL_SLEEP1_READY

SPI_OWL_TO_COMPASS_CS_L
COMPASS_TO_OWL_INT

ACCEL_TO_OWL_INT2_R

ACCEL_GYRO_TO_OWL_INT1
SPI_OWL_TO_ACCEL_GYRO_CS_L
ACCEL_GYRO_TO_OWL_INT2

LCM_TO_AP_HIFA_BSYNC
OWL_TO_PMU_SHDN_BI_TIGRIS_SWI

9

SPI_OWL_TO_DISCRETE_ACCEL_CS_L
ACCEL_TO_OWL_INT1_R

SPI_IMU_TO_OWL_MISO
SPI_OWL_TO_IMU_MOSI
SPI_OWL_TO_IMU_SCLK

UART_BB_TO_OWL_RXD
UART_OWL_TO_BB_TXD

OWL_TO_WLAN_CONTEXT_B
OWL_TO_WLAN_CONTEXT_A

45_I2S_AP_OWL_TO_CODEC_XSP_BCLK
I2S_CODEC_TO_AP_OWL_XSP_DIN

I2S_AP_OWL_TO_CODEC_XSP_LRCLK

OMIT_TABLE

U0600

MAUI-2GB-25NM-DDR-H

FCMSP

SC58980X0B-A040

NC

NC

NC
NC

NC

AD30
AB33

AF35
AH32
AG32
AG31
AG30

AF33
AE34

AF34

AF31

AF32
AH31

AH33
AK31

AK32

AL33

AJ32

AK33
AH30

AJ31
AJ34

AJ33

AD34
AA34
AE32
AE31

OWL_DDR_REQ
OWL_DDR_RESET*

OWL_FUNC_0
OWL_FUNC_1
OWL_FUNC_2
OWL_FUNC_3
OWL_FUNC_4
OWL_FUNC_5
OWL_FUNC_6
OWL_FUNC_7
OWL_FUNC_8
OWL_FUNC_9

OWL_I2CM_SCL
OWL_I2CM_SDA

OWL_SPI_MISO
OWL_SPI_MOSI
OWL_SPI_SCLK

OWL_UART0_RXD
OWL_UART0_TXD

OWL_UART1_RXD
OWL_UART1_TXD

OWL_UART2_RXD
OWL_UART2_TXD

OWL_I2S_BCLK
OWL_I2S_DIN
OWL_I2S_MCK
OWL_I2S_LRCK

SYM 7 OF 14

ROOM=SOC

CRITICAL

CFSB_AOP

AWAKE_REQ

AWAKE_RESET*

PMGR_MISO
PMGR_MOSI

PMGR_SCLK0

PMGR_SSCLK1

RT_CLK32768

OWL_SWD_TCK_OUT

OWL_SWD_TMS0
OWL_SWD_TMS1

SWD_TMS2
SWD_TMS3

HOLD_KEY*

SKEY*

MENU_KEY*

W33
AA33

AD32
AL2

AL1
AK4
AL3

AD31
AE33

AD35
AC33
U31
T31

U3
W4
V4

PMU_TO_SYSTEM_COLD_RESET_L

OWL_TO_PMU_ACTIVE_REQUEST
PMU_TO_OWL_ACTIVE_READY

DWI_PMU_TO_PMGR_MISO
45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI
45_DWI_PMGR_TO_PMU_SCLK
45_DWI_PMGR_TO_BACKLIGHT_SCLK

PMU_TO_OWL_CLK32K

SWD_AP_PERIPHERAL_SWCLK

NC

SWD_AP_BI_BB_SWDIO
SWD_AP_BI_NAND_SWDIO

NC

BUTTON_HOLD_KEY_BUFF_L

NC

BUTTON_MENU_KEY_BUFF_L

w w w . c h i n a f i x . c o m

IN

OUT

IN

IN

OUT
OUT

IN

OUT

BI

IN

IN

16

16

26

16

33

16 5 3

16 9

30 26 16 9 5

33 13

16 8

16 8

1

1

1

SM

PP

SM

PP

OUT

SM

PP

PP1003

P2MM-NSM

PP1002

P2MM-NSM

26 16

PP1004

P2MM-NSM

1

R1002

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

PP1V8

C

29 28 21 20 14 13 12 8 7 6 5 3

13

BI

B

A

PP1005

P2MM-NSM

PP1006

P2MM-NSM

PP1007

P2MM-NSM

PP1008

P2MM-NSM

PP1009

P2MM-NSM

PP1010

P2MM-NSM

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

SM

PP

1

SPI_OWL_TO_IMU_MOSI

19 9

OWL SYSTEM SHUTDOWN OPTION

1

1

1

1

1

SPI_OWL_TO_DISCRETE_ACCEL_CS_L

SPI_OWL_TO_ACCEL_GYRO_CS_L

SPI_OWL_TO_COMPASS_CS_L

SPI_IMU_TO_OWL_MISO

SPI_OWL_TO_IMU_SCLK

19 9

NOSTUFF

R1020

19 9

19 9

19 9

19 9

OWL_TO_PMU_SHDN_BI_TIGRIS_SWI

9

10

1 2

5%

ROOM=SOC

NOSTUFF

R1021

10

1 2

5%MF

ROOM=SOC

1/32W
01005MF

1/32W
01005

SWI_AP_BI_TIGRIS

OWL_TO_PMU_SHDN

BI

OUT

16

17 8

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

A

SOC:OWL

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

10 OF 49

SHEET

9 OF 60

D

8 7 5 4 2 1

36

345678

2 1

D

C

B

A

SOC - CPU, GPU & SOC RAILS

PP_GPU

14 10

0.8V @10.5A MAX

TP1120

0.50MM

SM

1

SM

PP

PP_GPU

1

PP_CPU

PP

PP_CPU

14 10

0.625V @TBDA MAX

0.9V @10.5A MAX

1.0V @12.5A MAX

TP1100

0.50MM

PP_SOC

14

0.825V @4.7A MAX

1

AA17
AA19
AA23
AB14
AB16

1

C1100

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

14 10

ROOM=SOC

C1106

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1112

1UF

20%

4V
CERM
0402

1

234

1

C1120

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

14 10

ROOM=SOC

C1126

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1132

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1138

0.47UF

20%

6.3V
CERM
0402

1

234

1

C1101

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

ROOM=SOC

C1107

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1113

1UF

20%

4V
CERM
0402

1

234

1

C1121

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

ROOM=SOC

C1127

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1133

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1139

0.47UF

20%

6.3V
CERM
0402

1

234

ROOM=SOC

C1108

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1114

1UF

20%

4V
CERM
0402

1

234

1

C1122

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1128

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1134

1UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1140

0.47UF

20%

6.3V
CERM
0402

1

234

14

OUT

1

C1103

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1109

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1115

1UF

20%

4V
CERM
0402

1

234

1

C1123

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1129

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1135

1UF

20%

4V
CERM
0402

1

234

ROOM=SOC

1

C1104

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1110

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1116

0.47UF

20%

6.3V
CERM
0402

1

234

ROOM=SOC

C1130

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1136

1UF

20%

4V
CERM
0402

1

234

C1141

0.47UF

20%

6.3V
CERM
0402

1

234

45_BUCK0_PP_CPU_FB

PP1100

P2MM-NSM

PP1101

P2MM-NSM

1

C1105

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1111

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1117

0.47UF

20%

6.3V
CERM
0402

1

234

1

C1125

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1131

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1137

1UF

20%

4V
CERM
0402

1

234

XW1100

SHORT-10L-0.1MM-SM

12

ROOM=SOC

SM

1

PP

ROOM=SOC

SM

1

PP

ROOM=SOC

AP_CPU_SENSE_P
AP_CPU_SENSE_N

XW1110

SHORT-10L-0.1MM-SM

ROOM=SOC

AA7
AA9

AA11

AB6
AB10
AB12
AC13

AD6

AD8
AD10
AD12

AE7

AE9
AE11
AE13

AF8
AF10
AF12

AH6

AH8
AH10
AH12

AJ5
AJ7

AJ9
AJ11
AJ13

AK6

AK10

AL7

AL9

AL11

AM6
AM8

AM10

AN7

AN11

AL13

Y8
Y10
Y12

AM12

Y6

Y7

1 2

VDD_CPU

VDD_CPU_SENSE
VSS_CPU_SENSE

45_BUCK1_PP_GPU_FB

PP1102

P2MM-NSM

PP1103

P2MM-NSM

OMIT_TABLE

U0600

MAUI-2GB-25NM-DDR-H

FCMSP

SC58980X0B-A040

SYM 8 OF 14

ROOM=SOC

CRITICAL

w w w . c h i n a f i x . c o m

VDD_GPU_SENSE

VSS_GPU_SENSE

SM

1

PP

ROOM=SOC

SM

PP

ROOM=SOC

AP_GPU_SENSE_N

1

AP_GPU_SENSE_P

OUT

VDD_GPU

16 14

G15
W13
T12
M6
U9
V12
W9
M12
M18
N15
N21
N9
F10
H14
H16
H20
H22
H6
H8
J11
J13
J17
J19
J23
J7
K10
K14
K16
K20
K22
K6
K8
L11
L13
L15
L17
L19
L21
M24
L7
L9
F8

M8
N11
N13

N17
N19
P10
G11
P12
P14
P16

P20
R15

R19
G13
R9
T10
T14

T16
U11
V14

V16
G7
R23
G9
H10
T24
P22

W17

N23
G17
G21
T18

T20

G20

H19

AB20
AB22
AB24
AB26
AC17
AC19
AC23
AD16
AD20
AD22
AD24
AD26

AE5
AE15
AE17
AE19
AE23
AF14
AF16
AF20
AF22
AF24
AF26

AG17
AG19
AG23
AH16
AH20
AH22
AH24
AH26

AJ15
AJ17
AJ19
AJ23

AK14

J29

G23
AK22

F14

AL15

AM5

G25

G27

H24
H26
H28

J27
K24
K26
K28

L27

L23
M26
M28

AL19

N27
P24
P26
P28
R17
R27
R29

T22

T26

T28

U17

V20
V22
V24
V26

W11

Y28

AJ20

AK21

VDD_SOC

F6

N7

T7

V8

W7

VDD_SOC_SENSE
VSS_SOC_SENSE

AP_SOC_SENSE_N

AP_SOC_SENSE_P

MAUI-2GB-25NM-DDR-H

SC58980X0B-A040

CRITICAL

OMIT_TABLE

U0600

FCMSP

SYM 9 OF 14

ROOM=SOC

ROOM=SOC

ROOM=SOC

W23
Y14
Y16
Y20
Y22
Y24
Y26

VDD_SOC

VSS

SM

1

1

PP1104

PP

P2MM-NSM

SM

PP1105

PP

P2MM-NSM

G29
AA27
F17
F20
L29
N29
V28

L22
L24
L26
L28
M1
M5
M7
M9
M11
M13
M17
M21
M23
M25
M27
M29
M35
N6
N10
N12
N14
N16
N18
G19
N22
N24
N26
N28
N30
N33
P9
P11
P13
P15
P17
P19
P21
P23
P25
P27
P29
P35
R4
R6
R8
R10
R12
R14
M19
R18
R20
R22
R24
R26
R28
R30
T1
T2
R33
T9
T11
T13
T15
T17
P7
T23
T25
T27
T30
T35
U6
U10
U12

C1150

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

ROOM=SOC

C1153

4.3UF

20%

4V
CERM
0402

1

234

1

C1151

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

ROOM=SOC

C1154

1UF

20%

4V
CERM
0402

1

234

XW1120

SHORT-10L-0.1MM-SM

1 2

ROOM=SOC

ROOM=SOC

C1155

1UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1156

1UF

20%

4V
CERM
0402

1

234

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

0.725V @TBDA MAX

45_BUCK2_PP_SOC_FB

ROOM=SOC

OUT

C1157

0.47UF

20%

6.3V
CERM
0402

1

234

SOC:POWER (1/3)

DRAWING NUMBER SIZE

Apple Inc.

051-00648

REVISION

BRANCH

PAGE

SHEET

14

D

C

B

A

D

4.0.0

11 OF 49
10 OF 60

8 7 5 4 2 1

36

D

C

B

SOC - POWER SUPPLIES

1.06 - 1.17V @635mA MAX
INTERNALLY SUPPLIES VDDQ

PP1V1

14 11

1

C1240

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

1

C1241

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1242

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1245

4.3UF

1

0.802-TBDV @1.1A MAX

14 7 6 14

PP_FIXED

1

C1200

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

ROOM=SOC

C1201

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1202

1UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1203

0.47UF

20%

6.3V
CERM
0402

1

234

AA15
AA21
AA25

AB18
AC15
AC21
AC25
AD14
AD18
AE21
AE25

AF18
AG15
AG21
AH25
AH14
AH18

AJ21

AK16

F12

G10

V18

AL17

J25

L25
N25
R25

R7

AN6

U25

W15
W21
W25

Y18

F21

F26

AB28
AC27

G18

AK20

F16
R16

T8

V7

U19

W27

U27
AF4

AF27

U21

MAUI-2GB-25NM-DDR-H

SC58980X0B-A040

SYM 10 OF 14

CRITICAL

VDD_FIXED

OMIT_TABLE

U0600

FCMSP

ROOM=SOC

VDD_CPU_SRAM

VDD_GPU_SRAM

AC11
AC7
AC9
AA13
AG11
AG7
AG9
AK12

H12
H18
R21
U15
J15
J21
J9
K12
K18
M10
M14
M16
M20
P18
R11
R13
U13
V10
M22

ROOM=SOC

C1220

0.47UF

20%

6.3V
CERM
0402

1

234

ROOM=SOC

C1224

0.47UF

20%

6.3V
CERM
0402

1

234

ROOM=SOC

C1228

4.3UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1221

1UF

20%

4V
CERM
0402

1

234

ROOM=SOC

C1225

1UF

20%

4V
CERM
0402

1

234

w w w . c h i n a f i x . c o m

20%

4V
CERM
0402

234

C1222

1

C1226

1

1

C1243

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

4.3UF

20%

4V
CERM
0402

234

ROOM=SOC

4.3UF

20%

4V
CERM
0402

234

ROOM=SOC

C1246

1

1UF

20%

4V
CERM
0402

234

1

C1244

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1247

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=SOC

1

2

0.8V @TBDA MAX

0.9V @TBDA MAX

1.0V @1.0A MAX

PP_CPU_SRAM

1

C1223

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

0.8V @0.5A MAX

PP_GPU_SRAM

1

C1227

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

C1248

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=SOC

1

2

14

C1249

1.0UF

20%

6.3V
X5R
0201-1

ROOM=SOC

A20
A22
B11
B15
B23
B25
D16
D20
D22
E15
E17
E19
E21

AN19
AR18
AR21

AR8
AT13
AT16

AM14
AM16
AM18
AM20

AR15
AN13
AN15

AB29

V29
Y29
Y35

AB35

AG34

M34

R35
T29
T34

AA30

U30

AC30

AA1

AC2

V6

W2

H2

M2

U5
P6
T6
U1
N5
R5

W5

VDDIO11_DDR0

VDDIO11_DDR1

VDDIO11_DDR2

VDDIO11_DDR3

345678

OMIT_TABLE

U0600

MAUI-2GB-25NM-DDR-H

FCMSP

SC58980X0B-A040

SYM 11 OF 14

ROOM=SOC

CRITICAL

DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF

DDR0_ZQ
DDR3_ZQ

DDR0_RET*
DDR1_RET*
DDR2_RET*
DDR3_RET*

VDDIO11_PLL_DDR

VDDIO11_RET_DDR

DDR0_SYS_ALIVE
DDR1_SYS_ALIVE
DDR2_SYS_ALIVE
DDR3_SYS_ALIVE

14 11

C21
AP17
V31
P5

B21
P2

C18
AP15
Y31
U4

F19
AK18
W26
P8

D19
AN17
W31
T4

C19
AP16
W32
T3

2 1

DDR IMPEDANCE CONTROL

PP1V1

1

R1200

240

1%
1/32W
MF
01005

2

ROOM=SOC

45_DDR0_RREF
45_DDR1_RREF
45_DDR2_RREF
45_DDR3_RREF

45_DDR0_ZQ
45_DDR3_ZQ

PMU_TO_OWL_SLEEP1_READY

1.1V @7mA MAX

45_PP1V1_DDR_PLL

1

C1280

0.22UF

20%

6.3V

2

X5R
01005-1

ROOM=SOC

PP1V1_SDRAM

1.06 - 1.17V

SYSTEM_ALIVE

D

1

R1201

240

1%
1/32W
MF
01005

2

ROOM=SOC

1

R1202

240

1%
1/32W
MF
01005

2

ROOM=SOC

IN

1

R1203

2

16 9

FL1280

100OHM-25%-0.12A

1 2

01005

ROOM=SOC

240

1%
1/32W
MF
01005

ROOM=SOC

1

2

PP1V1

R1204

240

1%
1/32W
MF
01005

ROOM=SOC

1

R1205

240

1%
1/32W
MF
01005

2

ROOM=SOC

14 11

C

15 14 12

IN

17 16 13

B

A

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

0.756-TBDV @44mA MAX

PP0V8_OWL

15

1

C1250

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=SOC

8 7 5 4 2 1

AH29
AD29

AF29

VDD_LOW

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36

SOC:POWER (2/3)

Apple Inc.

R

DRAWING NUMBER SIZE

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

12 OF 49
11 OF 60

A

D

345678

2 1

D

C

B

A

A1

A2
A11
A16
A21
A24
A25
A27
A34
A35

AA6

AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA24
AA26

N8
AA28
AA35

AB1
C17
AB3
AB5
AB7

AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AB27
AB30

AC1

AC6

AC8
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AC26

T5
AC28
AC34
AC35

AD5
AD7

AD9
AD11
AD15
AD17
AD19
AD21
AD23
AD25
AD27
AD33

AE6

AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE22
AE24
AE26
AE29
AE30
AE35

AF5

AF7

AF9
AF11
AF15
AF17
AF19
AF21

OMIT_TABLE

U0600

MAUI-2GB-25NM-DDR-H

FCMSP

SC58980X0B-A040

SYM 13 OF 14

ROOM=SOC

CRITICAL

AF23
AF25
AF30
AG1
AG2
AG3
AG6
AG8
AG10
AG14
AG16
AG18
AG20
AG22
AG24
U7
AG29
AG33
AG35
AH5
AH7
AH9
AH11
AH13
AH15
AH17
AH19
AH21
AH23
AH27
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
W8
AJ22
AG12
AK24
AJ28
AK2
AK3
AK5

VSSVSS

AK7
AK9
AK11
AK13
AK15
B28
AK17
M15
AP28
AK26
AK30
AK34
AK29
AL6
AL8
AL10
AL12
AF28
AL14
AM29
AL16
AR27
AL18
Y30
AL20
AL25
AL28
AL30
AL31
AM7
AM9
AM11
AM13
AM15
AM17
AM19
AM21
AM33
AM34
AM35
AN3
AN5
AN16
AN8
AN10

AN12
AN14
AN18
AN29
AN33

AP2
AP13
AP14
AP20
AP25
AP26
AP27
AP30
AP31
AP32
AP33

AR1
AR5

AR9
AR14
AR16
AR25
AR34
AR35

AT1
AT2
AT6
AT8

AT9
AT14
AT17
AT18
AT21
AT25
AT34
AT35

B1

B2
B16
B20
B22
B24
B27
B34
B35

C2

C3

C4

C5

C6

C7

C8

C9
C10
C11
C12
C13
C14
C20
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33

D3

D4

D5

D6
D11
D17
D21
D23
D26
D27
D28
D29
D30

E1

E3

E4

E5

D7

E9

MAUI-2GB-25NM-DDR-H

SC58980X0B-A040

VSS VSS

OMIT_TABLE

U0600

FCMSP

SYM 14 OF 14

ROOM=SOC

CRITICAL

E12
E16
E18
E20
E22
E24
E26
E29
E32
F4
F5
F7
F9
F11
F13
F15
F18
D18
F23
E30
F25
F27
F28
F29
G4
G5
G6
G8
G12
G14
G16
E6
G22
G24
G26
G28
G33
H1
H7
H9
H11
H13
H15
H17
E28
H21
H23
H25
H27
H29
J2
J5
J6
J30
J8
J10
J12
J14
J16
J18
J20
J22
J24
J26
J28
K7
K9
K11
K13
K15
K17
K19
K21
K23
K25
K27
K29
K34
K35
L1
L5
L6
K4
L8
L10
L12
L14
L16
L18
L20

SOC - POWER SUPPLIES

1.70-1.95V @100mA(TBD) MAX

33 30 26 24 17 16 15 14 8

PP1V8_SDRAM

1

C1300

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1301

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1302

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1.06-1.17V @1.3A(TBD) MAX

15 14 11

PP1V1_SDRAM

1

C1310

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

1

C1312

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1313

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1316

1UF

20%

4V
CERM
0402

1

234

1

C1314

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

ROOM=SOC

C1317

1UF

20%

4V
CERM
0402

1

234

1.62-1.98V @41mA MAX

28

21 20 14 13 12 9 8 7 6 5 3

PP1V8

29

1

C1320

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

1

C1321

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1322

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

1

C1323

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

VDDIO18_GRP10:1.62-1.98V @8mA MAX
VDDIO18_LPOSC:1.62-1.98V @1mA MAX

19 14

17 15 8

28 21 20 14 13 12 9 8 7 6 5 3

PP1V8_IMU_OWL

PP1V8_ALWAYS

PP1V8

29

VDD18_FMON :1.62-1.98V @1mA MAX
VDD18_UVD :1.62-1.98V @5mA MAX
VDD18_AMUX :1.62-1.98V @1mA MAX
VDD18_TSADC:1.645-1.89V @2mA MAX

1.62-1.98V @1mA MAX

1

C1330

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SOC

w w w . c h i n a f i x . c o m

A10
A26

AD1

AH35

AT22

AT7

G1

L35

A15
A23

AB34

AD2
AH34
AR13
AR17
AR22

AR7

AT15

B10
B26

G2

L34

N2
R1

U34

V2

W35

F30
H30
K30

M30

N31
P30

H5

K5
AN9
AA5
AC5
AG5

AL5

AM23

AE28

AG28

Y5

AG26
AM22

AD13
AN24

AG13

AK8
AB8

N20
U23

AK23

MAUI-2GB-25NM-DDR-H

VDD1

VDD2

VDDIO18_GRP1

VDDIO18_GRP2

VDDIO18_GRP3

VDDIO18_GRP4

VDDIO18_GRP10

VDDIO18_GRP11
VDD18_LPOSC

VDD18_FMON
VDD18_UVD
VDD18_AMUX

VDD18_TSADC

OMIT_TABLE

U0600

FCMSP

SC58980X0B-A040

SYM 12 OF 14

ROOM=SOC

CRITICAL

(OWL)
(AON)

VSS

U14
U16
U18
U22
U24
U26
U28
U35
V1
V5
AA29
U29
V9
V11
V13
V15
V17
V19
V21
V23
V25
V27
W30
W1
W6
W10
W12
W14
W16
W18
W20
W22
W24
W28
W29
W34
Y1
Y9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
Y27
Y34
AC29
AD28
AE27
AG27
AJ30
AJ35
AK19
AT27
D31
G30
L30
P4
U8
V30
A28
AL32
T21

PAGE TITLE

SOC:POWER (3/3)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=N/ASYNC_MASTER=N/A

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

13 OF 49

SHEET

12 OF 60

D

C

B

A

8 7 5 4 2 1

36

D

S3E NAND

28 21 20 14 13 12 9 8 7 6 5 3

PP1V8

29

R1530

24.9

1 2

1%

1/32W

MF

01005

ROOM=NAND

PP1V8_NAND_AVDD

NAND_AGND

13

1

C1530

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=NAND

1

C1531

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=NAND

345678

2 1

D

C

B

15

28 21 20 14 13 12 9 8 7 6 5 3

PP0V9_NAND

PP1V8

29

1

C1520

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1560

0.01UF

10%

2

6.3V
X5R
01005

ROOM=NAND

1

C1561

0.01UF

10%

2

6.3V
X5R
01005

ROOM=NAND

1

C1521

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

NOSTUFF

1

R1560

10K

1%
1/32W
MF
01005

2

ROOM=NAND

1

R1561

10K

1%
1/32W
MF
01005

2

ROOM=NAND

NOSTUFF

1

C1548

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

C1522

1

10UF

20%

6.3V
CERM-X5R

2

0402-9

ROOM=NAND

1

C1527

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=NAND

1

C1540

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1546

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

R1501

3.01K

1%
1/20W
MF
201

2

ROOM=NAND

1

C1524

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=NAND

1

C1528

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=NAND

1

2

1

2

C1541

15UF

20%

6.3V
X5R
0402-1

ROOM=NAND

C1550

0.1UF

20%

6.3V
X5R-CERM
01005

ROOM=NAND

1

C1525

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

8

13 6

13 6

6

13 6

13 6

13 6

13 6

6

6

6

6

5

IN

IN
IN

OUT

IN
IN

IN
IN

OUT
OUT

OUT
OUT

IN

1

C1542

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=NAND

1

C1551

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=NAND

1

C1526

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

1

2

1

2

1

C1523

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

C1543

10UF

20%

6.3V
CERM-X5R
0402-9

ROOM=NAND

C1554

1000PF

10%

6.3V
X5R-CERM
01005

ROOM=NAND

NAND_VREF
AP_TO_NAND_SYS_CLK

90_PCIE_AP_TO_NAND_REFCLK_P
90_PCIE_AP_TO_NAND_REFCLK_N

PCIE_NAND_TO_AP_CLKREQ_L
45_PCIE_NAND_RESREF
90_PCIE_AP_TO_NAND_TXD0_P

90_PCIE_AP_TO_NAND_TXD0_N
90_PCIE_AP_TO_NAND_TXD1_P

90_PCIE_AP_TO_NAND_TXD1_N
90_PCIE_NAND_TO_AP_RXD0_P

90_PCIE_NAND_TO_AP_RXD0_N
90_PCIE_NAND_TO_AP_RXD1_P

90_PCIE_NAND_TO_AP_RXD1_N

AP_TO_NAND_RESET_L

45_NAND_ZQ

1

C1509

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

M4

J5

J7M6K4

PCI_VDD1

PCI_AVDD_H

PCI_AVDD_CLK1

PCI_AVDD_CLK2

C3

K6

AVDD1

PCI_VDD2

A3A7F2J1J9R3R7

E5

VDD

VDD

VDD

VREF

VDD

THGBX5G7D2KLFXG

VDD

VDD

VDD

U1500

A5

OB0

VDDIO

VDDIO

OB10

OF0

VDDIO

VDDIO

OF10

R5

VDDIO

VDDIO

OA0

VCC

OA10

OD0

VCC

OD10

VCC

OG0

VCC

OG10

VCC

VCC

WLGA

D2

CLK_IN

H8

PCIE_REFCLK_P

H6

PCIE_REFCLK_M

G9

PCIE_CLKREQ*
PCI_RESREF

M8

PCIE_RX0_P

K8

PCIE_RX0_M

N5

PCIE_RX1_P

N3

PCIE_RX1_M

P8

PCIE_TX0_P

N7

PCIE_TX0_M

w w w . c h i n a f i x . c o m

M2

PCIE_TX1_P

K2

PCIE_TX1_M

F8

RESET*

D8
D6

TRST*
ZQ

NC

BOMOPTION=OMIT_TABLE

VER-1

ROOM=NAND

CRITICAL

EXT_D0
EXT_D1
EXT_D2
EXT_D3
EXT_D4
EXT_D5
EXT_D6

EXT_D7
EXT_NCE
EXT_NRE

EXT_NWE

EXT_RNB

EXT_CLE

EXT_ALE

G3
J3
H2
E3
E7
F6
C7
B8

G1
F4
C5
G5
H4
D4

PMU_TO_NAND_LOW_BATT_BOOT_L
AP_TO_NAND_FW_STRAP

NC
NC
NC
NC
NC

SYSTEM_ALIVE
PCIE_AP_TO_NAND_RESET_L
SWD_AP_BI_NAND_SWDIO_R
SWD_AP_NAND_SWCLK_R

NC
NC

1

C1500

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1504

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1507

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

1

C1501

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1506

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1508

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

1

C1502

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1505

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1510

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

1

C1503

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

PP3V0_NAND

15

C

16

IN

8

IN

ROOM=NAND

P3MM-NSM

SM

1

IN

IN

17 16 11

6

R1520

0.00

1 2

MF

01005

ROOM=NAND

R1521

0.00

1 2

01005

ROOM=NAND

1

P3MM-NSM

ROOM=NAND

PP1520

PP

1/32W0%

1/32WMF0%

PP1521

PP

SM

SWD_AP_BI_NAND_SWDIO

SWD_AP_PERIPHERAL_SWCLK

9

BI

B

33 9

IN

A

PCIE RECEIVE-SIDE PROBE POINTS

ROOM=NAND

P3MM-NSM

SM

90_PCIE_AP_TO_NAND_REFCLK_P

13 6

90_PCIE_AP_TO_NAND_REFCLK_N

13 6

90_PCIE_AP_TO_NAND_TXD0_P

13 6

90_PCIE_AP_TO_NAND_TXD0_N

13 6

90_PCIE_AP_TO_NAND_TXD1_P

13 6

90_PCIE_AP_TO_NAND_TXD1_N

13 6

1

PP

1

PP

SM

P3MM-NSM

ROOM=NAND

ROOM=NAND

P3MM-NSM

SM

1

PP

1

PP

SM

P3MM-NSM

ROOM=NAND

ROOM=NAND

P3MM-NSM

SM

1

PP

1

PP

SM

P3MM-NSM

ROOM=NAND

PP1500
PP1501

PP1502
PP1503

PP1504
PP1505

1

R1500

34.8

0.5%
1/32W
MF
01005

2

ROOM=NAND

13

NAND_AGND

VSSA

B2

VSS

B4

VSS

B6

VSS

G7

OE10

VSS

VSS

L3L5L7

VSS

VSS

VSS

P2P4P6

VSS

VSS

OC0

VSS

OC10

VSS

OE0

VSS

SYNC_MASTER=N/A

PAGE TITLE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

NAND

SYNC_DATE=N/A

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

15 OF 49

SHEET

13 OF 60

A

8 7 5 4 2 1

36

D

C

ANTIGUA PMU - Buck Supplies

VCC_MAIN_SNS

10UF

20%
VOLTAGE=6.3V
CERM-X5R
0402-9

ROOM=PMU

2.2UF

20%
VOLTAGE=6.3V
X5R-CERM
0201

C2095

10UF

20%
VOLTAGE=6.3V
CERM-X5R
0402-9

ROOM=SOC

1

C2088

10UF

20%
VOLTAGE=6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C2092

2.2UF

20%
VOLTAGE=6.3V

2

X5R-CERM
0201

ROOM=PMU

1

C2099

100PF

5%
VOLTAGE=16V

2

NP0-C0G
01005

ROOM=PMU

33 26 25 24 22 21 17 15

PP_VCC_MAIN

1

C2085

10UF

20%
VOLTAGE=6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C2089

2.2UF

20%
VOLTAGE=6.3V

2

X5R-CERM
0201

ROOM=PMU

1

C2093

2.2UF

20%
VOLTAGE=6.3V

2

X5R-CERM
0201

ROOM=PMU

1

C2086

10UF

20%
VOLTAGE=6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C2090

2.2UF

20%
VOLTAGE=6.3V

2

X5R-CERM
0201

ROOM=PMU

1

C2094

2.2UF

20%
VOLTAGE=6.3V

2

X5R-CERM
0201

ROOM=PMU

15

IN

1

C2087

2

1

C2091

2

ROOM=PMU

1

2

V3

VDD_MAIN_SNS

R6

F10

L13

VDD_MAIN

L5
R8
L4

A4
B4

VDD_BUCK0_01

C4
A8

B8

VDD_BUCK0_23

C8

A16
B16

C16

A12
B12

C12

J17
J18
J19

T18
T19

V12
Y12
Z12

N17
N18
N19

VDD_BUCK1_01

VDD_BUCK1_23

VDD_BUCK2

VDD_BUCK3

VDD_BUCK4

VDD_BUCK5

J1

VDD_BUCK6

J2

CRITICAL

U2000

OMIT_TABLE

ANTIGUA-D2255A080

CSP

SYM 2 OF 5

ROOM=PMU

BUCK INPUT BAT/USB

BUCK0_LX0

BUCK0_LX1

BUCK0_LX2

BUCK0_LX3

BUCK0_FB

BUCK1_LX0

BUCK1_LX1

BUCK1_LX2

A3
B3
C3

A5
B5
C5

A7
B7
C7

A9
B9
C9

F8

A17
B17
C17

A15
B15
C15

A13
B13
C13

BUCK0_LX0

BUCK0_LX1

BUCK0_LX2

BUCK0_LX3

45_BUCK0_PP_CPU_FB

BUCK1_LX0

BUCK1_LX1

BUCK1_LX2

L2000

1.0UH-20%-3.6A-0.060OHM

1 2

PIQA20161T-SM

ROOM=PMU

CRITICAL

L2001

0.47UH-20%-3.8A-0.048OHM

1 2

PIQA20121T-SM

ROOM=PMU

CRITICAL

L2002

1.0UH-20%-3.6A-0.060OHM

12

PIQA20161T-SM

ROOM=PMU

CRITICAL

L2003

0.47UH-20%-3.8A-0.048OHM

12

PIQA20121T-SM

ROOM=PMU

CRITICAL

L2010

1.0UH-20%-3.6A-0.060OHM

1 2

PIQA20161T-SM

ROOM=PMU

CRITICAL

L2011

0.47UH-20%-3.8A-0.048OHM

1 2

PIQA20121T-SM

ROOM=PMU

CRITICAL

L2012

1.0UH-20%-3.6A-0.060OHM

12

PIQA20161T-SM

ROOM=PMU

CRITICAL

345678

2 1

D

PP_CPU

VOLTAGE=1.03V

1

C2000

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2006

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

10

IN

1

C2001

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2007

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2002

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2008

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2003

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2009

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2004

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2010

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2005

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2011

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

0.625V/0.9V/1.03V

PP_GPU

VOLTAGE=0.9V

1

C2012

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2017

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2013

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2018

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2014

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2019

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2015

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2016

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

2X 15UF BULK CAPS

REMOVED FOR N69

0.70V/0.80V/0.9V

10

12.5A MAX

BUCK0

10

C

10.5A MAX

BUCK1

B

A

BUCK5

1.1A MAX

BUCK6

400mA MAX

BUCK7

1.1A MAX

BUCK8

1.1A MAX

11 7 6

21

11

11

PP_FIXED

VOLTAGE=0.85V

PP1V2_CAMERA

VOLTAGE=1.2V

PP_CPU_SRAM

VOLTAGE=1.0V

0.80V/0.90V/1.0V

PP_GPU_SRAM

VOLTAGE=1.0V

0.80V/0.90V/1.0V

1

2

1

C2060

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

2

1

2

C2050

15UF

20%
VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

1

C2061

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

C2070

15UF

20%
VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

C2080

15UF

20%
VOLTAGE=6.3V
X5R
0402-1

ROOM=PMU

29 28 21 20 13 12 9 8 7 6 5 3

1

C2051

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

2

1

C2071

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2081

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

C2062

100PF

VOLTAGE=16V

5%

NP0-C0G

01005

ROOM=PMU

PP1V8

PP1V8_TOUCH

29

PP1V8_IMU_OWL

19 12

PP1V1

11

CRITICAL

L2050

1.0UH-20%-3.6A-0.060OHM

12

PIQA20161T-SM

ROOM=PMU

XW2050

SHORT-10L-0.1MM-SM

12

ROOM=PMU

BUCK5_LX0

45_BUCK5_FB

L2060

1UH-20%-1.2A-0.320OHM

0603

ROOM=PMU

12

BUCK6_LX0

CRITICAL

21

IN

45_BUCK6_FB

CRITICAL

L2070

1.0UH-20%-2.25A-0.15OHM

12

PIXB2016FE-SM

ROOM=PMU

XW2070

SHORT-10L-0.1MM-SM

12

ROOM=PMU

BUCK7_LX0

45_BUCK7_FB

L2080

1.0UH-20%-2.25A-0.15OHM

12

PIXB2016FE-SM

ROOM=PMU

CRITICAL

XW2080

SHORT-10L-0.1MM-SM

12

ROOM=PMU

BUCK8_LX0

45_BUCK8_FB

VOLTAGE=1.8V

VOLTAGE=1.8V
VOLTAGE=1.8V

VOLTAGE=1.1V

E1
E2

E17
E18
E19

U18

V18
Y18
Z18

U16

BUCK3_SW2

U15

BUCK3_SW3

V16
Y16
Z16

M17
M18
M19

M13

BUCK5_FB

H1
H2

J5

BUCK6_FB

F1

F2

C1

BUCK7_FB

F17
F18
F19

C19

BUCK8_FB

VDD_BUCK7

VDD_BUCK8

BUCK3_SW1

BUCK4_SW1

BUCK5_LX0

BUCK6_LX0

BUCK7_LX0

BUCK8_LX0

A11

BUCK1_LX3

BUCK1_FB

B11
C11

F12

NC
NC
NC

4TH PHASE INDUCTOR

REMOVED FOR N69

45_BUCK1_PP_GPU_FB

IN

16 10

L2020

1.0UH-20%-3.6A-0.060OHM

1 2

PIQA20161T-SM

ROOM=PMU

CRITICAL

L2021

1 2

PIQA20121T-SM

ROOM=PMU

CRITICAL

1

C2022

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

10

IN

BUCK2_LX0

H17
H18
H19

BUCK2_LX0

0.47UH-20%-3.8A-0.048OHM

K17

BUCK2_LX1

w w w . c h i n a f i x . c o m

BUCK2_FB

K18
K19

J14

BUCK2_LX1

45_BUCK2_PP_SOC_FB

L2030

1.0UH-20%-3.6A-0.060OHM

1 2

PIQA20161T-SM

XW2030

SHORT-10L-0.1MM-SM

1 2

ROOM=PMU

1

C2030

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

BUCK3_LX0

BUCK3_FB

VBUCK3_SW

R18
R19

V19

U17
V17
Y17
Z17

BUCK3_LX0

CRITICAL

45_BUCK3_FB

ROOM=PMU

L2040

1.0UH-20%-3.6A-0.060OHM

1 2

PIQA20161T-SM

ROOM=PMU

CRITICAL

L2041

1 2

PIQA20121T-SM

ROOM=PMU

XW2040

SHORT-10L-0.1MM-SM

1 2

ROOM=PMU

1

C2040

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

BUCK4_LX0

BUCK4_LX1

BUCK4_FB

VBUCK4_SW

V11
Y11
Z11

V13
Y13
Z13

T9

V15
Y15
Z15

BUCK4_LX0

0.47UH-20%-3.8A-0.048OHM

BUCK4_LX1

CRITICAL

45_BUCK4_FB

1

C2023

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2031

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2041

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2024

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2032

100PF

5%
VOLTAGE=16V

2

NP0-C0G
01005

ROOM=PMU

1

C2042

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2025

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2043

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2026

15UF

20%
VOLTAGE=6.3V

2

X5R
0402-1

ROOM=PMU

1

C2044

100PF

5%
VOLTAGE=16V

2

NP0-C0G
01005

ROOM=PMU

PP_SOC

VOLTAGE=0.825V

0.725V/0.825V

10

PP1V8_SDRAM

VOLTAGE=1.8V

PP1V1_SDRAM

VOLTAGE=1.1V

SYNC_MASTER=N/A

PAGE TITLE

SYSTEM POWER:PMU (1/3)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

4.7A MAX

BUCK2

B

1.5A MAX

33 30 26 24 17 16 15 12 8

15 12 11

DRAWING NUMBER SIZE

051-00648

REVISION

BRANCH

PAGE

SHEET

BUCK3

4.7A MAX

BUCK4

SYNC_DATE=N/A

4.0.0

20 OF 49
14 OF 60

A

D

8 7 5 4 2 1

36

345678

2 1

ANTIGUA LDO SPECS

D

14

OUT

ANTIGUA PMU - LDOs

33 26 25 24 22 21 17 14

VCC_MAIN_SNS

PP_VCC_MAIN

XW2105

SHORT-10L-0.1MM-SM

12

ROOM=PMU

1

C2120

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C2123

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C2121

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C2124

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C2122

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C2125

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

LDO#
LDO1 (A)
LDO2 (B) +/-2.5%
LDO3 (A)
LDO4 (D)
LDO5 (F)
LDO6 (C1)

ADJ.RANGE

2.5-3.3V

1.2-1.9V

2.5-3.3V

0.7-1.2V

2.5-3.3V

1.2-3.6V
LDO7 (C) 2.5-3.3V
LDO8 (C)
LDO9 (C)
LDO10 (G) 1335mA
LDO11 (C)

2.5-3.3V

2.5-3.3V

0.7-1.2V

2.5-3.3V

ACCURACY

+/-2.5%

+/-2.5%
+/-2.5%
+/-2.5%
+/-2.5%
+/-25MV
+/-25mV
+/-25mV
+/-2.5%
+/-25mV

MAX.CURRENT

50mA
50mA
50mA
50MA
1000mA
150mA
200MA
200MA
250mA

250mA

D

C

14 12 11

33 30 26 24 17 16 14 12 8

PP1V1_SDRAM

C2130

2.2UF

6.3V

X5R-CERM

0201

ROOM=PMU

PP1V8_SDRAM

C2132

2.2UF

6.3V

X5R-CERM

0201

ROOM=PMU

20%

20%

1

2

1

2

1

2

C2126

10UF

20%

6.3V
CERM-X5R
0402-9

ROOM=PMU

C2131

2.2UF

20%

6.3V

X5R-CERM

0201

ROOM=PMU

1

C2127

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

2

M3

VDD_LDO1_3

V2

VDD_LDO2

M2

VDD_LDO4

U1
U2

L2

VDD_LDO6

Y6

VDD_LDO7

Y4

VDD_LDO8

Y3

VDD_LDO9

Y9

Z9

R3

VDD_LDO11

Y5

VDD_LDO13

Y7

VDD_LDO14

N2

VDD_LDO15

K3

VDD_BYPASS

P12

VPP_OTP

VDD_LDO5

VDD_LDO10

CRITICAL

OMIT_TABLE

U2000

ANTIGUA-D2255A080

CSP

SYM 1 OF 5

ROOM=PMU

LDO INPUT

LDO

VLDO1
VLDO2
VLDO3
VLDO4

VLDO5

VLDO6

VBYPASS

VLDO7
VLDO8
VLDO9

VLDO9_FB

VLDO10

VLDO11
VLDO12
VLDO13
VLDO14
VLDO15

M1
V1
L1
N1
T1
T2
K1
K2
Z6
Z4
Z3
Y2

RCAM_AF_FB

Y8
Z8
R2
K6
Z5
Z7
P2

1 2

XW2100

SHORT-10L-0.1MM-SMROOM=PMU

LDO12 (E)
LDO13 (C)
LDO14 (H)

1.8V

2.5-3.3V

0.8-1.5V
LDO15 (B) 1.2-2.0V

VOLTAGE=3.3V
VOLTAGE=1.8V
VOLTAGE=3.0V
VOLTAGE=0.8V
VOLTAGE=3.0V

VOLTAGE=3.3V

VOLTAGE=3.0V
VOLTAGE=3.1V
VOLTAGE=2.5V

VOLTAGE=0.9V

VOLTAGE=3.0V
VOLTAGE=1.8V
VOLTAGE=3.1V
VOLTAGE=1.2V
VOLTAGE=1.9V

PP3V3_USB
PP1V8_VA
PP3V0_TRISTAR
PP0V8_OWL
PP3V0_NAND

PP3V3_ACC

PP3V0_PROX_ALS
PP3V1_VIBE
PP2V5_RCAM_AF

PP0V9_NAND

PP3V0_PROX_IRLED
PP1V8_ALWAYS
PP3V1_MESA
PP1V2
PP1V9_MESA

+/-5%
+/-25mV
+/-2.5%
+/-2.5%

10mA
250mA
250mA
50mA

5

25 24

11

13

30

20

32

21

13

20

27

27

LDO1
LDO2

33 31 30 26

LDO3
LDO4
LDO5

C

LDO6

LDO7
LDO8
LDO9

LDO10

LDO11

17 12 8

LDO12
LDO13

7 6 5

LDO14
LDO15

B

A

D10
D11
D12
D13
D14
D15
D16
D17
D18

D2
D5
D6
D7
D8
D9

D3
E10
E11
E12
E13

D4
E15
E16

E3

E4

E5

E7

E8

E9

F14
F15
F16

F3

F4
G14
G15
G16

G3

G4
H15
H16

H3
H4

U2000

ANTIGUA-D2255A080

CSP

SYM 5 OF 5

ROOM=PMU

CRITICAL

OMIT_TABLE

NC NC

J15
J16
J3
J4
K15
K16
L15
L16
M14
M15
M16
N14
N15
N16
P13
P14
P15
P16
P17
R13
R14
R15
R16
R17
T10
T11
T12
T13
T14
T15
T17
U10
U11
U12
U13
U14
U4
U5
U6
V4
V5
V6

A1
A10
A14
A18
A19

A2

A6

B1
B10
B14
B18
B19

B2

B6

C10
C14
C18

C2

C6

D1

D19
E14

G1
G17
G18
G19

G2

H7

J6

K12

K7
L17
L18
L19

L6
L7

VSS

U2000

ANTIGUA-D2255A080

CSP

SYM 4 OF 5

ROOM=PMU

CRITICAL

OMIT_TABLE

L9
M8
M9
N10
N12
N13
N9
P10
P11
P18
P19
P5
R10
R11
R12
R9
T16
T3
T6
T8
U3
U9
V10
V14
V8
V9
Y1
Y10
Y14
Y19
Z1
Z10
Z14
Z19
Z2

VPUMP

U19

VPUMP:10nF min. @ 4.6V

45_PMU_VSS_RTC

16

NOTE: T3 IS XTAL REF GND

45_PMU_VPUMP

w w w . c h i n a f i x . c o m

1

C2100

47NF

20%

6.3V

2

X5R-CERM
01005

ROOM=PMU

1

C2101

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

1

C2103

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

1

C2102

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

1

C2104

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

1

2

1

C2106

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

C2107

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=PMU

1

2

1

C2108

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

C2109

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=PMU

1

2

1

C2110

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

C2111

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=PMU

1

2

1

C2112

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

C2113

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=PMU

1

2

1

C2114

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

C2115

2.2UF

20%

6.3V
X5R-CERM
0201

ROOM=PMU

PAGE TITLE

1

C2116

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=PMU

SYSTEM POWER:PMU (2/3)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=N/ASYNC_MASTER=N/A

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

21 OF 49

SHEET

15 OF 60

B

A

8 7 5 4 2 1

36

ANTIGUA PMU - GPIOs, NTCs

345678

2 1

CONTROL PIN NOTES:

NOTE (1):INPUT PULL-DOWN 100-300k
NOTE (2):INPUT PULL-DOWN 1M
NOTE (3):INPUT PULL-UP OR DOWN 100k-300k
NOTE (4):OUTPUT OPEN-DRAIN, REQUIRES PULL-UP

D

C

9 5 3

17 13 11

OUT

OUT

33 30 26 24 17 15 14 12 8

PP1V8_SDRAM

PMU_TO_SYSTEM_COLD_RESET_L

SYSTEM_ALIVE

1

R2260

100K

5%
1/32W
MF
01005

2

ROOM=PMU

1

C2260

1000PF

10%

6.3V

2

X5R-CERM
01005

ROOM=PMU

1

R2261

100K

5%
1/32W
MF
01005

2

ROOM=PMU

30 26 9 5

26 16 8

26 8

5

30

8

9

9

11 9

9

33 16

8

OUT

IN

BI

IN
IN
IN

IN

IN

OUT

IN

OUT

9

OUT
OUT

TRISTAR_TO_PMU_HOST_RESET
AP_TO_PMU_SOCHOT1_L

OWL_TO_PMU_SHDN

OWL_TO_PMU_SLEEP1_REQUEST
PMU_TO_OWL_SLEEP1_READY
OWL_TO_PMU_ACTIVE_REQUEST
PMU_TO_OWL_ACTIVE_READY

PMU_TO_OWL_CLK32K
45_PMU_TO_WLAN_CLK32K

PMU_TO_AP_IRQ_L

I2C0_AP_SCL
I2C0_AP_SDA

NC

P7

RESET_IN1

P8

RESET_IN2

P9

RESET_IN3

K4

RESET*

N8

SHDN

N3

SLEEP1_REQ

N7

SLEEP1_RDY

P3

ACTIVE_REQ

P4

ACTIVE_RDY

T4

SLEEP_32K

R4

OUT_32K

H6

SYS_ALIVE

L3

TMPR_DET

L8

IRQ*

R7

SCL

T7

SDA

CRITICAL

ROOM=PMU

OMIT_TABLE

U2000

ANTIGUA-D2255A080

CSP

SYM 3 OF 5

(3)
(3)
(3)
(4)
(1)

(1)

(1)

(4)

(2)

(4)

REFS

RESETS

COMPARATORGPIO

PRE_UVLO

VDROOP_DET

IREF

VREF

VDROOP

K5

M4

M5

G5

H5

45_PMU_IREFAP_TO_PMU_WDOG_RESET

PMU_VREF

PMU_VDROOP_OUT

PMU_VDROOP_DET_IN

1

C2205

1000PF

10%
10V

2

X5R
01005

ROOM=PMU

1

C2270

2

R2201

0.00

1 2

ROOM=PMU

R2205

1 2

1%MF

150

ROOM=PMU

NO_XNET_CONNECTION=1

0.22UF

20%

6.3V
X5R
0201

ROOM=PMU

1/32W

010050%MF

1/32W
01005

1

R2270

200K

1%
1/20W
MF
201

2

ROOM=PMU

PMU_TO_AP_SOCHOT0_L

45_BUCK1_PP_GPU_FB

NOTE:VDROOP_DET R/C Low-pass Fc=1.06MHz

OUT

IN

8

14 10

D

C

B

C2210

100PF

16V

NP0-C0G

01005

ROOM=PMU

C2220

100PF

16V

NP0-C0G

01005

ROOM=PMU

5%

5%

FOREHEAD NTC

1

1

R2210

10KOHM-1%

2

01005
ROOM=PMU

2

REAR CAMERA NTC

1

1

R2220

10KOHM-1%

2

01005
ROOM=PMU

2

RADIO PA NTC

1

FOREHEAD_NTC_RETURN

RCAM_NTC_RETURN

SHORT-10L-0.1MM-SM

ROOM=PMU

ROOM=PMU

ROOM=PMU

1 2

SHORT-10L-0.1MM-SM

1 2

SHORT-10L-0.1MM-SM

1 2

XW2210

XW2220

XW2230

9

26 9

9

5

16 9 8

32 16 8

5

16 9 8

28 26

30 16

26 16

33

33

32 8

33 16

33

32 8

33

IN
IN

OUT

3

3

45_DWI_PMGR_TO_PMU_SCLK
45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI
DWI_PMU_TO_PMGR_MISO

IN
IN
IN
IN
IN
IN

IN

IN

OUT

IN

IN
IN
IN
IN
IN
IN

OUT

AP_TO_PMU_AMUX_OUT
BUTTON_MENU_KEY_BUFF_L
BUTTON_RINGER_A
AP_TO_PMU_TEST_CLKOUT
BUTTON_HOLD_KEY_BUFF_L
LCM_TO_CHESTNUT_PWR_EN
TRISTAR_TO_PMU_USB_BRICK_ID
CHESTNUT_TO_PMU_ADCMUX
PMU_AMUX_AY

BB_TO_PMU_AMUX_SMPS1

BB_TO_PMU_AMUX_LDO5
BUTTON_VOL_DOWN_L
45_PMU_TO_WLAN_CLK32K
BB_TO_PMU_AMUX_LDO11
BUTTON_VOL_UP_L
BB_TO_PMU_AMUX_SMPS4
PMU_AMUX_BY

FOREHEAD_NTC
REAR_CAMERA_NTC

w w w . c h i n a f i x . c o m

RADIO_PA_NTC
AP_NTC
45_PMU_TCAL

45_PMU_XTAL1
45_PMU_XTAL2

PMU_VDD_RTC

NC

U7
U8
V7

F13

G13

J12
H13
H14
K10
K11
K13

J13
N11

M12

L11

M10

L14
L12

M11

L10

K14

M6
M7

N4
N5
N6

P1
R1

P6

SCLK
MOSI
MISO

AMUX_A0
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_A4
AMUX_A5
AMUX_A6
AMUX_A7
AMUX_AY

AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_B4
AMUX_B5
AMUX_B6
AMUX_B7
AMUX_BY

TDEV1
TDEV2
TDEV3
TDEV4
TCAL

XTAL1
XTAL2

VDD_RTC

(1)
(1)

PMGR

AMUXNTCXTAL

ADCBUTTONS

BRICK_ID

ADC_IN

BUTTON1
BUTTON2
BUTTON3
BUTTON4

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

T5

TRISTAR_TO_PMU_USB_BRICK_ID

R5

CHESTNUT_TO_PMU_ADCMUX

G6

BUTTON_MENU_KEY_BUFF_L

F6

BUTTON_HOLD_KEY_BUFF_L

E6

BUTTON_RINGER_A

F5

NC

F7

TIGRIS_TO_PMU_INT_L

G7

BB_TO_PMU_HOST_WAKE_L

J7

PMU_TO_BB_PMIC_RESET_R_L

G8

TRISTAR_TO_AP_INT

H8

STOCKHOLM_TO_PMU_HOST_WAKE

J8

PMU_TO_NAND_LOW_BATT_BOOT_L

K8

WLAN_TO_PMU_HOST_WAKE

F9

CODEC_TO_PMU_MIKEY_INT_L

G9

PMU_TO_BT_REG_ON

H9

BT_TO_PMU_HOST_WAKE

J9

PMU_TO_WLAN_REG_ON

G10

NC

H10

PMU_TO_CODEC_DIGLDO_PULLDN

J10

CODEC_TO_AP_PMU_INT_L

F11

PMU_TO_BB_USB_VBUS_DETECT

G11

PMU_TO_STOCKHOLM_EN

H11

WLAN_TO_PMU_PCIE_WAKE_L

K9

NC

J11

PMU_TO_LCM_PANICB

G12

NC

H12

I2C0_AP_SCL

IN

1

C2203

1000PF

10%

6.3V

2

R2200

1.00K

1 2

5%

1/32W

MF

01005

ROOM=PMU

X5R-CERM
01005

ROOM=CHESTNUT

PMU_TO_BB_PMIC_RESET_L

IN
IN

IN
IN

OUT

IN
IN

OUT

IN

OUT

OUT

IN
OUT
OUT

IN

OUT

IN

30 16

16 9 8

BUTTON1 + BUTTON2 ASSERTED FOR

16 9 8

>TBD SECONDS CAUSES TWO-FINGER RESET

32 16 8

17

33

30 8

33

13

33

24

33

33

33

24

24 8

33

33

33

28

26 16 8

IN

IN
IN
IN

26 16

33

OUT

B

A

C2230

100PF

16V

NP0-C0G

01005

ROOM=PMU

1

5%

2

R2230

10KOHM-1%

01005
ROOM=PMU

2

PA_NTC_RETURN

AP NTC

1

5%

16V

1

2

R2240

10KOHM-1%

01005
ROOM=PMU

2

AP_NTC_RETURN

C2240

100PF

NP0-C0G

01005

ROOM=PMU

NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC

SHORT-10L-0.1MM-SM

ROOM=PMU

1 2

XW2240

1

2

C2250

100PF

5%
16V
NP0-C0G
01005

ROOM=PMU

1

R2250

3.92K

0.1%
1/20W
MF
0201
ROOM=PMU

2

1

C2202

0.22UF

20%

6.3V

2

X5R
0201

ROOM=PMU

C2200

18PF

5%

16V

CERM

01005

ROOM=PMU

CRITICAL

Y2200

32.768KHZ-20PPM-12.5PF

1

2

15

1 2

1.60X1.00-SM

ROOM=PMU

45_PMU_VSS_RTC

1

C2201

18PF

5%
16V

2

CERM
01005

ROOM=PMU

XW2200

SHORT-10L-0.1MM-SM

1 2

ROOM=PMU

PAGE TITLE

SYSTEM POWER:PMU (3/3)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=N/ASYNC_MASTER=N/A

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

22 OF 49

SHEET

16 OF 60

A

8 7 5 4 2 1

36

345678

2 1

D

TIGRIS CHARGER

APN:343S00033

PP_VCC_MAIN

VOLTAGE=4.3V

D

33 26 25 24 22 21 15 14

C

B

16

1

C2330

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=CHARGER

TIGRIS_PMID

OUT

31 30 3

15 12 8

PP5V0_USB TIGRIS_BOOT

PP1V8_ALWAYS

TIGRIS_TO_PMU_INT_L

1

R2310

100K

5%
1/32W
MF
01005

2

ROOM=CHARGER

1

C2310

4.2UF

10%
16V

2

X5R-CERM
0402-1

ROOM=CHARGER

R2311

100

1 2

1%

1/32W

MF

01005

ROOM=CHARGER

1

C2320

4.2UF

10%
16V

2

X5R-CERM
0402-1

ROOM=CHARGER

1

C2311

100PF

5%
35V

2

NP0-C0G
01005

ROOM=CHARGER

1

C2321

4.2UF

10%
16V

2

X5R-CERM
0402-1

ROOM=CHARGER

30 25 8

30 25 8

16 13 11

30

1

C2322

100PF

5%
35V

2

NP0-C0G
01005

ROOM=CHARGER

I2C1_AP_SDA

BI

I2C1_AP_SCL

IN

SYSTEM_ALIVE

TRISTAR_TO_TIGRIS_VBUS_OFF

IN

TIGRIS_TO_PMU_INT_R_L
TIGRIS_VBUS_DETECT

F5

PMID

A5

VBUS

B5

VBUS

D5

VBUS

C5

VBUS

E5

VBUS

G3

SDA

E4

SCL

E3

SYS_ALIVE

F4

VBUS_OVP_OFF

G2

INT

F1

VBUS_DET

F3

TEST

A2B2D2

VDD_MAIN

U2300

SN2400AB0

WCSP

ROOM=CHARGER

CRITICAL

PGND

C2

VDD_MAIN

VDD_MAIN

VDD_MAIN

PGND

PGND

PGND

LDO

BOOT

BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW

BAT
BAT
BAT
BAT

BAT_SNS

ACT_DIODE

HDQ_HOST

HDQ_GAUGE

G4
G5
A4

B4
D4
C4

A1
B1
D1
C1

E1
E2
G1

F2

R2320

30.1K

5

OUT

USB_VBUS_DETECT

1 2

1%

1/32W

MF

01005

ROOM=CHARGER

A3

B3

D3

C3

w w w . c h i n a f i x . c o m

1

C2331

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=CHARGER

TIGRIS_LDO

1

C2307

100PF

5%
16V

2

NP0-C0G
01005

ROOM=CHARGER

C2300

0.047UF

1 2

ROOM=CHARGER

TIGRIS_BUCK_LX

VBATT_SENSE

TIGRIS_ACTIVE_DIODE

SWI_AP_BI_TIGRIS

TIGRIS_TO_BATTERY_SWI_1V8

10%
16V
X5R

0201

1

C2305

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CHARGER

IN

BI

17

CRITICAL

L2300

1.0UH-20%-3.6A-0.060OHM

1 2

PIQA20161T-SM

ROOM=CHARGER

C2301

100PF

NP0-C0G

ROOM=CHARGER

18

9 8

5%

16V

01005

1

2

ROOM=CHARGER

C2302

100PF

5%

16V

NP0-C0G

01005

NOSTUFF

ROOM=CHARGER

1

2

R2300

100K

5%

1/32W

MF

01005

C

A2A3B1B2B3

CRITICAL

S

Q2300

A1

G

D

C1C2C3

1

C2306

100PF

5%
16V

2

1

2

NP0-C0G
01005

ROOM=CHARGER

1

C2303

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CHARGER

1

C2304

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CHARGER

CSD68827W

BGA

ROOM=CHARGER

PP_BATT_VCC

33 18 3

B

A

18

BI

33 30 26 24 16 15 14 12 8

PP1V8_SDRAM

1

R2302

40.2K

1%
1/32W
MF
01005

2

R2303

100

R2301

0.00

1 2

MF 0%

NOSTUFF

3

D

1/32W

01005

1 2

5%

1/32W

MF

01005

ROOM=CHARGER

TIGRIS_TO_BATTERY_SWI_1V8TIGRIS_TO_BATTERY_SWI_1V8_RTIGRIS_TO_BATTERY_SWI

17

Q2301

G

2

S

1

DMN2990UFA

DFN0806

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

SYSTEM POWER:CHARGER

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

23 OF 49

SHEET

17 OF 60

D

A

8 7 5 4 2 1

36

345678

2 1

D

D

C

17

C

BATTERY CONNECTOR

THIS ONE ON MLB --->

CRITICAL

ROOM=BATTERY_B2B

J2400

RCPT-BATT-2BLADES

F-ST-SM

7 8

FL2400

120-OHM-210MA

BI

TIGRIS_TO_BATTERY_SWI TIGRIS_BATTERY_SWI_CONN

1 2

01005

ROOM=BATTERY_B2B

1

C2400

56PF

5%
16V

2

NP0-C0G
01005

ROOM=BATTERY_B2B

1

4

9 10

516S00104 (RCPT)
516S00105 (PLUG)

11

5
23
6

12

1

C2414

27PF

5%
16V

2

NP0-C0G
01005

ROOM=BATTERY_B2B

XW2400

SHORT-10L-0.25MM-SM

1 2

ROOM=BATTERY_B2B

1

C2413

56PF

5%
16V

2

NP0-C0G
01005

ROOM=BATTERY_B2B

1

C2410

56PF

5%
16V

2

NP0-C0G
01005

ROOM=BATTERY_B2B

1

C2411

100PF

5%
16V

2

NP0-C0G
01005

ROOM=BATTERY_B2B

1

C2412

220PF

10%
10V

2

X7R-CERM
01005

ROOM=BATTERY_B2B

PP_BATT_VCC

VOLTAGE=4.3V

VBATT_SENSE

OUT

33 17 3

17

B

B

w w w . c h i n a f i x . c o m

A

PAGE TITLE

SYSTEM POWER:BATTERY CONN

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=N/ASYNC_MASTER=N/A

051-00648

4.0.0

24 OF 49
18 OF 60

A

D

345678

2 1

D

C

1

C3013

0.22UF

20%

6.3V

2

X5R
01005-1

ROOM=CARBON

D

CARBON - ACCEL & GYRO

MAGNESIUM - COMPASS

INVENSENSE (APN 338S00017): C3013=0.22UF
INVENSENSE 1.1 (APN 338S00087): C3013=0.22UF

16

VDD

1

VDDIO

1

C3010

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CARBON

1

C3011

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CARBON

1

C3012

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CARBON

PP1V8_IMU_OWL

19 14 12

U3010

MPU-6700-12-COMBO

LGA

9

IN

SPI_OWL_TO_ACCEL_GYRO_CS_L

GYRO_CHARGE_PUMP

9

OUT

ACCEL_GYRO_TO_OWL_INT2

5

CS

8

FSYNC/GND

14 4

REGOUT/GND_CAP

7

INT/INT2

ROOM=CARBON

OMIT_TABLE

SCL/SPC

SDA/SDI

SA0/SDO

DRDY/INT1

CRITICAL

GND1

GND2

GND3

GND4

GND5

9

10

11

12

13

15

GND6

2

SPI_OWL_TO_IMU_SCLK

3

SPI_OWL_TO_IMU_MOSI
SPI_IMU_TO_OWL_MISO

6

ACCEL_GYRO_TO_OWL_INT1

IN
IN

OUT

OUT

19 9

19 9

19 9

9

19 14 12

PP1V8_IMU_OWL

ALPS (APN:338S00084)

C4

VDD

U3000

COMPASS-MODULE

FLGA-POP

114K INT PU

114K INT PD

OMIT_TABLE

ROOM=MAGNESIUM

CRITICAL

VSS

C1

SDO

SDA/SDI

SCL/SCK

CSB

TRG/SE

DRDY

NC
NC

NC

C2
B1

B3
D1
D2

D4

VPP
RSV

RSV
RSV
RSV

RST*

1.09M INT PU

B4
A4
A3
A2
C3
A1

NOSTUFF

1

C3002

56PF

5%
16V

2

NP0-C0G
01005

ROOM=MAGNESIUM

NC

1

C3001

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=MAGNESIUM

1

C3000

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=MAGNESIUM

SPI_IMU_TO_OWL_MISO
SPI_OWL_TO_IMU_MOSI
SPI_OWL_TO_IMU_SCLK
SPI_OWL_TO_COMPASS_CS_L

COMPASS_TO_OWL_INT

PP1V8_IMU_OWL

OUT

OUT

19 9

19 9

IN

19 9

IN

9

IN

9

19 14 12

C

B

DISCRETE ACCEL

BOSCH (APN:338S1163)

PP1V8_IMU_OWL

1

C3020

0.1UF

20%

6.3V

2

X5R-CERM
01005

OMIT_TABLE

1

C3021

1.0UF

20%

6.3V

2

X5R
0201-1

OMIT_TABLE

8

VDD

7
VDDIO

1

C3022

0.1UF

20%

6.3V

2

X5R-CERM
01005

OMIT_TABLE

U3020

BMA282

LGA

9

IN

SPI_OWL_TO_DISCRETE_ACCEL_CS_L

OMIT_TABLE

4

CS*

R3021

20.0

9

ACCEL_TO_OWL_INT1_R

OUT

OMIT_TABLE

R3020

20.0

9

ACCEL_TO_OWL_INT2_R

OUT

1 2

5%

1/32W

MF

01005

1 2

5%

1/32W

MF

01005

ACCEL_TO_OWL_INT1
ACCEL_TO_OWL_INT2

6
5

INT1
INT2

OMIT_TABLE

GND

9

111214

GNDIO

10

SCX
SDX
SDO

PS

1

SPI_OWL_TO_IMU_SCLK

2

SPI_OWL_TO_IMU_MOSI

3

13

ACCEL_TO_OWL_SDO

19 14 12

B

w w w . c h i n a f i x . c o m

19 9

IN

19 9

IN

OMIT_TABLE

R3022

20.0

1 2

5%

1/32W

MF

01005

SPI_IMU_TO_OWL_MISO

OUT

19 9

A

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

SENSORS:MOTION SENSORS

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

30 OF 49
19 OF 60

A

D

FOREHEAD FLEX (FCAM)

CAMERA POWER

D

29 28 21 14 13 12 9 8 7 6 5 3

FL3100

FERR-22-OHM-1A-0.055OHM

PP1V8

1 2

0201

ROOM=CG_B2B

1

C3101

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CG_B2B

1

2

C3100

100PF

5%

16V

NP0-C0G

01005

ROOM=CG_B2B

FL3104

FERR-22-OHM-1A-0.055OHM

PP2V85_CAM_AVDD_LDO PP2V85_FCAM_AVDD_CONN

21 20

20%

6.3V
0201

1

2

C3106

2.2UF

X5R-CERM

ROOM=CG_B2B

1 2

0201

ROOM=CG_B2B

1

C3105

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CG_B2B

1

2

C3104

100PF

5%

16V

NP0-C0G

01005

ROOM=CG_B2B

345678

2 1

FOREHEAD CONNECTOR

PROX & ALS POWER

516S0986 (RCPT)
516S0987 (PLUG)

AA22L-S034VA1

20 15

PP3V0_PROX_IRLED

1

C3120

100PF

5%
16V

2

NP0-C0G
01005

ROOM=CG_B2B

1

C3121

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CG_B2B

1

C3122

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CG_B2B

1

C3123

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CG_B2B

1

C3124

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CG_B2B

THIS ONE ON MLB --->

I2C_ISP_TO_FCAM_SCL_CONN

20

AP_TO_FCAM_SHUTDOWN_CONN_L

20

I2C_ISP_BI_FCAM_SDA_CONN

20

FL3125

15 20 20

PP3V0_PROX_ALSPP1V8_FCAM_CONN 90_MIPI_FCAM_TO_AP_DATA0_CONN_N

12

PP3V0_PROX_CONN

20

120-OHM-210MA

01005

ROOM=CG_B2B

1

2

C3125

100PF

5%

16V

NP0-C0G

01005

ROOM=CG_B2B

FL3126

C3130

2.2UF

20%

6.3V

X5R-CERM

ROOM=CG_B2B

0201

1

2

ROOM=CG_B2B

C3129

2.2UF

20%

6.3V

X5R-CERM

0201

1

2

ROOM=CG_B2B

C3128

2.2UF

20%

6.3V

X5R-CERM

0201

1 2

120-OHM-210MA

1

2

01005

ROOM=CG_B2B

1

C3127

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CG_B2B

1

2

PP3V0_ALS_CONN

C3126

100PF

5%
16V
NP0-C0G
01005

ROOM=CG_B2B

20

PP3V0_PROX_CONN

20

45_PROX_TO_CUMULUS_RX_CONN

20

CUMULUS_TO_PROX_RX_EN_1V8_CONN

28

I2C2_AP_BI_ALS_SDA_CONN

20

ALS_TO_AP_INT_CONN_L

20

I2C2_AP_TO_ALS_SCL_CONN

20

PP3V0_ALS_CONN

20

CODEC_TO_HAC_CONN_N

20

CODEC_TO_HAC_CONN_P

20

CODEC_TO_RCVR_CONN_P

20

CODEC_TO_RCVR_CONN_N

20

J3100

F-ST-SM

39
35 36

1 2
3 4
5 6
7 8

9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34

37 38
40

AP_TO_FCAM_CLK_CONN

90_MIPI_FCAM_TO_AP_CLK_CONN_N
90_MIPI_FCAM_TO_AP_CLK_CONN_P

90_MIPI_FCAM_TO_AP_DATA0_CONN_P

PP2V85_FCAM_AVDD_CONN

PP1V8_FCAM_CONN

FRONTMIC3_TO_CODEC_AIN4_CONN_P

FRONTMIC3_TO_CODEC_AIN4_CONN_N

PP_CODEC_TO_FRONTMIC3_BIAS_CONN

PGND_IRLED_K

PP3V0_PROX_IRLED

20

20

20

20

20

20

20

20

D

20

20

20 15

C

B

A

CAMERA I/O

7

IN

7

IN

7

IN

7

BI

45_AP_TO_FCAM_CLK

AP_TO_FCAM_SHUTDOWN_L

I2C_ISP_TO_FCAM_SCL

I2C_ISP_BI_FCAM_SDA

CAMERA MIPI

7

OUT

7

OUT

7

OUT

7

OUT

90_MIPI_FCAM_TO_AP_DATA0_P

90_MIPI_FCAM_TO_AP_DATA0_N 90_MIPI_FCAM_TO_AP_DATA0_CONN_N

90_MIPI_FCAM_TO_AP_CLK_P 90_MIPI_FCAM_TO_AP_CLK_CONN_P

90_MIPI_FCAM_TO_AP_CLK_N 90_MIPI_FCAM_TO_AP_CLK_CONN_N

FL3110

1 2

120-OHM-210MA

01005

ROOM=CG_B2B

FL3111

1 2

120-OHM-210MA

01005

ROOM=CG_B2B

R3102

0.00

1 2

MF 0%

ROOM=CG_B2B

1/32W

01005

R3103

0.00

1 2

MF 0%

ROOM=CG_B2B

1/32W

01005

65-OHM-0.1A-0.7-2GHZ

4

65-OHM-0.1A-0.7-2GHZ

4

1

2

1

2

1

2

1

2

CRITICAL

L3100

TAM0605

SYM_VER-2

ROOM=CG_B2B

CRITICAL

L3102

TAM0605

SYM_VER-2

ROOM=CG_B2B

AP_TO_FCAM_CLK_CONN

C3110

100PF

5%

16V

NP0-C0G

01005

ROOM=CG_B2B

AP_TO_FCAM_SHUTDOWN_CONN_L

C3111

100PF

5%

16V

NP0-C0G

01005

ROOM=CG_B2B

I2C_ISP_TO_FCAM_SCL_CONN

C3112

56PF

5%
16V
NP0-C0G
01005

ROOM=CG_B2B

I2C_ISP_BI_FCAM_SDA_CONN

C3113

56PF

5%
16V
NP0-C0G
01005

ROOM=CG_B2B

1

90_MIPI_FCAM_TO_AP_DATA0_CONN_P

23

1

23

20

20

OUT

BI

20

20

20

20

20

20

23

23

23

23

23

23

MIC3/HAC/RCVR INTERFACE

FL3150

120-OHM-210MA

1 2

01005

ROOM=CG_B2B

FL3151

70-OHM-25%-0.28A

12

01005

ROOM=CG_B2B

FL3152

70-OHM-25%-0.28A

12

01005

ROOM=CG_B2B

FL3153

70-OHM-25%-0.28A

1 2

01005

ROOM=CG_B2B

FL3154

70-OHM-25%-0.28A

1 2

01005

ROOM=CG_B2B

FL3155

120-OHM-210MA

1 2

01005

ROOM=CG_B2B

FL3156

120-OHM-210MA

12

01005

ROOM=CG_B2B

IN

IN

IN

IN

OUT

OUT

PP_CODEC_TO_FRONTMIC3_BIAS

24

CODEC_TO_HAC_N

CODEC_TO_HAC_P

CODEC_TO_RCVR_N

CODEC_TO_RCVR_P

FRONTMIC3_TO_CODEC_AIN4_N

FRONTMIC3_TO_CODEC_AIN4_P

w w w . c h i n a f i x . c o m

PP_CODEC_TO_FRONTMIC3_BIAS_CONN

1

DZ3150

6.8V-100PF

01005

ROOM=CG_B2B

2

CODEC_TO_HAC_CONN_N

NO_XNET_CONNECTION=1

1

DZ3151

12V-33PF

01005-1

ROOM=CG_B2B

2

CODEC_TO_HAC_CONN_P

NO_XNET_CONNECTION=1

1

DZ3152

12V-33PF

01005-1

ROOM=CG_B2B

2

CODEC_TO_RCVR_CONN_N

NO_XNET_CONNECTION=1

1

DZ3153

12V-33PF

01005-1

ROOM=CG_B2B

2

CODEC_TO_RCVR_CONN_P

NO_XNET_CONNECTION=1

1

DZ3154

12V-33PF

01005-1

ROOM=CG_B2B

2

FRONTMIC3_TO_CODEC_AIN4_CONN_N

NO_XNET_CONNECTION=1

1

DZ3155

6.8V-100PF

01005

ROOM=CG_B2B

2

FRONTMIC3_TO_CODEC_AIN4_CONN_P

NO_XNET_CONNECTION=1

1

DZ3156

6.8V-100PF

01005

ROOM=CG_B2B

2

20

20

20

20

20

20

20

8

29

8

PROX & ALS INTERFACE

PGND_IRLED_K

1

R3101

11.5

1%
1/20W
MF
201

2

PGND_IRLED_D

3

D

CRITICAL

20

C

Q3140

29

CUMULUS_TO_PROX_TX_EN_BUFF

IN

1

R3140

1.00M

5%
1/32W
MF
01005

2

ROOM=CG_B2B

G

1

S

2

DMN3730UFB4

DFN1006H4-3

SYM_VER_1

ROOM=CG_B2B

R3143

0.00

45_PROX_TO_CUMULUS_RX

OUT

BI

I2C2_AP_SDA

MAKE_BASE=TRUE

FL3101

120-OHM-210MA

1 2

01005

FL3102

1 2

0%

1/32W

MF

01005

ROOM=CG_B2B

45_PROX_TO_CUMULUS_RX_CONN

1

C3143

56PF

5%
16V

2

NP0-C0G
01005

ROOM=CG_B2B

NOSTUFF

I2C2_AP_BI_ALS_SDA_CONN

1

C3144

56PF

5%
16V

2

NP0-C0G
01005

ROOM=CG_B2B

20

B

20

120-OHM-210MA

I2C2_AP_SCL

IN

MAKE_BASE=TRUE

1 2

01005

I2C2_AP_TO_ALS_SCL_CONN

1

C3145

56PF

5%
16V

2

NP0-C0G
01005

ROOM=CG_B2B

20

FL3146

8

OUT

ALS_TO_AP_INT_L

120-OHM-210MA

01005

ROOM=CG_B2B

12

ALS_TO_AP_INT_CONN_L

1

C3146

100PF

5%
16V

2

NP0-C0G
01005

ROOM=CG_B2B

SYNC_MASTER=N/A

PAGE TITLE

20

SYNC_DATE=N/A

A

CAMERA:FOREHEAD FLEX B2B

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

31 OF 49

SHEET

20 OF 60

D

8 7 5 4 2 1

36

REAR CAMERA FLEX

345678

RCAM CONNECTOR

2 1

D

25 24 22 17 15 14

33 26

CAMERA POWER

PP_VCC_MAIN

1

C3210

2.2UF

20%

6.3V

2

X5R-CERM
0201

4 1

3

U3200

LP5907SNX-2.85

VIN

EN

X2SON

ROOM=RCAM_B2B

2

EPADGND

5

VOUT

20

PP2V85_CAM_AVDD_LDO

VOLTAGE=2.85V

1

C3200

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=RCAM_B2B

1

C3211

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=RCAM_B2B

FL3200

10-OHM-1.1A

1 2

01005

ROOM=RCAM_B2B

PP2V85_RCAM_AVDD_CONN

1

C3201

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=RCAM_B2B

1

C3202

100PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

PP2V5_RCAM_AF

21 15

21

R3202

3.00

1 2

MF

PP2V5_RCAM_AF_COMP

1/32W1%
01005

21

21

21

21

21

XW3202

SHORT-10L-0.1MM-SM

1 2

ROOM=RCAM_B2B

PP2V5_RCAM_AF_CONN

21

21

BI

OUT

I2C_ISP_BI_RCAM_SDA_CONN
I2C_ISP_TO_RCAM_SCL_CONN

IN

21

AP_TO_RCAM_SHUTDOWN_CONN_L

IN

RCAM_TO_LED_DRIVER_STROBE_EN_CONN
AP_TO_RCAM_CLK_CONN

IN

PP2V85_RCAM_AVDD_CONN

21

THIS ONE ON MLB --->

ROOM=RCAM_B2B

J3200

AA27D-S030VA1

32

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30

34

516S00100 (RCPT)
516S00101 (PLUG)

CRITICAL

F-ST-SM

31

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

33

90_MIPI_RCAM_TO_AP_DATA3_CONN_N
90_MIPI_RCAM_TO_AP_DATA3_CONN_PPP1V2_RCAM_DIGITAL_CONN

90_MIPI_RCAM_TO_AP_DATA1_CONN_N
90_MIPI_RCAM_TO_AP_DATA1_CONN_P

90_MIPI_RCAM_TO_AP_CLK_CONN_N
90_MIPI_RCAM_TO_AP_CLK_CONN_PPP1V8_RCAM_CONN

90_MIPI_RCAM_TO_AP_DATA0_CONN_N
90_MIPI_RCAM_TO_AP_DATA0_CONN_P

90_MIPI_RCAM_TO_AP_DATA2_CONN_N
90_MIPI_RCAM_TO_AP_DATA2_CONN_P

D

7

BI

7

BI

7

BI

7

BI

7

BI

7

BI

7

BI

7

BI

7

BI

7

BI

C

B

A

CAM_EXT_LDO_EN

8

PP1V2_CAMERA

14

45_BUCK6_FB

14

29 28 20 14 13 12 9 8 7 6 5 3

FERR-22-OHM-1A-0.055OHM

2

XW3203

SHORT-10L-0.1MM-SM

ROOM=RCAM_B2B

1

PP1V8

PP2V5_RCAM_AF

21 15

FL3201

1 2

0201

ROOM=RCAM_B2B

1

C3203

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=RCAM_B2B

1

C3204

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=RCAM_B2B

FL3220

FERR-22-OHM-1A-0.055OHM

1 2

0201

ROOM=RCAM_B2B

1

C3220

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=RCAM_B2B

1

C3221

100PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

L3205

FERR-22-OHM-1A-0.055OHM

1 2

0201

ROOM=RCAM_B2B

1

C3207

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=RCAM_B2B

1

C3208

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=RCAM_B2B

PP2V5_RCAM_AF_CONN

MIPI COMMON-MODE CHOKES

L3200

65-OHM-0.1A-0.7-2GHZ

65-OHM-0.1A-0.7-2GHZ

65-OHM-0.1A-0.7-2GHZ

PLACEHOLDER FOOTPRINTS

TAM0605

4

SYM_VER-2

ROOM=RCAM_B2B

NOSTUFF

L3201

TAM0605

4

SYM_VER-2

ROOM=RCAM_B2B

NOSTUFF

L3202

TAM0605

4

SYM_VER-2

ROOM=RCAM_B2B

NOSTUFF

1

23

L3203

65-OHM-0.1A-0.7-2GHZ

1

23

TAM0605

4

SYM_VER-2

ROOM=RCAM_B2B

NOSTUFF

1

23

L3204

65-OHM-0.1A-0.7-2GHZ

1

23

TAM0605

4

SYM_VER-2

ROOM=RCAM_B2B

NOSTUFF

1

23

1

C3206

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=RCAM_B2B

1

C3205

100PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

PP1V8_RCAM_CONN

1

C3209

100PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

PP1V2_RCAM_DIGITAL_CONN

21

21

w w w . c h i n a f i x . c o m

21

DIGITAL I/O

45_AP_TO_RCAM_CLK

AP_TO_RCAM_SHUTDOWN_L

RCAM_TO_LED_DRIVER_STROBE_EN

I2C_ISP_TO_RCAM_SCL I2C_ISP_TO_RCAM_SCL_CONN

22 7

22 7

7

7

22

IN

IN

OUT

BI

IN

C3230

100PF

5%
16V
NP0-C0G
01005

ROOM=RCAM_B2B

1 2

1 2

MF 0%

120-OHM-210MA

1 2

1

2

120-OHM-210MA

1 2

120-OHM-210MA

1 2

R3203

0.00

ROOM=RCAM_B2B

010050%MF

R3204

0.00

ROOM=RCAM_B2B

01005

FL3230

01005

ROOM=RCAM_B2B

FL3231

01005

ROOM=RCAM_B2B

FL3232

01005

ROOM=RCAM_B2B

1/32W

1/32W

AP_TO_RCAM_CLK_CONN

NOSTUFF

1

2

C3299

100PF

5%

16V

NP0-C0G

01005

ROOM=RCAM_B2B

AP_TO_RCAM_SHUTDOWN_CONN_L

1

C3231

100PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

RCAM_TO_LED_DRIVER_STROBE_EN_CONN

1

C3232

100PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

I2C_ISP_BI_RCAM_SDA_CONNI2C_ISP_BI_RCAM_SDA

1

C3233

56PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

1

C3234

56PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

SYNC_MASTER=N/A

PAGE TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

21

21

21

IN

21

BI

21

OUT

SYNC_DATE=N/A

CAMERA:REAR CAMERA B2B

DRAWING NUMBER SIZE

Apple Inc.

R

051-00648

REVISION

4.0.0

BRANCH

PAGE

32 OF 49

SHEET

21 OF 60

C

B

A

D

8 7 5 4 2 1

36

345678

2 1

D

D

C

33 26 25 24 21 17 15 14

PP_VCC_MAIN

C3384

2.2UF

X5R-CERM

ROOM=STROBE

20%

6.3V
0201

DUAL LED STROBE DRIVER

APN:353S3899

PP_LED_BOOST_OUT

VOLTAGE=5.0V

U3300

1

C3385

2.2UF

2

X5R-CERM

ROOM=STROBE

20%

6.3V
0201

1

C3386

2.2UF

2

X5R-CERM

ROOM=STROBE

20%

6.3V
0201

1

C3387

10UF

2

CERM-X5R

0402-9

ROOM=STROBE

20%

6.3V

1

2

33 26

21 7

21 7

1.0UH-20%-3.6A-0.060OHM

8

IN

21

IN

IN
BI
IN

CRITICAL

L3300

1 2

PIQA20161T-SM

ROOM=STROBE

AP_TO_LED_DRIVER_EN
RCAM_TO_LED_DRIVER_STROBE_EN

BB_TO_LED_DRIVER_GSM_BURST_IND
I2C_ISP_BI_RCAM_SDA
I2C_ISP_TO_RCAM_SCL

PP_LED_DRIVER_SW

VOLTAGE=5.0V

NC

D1

A2
B2

D3
E3
C2
E4
E2
D2

LM3564A1TMX

WLCSP

ROOM=STROBE

IN

CRITICAL

SW

INT 200K PD

ENABLE

INT 200K PD

STROBE

INT 200K PD

TORCH

INT 200K PD

TX
SDA
SCL

GND
A1

AGND

B1

C1

OUT

LED1

LED2

TEMP

A3
B3
C3

A4
B4

C4
D4

E1

1

C3394

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=STROBE

1

2

C3308

100PF

5%
16V
NP0-C0G
01005

ROOM=STROBE

1

C3396

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=STROBE

1

C3373

2

PP_LED_DRIVER_COOL_LED

VOLTAGE=5.0V

PP_LED_DRIVER_WARM_LED

VOLTAGE=5.0V

100PF

5%
16V
NP0-C0G
01005

ROOM=STROBE

32

32

C

B

w w w . c h i n a f i x . c o m

LED_MODULE_NTC

OUT

32

B

A

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

CAMERA:STROBE DRIVER

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

33 OF 49
22 OF 60

A

D

CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS)

345678

2 1

D

VOICE MIC

LOWERMIC1_TO_CODEC_AIN1_P

31

LOWERMIC1_TO_CODEC_AIN1_N

31

NC
NC

L2
L1

K3

L3

AIN1+
AIN1-

AIN2+
AIN2-

U3500

WLCSP-1

SYM 1 OF 3

CS42L71

ROOM=CODEC

CRITICAL

AOUT1+

AOUT1-

AOUT2+

AOUT2-

HPOUTA
HPOUTB

HS3

L9
M9

L8
M8

K10
K11

M5

CODEC_TO_RCVR_P
CODEC_TO_RCVR_N

CODEC_TO_HAC_P
CODEC_TO_HAC_N

CODEC_TO_HPHONE_L
CODEC_TO_HPHONE_R

CODEC_TO_HPHONE_HS3

20

20

20

20

31

31

31

D

C

ANC REF MIC

ANC ERROR MIC

REARMIC2_TO_CODEC_AIN3_P

32

REARMIC2_TO_CODEC_AIN3_N

32

FRONTMIC3_TO_CODEC_AIN4_P

20

FRONTMIC3_TO_CODEC_AIN4_N

20

NC
NC

K2
K1

J3
J4

F1

G1

AIN3+
AIN3-

AIN4+
AIN4-

AIN5+
AIN5-

HS4

HS3_REF
HS4_REF

HSIN+

HSIN-

HPDETECT

M4
L10

M10

D1

CODEC_HSIN_P

E1

CODEC_HSIN_N

J9

HPHONE_TO_CODEC_DETECT

C3505

0.1UF

1 2

20%

6.3V
X5R-CERM

ROOM=CODEC

C3506

0.1UF

1 2

20%

6.3V
X5R-CERM

ROOM=CODEC

01005

01005

CODEC_HSIN_R_P

ROOM=CODEC

1

C3504

220PF

10%
10V

2

X7R-CERM
01005

CODEC_HSIN_R_N

31

ROOM=CODEC

R3515

1.33K

1 2

1%

1/32W

MF

01005

NO_XNET_CONNECTION=1

R3550

1.33K

1 2

1%

1/32W

MF

01005

ROOM=CODEC

NO_XNET_CONNECTION=1

CODEC_TO_HPHONE_HS4

CODEC_TO_HPHONE_HS3_REF
CODEC_TO_HPHONE_HS4_REF

31

31

31

C

B

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

NC
NC

F2

AIN6+

F3

AIN6-

G2

AIN7+

G3

AIN7-

A4

DMIC1_CLK

B4

DMIC1_DATA

C4

DMIC2_CLK

C3

DMIC2_DATA

A3

DMIC3_CLK

B3

DMIC3_DATA

A2

DMIC4_CLK

B2

DMIC4_DATA

A9

PDM_CLK

B9

PDM_DATA

R3502

20.0

1 2

5%

w w w . c h i n a f i x . c o m

MBUS_REF

DP
DN

J12
H12

G10

90_MIKEYBUS_CALTRA_DATA_P
90_MIKEYBUS_CALTRA_DATA_N

MBUS_REF_U3500

XW3500

1 2

SHORT-10L-0.1MM-SM

ROOM=CODEC

1/32W

MF

01005

ROOM=CODEC

R3503

20.0

1 2

5%

1/32W

MF

01005

ROOM=CODEC

ROOM=CODEC

C3552

100PF

1 2

5%

16V

NP0-C0G

01005

C3554

100PF

1 2

5%

16V

NP0-C0G

01005

ROOM=CODEC

90_MIKEYBUS_DATA_P
90_MIKEYBUS_DATA_N

B

30

30

A

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

AUDIO:CALTRA CODEC (1/2)

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

35 OF 49
23 OF 60

A

D

CALTRA AUDIO CODEC (POWER & I/O)

345678

2 1

D

C

B

25 15

33 26 25 22 21 17 15 14

33 30 26 24 17 16 15 14 12 8

LOWERMIC1_BIAS_FILT_RET

31

XW3620

SHORT-10L-0.1MM-SM

1 2

ROOM=CODEC

XW3630

SHORT-10L-0.1MM-SM

1 2

ROOM=CODEC

REARMIC2_BIAS_FILT_RET

FRONTMIC3_BIAS_FILT_RET

PP1V8_VA

PP_VCC_MAIN

PP1V8_SDRAM

1

C3640

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CODEC

CODEC_AGND

1

C3600

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=CODEC

1

C3610

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=CODEC

1

C3601

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

1

C3611

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

C3650

4.7UF

1 2

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

ROOM=CODEC

C3651

4.7UF

1 2

20%

6.3V

X5R-CERM1

402

C3653

4.7UF

1 2

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

24

1

C3602

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

1

C3612

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

PP1V2_VD_FILT

1

C3670

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CODEC

PP_CODEC_TO_LOWERMIC1_BIAS

31

LOWERMIC1_BIAS_FILT_IN

PP_CODEC_TO_REARMIC2_BIAS

32

REARMIC2_BIAS_FILT_IN

PP_CODEC_TO_FRONTMIC3_BIAS

20

FRONTMIC3_BIAS_FILT_IN

CALTRA_HS_BIAS_FILT

1

C3654

4.7UF

20%

6.3V

2

X5R-CERM1
402

ROOM=CODEC

CALTRA_HS_BIAS_FILT_IN

NC
NC

J11

VCP

M6

MIC1_BIAS

K7

MIC1_BIAS_FILT

L6

MIC2_BIAS

J7

MIC2_BIAS_FILT

K6

MIC3_BIAS

L5

MIC3_BIAS_FILT

J6

MIC4_BIAS

K5

MIC4_BIAS_FILT

M3

HS_BIAS_FILT

M2

HS_BIAS_FILT_REF

D12

G12C1E12

VD

VD

GNDD

GNDD

GNDD

A5

VL

VD_FILT

VD_FILT

U3500

WLCSP-1

SYM 2 OF 3

CS42L71

CRITICAL

ROOM=CODEC

GNDP

GNDHS

GNDD

M7

VP

H11

GNDA

33 30 26 24 17 16 15 14 12 8

J1

H10

VA

VPROG_CP

w w w . c h i n a f i x . c o m

VP_MBUS

FLYP

FLYC

FLYN

+VCP_FILT

GNDCP

-VCP_FILT
LP_FILT+

FILT+

FILT-

K12

L12

M12

J10

L11

M11
F12

H1

H2

CALTRA_FLYP

CALTRA_FLYC

CALTRA_FLYN

CALTRA_VCP_FILTP

XW3660

CALTRA_GNDCP

CALTRA_VCP_FILTN
CALTRA_LP_FILTP

CALTRA_FILTP

SM

1 2

ROOM=CODEC

1

C3660

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CODEC

1

C3661

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=CODEC

1

C3662

4.7UF

20%

6.3V

2

X5R-CERM1
402

ROOM=CODEC

1

C3663

4.7UF

20%

6.3V

2

X5R-CERM1
402

ROOM=CODEC

1

C3664

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=CODEC

1

C3665

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

PP1V8_SDRAM

1

R3650

1.00K

5%
1/32W
MF
01005

2

ROOM=CODEC

16

16 8

8

8

8

8

8

25 8

25 8

25 8

25 8

9 8

9 8

8

9 8

8

8

8

8

16

CODEC_RESET_L

CODEC_TO_PMU_MIKEY_INT_L
CODEC_TO_AP_PMU_INT_L

SPI_AP_TO_CODEC_CS_L
SPI_AP_TO_CODEC_SCLK

SPI_AP_TO_CODEC_MOSI
SPI_CODEC_TO_AP_MISO

45_I2S_AP_TO_CODEC_MCLK

45_I2S_AP_TO_CODEC_ASP_BCLK
I2S_AP_TO_CODEC_ASP_LRCLK
I2S_AP_TO_CODEC_ASP_DOUT
I2S_CODEC_TO_AP_ASP_DIN

45_I2S_AP_OWL_TO_CODEC_XSP_BCLK
I2S_AP_OWL_TO_CODEC_XSP_LRCLK
I2S_AP_TO_CODEC_XSP_DOUT
I2S_CODEC_TO_AP_OWL_XSP_DIN

45_I2S_AP_TO_CODEC_MSP_BCLK
I2S_AP_TO_CODEC_MSP_LRCLK
I2S_AP_TO_CODEC_MSP_DOUT
I2S_CODEC_TO_AP_MSP_DIN

PMU_TO_CODEC_DIGLDO_PULLDN

H3

RESET*

K8

WAKE*

K9

INT*

C9

CS*

C8

CCLK

B8

MOSI

A8

MISO

C12

MCLK

C6

ASP_SCLK

C5

ASP_LRCK/FSYNC

B5

ASP_SDIN

B6

ASP_SDOUT

B11

XSP_SCLK

C11

XSP_LRCK/FSYNC

A11

XSP_SDIN/DAC2B_MUTE

A10

XSP_SDOUT

B7

MSP_SCLK

C7

MSP_LRCK/FSYNC

D8

MSP_SDIN

A7

MSP_SDOUT

H5

DIGLDO_PULLDN

J5

DIGLDO_PDN

U3500

WLCSP-1

SYM 3 OF 3

CS42L71

CRITICAL

ROOM=CODEC

JTAG_TMS

JTAG_TCK

JTAG_TDI

JTAG_TDO

TSTO
TSTO
TSTO
TSTO
TSTO
TSTO
TSTO
TSTO

TSTI
TSTI
TSTI
TSTI
TSTI
TSTI
TSTI
TSTI
TSTI

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND

D3
D4
D2
C2

D11
B10
D5
D6
E5
E6
E7
K4

C10
D10
D7
D9
E8
E9
G11
H4
M1

A1
A12
B12
E2
E3
E4
E10
F4
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
H6
H7
H8
H9

J8

NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC

D

C

B

A

A6

B1

E11

F11

L4

L7

J2

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

AUDIO:CALTRA CODEC (2/2)

XW3600

SHORT-10L-0.1MM-SM

1 2

ROOM=CODEC

8 7 5 4 2 1

24

CODEC_AGND

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36

Apple Inc.

R

DRAWING NUMBER SIZE

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

36 OF 49
24 OF 60

A

D

345678

2 1

D

33 26 24 22 21 17 15 14

PP_VCC_MAIN

SPEAKER AMPLIFIER

APN: 338S1285

PP1V8_VA

1

C3709

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SPKR_AMP

1

C3730

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SPKR_AMP

D

24 15

C

VOLTAGE=8.0V

PP_SPKR_VBOOST

1

C3741

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=SPKR_AMP

1

C3742

22UF

20%
10V

2

X5R-CERM
0603-1

1

C3745

0.1UF

10%
16V

2

X5R-CERM
0201

ROOM=SPKR_AMP

CRITICAL

L3700

1.2UH-20%-3.0A-0.080OHM

1 2

PIQA20161T-SM

ROOM=SPKR_AMP

30 17 8

30 17 8

8

IN

AP_TO_SPEAKERAMP_RESET_L

1

R3729

100K

5%
1/32W
MF

2

01005

ROOM=SPKR_AMP

24 8

24 8

24 8

24 8

BI

IN

8

OUT

8

IN

IN

IN

IN

OUT

PP_SPEAKERAMP_SW

VOLTAGE=8.0V

I2C1_AP_SDA
I2C1_AP_SCL
SPEAKERAMP_TO_AP_INT_L

45_I2S_AP_TO_SPEAKERAMP_MCLK
45_I2S_AP_TO_CODEC_ASP_BCLK
I2S_AP_TO_CODEC_ASP_LRCLK
I2S_AP_TO_CODEC_ASP_DOUT
I2S_CODEC_TO_AP_ASP_DIN

1

C3746

100PF

5%
16V

2

NP0-C0G
01005

ROOM=SPKR_AMP

A2
B2

D5
D6
A7
A6

D7
C7

E7
E6
F6
F7
E5

SW

SDA
SCL
INT*
RESET*
ALIVE

ADO

1M INT PD

MCLK

1M INT PD

SCLK

1M INT PD

LRCK/FSYNC

1M INT PD

SDIN

1M INT PD

SDOUT

1M INT PD

A1

B1

C1

D1

A4

VBST

VP

U3700

CS35L21-XWZR

WLCSP

VER1

ROOM=SPKR_AMP

CRITICAL

GNDP

A5

F5

VA

LDO_FILT

VSENSE-

VSENSE+

ISENSE-

ISENSE+

GNDA

FILT+

OUT+

OUT-

IREF+

F2

SPEAKERAMP_FILT

C5

SPEAKERAMP_LDO_FILT

E3

VSENSE_NEG

E2

VSENSE_POS

F1

NC

E1

NC

D2
C2

B7

SPEAKERAMP_IREF

1

R3735

44.2K

1%
1/32W
MF
01005

2

ROOM=SPKR_AMP

1

C3729

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=SPKR_AMP

1

C3740

4.7UF

20%

6.3V

2

CER-X5R
0402

ROOM=SPKR_AMP

XW3703

SHORT-10L-0.1MM-SM

1 2

XW3704

SHORT-10L-0.1MM-SM

1 2

C

B

A3B3B4

C3C4D3

D4

B5

B6

C6

E4

F3

F4

w w w . c h i n a f i x . c o m

C3760

1000PF

10%
10V
X5R

ROOM=SPKR_AMP

01005

SPEAKERAMP_TO_SPEAKER_OUT_POS

SPEAKERAMP_TO_SPEAKER_OUT_NEG

1

2

1

C3763

1000PF

10%
10V

2

X5R
01005

ROOM=SPKR_AMP

C3700

1000PF

ROOM=SPKR_AMP

01005

10%
10V
X5R

1

2

1

C3702

1000PF

10%
10V

2

X5R
01005

ROOM=SPKR_AMP

31

31

B

A

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

AUDIO:SPEAKER DRIVER

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

37 OF 49
25 OF 60

A

D

DISPLAY & TOUCH - POWER SUPPLIES

345678

2 1

D

C

33 26 25 24 22 21 17 15 14

1.0UH-20%-2.25A-0.15OHM

26 16 8

26 16 8

28 16

30 16 9 5

PP_VCC_MAIN

ROOM=CHESTNUT

I2C0_AP_SCL
I2C0_AP_SDA
LCM_TO_CHESTNUT_PWR_EN
PMU_TO_OWL_ACTIVE_READY
CHESTNUT_TO_PMU_ADCMUX

16

IN

BI

IN

IN

OUT

CRITICAL

L4000

PIXB2016FE-SM

D

CHESTNUT DISPLAY PMU

APN:338S1172

20%

1

2

D1

VIN

B2

SW

A2

SYNC

NO INT PULL

D3

SCL

D2

SDA

C3

LCM_EN

200K INT PD

C2

RESET*

NO INT PULL

E1

ADCMUX

U4000

TPS65730A0PYFF

BGA

ROOM=CHESTNUT

CRITICAL

VNEG(SUB)

AGND

C1

PGND2

PGND1

B1

D4

CF1
CF2

LCMBST

CPUMP

VNEG

HVLDO1
HVLDO2
HVLDO3

C4
E4

B3
B4

E3
E2
A4
A3
A1

PP_CHESTNUT_CP

VOLTAGE=6.0V

VOLTAGE=-6.0V

PN_CHESTNUT_CN

PP6V0_LCM_BOOST

VOLTAGE=6.0V

1

C4003

1UF

20%
VOLTAGE=16V

2

CER-X5R
0201

ROOM=CHESTNUT

1

C4004

10UF

20%
VOLTAGE=10V

2

X5R-CERM
0402-8

ROOM=CHESTNUT

1

C4002

10UF

20%
VOLTAGE=10V

2

X5R-CERM
0402-8

ROOM=CHESTNUT

1

C4005

10UF

20%
VOLTAGE=10V

2

X5R-CERM
0402-8

ROOM=CHESTNUT

1

C4006

10UF

20%
VOLTAGE=10V

2

X5R-CERM
0402-8

ROOM=CHESTNUT

VOLTAGE=5.7V

VOLTAGE=5.7V

VOLTAGE=5.1V

1

C4007

22UF

20%
VOLTAGE=10V

2

X5R-CERM
0603-1

ROOM=CHESTNUT

PP5V7_SAGE_AVDDH
PP5V7_LCM_AVDDH
PP5V1_GRAPE_VDDH

PN5V7_SAGE_AVDDN

VOLTAGE=-5.7V

29

28

29

29 28

C

1

C4000

10UF

VOLTAGE=6.3V

CERM-X5R

ROOM=CHESTNUT

2

0402-9

PP_CHESTNUT_SW

VOLTAGE=6.3V

B

33 26 25 24 22 21 17 15 14

PP_VCC_MAIN

C4020

10UF

VOLTAGE=6.3V

ROOM=BACKLIGHT

16 9

IN

9

IN

20%

CERM-X5R

0402-9

45_DWI_PMGR_TO_PMU_BACKLIGHT_MOSI
45_DWI_PMGR_TO_BACKLIGHT_SCLK

1

2

33 30 24 17 16 15 14 12 8

C4021

10UF

VOLTAGE=6.3V

ROOM=BACKLIGHT

20%

CERM-X5R

0402-9

1

2

PP1V8_SDRAM

1

R4020

200K

1%
1/32W
MF
01005

ROOM=BACKLIGHT

2

LED BACKLIGHT DRIVER

APN:353S00640

CRITICAL

L4021

1.0UH-20%-3.6A-0.060OHM

1 2

PIQA20161T-SM

ROOM=BACKLIGHT

CRITICAL

L4020

15UH-20%-0.72A-0.9OHM

1 2

PITA32251T-SM

ROOM=BACKLIGHT

ROOM=BACKLIGHT

U4020

LM3539A1

D4

IN OUT

D3

VIO/HWEN

C2

SDI

C3

SCK

B2

SDA

A2

SCL

D1

TRIG

D2

INHIBIT

DSBGA

CRITICAL

PP_BL_SW2

VOLTAGE=25V

PP_BL_SW1

VOLTAGE=25V

A1
C4

SW1

SW2_1
SW2_2

LED1

LED2

A3
A4

C1
B1

PP_LCM_BL_CAT1
PP_LCM_BL_CAT2

CRITICAL

D4021

DSN2

A K

NSR05F30NXT5G

ROOM=BACKLIGHT

CRITICAL

D4020

NSR0530P2T5G

SOD-923-1

ROOM=BACKLIGHT

VOLTAGE=21V

VOLTAGE=21V

KA

28

28

w w w . c h i n a f i x . c o m

1

C4022

100PF

5%
VOLTAGE=35V

2

NP0-C0G
01005

ROOM=BACKLIGHT

VOLTAGE=35V

PP_LCM_BL_ANODE

1

C4023

10UF

20%
VOLTAGE=35V

2

X5R-CERM
0603

ROOM=BACKLIGHT

28

33 26 25 24 22 21 17 15 14

33 31 30 15

27 3

IN

IN

PP_VCC_MAIN

C4040

10UF

VOLTAGE=6.3V

CERM-X5R

0402-9

ROOM=MOJAVE

1

20%

2

PP3V0_TRISTAR

MESA_TO_BOOST_EN

CRITICAL

L4040

1.0UH-20%-0.4A-0.636OHM

1 2

0403

ROOM=MOJAVE

MOJAVE MESA BOOST

PP13V0_MESA_SW

VOLTAGE=18.0V

PP12V0_MOJAVE_LDOIN

VOLTAGE=12.0V

APN:353S4207 (A1)

U4040

LM3638A1

BGA

B1
A2
B2

A3
C2

SW

VIN
EN_M

EN_S
LDOIN

ROOM=MOJAVE

CRITICAL

PGND

AGND

B3

A1

VOUT

PMID

C3

C1

1

C4042

56PF

5%
VOLTAGE=25V

2

NP0-C0G
0201

ROOM=MOJAVE

1

C4041

2.2UF

20%
VOLTAGE=25V

2

X5R-CERM
0402-1

ROOM=MOJAVE

PP11V3_MESA

VOLTAGE=11.5V

1

C4043

2.2UF

20%
VOLTAGE=25V

2

X5R-CERM
0402-1

ROOM=MOJAVE

27 3

B

A

GND

26 16 8

26 16 8

33 22

BI

IN

7

IN

IN

I2C0_AP_SDA

I2C0_AP_SCL
AP_TO_MUON_BL_STROBE_EN
BB_TO_LED_DRIVER_GSM_BURST_IND

8 7 5 4 2 1

GND

B3

B4

PAGE TITLE

DISPLAY:POWER

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=N/ASYNC_MASTER=N/A

051-00648

4.0.0

40 OF 49
26 OF 60

A

D

MESA POWER AND IO FILTERS

345678

2 1

D

C

MESA POWER

15

26 3

PP3V1_MESA

PP1V9_MESA

15

PP11V3_MESA

1

C4104

2.2UF

2

1

C4106

2.2UF

2

20%

6.3V
X5R-CERM
0201

ROOM=MAMBA_MESA

20%

6.3V
X5R-CERM
0201

ROOM=MAMBA_MESA

1

C4103

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=MAMBA_MESA

FL4105

70-OHM-25%-0.28A

1 2

01005

ROOM=MAMBA_MESA

FL4107

70-OHM-25%-0.28A

1 2

01005

ROOM=MAMBA_MESA

1

C4102

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=MAMBA_MESA

1

C4105

100PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

1

C4107

100PF

5%
35V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

FL4100

80-OHM-25%-1000MA

1 2

0201

ROOM=MAMBA_MESA

PP1V9_MESA_CONN

PP11V3_MESA_CONN

1

C4101

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=MAMBA_MESA

31

31

PP3V1_MESA_CONN

1

C4100

100PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

D

31

C

B

MESA DIGITAL I/O

FL4110

120-OHM-210MA

8

IN

8

IN

8

OUT

8

OUT

SPI_AP_TO_MESA_MOSI

SPI_AP_TO_MESA_SCLK

SPI_MESA_TO_AP_MISO SPI_MESA_TO_AP_MISO_CONN

MESA_TO_AP_INT

1 2

01005

ROOM=MAMBA_MESA

R4111

0.00

1 2

1/32W
01005

ROOM=MAMBA_MESA

FL4112

120-OHM-210MA

1 2

01005

ROOM=MAMBA_MESA

FL4114

120-OHM-210MA

1 2

01005

ROOM=MAMBA_MESA

0%
MF

1

C4110

56PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

1

C4111

56PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

1

C4112

56PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

1

C4115

100PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

SPI_AP_TO_MESA_MOSI_CONN

SPI_AP_TO_MESA_SCLK_CONN

MESA_TO_AP_INT_CONN

31

31

B

w w w . c h i n a f i x . c o m

31

31

A

26 3

R4116

681

OUT

8

OUT

MESA_TO_BOOST_EN

BUTTON_MENU_KEY_L

1

2

C4117

56PF

5%
16V
NP0-C0G
01005

ROOM=MAMBA_MESA

1 2

1%

1/32W

MF

01005

ROOM=MAMBA_MESA

FL4143

120-OHM-210MA

1 2

01005

ROOM=MAMBA_MESA

1

C4116

56PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

NOSTUFF

1

DZ4101

12V-33PF

01005-1

2

MESA_TO_BOOST_EN_CONN

BUTTON_MENU_KEY_CONN_L

31

31

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

MESA POWER AND IO FILTERS

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

41 OF 49

SHEET

27 OF 60

D

A

8 7 5 4 2 1

36

DISPLAY FLEX

345678

2 1

DISPLAY CONNECTOR

THIS ONE ON MLB --->

516S1051 (RCPT)
516S1050 (PLUG)

D

DISPLAY POWER

26

PP5V7_LCM_AVDDH

C4200

2.2UF

20%

6.3V

X5R-CERM

0201

ROOM=LCM_B2B

20%

6.3V
0201

1

C4202

2.2UF

2

X5R-CERM

ROOM=LCM_B2B

1

C4201

2.2UF

2

X5R-CERM

ROOM=LCM_B2B

20%

6.3V
0201

1

2

FL4200

240OHM-350MA

12

0201

ROOM=LCM_B2B

1

C4203

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=LCM_B2B

FL4205

240OHM-350MA

9 8 7 6 5 3

29 21

20 14 13 12

0201

ROOM=LCM_B2B

12

1

C4205

2.2UF

20%

6.3V

2

X5R-CERM
0201

ROOM=LCM_B2B

1

2

PP1V8_LCM_CONNPP1V8

C4206

100PF

5%

16V

NP0-C0G

01005

ROOM=LCM_B2B

FL4207

70-OHM-25%-0.28A

29 26 28

PN5V7_SAGE_AVDDN PN5V7_SAGE_AVDDN_CONN

01005

ROOM=LCM_B2B

12

1

2

C4207

100PF

5%

16V

NP0-C0G

01005

ROOM=LCM_B2B

PP5V7_LCM_AVDDH_CONN

1

2

C4204

100PF

16V

NP0-C0G

01005

ROOM=LCM_B2B

28

5%

28 3

OUT

28

DISPLAY CONTROL SIGNALS

LCD_TO_AP_PIFA_CONN

1

C4208

56PF

5%
16V

2

NP0-C0G
01005

ROOM=LCM_B2B

CRITICAL

ROOM=LCM_B2B

J4200

BM15AP-0.8-22DP-0.35V

M-ST-SM

24
23

PN_SAGE_TO_TOUCH_VCPL

29

90_MIPI_AP_TO_LCM_DATA0_CONN_P

28

90_MIPI_AP_TO_LCM_DATA0_CONN_N

28

90_MIPI_AP_TO_LCM_DATA1_CONN_P LCM_TO_AP_HIFA_BSYNC_CONN

28 28

90_MIPI_AP_TO_LCM_DATA1_CONN_N

28

90_MIPI_AP_TO_LCM_CLK_CONN_P

28

25
26

12
34
56
78
910
1112
1314
1516
1718
1920
2122

LCM_TO_CHESTNUT_PWR_EN_CONN

PP5V7_LCM_AVDDH_CONN

AP_TO_LCM_RESET_CONN_L

PMU_TO_LCM_PANIC_CONN

PP_LCM_BL_ANODE_CONN

PN5V7_SAGE_AVDDN_CONN

PP1V8_LCM_CONN

LCD_TO_AP_PIFA_CONN

PP_LCM_BL_CAT1_CONN90_MIPI_AP_TO_LCM_CLK_CONN_N
PP_LCM_BL_CAT2_CONN

28

28

28

28

28

28

D

28 3

28 3

28 3 28

28 3

C

B

BACKLIGHT

26

26

26

PP_LCM_BL_ANODE

PP_LCM_BL_CAT1

PP_LCM_BL_CAT2

DISPLAY MIPI

7

IN

7

IN

7

IN

90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_CONN_P

90_MIPI_AP_TO_LCM_CLK_N

90_MIPI_AP_TO_LCM_DATA0_P

FL4211

240OHM-350MA

1 2

0201

ROOM=LCM_B2B

FL4212

240OHM-350MA

1 2

0201

ROOM=LCM_B2B

FL4213

240OHM-350MA

1 2

0201

ROOM=LCM_B2B

CRITICAL

L4200

65-OHM-0.1A-0.7-2GHZ

TAM0605

4

ROOM=LCM_B2B

SYM_VER-2

CRITICAL

L4201

65-OHM-0.1A-0.7-2GHZ

4

TAM0605

SYM_VER-2

PP_LCM_BL_ANODE_CONN

1

C4211

100PF

5%
35V

2

NP0-C0G
01005

ROOM=LCM_B2B

PP_LCM_BL_CAT1_CONN

1

C4212

100PF

5%
35V

2

NP0-C0G
01005

ROOM=LCM_B2B

PP_LCM_BL_CAT2_CONN

1

C4213

100PF

5%
35V

2

NP0-C0G
01005

ROOM=LCM_B2B

1

23

90_MIPI_AP_TO_LCM_CLK_CONN_N

1

90_MIPI_AP_TO_LCM_DATA0_CONN_P

FL4220

120-OHM-210MA

26 16

28 3

OUT

LCM_TO_CHESTNUT_PWR_EN

01005

ROOM=LCM_B2B

12

1

C4220

100PF

5%
16V

2

NP0-C0G
01005

LCM_TO_CHESTNUT_PWR_EN_CONN

ROOM=LCM_B2B

28

C

FL4221

120-OHM-210MA

8

28 3

IN

AP_TO_LCM_RESET_L

R4220

100K

1%

1/32W

MF

01005

ROOM=LCM_B2B

1

2

01005

ROOM=LCM_B2B

12

1

C4221

100PF

5%
16V

2

NP0-C0G
01005

AP_TO_LCM_RESET_CONN_L

ROOM=LCM_B2B

28

FL4222

120-OHM-210MA

16

IN

28 3

PMU_TO_LCM_PANICB

01005

ROOM=LCM_B2B

12

PMU_TO_LCM_PANIC_CONN

1

C4222

100PF

5%
16V

2

NP0-C0G
01005

ROOM=LCM_B2B

28

OWL TO TOUCH INTERFACE

28

28

28

33 29 9 8

OUT

LCM_TO_AP_HIFA_BSYNC

w w w . c h i n a f i x . c o m

FL4230

120-OHM-210MA

12

01005

ROOM=LCM_B2B

LCM_TO_AP_HIFA_BSYNC_CONN

1

C4230

56PF

5%
16V

2

NP0-C0G
01005

ROOM=LCM_B2B

28

B

7

IN

90_MIPI_AP_TO_LCM_DATA0_N

ROOM=LCM_B2B

CRITICAL

L4202

65-OHM-0.1A-0.7-2GHZ

7

IN

7

IN

90_MIPI_AP_TO_LCM_DATA1_P

90_MIPI_AP_TO_LCM_DATA1_N

TAM0605

4

ROOM=LCM_B2B

SYM_VER-2

23

90_MIPI_AP_TO_LCM_DATA0_CONN_N

1

90_MIPI_AP_TO_LCM_DATA1_CONN_P

23

90_MIPI_AP_TO_LCM_DATA1_CONN_N

28

28

28

29

OUT

PROX TO TOUCH INTERFACE

CUMULUS_TO_PROX_RX_EN_1V8

FL4241

1 2

120-OHM-210MA

01005

ROOM=LCM_B2B

CUMULUS_TO_PROX_RX_EN_1V8_CONN

1

C4241

100PF

5%
16V

2

NP0-C0G
01005

ROOM=LCM_B2B

20

A

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

DISPLAY FLEX

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

42 OF 49
28 OF 60

A

D

345678

2 1

C

B

D403 (B2B,DRIVER ICS)

CUMULUS C1

343S0638

C1

C8

C5

VDDIO

VDDH

VDDCORE

U4301

CUMULUS-C1

WLBGA

GND

C7

C9

G2

45_PROX_TO_CUMULUS_RX

ROOM=CUMULUS

20

C4301

1000PF

1 2

10%

6.3V

X5R-CERM

01005

45_AP_TO_TOUCH_CLK32K_RESET_L

8

ON MLB ->
ON FLEX->

516S1071 PLUG
516S1070 RCPT

45_PROX_TO_CUMULUS_RX_FILT

ROOM=CUMULUS

ROOM=CUMULUS

SPI_AP_TO_TOUCH_CS_L

8

TOUCH_TO_AP_INT_L

8

SPI_AP_TO_TOUCH_SCLK

8

SPI_AP_TO_TOUCH_MOSI

8

SPI_TOUCH_TO_AP_MISO

8

PP4301
PP4302

P2MM-NSM

P2MM-NSM

(TURN ON LATER THAN PP1V8_TOUCH)
(TURN OFF SAME TIME AS PP1V8_TOUCH)

PP5V1_GRAPE_VDDH

26

1% MF

ROOM=CUMULUS

ROOM=CUMULUS

1

PP

SM

1

PP

SM

XW4301

1 2

ROOM=CUMULUS

ROOM=TOUCH_B2B

J4300

43 44

1

2

R4301

22.1K

1 2

010051/32W

C4303

27PF

NP0-C0G

01005

MF

01005

ROOM=CUMULUS

SM

AA21

M-ST-SM

C4302

10UF

20%
10V
X5R-CERM
0402-1

ROOM=CUMULUS

1

5%

16V

2

1

C4304

4.7UF

20%

6.3V

2

X5R-CERM1
402

ROOM=CUMULUS

SAGE_TO_CUMULUS_IN<2>

29

SAGE_TO_CUMULUS_IN<1>

29

SAGE_TO_CUMULUS_IN<6>

29

SAGE_TO_CUMULUS_IN<7>

29

SAGE_TO_CUMULUS_IN<4>

29

SAGE_TO_CUMULUS_IN<8>

29

SAGE_TO_CUMULUS_IN<3>

29

SAGE_TO_CUMULUS_IN<5>

29

SAGE_TO_CUMULUS_IN<9>

29

SAGE_TO_CUMULUS_IN<0>

29

SAGE_TO_CUMULUS_IN<14>

29

SAGE_TO_CUMULUS_IN<10>

29

SAGE_TO_CUMULUS_IN<13>

29

SAGE_TO_CUMULUS_IN<11>

29

SAGE_TO_CUMULUS_IN<12>

29

PP_CUMULUS_VDDCORE

PP_CUMULUS_VDDANA

1

C4305

2

ROOM=CUMULUS

45_PROX_TO_CUMULUS_RX_IN

R4302

1 2

10.2

29

TOUCH_TO_AP_SPI1_MISO_R

1%
1/32W

PP1V8_CUMULUS_VDDLDO

CUMULUS_TO_PROX_TX_EN_1V8_L

29

45_AP_TO_TOUCH_CLK32K_RESET_L_XW

AP_TO_TOUCH_RESET_L

8

TOUCH B2B

4.7UF

20%

6.3V
X5R-CERM1
402

NC

B9

IN0_0

B8

IN1_0

A9

IN2_0

B7

IN3_0

B6

IN4_0

A8

IN5_0

B5

IN6_0

B4

IN7_0

A7

IN8_0

B3

IN9_0

A6

IN10_0

A3

IN11_0

A5

IN12_0

A4

IN13_0

B2

IN14_0

A2

IN14_1

E4

H_CS*

F1

H_INT*

D3

H_SCLK

D2

H_SDI

E1

H_SDO

C4

JTAG_TCK

C3

JTAG_TDI

E2

JTAG_TDO

C6

JTAG_TMS

E3

BCFG_RTCK

D1

CLKIN/RESET*

D9

RSTOVR*

B1

VDDANA

29

PP1V8_CUMULUS_VDDLDO

1

C4306

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CUMULUS

F4

A1

ROOM=CUMULUS

VDDLDO

VSTM_0
VSTM_1
VSTM_2
VSTM_3
VSTM_4
VSTM_5
VSTM_6
VSTM_7
VSTM_8

VSTM_9
VSTM_10
VSTM_11
VSTM_12
VSTM_13
VSTM_14
VSTM_15
VSTM_16
VSTM_17
VSTM_18
VSTM_19

GPIO_1/CK
GPIO_2/SD

GPIO_3
GPIO_4

TM_ACS*

TM_OVR

E9
E5
F7
E6
E7
F8
G9
D6
D7
D8
F9
D5
F6
F5
G4
E8
G8
G7
G6
G5

G1
D4
F2
F3

C2
G3

PN_SAGE_TO_TOUCH_VCPL

29 28

XW4302

SM

1 2

ROOM=CUMULUS

ROOM=CUMULUS

R4304

220K

1 2

5%

1/32W

CUMULUS_TO_SAGE_VSTM_OUT<2>
CUMULUS_TO_SAGE_VSTM_OUT<5>
CUMULUS_TO_SAGE_VSTM_OUT<16>
CUMULUS_TO_SAGE_VSTM_OUT<18>
CUMULUS_TO_SAGE_VSTM_OUT<17>
CUMULUS_TO_SAGE_VSTM_OUT<11>
CUMULUS_TO_SAGE_VSTM_OUT<13>
CUMULUS_TO_SAGE_VSTM_OUT<7>
CUMULUS_TO_SAGE_VSTM_OUT<3>
CUMULUS_TO_SAGE_VSTM_OUT<9>
CUMULUS_TO_SAGE_VSTM_OUT<10>
CUMULUS_TO_SAGE_VSTM_OUT<1>
CUMULUS_TO_SAGE_VSTM_OUT<4>
CUMULUS_TO_SAGE_VSTM_OUT<8>
CUMULUS_TO_SAGE_VSTM_OUT<12>
CUMULUS_TO_SAGE_VSTM_OUT<0>
CUMULUS_TO_SAGE_VSTM_OUT<15>
CUMULUS_TO_SAGE_VSTM_OUT<19>
CUMULUS_TO_SAGE_VSTM_OUT<14>
CUMULUS_TO_SAGE_VSTM_OUT<6>

NOTE: LCM_TO_AP_HIFA_BSYNC_BUFF

CUMULUS_TO_SAGE_BOOST_EN

U12_GPIO_3

CUMULUS_TO_SAGE_GCM_SEL

CUMULUS_TO_PROX_RX_EN_1V8

1

R4303

100K

5%
1/32W
MF
01005

2

ROOM=CUMULUS

MF
01005

1

PP1V8_TOUCH

SM

PP4303

PP

P4MM-NSM

29

w w w . c h i n a f i x . c o m

29 14

1

C4307

0.1UF

10%
16V

2

X5R-CERM
0201

ROOM=SAGE

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

ROOM=CUMULUS

28

1

C4308

0.1UF

10%
16V

2

X5R-CERM
0201

28 26

PP1V8_TOUCH

ROOM=SAGE

PN5V7_SAGE_AVDDN

29 14

THESE ARE ROUTED TOGETHER

SAGE_TO_TOUCH_VCPH_REF

29

SAGE_TO_TOUCH_VCPL_REF

29

1

C4309

1UF

10%
16V

2

X6S-CERM
0402

ROOM=SAGE

R4307

4.7

1 2

1%

1/32W

MF

01005

ROOM=SAGE

SPECIAL - CANNOT SWAP
SPECIAL - CANNOT SWAP

C4310

0.01UF

10%

6.3V
X5R

01005

ROOM=SAGE

29 26

1

2

PP5V7_SAGE_AVDDH

C4313

0.01UF

ROOM=SAGE

10%

6.3V
X5R

01005

ROOM=SAGE

1

C4311

1UF

10%
16V

2

X6S-CERM
0402

ROOM=SAGE

PN5V7_SAGE_AVDDN_INT

1

C4312

10UF

20%
10V

2

X5R-CERM
0402-1

ROOM=SAGE

1

C4318

0.1UF

2

CERM-X5R

ROOM=SAGE

C4314

0.33UF

20%

20V
TANT
0402

10%

6.3V
0201

1

2

1

C4316

1UF

10%
16V

2

X6S-CERM
0402

ROOM=SAGE

1

C4317

10UF

20%
10V

2

X5R-CERM
0402-1

ROOM=SAGE

1

2

C4319

1000PF

10%
25V

X7R-CERM

0201

ROOM=SAGE

PP_SAGE_TO_TOUCH_VCPH

29

A

DZ4301

GDZT2R6.2B

GDZ-0201

ROOM=SAGE

K

TO CLAMP THE

NEGATIVE RAIL

TOUCH_TO_SAGE_SENSE_IN<4>

29

TOUCH_TO_SAGE_SENSE_IN<3>

29

TOUCH_TO_SAGE_SENSE_IN<5>

29

TOUCH_TO_SAGE_SENSE_IN<0>

29

TOUCH_TO_SAGE_SENSE_IN<12>

29

TOUCH_TO_SAGE_SENSE_IN<7>

29

TOUCH_TO_SAGE_SENSE_IN<10>

29

TOUCH_TO_SAGE_SENSE_IN<1>

29

TOUCH_TO_SAGE_SENSE_IN<11>

29

TOUCH_TO_SAGE_SENSE_IN<2>

29

TOUCH_TO_SAGE_SENSE_IN<13>

29

TOUCH_TO_SAGE_SENSE_IN<14>

29

TOUCH_TO_SAGE_SENSE_IN<8>

29

TOUCH_TO_SAGE_SENSE_IN<9>

29

TOUCH_TO_SAGE_SENSE_IN<6>

29

CUMULUS_TO_SAGE_VSTM_OUT<8>

29

CUMULUS_TO_SAGE_VSTM_OUT<6>

29

CUMULUS_TO_SAGE_VSTM_OUT<12>

29

CUMULUS_TO_SAGE_VSTM_OUT<1>

29

CUMULUS_TO_SAGE_VSTM_OUT<7>

29

CUMULUS_TO_SAGE_VSTM_OUT<15>

29

CUMULUS_TO_SAGE_VSTM_OUT<14>

29

CUMULUS_TO_SAGE_VSTM_OUT<18>

29

CUMULUS_TO_SAGE_VSTM_OUT<5>

29

CUMULUS_TO_SAGE_VSTM_OUT<4>

29

CUMULUS_TO_SAGE_VSTM_OUT<19>

29

CUMULUS_TO_SAGE_VSTM_OUT<13>

29

CUMULUS_TO_SAGE_VSTM_OUT<16>

29

CUMULUS_TO_SAGE_VSTM_OUT<3>

29

CUMULUS_TO_SAGE_VSTM_OUT<2>

29

CUMULUS_TO_SAGE_VSTM_OUT<0>

29

CUMULUS_TO_SAGE_VSTM_OUT<11>

29

CUMULUS_TO_SAGE_VSTM_OUT<17>

29

SAGE_VBIAS

PP_SAGE_VBST_OUTH
PN_SAGE_VBST_OUTL

1

2

C4321

1000PF

X7R-CERM

ROOM=SAGE

10%
25V

0201

1

2

-12V

13.5V

C4324

0.1UF

10%
16V

X5R-CERM

0201

ROOM=SAGE

PP5V7_SAGE_AVDDH

29 26

5.45-5.98V

20%
10V

1

2

E4

SNS_IN0

D4

SNS_IN1

C4

SNS_IN2

B4

SNS_IN3

A4

SNS_IN4

A6

SNS_IN5

B6

SNS_IN6

C6

SNS_IN7

D6

SNS_IN8

E6

SNS_IN9

E8

SNS_IN10

D8

SNS_IN11

C8

SNS_IN12

B8

SNS_IN13

A8

SNS_IN14

G1

DRV_IN0

H1

DRV_IN1

J1

DRV_IN2

K1

DRV_IN3

L1

DRV_IN4

G2

DRV_IN5

H2

DRV_IN6

J2

DRV_IN7

K2

DRV_IN8

L2

DRV_IN9

L3

DRV_IN10

K3

DRV_IN11

J3

DRV_IN12

H3

DRV_IN13

G3

DRV_IN14

L4

DRV_IN15

K4

DRV_IN16

J4

DRV_IN17

H4

DRV_IN18

G4

DRV_IN19

D3

VBIAS

C4323

10UF

X5R-CERM

0402-4

ROOM=SAGE

VCPH_REF/EN
VCPL_REF/EN

B1

VBST_OUTH

E1

VBST_OUTL

PP_SAGE_LX
PP_SAGE_LY

1

C1
D1

L_X
L_Y

L4301

10UH-0.32A-1.56OHM

PSB12101T-SM

ROOM=SAGE

2

SAGE2 C0

APN: 343S0645 (CD3246C0, T6)

1

C4325

0.1UF

2

X5R-CERM

ROOM=SAGE

D2A3F3

AVDDH1

AVDDH2

1

10%
16V

2

0201

F6

AVDDH3

AVDDH4

A1A2F1

H5

VCPH

AVDDL1

VCPL

E2F2C3

VDDIO

VCPL_F

C4326

0.01UF

10%
25V

X5R-CERM

ROOM=SAGE

0201

U4300

SAGE2-C06

ROOM=SAGE

AGND2

AGND1

B3

C2

CSP

AGND4

AGND3

F4

F8

AGND5

AGND6

L5

E3

SNS_OUT0
SNS_OUT1
SNS_OUT2
SNS_OUT3
SNS_OUT4
SNS_OUT5
SNS_OUT6
SNS_OUT7
SNS_OUT8

SNS_OUT9
SNS_OUT10
SNS_OUT11
SNS_OUT12
SNS_OUT13
SNS_OUT14

DRV_OUT0
DRV_OUT1
DRV_OUT2
DRV_OUT3
DRV_OUT4
DRV_OUT5
DRV_OUT6
DRV_OUT7
DRV_OUT8

DRV_OUT9
DRV_OUT10
DRV_OUT11
DRV_OUT12
DRV_OUT13
DRV_OUT14
DRV_OUT15
DRV_OUT16
DRV_OUT17
DRV_OUT18
DRV_OUT19

BSYNC

GCM_TEST

VCM_IN

I2C_SCL

I2C_SDA

BOOST_EN

GO

E5
D5
C5
B5
A5
A7
B7
C7
D7
E7
E9
D9
C9
B9
A9

G6
H6
J6
K6
L6
G7
H7
J7
K7
L7
L8
K8
J8
H8
G8
L9
K9
J9
H9
G9

K5
F9
F7
J5
F5

G5
B2

PP_SAGE_VCPL_F

3.5V

1

2

PP1V8

1

C4327

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SAGE

SAGE_TO_CUMULUS_IN<4>
SAGE_TO_CUMULUS_IN<3>
SAGE_TO_CUMULUS_IN<5>
SAGE_TO_CUMULUS_IN<0>
SAGE_TO_CUMULUS_IN<12>
SAGE_TO_CUMULUS_IN<7>
SAGE_TO_CUMULUS_IN<10>
SAGE_TO_CUMULUS_IN<1>
SAGE_TO_CUMULUS_IN<11>
SAGE_TO_CUMULUS_IN<2>
SAGE_TO_CUMULUS_IN<13>
SAGE_TO_CUMULUS_IN<14>
SAGE_TO_CUMULUS_IN<8>
SAGE_TO_CUMULUS_IN<9>
SAGE_TO_CUMULUS_IN<6>

SAGE_TO_TOUCH_VSTM_OUT<8>
SAGE_TO_TOUCH_VSTM_OUT<6>
SAGE_TO_TOUCH_VSTM_OUT<12>
SAGE_TO_TOUCH_VSTM_OUT<1>
SAGE_TO_TOUCH_VSTM_OUT<7>
SAGE_TO_TOUCH_VSTM_OUT<15>
SAGE_TO_TOUCH_VSTM_OUT<14>
SAGE_TO_TOUCH_VSTM_OUT<18>
SAGE_TO_TOUCH_VSTM_OUT<5>
SAGE_TO_TOUCH_VSTM_OUT<9>
SAGE_TO_TOUCH_VSTM_OUT<10>
SAGE_TO_TOUCH_VSTM_OUT<4>
SAGE_TO_TOUCH_VSTM_OUT<19>
SAGE_TO_TOUCH_VSTM_OUT<13>
SAGE_TO_TOUCH_VSTM_OUT<16>
SAGE_TO_TOUCH_VSTM_OUT<3>
SAGE_TO_TOUCH_VSTM_OUT<2>
SAGE_TO_TOUCH_VSTM_OUT<0>
SAGE_TO_TOUCH_VSTM_OUT<11>
SAGE_TO_TOUCH_VSTM_OUT<17>

LCM_TO_AP_HIFA_BSYNC

CUMULUS_TO_SAGE_GCM_SEL

NC

TOUCH_TO_SAGE_VCM_IN

NC
NC

CUMULUS_TO_SAGE_BOOST_EN

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

D

28 21 20 14 13 12 9 8 7 6 5 3

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

29

33 29 28 9 8

SM

1

PP4306

PP

SM

1

PP4305

PP

P4MM-NSM

ROOM=SAGE

P4MM-NSM

ROOM=SAGE

C

B

SM

1

PP4304

PP

P4MM-NSM

ROOM=SAGE

A

C5
C4
C0
C3
GS1
C2
C1
GS0
VGL
VGH
R10
R7
R1
R5
R6
R8
R9
R4
R3
R2
R0_LEFT

TOUCH_TO_SAGE_SENSE_IN<5>

29

TOUCH_TO_SAGE_SENSE_IN<4>

29

TOUCH_TO_SAGE_SENSE_IN<0>

29

TOUCH_TO_SAGE_SENSE_IN<3>

29

TOUCH_TO_SAGE_SENSE_IN<11>

29

TOUCH_TO_SAGE_SENSE_IN<2>

29

TOUCH_TO_SAGE_SENSE_IN<1>

29

PN_SAGE_TO_TOUCH_VCPL

29 28

PP_SAGE_TO_TOUCH_VCPH

29

SAGE_TO_TOUCH_VSTM_OUT<10>

29

SAGE_TO_TOUCH_VSTM_OUT<7>

29

SAGE_TO_TOUCH_VSTM_OUT<1>

29

SAGE_TO_TOUCH_VSTM_OUT<5>

29

SAGE_TO_TOUCH_VSTM_OUT<6>

29

SAGE_TO_TOUCH_VSTM_OUT<8>

29

SAGE_TO_TOUCH_VSTM_OUT<9>

29

SAGE_TO_TOUCH_VSTM_OUT<4>

29

SAGE_TO_TOUCH_VSTM_OUT<3>

29

SAGE_TO_TOUCH_VSTM_OUT<2>

29

SAGE_TO_TOUCH_VSTM_OUT<0>

29

1 2
3 4
5 6
7 8

9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42

45 46

TOUCH_TO_SAGE_SENSE_IN<6>

TOUCH_TO_SAGE_SENSE_IN<13>

TOUCH_TO_SAGE_SENSE_IN<7>

SAGE_TO_TOUCH_VCPH_REF

SAGE_TO_TOUCH_VCPL_REF

TOUCH_TO_SAGE_VCM_IN

TOUCH_TO_SAGE_SENSE_IN<12>

TOUCH_TO_SAGE_SENSE_IN<9>TOUCH_TO_SAGE_SENSE_IN<10>
TOUCH_TO_SAGE_SENSE_IN<8>

TOUCH_TO_SAGE_SENSE_IN<14>

SAGE_TO_TOUCH_VSTM_OUT<17>
SAGE_TO_TOUCH_VSTM_OUT<16>
SAGE_TO_TOUCH_VSTM_OUT<15>
SAGE_TO_TOUCH_VSTM_OUT<14>
SAGE_TO_TOUCH_VSTM_OUT<13>
SAGE_TO_TOUCH_VSTM_OUT<12>
SAGE_TO_TOUCH_VSTM_OUT<11>

SAGE_TO_TOUCH_VSTM_OUT<0>
SAGE_TO_TOUCH_VSTM_OUT<18>
SAGE_TO_TOUCH_VSTM_OUT<19>

29

29

29

29

29

29

29

29 29

29

29

29

29

29

29

29

29

29

29

29

29

C6
GS3
C7
VGH_REF
VGL_REF
VCOM
GS2
C9
C8
GS4

R17
R16
R15
R14
R13
R12
R11
R0_RIGHT
R18
R19

R4305

100K

1/32W
01005

ROOM=CUMULUS

5%
MF

0603-LLP

TANT

25V
20%

1UF-10OHM

C4315

ROOM=SAGE

LCM_TO_AP_HIFA_BSYNC_BUFF

1

2

CUMULUS_TO_PROX_TX_EN_BUFF

20

1Y

2Y

4

2

C4320

1000PF

1

X7R-CERM

ROOM=SAGE

5

VCC

U4302

74AUP2G3404GN

SOT1115

1A

2A

GND

2

ROOM=CUMULUS

10%
25V

0201

16

3

1

C4322

1000PF

2

X7R-CERM

ROOM=SAGE

10%
25V

0201

1

2

PP1V8_TOUCH

ROOM=CUMULUS

1

R4306

100K

5%
1/32W
MF
01005

2

LCM_TO_AP_HIFA_BSYNC

CUMULUS_TO_PROX_TX_EN_1V8_L

29 14

PAGE TITLE

A

D403 (TOUCH B2B, DRIVER ICS)

DRAWING NUMBER SIZE

29

Apple Inc.

33 29 28 9 8

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

R

051-00648

REVISION

4.0.0

BRANCH

PAGE

43 OF 49

SHEET

29 OF 60

D

8 7 5 4 2 1

36

345678

2 1

D

33 31 26 15

PP3V0_TRISTAR

TRISTAR 2 (A3)

APN:343S0695

PP3V3_ACC

15

PP5V0_USB

D

31 17 3

C

B

16

OUT

TRISTAR_TO_PMU_USB_BRICK_ID

1

C4500

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=TRISTAR

1

C4510

0.01UF

10%

6.3V

2

X5R
01005

ROOM=PMU

1

C4501

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=TRISTAR

R4510

6.34K

1 2

1%

1/32W

MF

01005

ROOM=PMU

33 26 24 17 16 15 14 12 8

23

23

33

33

BI
BI

BI
BI

90_MIKEYBUS_DATA_P
90_MIKEYBUS_DATA_N

90_USB_BB_DATA_P
90_USB_BB_DATA_N

TRISTAR_USB_BRICK_ID_R

5

BI

5

BI

8

IN

8

OUT

8

IN

8

OUT

5

OUT

5

BI

90_USB_AP_DATA_P
90_USB_AP_DATA_N

UART_AP_TO_ACCESSORY_TXD

UART_AP_DEBUG_TXD
UART_AP_DEBUG_RXD

SWD_DOCK_TO_AP_SWCLK
SWD_DOCK_BI_AP_SWDIO

PP1V8_SDRAM

1

C4502

0.01UF

10%

6.3V

2

X5R
01005

ROOM=TRISTAR

F3

F4

VDD_1V8

VDD_3V0

CRITICAL

D5

ROOM=TRISTAR

ACC_PWR

U4500

CBTL1610A3UK

C3

DIG_DP

C4

DIG_DN

A1

USB1_DP

B1

USB1_DN

C2

BRICK_ID

A3

USB0_DP

B3

USB0_DN

E2

UART0_TX

E1

UART0_RX

F2

UART1_TX

F1

UART1_RX

D2

UART2_TX

D1
A5

B5

UART2_RX
JTAG_CLK

JTAG_DIO

NC

w w w . c h i n a f i x . c o m

WLCSP

CON_DET_L

POW_GATE_EN*

SWITCH_EN

HOST_RESET

BYPASS

DVSS

DVSS

DVSS

F5

A6

C1

P_IN
ACC1
ACC2

DP1
DN1

DP2
DN2

SDA
SCL

INT

F6

PP_TRISTAR_PIN

C5

PP_TRISTAR_ACC1

E5

PP_TRISTAR_ACC2

A2

90_TRISTAR_DP1_CONN_P

B2

90_TRISTAR_DP1_CONN_N

A4

90_TRISTAR_DP2_CONN_P

B4

90_TRISTAR_DP2_CONN_N

E3

TRISTAR_CON_DETECT_L

D6

TRISTAR_TO_TIGRIS_VBUS_OFFUART_ACCESSORY_TO_AP_RXD

E4

PMU_TO_OWL_ACTIVE_READY

B6

TRISTAR_TO_PMU_HOST_RESET

D3

I2C1_AP_SDA

D4

I2C1_AP_SCL

C6

TRISTAR_TO_AP_INT

E6

TRISTAR_BYPASS

1

2

C4504

1.0UF

20%

6.3V
X5R
0201-1

ROOM=TRISTAR

31 3

31 3

BI
BI

BI
BI

IN

OUT

IN

OUT

IN

BI

OUT

31 3

31 3

31 3

31 3

31 3

30 17

16

16 8

3

D

Q4500

1

REVERSE_GATE

1

G

S

R4500

10K

5%
1/32W
MF
01005

2

ROOM=TRISTAR

1

C4503

1UF

20%
16V

2

CER-X5R
0201

ROOM=TRISTAR

26 16 9 5

25 17 8

25 17 8

2

CSD68822F4

0402

ROOM=TRISTAR

CRITICAL

C

B

A

30 17

PAGE TITLE

TRISTAR_TO_TIGRIS_VBUS_OFF

I/O:TRISTAR 2

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

ROOM=TRISTAR

P3MM-NSM

SM

1

PP

DRAWING NUMBER SIZE

051-00648

REVISION

BRANCH

PAGE

SHEET

PP4500

SYNC_DATE=N/ASYNC_MASTER=N/A

4.0.0

45 OF 49
30 OF 60

A

D

8 7 5 4 2 1

36

345678

2 1

DOCK FLEX CONNECTOR

D

C

23

23

23

23

23

DOCK FLEX CONNECTOR

AUDIO JACK

R4600

3.3K

OUT

BI

BI

OUT

OUT

FERR-33-OHM-0.8A-0.09-OHM

CODEC_TO_HPHONE_HS3

FERR-33-OHM-0.8A-0.09-OHM

CODEC_TO_HPHONE_HS4

600-OHM-25%-0.28A-0.75OHM

CODEC_TO_HPHONE_HS4_REF

600-OHM-25%-0.28A-0.75OHM

CODEC_TO_HPHONE_HS3_REF

1 2

5%

1/32W

MF

01005

ROOM=DOCK_B2B

FL4600

1 2

0201

ROOM=DOCK_B2B

FL4601

1 2

0201

ROOM=DOCK_B2B

FL4602

1 2

0201

ROOM=DOCK_B2B

FL4603

1 2

0201

ROOM=DOCK_B2B

HPHONE_TO_CODEC_DETECT_CONNHPHONE_TO_CODEC_DETECT

1

C4600

56PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

CODEC_TO_HPHONE_HS3_CONN

1

DZ4600

6.8V-100PF

01005

ROOM=DOCK_B2B

2

NO_XNET_CONNECTION=1

1

C4699

220PF

2

ROOM=DOCK_B2B

CODEC_TO_HPHONE_HS4_CONN

1

DZ4601

6.8V-100PF

01005

ROOM=DOCK_B2B

2

NO_XNET_CONNECTION=1

1

C4698

220PF

2

ROOM=DOCK_B2B

CODEC_TO_HPHONE_HS4_REF_CONN

1

DZ4602

6.8V-100PF

01005

ROOM=DOCK_B2B

2

NO_XNET_CONNECTION=1

CODEC_TO_HPHONE_HS3_REF_CONN

1

DZ4603

6.8V-100PF

01005

ROOM=DOCK_B2B

2

NO_XNET_CONNECTION=1

10%
10V
X7R-CERM
01005

10%
10V
X7R-CERM
01005

31

31

31

31

31

ANTENNA

33 30 26 15

33

IN

33

IN

BB_LAT_GPIO2

BB_LAT_GPIO1 BB_LAT_GPIO1_CONN

PP3V0_TRISTAR

FL4620

120-OHM-210MA

12

01005

ROOM=DOCK_B2B

FL4608

120-OHM-210MA

1 2

01005

ROOM=DOCK_B2B

FL4624

120-OHM-210MA

1 2

01005

ROOM=DOCK_B2B

PP3V0_LAT_CONN

C4620

1

100PF

5%

16V

2

NP0-C0G

01005

ROOM=DOCK_B2B

BB_LAT_GPIO2_CONN

1

C4601

56PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

1

C4624

56PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

31

31

30 17 3

31

VOLTAGE=5.0V

PP5V0_USB

C4650

0.1UF

0201

ROOM=DOCK_B2B

31 25

31 25

10%
25V
X5R

SPEAKERAMP_TO_SPEAKER_OUT_POS

SPEAKERAMP_TO_SPEAKER_OUT_NEG

PP11V3_MESA_CONN

27

PP1V9_MESA_CONN

27

SPI_MESA_TO_AP_MISO_CONN

27

CODEC_TO_HPHONE_L_CONN

31

CODEC_TO_HPHONE_HS4_REF_CONN

31

CODEC_TO_HPHONE_R_CONN

31

CODEC_TO_HPHONE_HS3_CONN

31

CODEC_TO_HPHONE_HS4_CONN

31

31

LOWERMIC1_TO_CODEC_AIN1_CONN_P

31

LOWERMIC1_TO_CODEC_AIN1_CONN_N

31

PP_CODEC_TO_LOWERMIC1_BIAS_CONN

31

LOWERMIC1_BIAS_FILT_RET

24

10%
25V
X5R

0201

1

2

C4653

NP0-C0G-CERM

ROOM=DOCK_B2B

1

2

10%
25V
X5R

1

2

C4651

0.1UF

0201

ROOM=DOCK_B2B

C4652

0.1UF

ROOM=DOCK_B2B

56PF

5%

25V

01005

THIS ONE ON MLB --->

CRITICAL

ROOM=DOCK_B2B

J4600

AA27D-S038VA1

F-ST-SM

NC
NC

5%

35V

1

2

C4655

X7R-CERM

ROOM=DOCK_B2B

1

C4654

100PF

2

NP0-C0G

01005

ROOM=DOCK_B2B

3940

12
34
56
78
910
1112
1314
1516
1718
1920
2122
2324
2526
2728
2930
3132
3334
3536
3738

4142

220PF

10%
25V

0201

516S00116 (RCPT)
516S00117 (PLUG)

1

2

PP3V1_MESA_CONN

MESA_TO_BOOST_EN_CONN

SPI_AP_TO_MESA_SCLK_CONN

BUTTON_MENU_KEY_CONN_L

SPI_AP_TO_MESA_MOSI_CONN

MESA_TO_AP_INT_CONN

HPHONE_TO_CODEC_DETECT_CONN

PP3V0_LAT_CONN
BB_LAT_GPIO2_CONN
BB_LAT_GPIO1_CONN

27

27

27

27

27

27

31

31

31

31

90_TRISTAR_DP1_CONN_P
90_TRISTAR_DP1_CONN_N
90_TRISTAR_DP2_CONN_N
90_TRISTAR_DP2_CONN_PCODEC_TO_HPHONE_HS3_REF_CONN

TRISTAR_CON_DETECT_CONN_L

PP_TRISTAR_ACC1_CONN

PP_TRISTAR_ACC2_CONN

31

31

31

D

3

BI

30
3

BI

30
3

BI

30
3

BI

30

C

B

23

IN

CODEC_TO_HPHONE_L

CODEC_TO_HPHONE_R

LOWER MIC1

23

23

OUT

OUT

24

LOWERMIC1_TO_CODEC_AIN1_P

LOWERMIC1_TO_CODEC_AIN1_N

PP_CODEC_TO_LOWERMIC1_BIAS

FL4604

FERR-33-OHM-0.8A-0.09-OHM

1 2

0201

ROOM=DOCK_B2B

1

DZ4604

6.8V-100PF

01005

ROOM=DOCK_B2B

2

NO_XNET_CONNECTION=1

FL4605

FERR-33-OHM-0.8A-0.09-OHM

1 2

0201

ROOM=DOCK_B2B

1

DZ4610

6.8V-100PF

01005

ROOM=DOCK_B2B

2

NO_XNET_CONNECTION=1

FL4610

120-OHM-210MA

12

01005

ROOM=DOCK_B2B

FL4611

120-OHM-210MA

12

01005

ROOM=DOCK_B2B

FL4612

120-OHM-210MA

12

01005

ROOM=DOCK_B2B

LOWERMIC1_TO_CODEC_AIN1_CONN_P

1

C4610

56PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

LOWERMIC1_TO_CODEC_AIN1_CONN_N

1

C4611

56PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

PP_CODEC_TO_LOWERMIC1_BIAS_CONN

1

C4612

100PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

CODEC_TO_HPHONE_L_CONN

1

C4697

220PF

10%
10V

2

X7R-CERM
01005

ROOM=DOCK_B2B

CODEC_TO_HPHONE_R_CONN

1

C4696

220PF

10%
10V

2

X7R-CERM
01005

ROOM=DOCK_B2B

31

31

31

31

31

SPEAKER

31 25

SPEAKERAMP_TO_SPEAKER_OUT_POS

w w w . c h i n a f i x . c o m

SPEAKERAMP_TO_SPEAKER_OUT_NEG

31 25

C4634

1

100PF

2

1

NP0-C0G

ROOM=DOCK_B2B

C4635

100PF

2

NP0-C0G

ROOM=DOCK_B2B

5%

16V

01005

5%

16V

01005

TRISTAR

30 3 23

OUTIN

PP_TRISTAR_ACC1

30 3

PP_TRISTAR_ACC2

30 3

TRISTAR_CON_DETECT_L

1/32W

5%
MF

R4640

1.00K

01005

ROOM=DOCK_B2B

FL4641

10-OHM-1.1A

1 2

01005

ROOM=DOCK_B2B

FL4642

10-OHM-1.1A

1 2

01005

ROOM=DOCK_B2B

12

1

C4640

27PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

PP_TRISTAR_ACC1_CONN

1

C4641

2

ROOM=DOCK_B2B

PP_TRISTAR_ACC2_CONN

C4642

1

2

ROOM=DOCK_B2B

TRISTAR_CON_DETECT_CONN_L

100PF

5%

16V

NP0-C0G

01005

100PF

5%

16V

NP0-C0G

01005

31

31

B

31

A

SYNC_MASTER=N/A

PAGE TITLE

I/O:DOCK FLEX B2B

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=N/A

051-00648

4.0.0

46 OF 49
31 OF 60

A

D

BUTTON FLEX

345678

2 1

BUTTON FLEX CONNECTOR

516S1040 (PLUG)

D

C

MIC2

ANC REF MIC

23

23

OUT

OUT

24

PP_CODEC_TO_REARMIC2_BIAS

REARMIC2_TO_CODEC_AIN3_N

FL4700

120-OHM-210MA

12

01005

ROOM=BUTTON_B2B

FL4701

120-OHM-210MA

12

01005

ROOM=BUTTON_B2B

FL4702

120-OHM-210MA

12

01005

ROOM=BUTTON_B2B

1

C4700

100PF

5%
16V

2

NP0-C0G
01005

ROOM=BUTTON_B2B

1

C4701

56PF

5%
16V

2

NP0-C0G
01005

ROOM=BUTTON_B2B

1

C4702

56PF

5%
16V

2

NP0-C0G
01005

ROOM=BUTTON_B2B

PP_CODEC_TO_REARMIC2_BIAS_CONN

REARMIC2_TO_CODEC_AIN3_CONN_PREARMIC2_TO_CODEC_AIN3_P

REARMIC2_TO_CODEC_AIN3_CONN_N

32

32

32

PP3V1_VIBE

15

AP_TO_VIBE_TRIG

8

1

C4714

100PF

5%
16V

2

NP0-C0G
01005

BUTTON_B2B

1

R4701

10K

1%
1/32W
MF
01005

2

BUTTON_B2B

1

2

XW4701

SM

1 2

C4715

100PF

5%
16V
NP0-C0G
01005

BUTTON_B2B

VIBE_PWM_G

1

C4716

4.7UF

20%

6.3V

2

X5R-CERM1
402

BUTTON_B2B

G

1

32 22

K

D4701

LLP-DFN1006-2

BAS40LP

BUTTON_B2B

A

3

D

Q4701

S

2

DMN3730UFB4

DFN1006H4-3

SYM_VER_1

BUTTON_B2B

PP_LED_DRIVER_WARM_LED

BUTTON_HOLD_KEY_CONN_L

32

BUTTON_RINGER_A_CONN

32

BUTTON_VOL_DOWN_CONN_L

32

THIS ONE ON MLB --->

1

C4703

100PF

5%
16V

2

NP0-C0G
01005

BUTTON_B2B

BUTTON_B2B

CRITICAL

J4700

205847-018

F-ST-SM

516S1041 (RCPT)

20
19

12
34
56
78
910
1112
1314
1516
1718

21
22

LED_MODULE_NTC_CONN

PP_CODEC_TO_REARMIC2_BIAS_CONN

REARMIC2_TO_CODEC_AIN3_CONN_P
REARMIC2_TO_CODEC_AIN3_CONN_N

32

32

32

32

VIBE_RETURN

BUTTON_VOL_UP_CONN_L

PP_LED_DRIVER_COOL_LED

32

32 22

D

C

B

8

16 8

OUT

OUT

R4710

0.00

1

2

1 2

0%

1/32W

MF

01005

ROOM=BUTTON_B2B

BUTTON_HOLD_KEY_CONN_L

1

DZ4710

5.5V-6.2PF

0201

2

ROOM=BUTTON_B2B

BUTTON_HOLD_KEY_L

C4710

27PF

5%

6.3V

NP0-C0G

ROOM=BUTTON_B2B

0201

FL4711

120-OHM-210MA

BUTTON_RINGER_A BUTTON_RINGER_A_CONN

C4711

27PF

5%

6.3V

NP0-C0G

ROOM=BUTTON_B2B

0201

1 2

1

2

ROOM=BUTTON_B2B

01005

1

DZ4711

5.5V-6.2PF

0201

2

ROOM=BUTTON_B2B

32

32

32 22

32 22

PP_LED_DRIVER_WARM_LED

PP_LED_DRIVER_COOL_LED

STROBE:
WARM LED

COOL LED
MODULE NTC

w w w . c h i n a f i x . c o m

22

OUT

LED_MODULE_NTC

C4723

ROOM=BUTTON_B2B

C4721

ROOM=BUTTON_B2B

R4720

51.1K

1%

1/32W

MF

01005

ROOM=BUTTON_B2B

1

100PF

5%

16V

5%

16V

2

1

2

NP0-C0G

01005

100PF

NP0-C0G

01005

FL4720

120-OHM-210MA

1 2

01005

1

2

ROOM=BUTTON_B2B

1

C4724

27PF

5%
16V

2

NP0-C0G
01005

ROOM=BUTTON_B2B

1

C4722

27PF

5%
16V

2

NP0-C0G
01005

ROOM=BUTTON_B2B

LED_MODULE_NTC_CONN

1

C4720

100PF

5%
16V

2

NP0-C0G
01005

ROOM=BUTTON_B2B

B

32

A

BUTTONS:
HOLD

RINGER
VOL UP/DOWN

16 8

16 8

OUT

OUT

BUTTON_VOL_DOWN_L

BUTTON_VOL_UP_L

C4712

100PF

5%

16V

NP0-C0G

ROOM=BUTTON_B2B

01005

C4713

100PF

5%

16V

NP0-C0G

ROOM=BUTTON_B2B

01005

FL4712

120-OHM-210MA

1 2

1

2

01005

ROOM=BUTTON_B2B

FL4713

120-OHM-210MA

1 2

01005

1

2

ROOM=BUTTON_B2B

BUTTON_VOL_DOWN_CONN_L

1

DZ4712

12V-33PF

01005-1

ROOM=BUTTON_B2B

2

BUTTON_VOL_UP_CONN_L

1

DZ4713

12V-33PF

01005-1

2

ROOM=BUTTON_B2B

32

32

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

I/O:BUTTON FLEX B2B

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

47 OF 49

SHEET

32 OF 60

D

A

8 7 5 4 2 1

36

345678

2 1

D

BASEBAND, WLAN, BT & STOCKHOLM

N69 CELLULAR/WLAN/BT/STOCKHOLM SUBDESIGN SYMBOL

SHARED POWER

PP_BATT_VCC

PP_VCC_MAIN

PP_WL_BT_VDDIO_AP

RFFE_VIO_S2R

BB_USB_VBUS

PP_STOCKHOLM_1V8_S2R

PAC_VDD_3V0

BASEBAND

50_BB_HSIC_DATA

50_BB_HSIC_STROBE

51 18 17 3

58 26 25 24 22 21 17 15 14

33 30 26 24 17 16 15 14 12 8

33 30 26 24 17 16 15 14 12 8

58 57 56

36 16

58 57 56

56 31 30 26 15

36 5

36 5

IN

IN

IN

IN
IN

IN

PP_BATT_VCC
PP_VCC_MAIN

PP1V8_SDRAM

PMU_TO_BB_USB_VBUS_DETECT

PP1V8_SDRAM
PP3V0_TRISTAR

50_AP_BI_BB_HSIC0_DATA

BI

50_AP_BI_BB_HSIC0_STB

BI

WLAN

RF
I566

ADC_PP_LDO5

ADC_PP_LDO11

ADC_SMPS1
ADC_SMPS4

BB_TO_PMU_AMUX_LDO5
BB_TO_PMU_AMUX_LDO11
BB_TO_PMU_AMUX_SMPS1
BB_TO_PMU_AMUX_SMPS4

OUT
OUT
OUT
OUT

36 16

36 16

36 16

36 16

D

C

36 8

36 8

36 16
41 8

36 30

36 30

36 8

36 8

36 8
36 16

36 8

36 8

36 8

36 8

36 8

36 8

36 8

36 8

OUT

IN

OUT

IN

BI
BI

IN

OUT

IN
IN

OUT

IN
IN
IN

OUT

IN
IN

OUT

BB_TO_AP_HSIC_DEVICE_RDY
AP_TO_BB_HSIC_HOST_RDY

BB_TO_PMU_HOST_WAKE_L
AP_TO_BB_WAKE_MODEM

90_USB_BB_DATA_N
90_USB_BB_DATA_P

AP_TO_BB_RADIO_ON_L
BB_TO_AP_RESET_DETECT_L
AP_TO_BB_RESET_L

PMU_TO_BB_PMIC_RESET_L

I2S_BB_TO_AP_DIN

45_I2S_AP_TO_BB_BCLK
I2S_AP_TO_BB_DOUT
I2S_AP_TO_BB_LRCLK

UART_BB_TO_AP_RXD
UART_AP_TO_BB_TXD
UART_AP_TO_BB_RTS_L
UART_BB_TO_AP_CTS_L

BB_DEVICE_RDY
BB_HOST_RDY

BB_WAKE_HOST_L
AP_WAKE_MODEM

90_BB_USB_N

90_BB_USB_P

RADIO_ON_L

BB_RESET_DET_L

BB_RST_L

RF_PMIC_RESET_L

BB_I2S_TXD

BB_I2S_CLK
BB_I2S_RXD

BB_I2S_WS

BB_UART_TXD

BB_UART_RXD

BB_UART_CTS_L

BB_UART_RTS_L

RADIO_MLB

HOST_WAKE_WLAN

WLAN_REG_ON

OSCAR_CONTEXT_A
OSCAR_CONTEXT_B

WLAN_UART_TXD

WLAN_UART_RXD

WLAN_UART_CTS_L

WLAN_UART_RTS_L

PCIE_DEV_WAKE

WLAN_PCIE_WAKE_L

WLAN_PCIE_PERST_L

WLAN_PCIE_CLKREQ_L

90_WLAN_PCIE_REFCLK_N

90_WLAN_PCIE_REFCLK_P

90_WLAN_PCIE_RDN

90_WLAN_PCIE_RDP

90_WLAN_PCIE_TDN

90_WLAN_PCIE_TDP

WLAN_TO_PMU_HOST_WAKE

PMU_TO_WLAN_REG_ON

OWL_TO_WLAN_CONTEXT_A
OWL_TO_WLAN_CONTEXT_B

UART_WLAN_TO_AP_RXD

UART_AP_TO_WLAN_TXD
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_CTS_L

PCIE_AP_TO_WLAN_DEV_WAKE

WLAN_TO_PMU_PCIE_WAKE_L
PCIE_AP_TO_WLAN_RESET_L

PCIE_WLAN_TO_AP_CLKREQ_L

90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_WLAN_REFCLK_P

90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_AP_TO_WLAN_TXD_P

90_PCIE_WLAN_TO_AP_RXD_N
90_PCIE_WLAN_TO_AP_RXD_P

OUT

IN

IN
IN

OUT

IN
IN

OUT

OUT
OUT

IN

BI

IN
IN
IN
IN

OUT
OUT

36 16

36 16

36 9

36 9

36 8

36 8

36 8

36 8

57 8

57 16

57 6

6

57

57 6

57 6

36 6

36 6
36 6

36 6

C

B

36 29 28 9 8

36 9

36 9

36 9

40 13 9

36 8

36 8

36 8

41 26 22

IN

IN

OUT

BI

IN

OUT

IN

OUT

OUT

LCM_TO_AP_HIFA_BSYNC
UART_OWL_TO_BB_TXD

UART_BB_TO_OWL_RXD

SWD_AP_BI_BB_SWDIO
SWD_AP_PERIPHERAL_SWCLK

BB_TO_AP_GPS_TIME_MARK

AP_TO_BB_COREDUMP

BB_TO_AP_IPC_GPIO

41 8

AP_TO_BB_MESA_ON

BB_TO_LED_DRIVER_GSM_BURST_IND

BB_FORCE_PWM
BB_OTHER_RXD

BB_OTHER_TXD

BB_JTAG_TMS
BB_JTAG_TCK

BB_GPS_SYNC

BB_CORE_DUMP

BB_IPC_GPIO1

AP_TO_BB_MESA_ON

GSM_TXBURST_IND

BLUETOOTH

BT_UART_RXD

BT_UART_TXD

BT_UART_RTS_L

BT_UART_CTS_L

BT_PCM_IN

BT_PCM_OUT

BT_PCM_CLK

BT_PCM_SYNC

BT_REG_ON

WAKE_BT

HOST_WAKE_BT

CLK32K_AP

45_PMU_TO_WLAN_CLK32K

UART_AP_TO_BT_TXD

UART_BT_TO_AP_RXD
UART_BT_TO_AP_CTS_L
UART_AP_TO_BT_RTS_L

I2S_AP_TO_BT_DOUT

I2S_BT_TO_AP_DIN

45_I2S_AP_TO_BT_BCLK

I2S_AP_TO_BT_LRCLK

PMU_TO_BT_REG_ON

AP_TO_BT_WAKE

BT_TO_PMU_HOST_WAKE

w w w . c h i n a f i x . c o m

IN
OUT
OUT

IN

IN
OUT

BI

IN

IN

IN

OUT

IN

36 8

36 8

36 8

36 8

36 8
36 8

36 8

36 8

36 16

36 8

36 16

36 16

B

41 31

41 31

OUT

OUT

BB_LAT_GPIO1
BB_LAT_GPIO2

BB_LAT_GPIO1

BB_LAT_GPIO2

ANTENNA STOCKHOLM

STOCKHOLM_UART_TXD

STOCKHOLM_UART_RXD

STOCKHOLM_UART_RTS

STOCKHOLM_UART_CTS

AP_TO_STOCKHOLM_EN

AP_TO_STOCKHOLM_FW_DWLD_REQ

STOCKHOLM_TO_PMU_HOST_WAKE

AP_TO_STOCKHOLM_DEV_WAKE

UART_STOCKHOLM_TO_AP_RXD
UART_AP_TO_STOCKHOLM_TXD

UART_STOCKHOLM_TO_AP_CTS_L

UART_AP_TO_STOCKHOLM_RTS_L

PMU_TO_STOCKHOLM_EN

AP_TO_STOCKHOLM_DWLD_REQUEST

STOCKHOLM_TO_PMU_HOST_WAKE

AP_TO_STOCKHOLM_DEV_WAKE

IN

OUT

OUT

IN

IN

IN

OUT

IN

36 8

36 8

36 8

36 8

36 16

36 7

36 16

58 8

A

PAGE TITLE

BASEBAND:RADIO SYMBOL

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=N/ASYNC_MASTER=N/A

051-00648

4.0.0

49 OF 49
33 OF 60

A

D

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

N69 RADIO_MLB SUBDESIGN - EVT

7

6 5 4 3

2 1

ECNREV DESCRIPTION OF REVISION

CK
APPD

DATE

2015-08-2400047524174 ENGINEERING RELEASED

D

C

8/19/2015

LAST_MODIFICATION=Wed Aug 19 10:34:24 2015

<CSA>

34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60

1

3

4

5

6

7

8

9

10

11

12

13

15

20

21

22

23

24

30

31

32

33

35

36

37

40

41

42

page1
CELL:ALIASES
AP INTERFACE & DEBUG CONNECTORS

BASEBAND PMU (1 0F 2)
BASEBAND PMU (2 OF 2)

BASEBAND (1 OF 2)
BASEBAND (1 OF 2)
MOBILE DATA MODEM (2 OF 2)
RF TRANSCEIVER (1 0F 3)
RF TRANSCEIVER (2 OF 3)
RF TRANSCEIVER (3 OF 3)
QFE DCDC
2G PA
VERY LOW BAND PAD
LOW BAND PAD
MID BAND PAD
HIGH BAND PAD
ANTENNA SWITCH
HIGH BAND SWITCH
RX DIVERSITY
RX DIVERSITY (2)
GPS
ANTENNA FEEDS
WIFI/BT: MODULE AND FRONT END
STOCKHOLM
OMIT_TABLE_RF
Radio Subdesign Ports

D

SYNCCONTENTSPAGE DATE

C

B

43

B

45

w w w . c h i n a f i x . c o m

A

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

3

DRAWING TITLE

SCH,MLB,N69

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

?

051-00648

REVISION

4.0.0

BRANCH

PAGE

1 OF 55

SHEET

34 OF 60

1245678

A

SIZEDRAWING NUMBER

D

BLANK PAGE

345678

2 1

D

D

C

C

B

B

w w w . c h i n a f i x . c o m

A

PAGE TITLE

CELL:ALIASES

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

8 7 5 4 2 1

36

IV ALL RIGHTS RESERVED

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

30 OF 55
35 OF 60

A

D

D

C

AP INTERFACE & DEBUG CONNECTORS

NOT UNDER SIM

PP3105_RF

P2MM-NSM

SM

PP3119_RF

P2MM-NSM

SM

PP3120_RF

P2MM-NSM

SM

PP3101_RF

P2MM-NSM

SM

PP3102_RF

P2MM-NSM

SM

PP3121_RF

P2MM-NSM

SM

PP3122_RF

P2MM-NSM

SM

PP3127_RF

P2MM-NSM

SM

PP3128_RF

P2MM-NSM

SM

PP3173_RF

P2MM-NSM

PP

PP

PP

PP

PP

PP

PP

PP

PP

SM

1

1

WIFI_BT

1

WIFI_BT

1

WIFI_BT

1

WIFI_BT

1

STOCKHOLM

1

STOCKHOLM

1

WIFI_BT

1

WIFI_BT

PP

CLK32K_AP

BT_UART_TXD

BT_UART_RXD

BT_UART_CTS_L

BT_UART_RTS_L

BT_PCM_CLK

BT_PCM_SYNC

BT_PCM_IN

BT_PCM_OUT

HOST_WAKE_BT

1

WIFI_BT

24

24

24

24

27

27 24

27

27

27

PP3123_RF

P2MM-NSM

SM

1

PP

PP3124_RF

P2MM-NSM

SM

1

PP

STOCKHOLM

PP3174_RF

P2MM-NSM

SM

1

PP

STOCKHOLM

PP3129_RF

P2MM-NSM

SM

1

PP

STOCKHOLM

PP3185_RF

P2MM-NSM

SM

1

PP

WIFI_BT

PP3186_RF

P2MM-NSM

SM

1

PP

WIFI_BT

OPTIONAL

OSCAR_CONTEXT_A

OSCAR_CONTEXT_B

STOCKHOLM_TO_SIM_SWP

45_BBPMU_TO_STOCKHOLM_19P2M_CLK

WLAN_JTAG_SWDCLK

WLAN_JTAG_SWDIO

24

24

25

5 25

PP3131_RF

P4MM-NSM

SM

PP3132_RF

1

PP

12 11 10 8 7 6 4 3

P4MM-NSM

25 6 4 3

27 25 3

27

SM

PP

25

8 3

8 3

8 3

8 3

27

27 5

7 5

25 27 3

25 27 3

25 27 3

25 3

7

1

7

7

7

3 5

BB_JTAG_TCK_IN

7

27

BB_JTAG_TMS

27 7

STOCKHOLM_TO_BBPMU_CLK_REQ

27 8

BB_I2S_CLK

BB_HOST_RDY

5

8

5

STOCKHOLM_UART_RXD
STOCKHOLM_UART_TXD
STOCKHOLM_UART_CTS
STOCKHOLM_UART_RTS

STOCKHOLM_TO_PMU_HOST_WAKE

BB_JTAG_RST_L

BB_JTAG_TDO

BB_JTAG_TDI
BB_JTAG_TRST_L

BB_SIM_RESET
BB_SIM_CLK
BB_SIM_DATA
BB_SIM_DETECT
PP_LDO5

PP_LDO11

RADIO_ON_L

BB_DEBUG_ERROR

RF_PMIC_RESET_L

PS_HOLD_PMIC
PMIC_RESOUT_L

NOSTUFF

J3100_RF

AXE650124

M-ST-SM

53

2 1
4 3
6 5

8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21
24 23
26 25
28 27
30 29
32 31
34 33
36 35
38 37
40 39
42 41
44 43
46 45
48 47
50 49

54

51

52

BB_DEBUG_STATUS
BB_CORE_DUMP

BB_USB_VBUS
90_BB_USB_N

90_BB_USB_P

BB_RST_L
BB_RESET_DET_L

8

BB_WAKE_HOST_L

BB_GPS_SYNC

BB_DEVICE_RDY

BB_I2S_WS
BB_I2S_RXD
BB_I2S_TXD

AP_TO_STOCKHOLM_FW_DWLD_REQ

AP_TO_STOCKHOLM_EN

BB_OTHER_TXD

BB_OTHER_RXD

BB_COEX_UART_RXD
BB_COEX_UART_TXD

345678

2 1

UNDER THE SIM

D

8

PP3138_RF

P4MM-NSM

SM

1

PP

27 25

8 27

PP3139_RF

27 8

P4MM-NSM

5

27

27 27

8

27 8

27 8

27

8

8 27

8 27

27

8

27 8

8 24

8 24

1

SM

PP

P4MM-NSM

PP3140_RF

SM

1

PP

PP3190_RF

P2MM-NSM

SM

1

PP

PP3191_RF

P2MM-NSM

SM

1

PP

PP3115_RF

P4MM-NSM

SM

50_BB_HSIC_STROBE

1

PP

PP3116_RF

P4MM-NSM

SM

50_BB_HSIC_DATA

1

PP

PP3111_RF

P4MM-NSM

SM

SPMI_DATA

1

PP

PP3112_RF

P4MM-NSM

SM

SPMI_CLK

1

PP

PP3104_RF

P4MM-NSM

SM

PP

MDM_CLK

1

AP_TO_BB_MESA_ON

27 8

BB_FORCE_PWM

27 5

27 7

27 7

5 7

7 5

7 5

C

B

PP3152_RF

P2MM-NSM

SM

PP3153_RF

P2MM-NSM

SM

PP3154_RF

P2MM-NSM

SM

PP3155_RF

P2MM-NSM

SM

PP3157_RF

P2MM-NSM

SM

PP3158_RF

P2MM-NSM

SM

PP3162_RF

P2MM-NSM

SM

PP3163_RF

P2MM-NSM

SM

PP3170_RF

P2MM-NSM

SM

PP3171_RF

P2MM-NSM

SM

PP3172_RF

P2MM-NSM

SM

WAKE_BT

1

PP

WIFI_BT

WLAN_REG_ON

1

PP

WIFI_BT

BT_REG_ON

1

PP

WIFI_BT

HOST_WAKE_WLAN

1

PP

WIFI_BT

WLAN_UART_RTS_L

1

PP

WIFI_BT

WLAN_UART_CTS_L

1

PP

WIFI_BT

WLAN_UART_RXD

1

PP

WIFI_BT

WLAN_UART_TXD

1

PP

WIFI_BT

1

PP

1

PP

1

PP

RFFE1_CLK

RFFE1_DATA

RFFE2_CLK

24

27

24

27

27

24 24

24

27

27 24

27

24

24 27

24 27

15

17 16 14 13 12 8

17 16 15 14 13 12 8

19 18 8

21

PP3192_RF

P2MM-NSM

SM

1

PP

PP3193_RF

P2MM-NSM

SM

1

PP

PP3194_RF

P2MM-NSM

SM

1

PP

PP3195_RF

P2MM-NSM

SM

1

PP

PP3196_RF

P2MM-NSM

SM

1

PP

PP3197_RF

P2MM-NSM

SM

1

PP

PP3198_RF

P2MM-NSM

SM

1

PP

PP3199_RF

P2MM-NSM

SM

1

PP

CORONA PCIE RX/TX TP

90_WLAN_PCIE_RDN

WIFI_BT

90_WLAN_PCIE_RDP

WIFI_BT

90_WLAN_PCIE_TDN

WIFI_BT

90_WLAN_PCIE_TDP

WIFI_BT

BB_UART_TXD

BB_UART_RXD

BB_UART_CTS_L

BB_UART_RTS_L

8 27

27 8

27 8

27 8

24

24

24

27

27

27

27

SIM CARD ESD PROTECTION

8 3

w w w . c h i n a f i x . c o m

8 3

BB_SIM_DETECT

C3102_RF

100PF

21

DZ3102_RF

5.5V-6.2PF

0201

NP0-C0G

01005

5%

10V

8 3

21

8

BB_SIM_DATA

BB_SIM_RESET

STOCKHOLM_TO_SIM_SWP

BB_SIM_CLK

3

VR3101_RF

ESD5004

LGA-1

1
2
3
4

5

B

A

11 10 8 7 6 4 3

12

6 4

12 11 10 8 7 6 4 3

25 6 4 3

PP_LDO11

RADIO_BB

10K

1%

1/32W

MF

01005

BOOT_HSIC

8

BOOT_HSIC_USB

8

WATCHDOG_DISABLE

8

SHORT-10L-0.1MM-SM

VREG_SMPS1_0V90

SHORT-10L-0.1MM-SM

PP_LDO11

SHORT-10L-0.1MM-SM

PP_LDO5

SHORT-10L-0.1MM-SM

VREG_SMPS4_2V075 ADC_SMPS4

4

RADIO_BB

1

2

XW3101_RF

XW3102_RF

XW3103_RF

XW3104_RF

1/32W
01005

21

21

21

21

1

1%
MF

2

ADC_SMPS1

ADC_PP_LDO11

ADC_PP_LDO5

RADIO_BB

R3104_RFR3103_RFR3102_RF

10K10K

1%

1/32W

MF

01005

SIM CARD CONNECTOR

1

25 6 4 3

2

36 41

BB_SIM_RESET

IN

PP_LDO5

1

VCC

J3101_RF

2 7

RST

SIM-CARD-N48

F-ST-SM

I/O

1

R3101_RF

15.00K

1%
1/32W
MF
01005

2

BB_SIM_DATA

1

C3101_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201

377S0163 ALTERNATE VR3101 ESD ALTERNATIVE371S00044

36 41

BI

PART NUMBER

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_HEAD

TABLE_ALT_ITEM

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

A

AP INTERFACE & DEBUG CONNECTORS

OUT

OUT

OUT

OUT

33 60

33 60

33 60

33 60

36 41

BB_SIM_CLK BB_SIM_DETECT

IN

CLK

DETECT

GND

11

13

5

9

8

10

SWP

123

6

STOCKHOLM_TO_SIM_SWP

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

OUT

BI

36 41

36 58

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

31 OF 55

SHEET

36 OF 60

8 7 5 4 2 1

36

BASEBAND PMU (1 OF 2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

SWITCHERS OUTPUT CAPS

345678

2 1

D

27 25 24 13 4

RADIO_PMIC

1

C3270_RF

100PF

5%
16V

2

NP0-C0G
01005

1

2.2UF

20%

6.3V

2

X5R-CERM
0201

RADIO_PMICRADIO_PMIC

1

2.2UF

20%

6.3V

2

X5R-CERM
0201

FOOTPRINT SAME AS 138S0716

PP_VCC_MAIN

RADIO_PMIC

1

C3222_RFC3223_RFC3224_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201

1

2

15UF

20%

6.3V
X5R
0402-1

1

C3221_RFC3216_RF

2

15UF

20%

6.3V
X5R
0402-1

VREG_SMPS1_0V90

RADIO_PMIC

1

20UF

20%

6.3V

2

CERM-X5R
0402

RADIO_PMIC

1

20UF

20%

6.3V

2

CERM-X5R
0402

1

6 4 3

2

VREG_SMPS3_0V95 VREG_SMPS4_2V075

RADIO_PMIC

1

20UF

20%

6.3V

2

CERM-X5R
0402 0402

RADIO_PMIC

1

C3232_RFC3230_RF C3240_RFC3238_RF

20UF

20%

6.3V

2

CERM-X5R
0402

4

RADIO_PMIC

1

20UF

20%

6.3V

2

CERM-X5R
0402

1

2

RADIO_PMIC

20UF

20%

6.3V
CERM-X5R
0402

RADIO_PMIC

20UF

20%

6.3V
CERM-X5R

RADIO_PMIC

1

C3239_RFC3237_RFC3231_RFC3229_RF

20UF

20%

6.3V

2

CERM-X5R
0402

VREG_SMPS2_1V25

D

4

43

C

B

60

60

60

60

SWITCHERS BULK CAPS

FOOTPRINT SAME AS 138S0716

3337 46

IN

57 58

PP_VCC_MAIN

MAKE_BASE=TRUE

VBATT_S1

1

C3217_RF

15UF

20%

6.3V

2

X5R
0402-1

3337 46

IN

57 58

PP_VCC_MAIN

MAKE_BASE=TRUE

VBATT_S2

1

C3218_RF

15UF

20%

6.3V

2

X5R
0402-1

3337 46

IN

57 58

PP_VCC_MAIN VBATT_S3

MAKE_BASE=TRUE

VBATT_S3

1

C3219_RF

15UF

20%

6.3V

2

X5R
0402-1

3337 46

IN

57 58

PP_VCC_MAIN

MAKE_BASE=TRUE

VBATT_S4

1

C3220_RF

15UF

20%

6.3V

2

X5R
0402-1

VBATT_S1

VBATT_S2

VBATT_S4

4

4

4

4

4

4

4

4

60

57
46

58

40

33 37

OUT

IN

VBATT_S1

4

VBATT_S2

4

VBATT_S3

4

VBATT_S4

4

VREG_SMPS2_1V25

4

VREG_SMPS4_2V075

4 3

VREG_SMPS4_2V075

4 3

VREG_SMPS3_0V95

4

VREG_SMPS4_2V075

4 3

MDM_VREF_LPDDR2
PP_VCC_MAIN

RADIO_PMIC

1

C3226_RF

1.0UF

20%
10V

2

X5R-CERM
0201-1

AVDD_BYP

REF_BYP

RADIO_PMIC

1

C3227_RF

0.1UF

20%
4V

2

X5R
01005

26

VDD_INT_BYP

21

REF_BYP

15

GND_REF

22

VDD_S1

88

VDD_S2

94

VDD_S2

47

VDD_S3

1

VDD_S4

92

VDD_L1

2

VDD_L2_3

4

VDD_L7_8_11

77

VDD_L9

72

VDD_L10

38

VDD_L12

85

VDD_XO_RFC

49

GND

52

VREF_DDR2

43

VIN_VPH1

54

VIN_VPH2

U_PMICRF_RF

PM8019

BGA

SYM 5 OF 5

REG

w w w . c h i n a f i x . c o m

VREG_RFCLK

VREG_XO

VREG_S1
VSW_S1_1
VSW_S1_2

VREG_S2

VSW_S2

VREG_S3
VSW_S3_1
VSW_S3_2

VREG_S4
VSW_S4_1
VSW_S4_2

VREG_L1
VREG_L2
VREG_L3
VREG_L4
VREG_L5
VREG_L6
VREG_L7
VREG_L8

VREG_L9
VREG_L10
VREG_L11
VREG_L12
VREG_L13
VREG_L14

VREG_RF_CLK_BYP

RADIO_PMIC

1

C3228_RF

1.0UF

20%
10V

2

X5R-CERM
0201-1

91
74

VREG_XO_PMIC

27
11
16

82
93

62
53
58

23
6
12

86
7
8
68
59
48

NC

10
3
71
83
9
33
34
28

VOLTAGE=4.50V

VOLTAGE=4.50V

VOLTAGE=4.50V

VOLTAGE=4.50V

PP_VSW_S1

PP_VSW_S2

PP_VSW_S3

2.2UH-20%-1.2A-0.15OHM

PP_VSW_S4

L3201_RF

2.2UH-20%-1.5A-0.16OHM

21

L3203_RF

2.2UH-20%-1.5A-0.16OHM

21

L3204_RF

2.2UH-20%-1.5A-0.16OHM

21

L3202_RF

RADIO_PMIC

21

MAKK2016-SM

MAKK2016-SM

MAKK2016-SM

0806

VREG_RX

VREG_SIM

VREG_TX

VREG_IO

1235MA

1100MA

1350MA

550MA

VOLTAGE=1.225V

VOLTAGE=1.80V

VOLTAGE=1.80V

VOLTAGE=3.075V

VOLTAGE=1.80V

VOLTAGE=1.90V

VOLTAGE=2.05V

VOLTAGE=1.20V

VOLTAGE=0.90V

VOLTAGE=1.80V

VOLTAGE=0.95V

VOLTAGE=2.95V

VOLTAGE=5.0V

VREG_SMPS1_0V90

VREG_SMPS2_1V25

VREG_SMPS3_0V95

VREG_SMPS4_2V075

PP_LDO1
PP_LDO2
PP_LDO3
PP_LDO4
PP_LDO5

PP_LDO7
PP_LDO8
PP_LDO9
PP_LDO10
PP_LDO11
PP_LDO12
PP_LDO13

PP_LDO14_RFSW

36 37 39

OUT

37

OUT

37

OUT

36 37

OUT

39 43 44

OUT

39

OUT

38 39

OUT

39

OUT

25

36 39

OUT

39 41

OUT

43 44

OUT

39

OUT

39

OUT

36 39 40 41 43 44 45 58

OUT

39

OUT

39 56

OUT

47 48 56

OUT

C

B

A

RADIO_PMIC

1

1.0UF

20%
10V

2

X5R-CERM
0201-1

RADIO_PMIC

1

10UF

20%

6.3V

2

CERM-X5R
0402-9

RADIO_PMIC

1

1.0UF

20%
10V

2

X5R-CERM
0201-1

RADIO_PMIC

1

1.0UF

20%
10V

2

X5R-CERM
0201-1

RADIO_PMIC

1

1.0UF

20%
10V

2

X5R-CERM
0201-1

RADIO_PMIC

1

1.0UF

20%
10V

2

X5R-CERM
0201-1

RADIO_PMIC

1

1.0UF

20%
10V

2

X5R-CERM
0201-1

RADIO_PMIC

1

10UF

20%

6.3V

2

CERM-X5R
0402-9

RADIO_PMIC

1

10UF

20%

6.3V

2

CERM-X5R
0402-9

RADIO_PMIC

1

10UF

20%

6.3V

2

CERM-X5R
0402-9

RADIO_PMIC

1

1.0UF

20%
10V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C3213_RFC3211_RFC3210_RFC3209_RFC3202_RF

10UF

20%

6.3V

2

CERM-X5R
0402-9

PAGE TITLE

RADIO_PMIC

1

1.0UF

20%
10V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C3215_RFC3214_RFC3212_RFC3208_RFC3206_RFC3205_RFC3204_RFC3203_RFC3201_RF

1.0UF

20%
10V

2

X5R-CERM
0201-1

BASEBAND PMU (1 0F 2)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

32 OF 55

SHEET

37 OF 60

A

8 7 5 4 2 1

36

BASEBAND PMU (2 OF 2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C401
R411
L400
U404

D

BOARD_ID

0.00V

0.50V

0.70V

0.90V

1.10V

1.30V

1.40V

1.50V

1.60V

1.70V

N69/69H PRE-PROTO
SPARE
N69/69H PROTO1
N69/69H PROTO2
N69/69H EVT1
N69/69H EVT2
SPARE
N69/69H DVT
SPARE
N69/69H PVT

SKU_ID

REVISIONREVISION

0.5V N69
N69H1.1V

197S0565

PART NUMBER

197S0593

197S0593

ALTERNATE

ALTERNATE197S0598

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

Y3301_RF XTAL 19MHZ

Y3301_RF XTAL 19MHZ

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

D

C

RADIO_PMIC

37 38 39

IN

R3305_RF

90.9K

CALCULATE
WITH 10M
IN PARALLEL
TO GND

R3306_RF

150K

PP_LDO3

212121

MF

1%

01005

1/32W

1.10V(EVT)

BOARD_ID

MF

1%

01005

1/32W

RADIO_PMIC

Y3301_RF

19.2MHZ-10PPM-7PF-80OHM

U_PMICRF_RF

PM8019

BGA

SYM 4 OF 5

MPP_GPIO

GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06

NC

NC

39
29
18
44
35
24

MPP_01
MPP_02
MPP_03
MPP_04
MPP_05
MPP_06

BOARD_ID

5

SKU_ID

OUT

OUT

5

VDDPX_BIAS

VREF_DAC_BIAS

5

39

41

13
30

STOCKHOLM_TO_BBPMU_CLK_REQ

55
19
14

BB_BUA_SIM

25

BB_FORCE_PWM

BB_GPS_ENABLE

NC

NC
NC

IN

IN
IN

36 58

41

33 36 60

37 38 39

IN

PP_LDO3

40

IN

XO_OUT_D0_EN

RADIO_PMIC

R3308_RF

100K

1/32W
01005

21

1%
MF

XO_THERM_Y1

RADIO_PMIC

1

C3301_RF

1000PF

10%

6.3V

2

X5R-CERM
01005

2.0X1.6-SM

1
4

3
2

XTAL19M_OUT

XTAL19M_IN

90

XTAL_19M_IN

84

XTAL_19M_OUT

73

GND_XO

79

XO_OUT_D0_EN

57

XO_THERM

46

GND_XOADC

U_PMICRF_RF

PM8019

BGA

SYM 2 OF 5

CLOCK

BATT_ID_THERM

XO_OUT_A0
XO_OUT_A1

SLEEP_CLK
XO_OUT_D0
PA_THERM1

PA_THERM2

64

50_A0_PMCLK

45_BBPMU_TO_STOCKHOLM_19P2M_CLK

67
80

SLEEP_CLK_32K

78

MDM_CLK

42

NC

32
37

PA_CTL_QFE

OUT

OUT

OUT

RADIO_PMIC

C3303_RF

1000PF

21

50_PMIC_RF_CLK

10%

6.3V

X5R-CERM

01005

40

36 40

12

RADIO_PMIC

R3309_RF

100

1%

MF

01005

1/32W

21

50_RF_CLK

OUT

C

B

OMIT_TABLE

R3312_RF

162K

01005

PP_LDO3

RADIO_PMIC

1

R3311_RF

100K

1%
1/32W
MF
01005

2

SKU_ID

MF

1%

1/32W

4 6

5

5

33 36 60

40

XO_GND

XW3301_RF

SHORT-10L-0.25MM-SM

21

XW <2.0MM FROM XTAL GROUND PATCH

NOSTUFF

B

U_PMICRF_RF

w w w . c h i n a f i x . c o m

5

GND_S1

87

GND_S2

63
17

GND_S3
GND_S4

U_PMICRF_RF

PM8019

RADIO_PMIC

R3301_RF

IN

IN

BB_RST_L

PS_HOLD PS_HOLD_PMIC

1.00K

1% MF

1/32W

01005

RADIO_PMIC

R3307_RF

20.0K

5% MF

1/32W

01005

60

3336

21

36 40

21

33

36

60

36 40

36 40

RADIO_ON_L

IN

PMIC_RESOUT_L

OUT

3

RF_PMIC_RESET_L

IN

SPMI_CLK

BI

SPMI_DATA

BI

70

CBL_PWR*

31

PON_TRIG

75

PON_RST*

65

PS_HOLD

20

RESIN*

81

SPMI_CLK

76

SPMI_DATA

BGA

SYM 1 OF 5

CONTROL

OPT
GND
GND

GND

66
89
56

45

NC

PM8019

BGA

SYM 3 OF 5

INPUT_PWR

GND
GND
GND
GND
GND
GND
GND
GND

36
40
41
50
51
60
61
69

A

PAGE TITLE

BASEBAND PMU (2 OF 2)

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

33 OF 55
38 OF 60

A

D

BASEBAND (1 OF 3)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C538
R500
L500

D

C

RADIO_BB

U502

U_BB_RF

ASIC-MDM9625M-2

WLBGA

37 39

IN

37 39

IN

36 37 39

IN

PP_LDO10

PP_LDO12

VREG_SMPS1_0V90

(MODEM SUB SYSTEM)

(MSM CORE)

(MSM MEMORY)

J15
K14
K15

L13
L14

M8

M9
M12
M13

N7

N8
N11
N12

P7
P10
P11

E15

F8

F9

F15

G8

K10

L9

L10
N15
P14
P15

R7
R8

E5
F6

F7
F10
F11

G6

G9
G10
G13
G14
G15

H8

H9
H12
H13

J7

J8
J11
J12

K6
K7

K11

L6

VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE

VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM

VDD_MEM
VDD_MODEM

VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM

SYM 5 OF 6

PWR

VDD_P1
VDD_P1
VDD_P1
VDD_P1
VDD_P1

VDD_P2
VDD_P3

VDD_P3
VDD_P3
VDD_P3
VDD_P3
VDD_P3

VDD_P4
VDD_P5
VDD_P6

VREF_SDC

VREF_UIM

VDD_USB_CORE

VDD_USB_1P8
VDD_USB_3P3

VDD_A2
VDD_A2

VDD_A2
VDD_A1
VDD_A2
VDD_A1

VDD_A1

VDD_PLL
VDD_PLL
VDD_PLL

VDD_PLL2

VDD_ALWAYS_ON

VDD_DDR_CORE_1P8
VDD_DDR_CORE_1P8

VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2

VDD_QFPROM_PRG

(EBI1 PAD)

F19
L19
L20
M1
T19

(SDC1 PAD)

B20

(GENIO PAD)

B2
J19
K2
V2
V5
V19

R19

NC

U19
V9
A19

U20
V13
U11
V10
C12

C9
B12

B9
C6
B6

B15
U13

R12
D17
E16

T17

NC

(LPDDR2)

J20
K1

(LPDDR2_CORE)

E20
H1
P1
P20

(QFUSE PROGRAMMING)

W8

PP_LDO9

PP_LDO13
PP_LDO11

PP_LDO5
PP_LDO9
VDDPX_BIAS

PP_LDO12
PP_LDO2
PP_LDO4
PP_LDO7

PP_LDO1

PP_LDO1
PP_LDO10

PP_LDO3

PP_LDO11

PP_LDO9

PP_LDO3

37 39

IN

37 39 56

IN

36 37 39 40 41 43 44 45 58

IN

(UIM1 PAD)

36 37

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

(UIM2 PAD)

25

37 39

(HSIC PAD)

38 39

37 39

37 39

37

37 39 41

37 39 43 44

37 39 43 44

37 39

37 38 39

36 37 39 40 41 43 44 45 58

37 39

37 38 39

A2

A20
C14
C20

E14

F12
F13
F14
F20

G7
G11
G12

H6

H7
H10
H11
H14
H15

J1
J6

J9
J10
J13
J14

K8

K9
K12
K13
K19
K20

L1
L7

L8
L11
L12
L15

M6
M7

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

RADIO_BB

U_BB_RF

ASIC-MDM9625M-2

WLBGA

SYM 6 OF 6

GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND

M10
M11
M14
M15
M20
N1
N6
N9
N10
N13
N14
P6
P8
P9
P12
R20
T20
V20
W1
W5
W9
W20
W12
A12
A6
E12
E9
A9
E6
A17
C17
B17
P13
R13
R14

A15

D

C

B

RADIO_BB

37 39

RADIO_BB

37 39

IN

RADIO_BB

36 37 39

IN

(MSM CORE)

PP_LDO10

RADIO_BB

1

C3401_RF C3404_RF C3407_RF C3410_RF C3413_RF C3416_RF

2.2UF

20%
4V

2

X5R-CERM
0201

(MSM MEMORY)

PP_LDO12

RADIO_BB RADIO_BB

1

C3402_RF C3405_RF C3408_RF C3411_RF C3414_RF C3417_RF

2.2UF

20%
4V

2

X5R-CERM
0201

(MODEM SUB SYSTEM)

VREG_SMPS1_0V90

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C3418_RFC3415_RFC3412_RFC3409_RFC3406_RFC3403_RF

2.2UF

20%
4V

2

X5R-CERM
0201

58

RADIO_BB

37 39

ININ

RADIO_BB

37 39 56

IN

RADIO_BB

36 37 39 40 41 43 44 45

IN

(EBI1 PAD)

PP_LDO9

(SDC1 PAD)

PP_LDO13

(GENIO PAD)

PP_LDO11

w w w . c h i n a f i x . c o m

RADIO_BB

1

C3419_RF C3422_RF

2.2UF

20%
4V

2

X5R-CERM
0201

NOSTUFF

RADIO_BB

1

C3420_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C3421_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C3423_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

37 39

IN

RADIO_BB

38 39

IN

RADIO_BB

37 39

IN

(HSIC PAD)

RADIO_BB

1

C3424_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

37 39

IN

(USB 1.8V)

RADIO_BB

1

C3427_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C3430_RF

0.1UF

20%
4V

2

X5R
01005

RADIO_BB

37 39 43 44

IN

PP_LDO1PP_LDO2PP_LDO9

RADIO_BB

1

C3432_RF

2.2UF

20%
4V

2

X5R-CERM
0201

58

RADIO_BB

36 37 39 40 41 43 44 45

IN

PP_LDO11

(LPDDR2)(GPS ADC)

NOSTUFF

(SDC/UIM)

VDDPX_BIAS PP_LDO9

RADIO_BB

1

C3425_RF C3438_RF

0.1UF

20%
4V

2

X5R
01005

RADIO_BB

37 39 41

IN

PP_LDO7

(COMBO DAC/BBRX)

RADIO_BB

1

C3428_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

37 39

IN

PP_LDO10

NOSTUFF

(USB CORE)

PP_LDO12

RADIO_BB

1

C3426_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

37 39 43 44

IN

PP_LDO1

(BBRX)

RADIO_BB

1

C3429_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

37 38 39

IN

(PLL)

(PLL)

RADIO_BB

1

C3433_RF

2.2UF

20%
4V

2

X5R-CERM
0201

NOSTUFF

RADIO_BB

1

C3434_RF

2.2UF

20%
4V

2

X5R-CERM
0201

NOSTUFF

RADIO_BB

37 39

IN

RADIO_BB

37 38 39

IN

PP_LDO3PP_LDO3

(LPDDR2 CORE)

(QFUSE)

RADIO_BB

1

C3435_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C3436_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C3437_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

2.2UF

20%
4V

2

X5R-CERM
0201

B

A

PAGE TITLE

BASEBAND (1 OF 2)

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

34 OF 55
39 OF 60

A

D

BASEBAND (2 OF 3)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C600
R606
L600
U602

D

26 11 9 7

D

PP_LDO11

C

B

U3501_RF

74AUP1G34GX

5

SOT1226

33 60

BB_JTAG_TCK

IN

2

NC

1

4

C

NC

RADIO_BB

U_BB_RF

ASIC-MDM9625M-2

36 38

36

38

36

33 36 60

36

36 38 40

38

33 36 60

IN
IN
IN

IN
IN
IN

IN

OUT

IN

7 5 3

PMIC_RESOUT_L
BB_JTAG_RST_L
SLEEP_CLK_32K

BB_JTAG_TCK_IN
BB_JTAG_TDI
BB_JTAG_TMS
BB_JTAG_TRST_L

MDM_CLK
XO_OUT_D0_EN

BB_USB_VBUS

MDM_CLK

RESIN*

N2

SRST*

NC
NC

NC
NC

NC

NC

W17

W19

W13

SLEEP_CLK

R2

TCK

P3

TDI

P2

TMS

T4

TRST*

R11

MODE_0

R9

MODE_1
CXO

V18

CXO_EN

N19

UIM1_DETECT

B19

SDC1_CMD

C19

SDC1_CLK

U12

USB_HS_VBUS

V12 V11

USB_HS_ID
USB_HS_SYSCLK

WLBGA

SYM 1 OF 6

DIGITAL

PMIC_SPMI_DATA

PMIC_SPMI_CLK

RESOUT*

PS_HOLD

HSIC_CAL

HSIC_DATA

HSIC_STROBE

UIM1_RESET

UIM1_CLK

UIM1_DATA

SDC1_DATA_3
SDC1_DATA_2
SDC1_DATA_1
SDC1_DATA_0

USB_HS_DP

USB_HS_DM

USB_HS_REXT

TDO

V17W14
W18

P5
W15

V15
U9

U10
R10

M19
N18
P19

B18
A18
D20
D19

W11
W10

NC

PS_HOLD
BB_JTAG_TDO
SPMI_DATA

SPMI_CLK

BB_HSIC_CAL
50_BB_HSIC_DATA
50_BB_HSIC_STROBE

NC
NC
NC

NC
NC
NC
NC

90_BB_USB_P

90_BB_USB_N

BB_USB_TRXTUNE

OUT

OUT

BI
BI

BI
BI

BI
BI

38

36

36 38

36 38

33 36 60

33 36 60

33 36 60

33 36 60

RADIO_BB

1

R3502_RF

240

1%
1/32W
MF
01005

2

RADIO_BB

R3505_RF

240

MF

1%

010051/32W

RADIO_BB

R3506_RF

240

1%

MF

01005

1/32W

RADIO_BB

U_BB_RF

ASIC-MDM9625M-2

WLBGA

N20
M5
R16

H20
H19
H18
H16
J18
K18
J16
K16

NC
NC
NC
NC
NC
NC
NC
NC

MDM_VREF_LPDDR2

37 40

IN

NC
NC
NC
NC
NC
NC

R1

G1

F18

F16
G20
G19
G18
G16

EBI1_CAL
EBI1_ZQ

EBI2_CS*
EBI2_CLE*
EBI2_ALE*
EBI2_WE*
EBI2_OE*
EBI2_BUSY*

SYM 2 OF 6

EBI1_EBI2

EBI1_VREF
EBI1_VREF
EBI1_VREF

EBI2_AD_7
EBI2_AD_6
EBI2_AD_5
EBI2_AD_4
EBI2_AD_3
EBI2_AD_2
EBI2_AD_1
EBI2_AD_0

21

EBI1_CAL

BDM_ZQ

21

B

8 7

BB_EEPROM_SCL

VCC

U_EEP_RF

CAT24C08C4A

WLCSP

SDASCL

VSS

A2 A1

PP_LDO11

B2B1

BB_EEPROM_SDA

BB_EEPROM_SCL

8 7

w w w . c h i n a f i x . c o m

RADIO_BB

1

R3501_RF

200

1%
1/32W
MF
01005

2

12 11 10 8 7 6 4 3

PP_LDO11

1

R3507_RF R3508_RF

10K 10K

1%

8 7

1/32W
MF
01005

2

1

1%
1/32W
MF
01005

2

12 11 10 8 7 6 4 3

1

2

MDM_VREF_LPDDR2

C3501_RF

1.0UF

20%

6.3V
X5R
0201-1

7 4

A

BB_EEPROM_SDA

8 7

PAGE TITLE

BASEBAND (1 OF 2)

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

35 OF 55
40 OF 60

A

D

BASEBAND (3 OF 3)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C704
R700
L700
U702

D

C

44

44

44

44

44

44

44

44

42

42

42

42

42

42

42

42

42

42

42

42

D

PP_LDO11

RADIO_BB

10K

1%
MF

1

2

BB_SIM_DETECT

36

36 41

8 3

36

36

33 36 60

33 36 60

33 36 60

33 36 60

33 36 60

33 36 60

33 36 60

33 60 36

33 36 60

33 36 60

40

40

33 36 60

33 60

36

36

36

R3601_RF

1/32W
01005

RADIO_BB

U_BB_RF

ASIC-MDM9625M-2

WLBGA

DNC
DNC
DNC
DNC

C13
E13

A14
B14
B13
A13

C8
E8

A8
B8
A7
B7

C7
E7

V16
W16
D4
C3

WTR_TX_IDAC
VREF_DAC_BIAS

WTR_BB_TX_I_P
WTR_BB_TX_I_N
WTR_BB_TX_Q_P
WTR_BB_TX_Q_N

PP_LDO7

ET_DAC_N
ET_DAC_P

NC
NC
NC
NC

OUT

8 5

OUT
OUT
OUT
OUT

OUT
OUT

41 42

42

42

42

42

8 6 4

45

45

IN
IN
IN
IN

IN
IN
IN
IN

IN
IN
IN
IN

IN
IN
IN
IN

IN
IN
IN
IN

WTR_BB_PRX_I_P
WTR_BB_PRX_I_N
WTR_BB_PRX_Q_P
WTR_BB_PRX_Q_N

WTR_BB_DRX_I_P
WTR_BB_DRX_I_N
WTR_BB_DRX_Q_P
WTR_BB_DRX_Q_N

WFR_BB_PRX_I_P
WFR_BB_PRX_I_N
WFR_BB_PRX_Q_P
WFR_BB_PRX_Q_N

WFR_BB_DRX_I_P
WFR_BB_DRX_I_N
WFR_BB_DRX_Q_P
WFR_BB_DRX_Q_N

WTR_BB_GPS_I_P
WTR_BB_GPS_I_N
WTR_BB_GPS_Q_P
WTR_BB_GPS_Q_N

E11

BBRX_IP_CH0

C11

BBRX_IM_CH0

E10

BBRX_QP_CH0

C10

BBRX_QM_CH0

B11

BBRX_IP_CH1

A11

BBRX_IM_CH1

B10

BBRX_QP_CH1

A10

BBRX_QM_CH1

B5

BBRX_IP_CH2

A5

BBRX_IM_CH2

B4

BBRX_QP_CH2

A4

BBRX_QM_CH2

C4

BBRX_IP_CH3

C5

BBRX_IM_CH3

B3

BBRX_QP_CH3

A3

BBRX_QM_CH3

C15

GNSS_BB_IP

C16

GNSS_BB_IM

B16

GNSS_BB_QP

A16

GNSS_BB_QM

SYM 4 OF 6

ANALOG

TX_DAC0_IREF

TX_DAC0_VREF

TX_DAC0_IP

TX_DAC0_IM

TX_DAC0_QP

TX_DAC0_QM

TX_DAC1_IREF

TX_DAC1_VREF

TX_DAC1_IP

TX_DAC1_IM

TX_DAC1_QP

TX_DAC1_QM

ET_DAC_M

ET_DAC_P

OUT
IN
IN
OUT
OUT
IN
IN
OUT

OUT
IN
OUT
OUT

OUT
IN
BI
BI
OUT
IN

IN
IN
IN

12 11 10 8 7 6 4 3

RADIO_BB

U_BB_RF

ASIC-MDM9625M-2

WLBGA

SYM 3 OF 6

GPIO

GRFC

SSBI

RFFE

GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
GPIO_58
GPIO_59
GPIO_60
GPIO_61

GPIO_63
GPIO_64
GPIO_65
GPIO_66
GPIO_67
GPIO_68
GPIO_69
GPIO_70
GPIO_71
GPIO_72
GPIO_73
GPIO_74
GPIO_75

H5
H2
H3
G3
G2
F1
F2
D3
C1
G5
F3
E3
F5
N5
N3
T3
E2
D1
D2
E1
T1
R6
R3
U7
V8
W4
W3
U6
T2
R15
V4
U17
V1
W6
U2
U5
U1
R5

GSM_TXBURST_IND

NC

CTRL_FWD_REV

BB_IPC_GPIO1

UAT_SELECT

UAT_SELECT

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

LAT_SELECT

BB_UAT_GPIO0
BB_UAT_GPIO1
BB_UAT_GPIO3

WLAN_TX_BLANK

BB_COEX_UART_TXD
BB_COEX_UART_RXD
WTR_SSBI_TX_GPS
WTR_SSBI_PRX_DRX

NC

WFR_SSBI

BB_DEBUG_SYNC (DEV)

NC

GSM_TX_PHASE_D1
GSM_TX_PHASE_D0
BB_CORE_DUMP

BB_DEBUG_ERROR

BB_SWD_ENABLE

NC

AP_TO_BB_MESA_ON
BB_HOST_RDY
BB_WAKE_HOST_L
BB_DEVICE_RDY
BB_BUA_SIM
BB_GPS_SYNC

NC

RFFE2_DATA
RFFE2_CLK
RFFE1_DATA
RFFE1_CLK

NC
NC
NC
NC

NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC

NC

R18

GPIO_0

U18

GPIO_1

T18

GPIO_2

P18

GPIO_3

U15

GPIO_4

U14

GPIO_5

V14

GPIO_6

U16

GPIO_7

U3

GPIO_8

U4

GPIO_9

W2

GPIO_10

V3

GPIO_11

V7

GPIO_12

V6

GPIO_13

W7

GPIO_14

U8

GPIO_15

M18

GPIO_16

M16

GPIO_17

N16

GPIO_18

L16

GPIO_19

D18

GPIO_20

C18

GPIO_21

E19

GPIO_22

E18

GPIO_23

P16

GPIO_24 GPIO_62

L18

GPIO_25

L5

GPIO_26

M3

GPIO_27

K3

GPIO_28

L3

GPIO_29

M2

GPIO_30

K5

GPIO_31

B1

GPIO_32

C2

GPIO_33

J5

GPIO_34

L2

GPIO_35

J3

GPIO_36

J2

GPIO_37

BLSP1

BLSP2

BLSP3

BLSP4

BLSP5

BLSP6

GRFC

BB_SIM_DATA
BB_SIM_DETECT
BB_SIM_RESET
BB_SIM_CLK

BB_UART_TXD
BB_UART_RXD
BB_UART_CTS_L
BB_UART_RTS_L

BB_I2S_WS
BB_I2S_RXD
BB_I2S_TXD
BB_I2S_CLK

BB_OTHER_TXD
BB_OTHER_RXD
BB_EEPROM_SDA
BB_EEPROM_SCL
BB_RESET_DET_L BB_DEBUG_STATUS
AP_WAKE_MODEM

BB_LAT_GPIO0
BB_LAT_GPIO1
BB_LAT_GPIO2
BB_LAT_GPIO3
BB_LAT_GPIO4
BB_LAT_GPIO5

WATCHDOG_DISABLE
BOOT_HSIC
BOOT_HSIC_USB

33 60

OUT

33 60

OUT

23

36 57

OUT

36 57

IN

42

OUT

42

IN

44

OUT

42

OUT

42

OUT

33 36 60

IN

36

OUT

36

OUT

33 36 60

BI

33 36 60

IN

33 36 60

OUT

33 36 60

OUT

38

IN

33 36 60

OUT

41 51 52 54

BI

36 41 51 52 54

BI

36 45 46 47 48 49 50

BI

36 45 46 47 48 49 50

BI

C

B

WTR_TX_IDAC

9 8 8 5

RADIO_BB

1

0.1UF

10%

6.3V

2

X7R
0201

8 6 4

PP_LDO7

NOSTUFF

VREF_DAC_BIAS

RADIO_BB

1

2200PF

10%

6.3V

2

X5R-CERM
01005

RADIO_BB

1

C3604_RFC3603_RFC3601_RF

2200PF

10%

6.3V

2

X5R-CERM
01005

w w w . c h i n a f i x . c o m

18 17

19

21 16 14 13 8

21 19 18 8 3

21 19 18 8

RFFE_VIO

RFFE2_CLK

RFFE2_DATA

4

U_BUFFER_RF

RF1352

WLCSP

VIO

SCLK
SDATA

GND

7

GPO1

GPO2

SCLK_A

SDATA_A

1

BB_LAT_GPIO1

8

BB_LAT_GPIO2

52

RFFE2_CLK_BUFFER

63

RFFE2_DATA_BUFFER

OUT
OUT

OUT

OUT

B

33 60

33 60

56

56

A

12 11 10 8 7 6 4 3

RFFE2_DATA

1

C3602_RF

22PF

5%
16V

2

CERM
01005

MAKE_BASE=TRUE

PP_LDO11

RFFE_VIO

VOLTAGE=1.80V

21 19 18 17 16 14 13 8

A

PAGE TITLE

MOBILE DATA MODEM (2 OF 2)

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

36 OF 55

SHEET

41 OF 60

D

8 7 5 4 2 1

36

WTR TRANSCEIVER (1 OF 2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C802
R802
L800
U803

D

C

LB1

LB2

LB3

LB4

MB1

MB2

MB3

HB1

HB2

HB3

HBMB4 NO DC

DC

DC

DC

DC

NO DC

DC

DC

NO DC

DC

DC

44

44

OUT

IN

50_B8_PRX_WTR_IN

15

50_B20_PRX_WTR_IN

15

50_B26_PRX_WTR_IN

15

50_B13_B17_B28_B29_PRX_WTR_IN

14

50_WFR_PRX_LB_CA_IN
50_WFR_PRX_MB_CA_OUT
50_B34_B39_PRX_WTR_IN

18

50_DCS_WTR_IN

20

50_PCS_WTR_IN

20

50_B40A_PRX_WTR_IN

19

50_B40B_B38X_PRX_WTR_IN

19

50_B41A_PRX_WTR_IN

19

50_B7_PRX_WTR_IN

17

NC

102

PRX_LB1_IN

92

PRX_LB2_IN

73

PRX_LB3_IN

65

PRX_LB4_IN

91

PRX_LB_CA_OUT

50

PRX_MB_CA_IN

51

PRX_MB1_IN

43

PRX_MB2_IN

27

PRX_MB3_IN

19

PRX_HMB4_IN

9

PRX_HB1_IN

17

PRX_HB2_IN

18

PRX_HB3_IN

33

PRX_HB_CA_OUT

U_WTR_RF

WTR1625

BGA

SYM 1 OF 5

PRX_BB_IP

PRX_BB_IM

PRX_BB_QP

PRX_BB_QM

99
108
107
97

WTR_BB_PRX_I_P
WTR_BB_PRX_I_N
WTR_BB_PRX_Q_P
WTR_BB_PRX_Q_N

OUT
OUT
OUT
OUT

41

41

41

41

DCLB1

LB2

LB3

LB4

MB1

MB2

MB3 DC

HB1

HB2

HB3

HBMB4

DC

DC

DC

NO DC

DC

NO DC

DC

DC

NO DC

44

44

OUT

IN

50_B8_B28B_DRX_WTR_IN

20

50_B13_B17_DRX_WTR_IN

20

50_B26_B28A_DRX_WTR_IN

20

50_B20_B29_DRX_WTR_IN

20

50_WFR_DRX_LB_CA_IN
50_WFR_DRX_MB_CA_OUT

50_B34_DRX_WTR_IN

20

50_B39_DRX_WTR_IN

20

50_B40_DRX_WTR_IN

20

50_B38X_DRX_WTR_IN

20

50_B41A_DRX_WTR_IN

20

50_B7_DRX_WTR_IN

20

100_GPS_WTR_IN_P

22

100_GPS_WTR_IN_N

22

NC

NC

5

DRX_LB1_IN

15

DRX_LB2_IN

16

DRX_LB3_IN

7

DRX_LB4_IN

32

DRX_LB_CA_OUT

29

DRX_MB_CA_IN

28

DRX_MB1_IN

20

DRX_MB2_IN

1

DRX_MB3_IN

2

DRX_HMB4_IN

4

DRX_HB1_IN

12

DRX_HB2_IN

13

DRX_HB3_IN

30

DRX_HB_CA_OUT

36

GNSS_RF_INP

44

GNSS_RF_INM

U_WTR_RF

WTR1625

BGA

SYM 2 OF 5

DRX_BB_IP

DRX_BB_IM

DRX_BB_QP

DRX_BB_QM

GNSS_BB_IP

GNSS_BB_IM

GNSS_BB_QP

GNSS_BB_QM

DNC

76
86
61
68

60
53
67
85

37

WTR_BB_DRX_I_P
WTR_BB_DRX_I_N
WTR_BB_DRX_Q_P
WTR_BB_DRX_Q_N

WTR_BB_GPS_I_P
WTR_BB_GPS_I_N
WTR_BB_GPS_Q_P
WTR_BB_GPS_Q_N

NC

RADIO_WTR

OUT

RADIO_WTR

OUT

RADIO_WTR

OUT

RADIO_WTR

41

OUT

RADIO_WTR

OUT

RADIO_WTR

OUT

RADIO_WTR

OUT

RADIO_WTR

41

OUT

D

C

B

U_WTR_RF

WTR1625

BGA

GND

162
153
163
154

146
138
139
155

130
121
109
117
122

NC

NC

50_LB_2G_WTR_TX_OUT

13

50_B8_B26_B20_WTR_TX_OUT
50_B13_B17_B28_WTR_TX_OUT

50_B3_B4_WTR_TX_OUT
50_HB_2G_WTR_TX_OUT

16

13

50_B1_B25_B34_B39_WTR_TX_OUT

50_B7_WTR_TX_OUT

17

50_B40_B38_B41_WTR_TX_OUT

50_FWD_OR_REV_RF

18

15

14

16

B

17

WTR_BB_TX_I_P

8

WTR_BB_TX_I_N

8

WTR_BB_TX_Q_P

8

WTR_BB_TX_Q_N

8

WTR_TX_IDAC

8

8

8

GSM_TX_PHASE_D0
GSM_TX_PHASE_D1

RADIO_WTR

R3702_RF

4.75K

1/32W
01005

8

8

21

1%
MF

WTR_RTUNE

WTR_SSBI_TX_GPS
WTR_SSBI_PRX_DRX

151

TX_BB_IP

160

TX_BB_IM

152

TX_BB_QP

161

TX_BB_QM

127

DAC_REF

123

GP_DATA0

104

GP_DATA1

141

GND

94

GND

71

w w w . c h i n a f i x . c o m

RTUNE

140

GND

55

GND

118

GND

105

SSBI_TX_GNSS

95

SSBI_PRX_DRX

SYM 3 OF 5

TX_LB1_OUT
TX_LB2_OUT
TX_LB3_OUT
TX_LB4_OUT

TX_MB1_OUT
TX_MB2_OUT
TX_MB3_OUT
TX_MB4_OUT

TX_HB1_OUT
TX_HB2_OUT

ADC_IN

PDET_RFFB

A

156

GND

131

XO_IN

11 5

50_RF_CLK

RF_CLK IS SHARED BETWEEN WTR AND WFR. LENGTH DIFFERENCE BETWEEN THE TWO SHOULD BE < 5MM.

PAGE TITLE

RF TRANSCEIVER (1 0F 3)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

37 OF 55

SHEET

42 OF 60

A

8 7 5 4 2 1

36

D

WTR TRANSCEIVER (2 OF 2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

XW3801_RF

11 4

6 4

11

10

PP_LDO8

MAKE_BASE=TRUE

PP_LDO1

MAKE_BASE=TRUE

VREG_2V_WTR

XW3802_RF

VREG_2V_WTR
VREG_1P3V_WTR

RADIO_WTR

MAKE_BASE=TRUE

RADIO_WTR

1

10UF

20%

6.3V

2

CERM-X5R
0402-9

10

10

VDD_DRX_BB_2V

WTR DECOUPLING CAPS

L3801_RF

22NH-3%-0.25A

10

10

VREG_1P3V_WTR

WTR DECOUPLING SHARED WITH C3808_RF

MAKE_BASE=TRUE

0201

RADIO_WTR

21

VDD_PRX_PLL_1P3V

VREG_1P3V_WTR

10

MAKE_BASE=TRUE

RADIO_WTR

1

C3808_RFC3801_RF

10UF

20%

6.3V

2

CERM-X5R
0402-9

VDD_PRX_LO_HB_1P3V

10

RADIO_WTR

1

C3830_RF

0.1UF

20%

4V

2

X5R
01005

345678

VDD_PRX_VCO_1P3V

10

VDD_PRX_VCO_2V

10

90

VDD_RF1_P_VCO

80

VDD_RF2_P_VCO

2 1

C934
R926
L3802_RF
U902

U_WTR_RF

WTR1625

BGA

SYM 4 OF 5

VDD_RF2_T_DA

129

VDD_TX_DA_2V

D

10

RADIO_WTR

RADIO_WTR

MAKE_BASE=TRUE

I188

NBC

VDD_PRX_VCO_2V

VDD_TX_DA_2V

VDD_PRX_BB_2V
VDD_TX_BBF_2V

10

RADIO_WTR

1

C3813_RF

100PF

5%

10V

2

NP0-C0G
01005

10

10

10

RADIO_WTR

1

C3815_RF

0.1UF

20%

4V

2

X5R
01005

VDD_SHDR_PLL_1P3V

1

2

VDD_PRX_HBMB_1P3V

1

2

10

RADIO_WTR

C3821_RF

0.1UF

20%

4V
X5R
01005

10

VDD_SHDR_VCO_1P3V

RADIO_WTR

C3823_RF

0.1UF

20%

4V
X5R
01005

VDD_DRX_LB_1P3V

VDD_PRX_LB_1P3V

VDD_DRX_LO2_1P3V

10

10

10

RADIO_WTR

1

C3833_RF

0.1UF

20%

4V

2

X5R
01005

GND

137
136
135
126
116
157
149
115
114
52
74
93
59
113
147
103

VDD_TX_DA_1P3V
VDD_TX_UPC_1P3V
VDD_TX_LO_1P3V
VDD_TX_BBF_2V
VDD_FBRX_2V
VDD_TX_VCO_2V
VDD_TX_VCO_1P3V
VDD_TX_SYNTH_1P3V
VDD_TX_PLL_2V
VDD_GPS_LNA_1P3V
VDD_GPS_VCO_1P3V
VDD_GPS_PLL_1P3V
VDD_GPS_BB_1P3V

VDD_XO_2V
VDD_MSM_1P8V

10

10

10

10

10

10

10

10

10

10

10

10

10

VDD_PRX_LO_HB_1P3V

10

VDD_PRX_LB_1P3V

10

VDD_PRX_HBMB_1P3V

10

VDD_PRX_LO_HBMB_1P3V

10

VDD_PRX_PLL_1P3V

10

VDD_PRX_BB_2V

10

VDD_PRX_2V

10

VDD_DRX_LO1_1P3V

10

VDD_DRX_LO2_1P3V

10

VDD_DRX_LB_1P3V

10

VDD_DRX_HB_1P3V

10 10

VDD_DRX_MB_1P3V

10

VDD_DRX_BB_2V
VDD_SHDR_VCO_1P3V

10

VDD_SHDR_VCO_2V

10

VDD_SHDR_PLL_1P3V

10

25

VDD_RF1_P_HB_LO

72

VDD_RF1_P_LB

34

VDD_RF1_P_HMB

57

VDD_RF1_P_HMB_LO

79

VDD_RF1_P_PLL

98

VDD_RF2_P_BB

100

VDD_RF2_P_RX

14

VDD_RF1_D_LB_LO

38

VDD_RF1_D_LOM

31

VDD_RF1_D_LB

22

VDD_RF1_D_HB

11

VDD_RF1_D_MB

54

VDD_RF2_D_BB

48

VDD_RF1_S_VCO

62

VDD_RF2_S_VCO

78

VDD_RF1_S_PLL

VDD_RF1_T_DA

VDD_RF1_T_UPC

VDD_RF1_T_LO
VDD_RF2_T_BB

VDD_RF2_FBRX
VDD_RF2_T_VCO
VDD_RF1_T_VCO

VDD_RF1_T_SYN

VDD_RF2_T_PLL

VDD_RF1_G_LNA

VDD_RF1_G_VCO

VDD_RF1_G_PLL

VDD_RF1_G_BB

VDD_RF2_XO

VDD_DIO

C

B

I175

XW3803_RF

VDD_SHDR_VCO_2V

VDD_TX_VCO_2V

VDD_TX_PLL_2V

VDD_PRX_2V

10

10

RADIO_WTR

1

C3816_RF

0.1UF

20%

4V

2

X5R
01005

10

RADIO_WTR

1

C3817_RF

0.1UF

20%

4V

2

X5R
01005

10

VDD_XO_2V

RADIO_WTR

1

C3803_RF

0.1UF

10%
10V

2

X5R-CERM
0201

RADIO_WTR

1

C3818_RF

0.1UF

20%

4V

2

X5R
01005

10

VDD_PRX_VCO_1P3V

10

DELETED C3805 PR REVIEW FEEDBACK

VDD_PRX_LO_HBMB_1P3V

10

RADIO_WTR

1

C3806_RF

0.1UF

20%

4V

2

X5R
01005

VDD_TX_SYNTH_1P3V

10

RADIO_WTR

1

C3824_RF

0.1UF

20%

4V

2

X5R
01005

w w w . c h i n a f i x . c o m

VDD_TX_LO_1P3V

VDD_TX_UPC_1P3V

10

RADIO_WTR

1

C3825_RF

0.1UF

20%

4V

2

X5R
01005

10

RADIO_WTR

1

C3826_RF

100PF

5%

10V

2

NP0-C0G
01005

VDD_GPS

MAKE_BASE=TRUE

VDD_DRX_LO1_1P3V

VDD_DRX_MB_1P3V

VDD_DRX_HB_1P3V

VDD_GPS_LNA_1P3V

RADIO_WTR

1

C3828_RF

0.1UF

20%

4V

2

X5R
01005

VDD_GPS_PLL_1P3V

RADIO_WTR

1

C3829_RF

0.1UF

20%

RADIO_WTR

4V

2

X5R
01005

VDD_GPS_BB_1P3VVDD_FBRX_2V

MAKE_BASE=TRUE

MAKE_BASE=TRUE

10

RADIO_WTR

1

C3809_RF

0.1UF

20%

4V

2

X5R
01005

10

10

10

10

89

GND

56

GND

83

GND

82

GND

58

GND

35

GND

8

GND

26

GND

64

GND

42

GND

41

GND

81

GND

21

GND

6

GND

24

GND

39

GND

10

GND

3

GND

23

GND

46

GND

49

GND

69

GND

88

GND

70

GND

10 10

63
40

47
87
77
96

GND
GND

GND
GND
GND
GND

U_WTR_RF

WTR1625

BGA

SYM 5 OF 5

GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND

GND

111
101
110
145

144
143
128
120
119
106
150
134

159
142
125
124
148
158
133
112
132

45
66
84
75

164

B

A

7 6 4 3

PP_LDO11

MAKE_BASE=TRUE

VDD_MSM_1P8V

10 12 11 8

VDD_TX_VCO_1P3V

10

RADIO_WTR

1

C3811_RF

1.0UF

10%

6.3V

2

X5R-CERM
0201-1

RADIO_WTR

1

C3807_RF

0.1UF

20%

4V

2

X5R
01005

VDD_GPS_VCO_1P3V

10

PAGE TITLE

RF TRANSCEIVER (2 OF 3)

L3802_RF

8.2NH-3%-0.19A-1.6OHM

21

01005

8 7 5 4 2 1

VDD_TX_DA_1P3V

10

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36

Apple Inc.

R

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

38 OF 55

SHEET

43 OF 60

A

D

WFR TRANSCEIVER

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

XW3900_RF

10 6 4

MAKE_BASE=TRUE

PP_LDO1

MAKE_BASE=TRUE

XW3901_RF

VREG_2V_WFRPP_LDO8

PPLDO1_WFR

RADIO_WFR

1

C3901_RF

10UF

20%

6.3V

2

CERM-X5R
0402-9

11 10 4

MAKE_BASE=TRUE

VDD_DIG_1P3V VREG_2V_WFR

11

11 11

RADIO_WFR

1

C3904_RF

0.1UF

20%
4V

2

X5R
01005

VDD_DRX_LO_1P3V

11

RADIO_WFR

1

C3905_RF

0.1UF

20%
4V

2

X5R
01005

MAKE_BASE=TRUE

RADIO_WFR

1

C3903_RF

10UF

20%

6.3V

2

CERM-X5R
0402-9

VDD_PRX_VCO_WFR_2V

RADIO_WFR

1

C3912_RF

0.1UF

20%
4V

2

X5R
01005

VDD_XO_WFR_2V

RADIO_WFR

1

C3913_RF

0.1UF

20%
4V

2

X5R
01005

11

MB1 DC

MB2

MB3

MB1

MB2

MB3

NO DC

DC

DC

NO DC

DC

42

IN

RADIO_WFR

42

IN

50_B3_PRX_WFR_IN

16

50_B1_B4_PRX_WFR_IN

16

50_B25_PRX_WFR_IN

16

50_WFR_PRX_HB_CA_IN

50_WFR_PRX_LB_CA_IN
50_B25_DRX_WFR_IN

20

50_B1_B4_DRX_WFR_IN

20

50_B3_DRX_WFR_IN

20

50_WFR_DRX_LB_CA_IN

R3901_RF

4.75K

RADIO_WFR

1%

1/32W

MF

01005

345678

2 1

C1019
R1016
L1000
U1002

U_WFR_RF

WFR1620

BGA

22

PRX_MB1_IN

16

PRX_MB2_IN

6

PRX_MB3_IN

27

NC

NC

WFR_RTUNE

21

PRX_HB_CA_IN

3

PRX_LB_CA_IN

49

DRX_MB1_IN

54

DRX_MB2_IN

66

DRX_MB3_IN

43

DRX_HB_CA_IN

36

DRX_LB_CA_IN

52

GND

19

R_TUNE

7

XO_IN

SYM 1 OF 2

RX_OTHER

SSBI_PRX_DRX

PRX_MB_CA_OUT
DRX_MB_CA_OUT

PRX_BB_QM

DRX_BB_QM

GND
GND

GND

PRX_BB_IP

PRX_BB_IM

PRX_BB_QP

DRX_BB_IP

DRX_BB_IM

DRX_BB_QP

1
61
13
34
5

50_WFR_PRX_MB_CA_OUT

65

50_WFR_DRX_MB_CA_OUT

29

WFR_BB_PRX_I_P

28

WFR_BB_PRX_I_N

25

WFR_BB_PRX_Q_P

30

WFR_BB_PRX_Q_N

62

WFR_BB_DRX_I_P

63

WFR_BB_DRX_I_N

57

WFR_BB_DRX_Q_P

64

WFR_BB_DRX_Q_N

WFR_SSBI

8

8

8

8

8

8

8

8

8

OUT

OUT

D

42

42

C

VDD_DRX_LB_WFR_1P3V

I113

VDD_DRX_MB_HB_FE_1P3V

I114

VDD_PRX_MBHB_FE_1P3V

11

11

11

VDD1_DRX_BB_2V

1

2

VDD1_PRX_BB_2V

1

2

11

RADIO_WFR

C3915_RF

0.1UF

20%
4V
X5R
01005

11

RADIO_WFR

C3916_RF

0.1UF

20%
4V
X5R
01005

9 5

50_RF_CLK

VDD_PRX_VCO_WFR_2V

11

VDD_PRX_VCO_WFR_1P3V

11

VDD_PRX_LO_WFR_1P3V

11

VDD_PRX_PLL_WFR_1P3V

11

37

VDD_RF2_P_VCO

33

VDD_RF1_P_VCO

31

VDD_RF1_P_LO

44

VDD_RF1_P_PLL

U_WFR_RF

WFR1620

BGA

SYM 2 OF 2

PWR_GND

GND
GND
GND
GND

C

46
35
42
53

B

VDD_PRX_LB_FE_1P3V

VDD_PRX_VCO_WFR_1P3V

RADIO_WFR

1

C3910_RF

0.1UF

20%
4V

2

X5R
01005

VDD_PRX_PLL_WFR_1P3V

RADIO_WFR

1

C3911_RF

0.1UF

20%
4V

2

X5R
01005

11

11

11

MAKE_BASE=TRUE

VDD_PRX_LB_FE_1P3V

11

VDD1_PRX_BB_2V

11

VDD_PRX_MBHB_FE_1P3V

11

VDD_DRX_LO_1P3V

11

VDD1_DRX_BB_2V

11

VDD_DRX_LB_WFR_1P3V

XW3902_RF

w w w . c h i n a f i x . c o m

VDD1_1P8VPP_LDO11

11 12 10 8 7 6 4 3

RADIO_WFR

1

C3917_RF

0.1UF

20%
4V

2

X5R
01005

11

VDD_DRX_MB_HB_FE_1P3V

11

VDD_DIG_1P3V

11

VDD1_1P8V

11

VDD_XO_WFR_2V

11

15

VDD_RF1_P_LB_FE

23

VDD_RF2_P_BB

10

VDD_RF1_P_MHB_FE

47

VDD_RF1_D_LO

56

VDD_RF2_D_BB

39

VDD_RF1_D_LB_FE

59

VDD_RF1_D_MHB_FE

24

VDD_RF1_DIG

14

GND

2

VDD_DIO

17

VDD_RF2_XO

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

20
51
41
45
50
18
9
11
21
32
4
38
55
40
60
48
58

B

A

VDD_PRX_LO_WFR_1P3V

RADIO_WFR

1

C3902_RF

0.1UF

20%
4V

2

X5R
01005

11

GND
GND
GND

PAGE TITLE

RF TRANSCEIVER (3 OF 3)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

26
8
12

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

39 OF 55

SHEET

44 OF 60

A

8 7 5 4 2 1

36

QFE DCDC

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C1110
R1102
L1104
U1101

D

C

27 21 19 18 12

PP_BATT_VCC

PP_BATT_VCC

SHOULD BE PLACED
MAX 0.25MM AWAY
FROM QPOET

27

21 19 18 12

XW4001_RF

SHORT-10L-0.25MM-SM

21

NOSTUFF

XW4002_RF

SHORT-10L-0.25MM-SM

21

NOSTUFF

BOTH XW'S
> 1.0MM
TO CREATE
INDUCTANCE

VBATT_SW

RADIO_QPOET

1

C4001_RF

10UF

20%

6.3V

2

CERM-X5R
0402-9

SW_GROUND

12

27 21 19 18 12

12

27 21 19 18 12

PP_BATT_VCC

17 16 15 14 12

12

12

41

IN

41

IN

36 41 46 47 48 49 50

BI

36 41 46 47 48 49 50

BI

5

PP_BATT_VCC

2.2UH-20%-0.7A-0.23OHM

RADIO_QPOET

L4001_RF

L4002_RF

22-OHM-25%-1800MA

VPA_ET
VBATT_SW
SW_GROUND
ET_DAC_P

ET_DAC_N
RFFE1_DATA
RFFE1_CLK
PA_CTL_QFE

0201

0805

21

BST_L

21

U_QPOET_RF

QFE1100

QPOET_BATT

14

BYP_BATT VDD_BATT

10

BYP_LOAD

28

VDD_BUCK

27

GND_BUCK

7

AMP_INP

2

AMP_INM

26

SDATA

21

SCLK

13

MPP1

20

VSW_BOOST

19

USID_LSB

22

GND

24

GND_BOOST

(USID)

BGA

VDD_BATT

VSW_BUCK

C_SW_BUCK
C_SW_BUCK

VOUT_BOOST

VDD_AMP

VDD_1P8

AMP_OUT

C_BUCK
C_BUCK

C_GSM

PA_VBAT

GND

GND_AMP

15
16

5
17

QPOET_VSW

23
4
11

12
8

9
6
18
25
1
3

L4003_RF

PP_BATT_VCC

APT_VINPUT

PP_LDO11

1.5UH-1.95A-0.111OHM

21

PSB25201T-SM

RADIO_QPOET

VPA_APT

GSM_CAP

VPA_BATT

VOUT_BOOST

12

12

12

17

12

1713

27 21 19 18 12

GSM_CAP

16 15 14

RADIO_QPOET

1

C4005_RF

20UF

20%

6.3V

2

CERM-X5R
0402

12 11 10 8 7 6 4 3

VPA_ET

17 16 15 14 12

15 14 12

VPA_APT

RADIO_QPOET

1

C4007_RF

4.7UF

20%
10V

2

X5R-CERM
0402

RADIO_QPOET

CRITICAL TO STAY
@ 4.7UF TO MEET
QPOET TIMING

(CAN BE CHANGED TO 20UF)

17 16

VPA_ET

RADIO_QPOET

1

C4008_RF

470PF

X5R

10%
10V

2

01005

VPA_ET_FILTER

RADIO_QPOET

1

R4001_RF

2.2

5%
1/32W
MF
01005

2

D

C

B

RADIO_QPOET

1

C4010_RF

470PF

X5R

10%
10V

2

MITIGATE RX1 DESENSE
IN VLB (B13)

01005

I/O @ 1.8V

12 11 10 8 7 6 4 3

PP_LDO11

RADIO_QPOET

1

10UF

20%

6.3V

2

CERM-X5R
0402-9

VOUT_BOOST_GND

12

BOOST FILTER

w w w . c h i n a f i x . c o m

L4004_RF

22-OHM-25%-1800MA

VOUT_BOOST

12

RADIO_QPOET

1

C4003_RFC4002_RF

10UF

20%

6.3V

2

CERM-X5R
0402-9

0201

21

APT_VINPUT

RADIO_QPOET

1

C4006_RF

10UF

20%

6.3V

2

CERM-X5R
0402-9

12

B

A

12

VOUT_BOOST_GND

2

XW4004_RF

SHORT-10L-0.25MM-SM

NOSTUFF

1

PAGE TITLE

QFE DCDC

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

40 OF 55

SHEET

45 OF 60

A

8 7 5 4 2 1

36

2G PA

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C1208
R1200
L1204
U1201

D

27 25 24 4

PP_VCC_MAIN

R4100_RF

600-OHM-25%-0.1A

21

0201-1

2G_PA_VBATT_10UA

RADIO_2G

1

C4107_RF

56PF

5%
16V

2

NP0-C0G
01005

RADIO_2G

1

C4108_RF C4109_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201

RADIO_2G

1

2.2UF

20%

6.3V

2

X5R-CERM
0201

VPA_APT

1

C4112_RF

100PF

5%
16V

2

NP0-C0G
01005

D

17 12

L4101_RF

4.7NH+/-0.3%-0.4A

50_LB_2G_PA_OUT

0201

21

1

C4118_RF

0.5PF

+/-0.05PF
16V

2

C0G-CERM
01005

50_LB_2G_ASM_IN

18

C

50_LB_2G_WTR_TX_OUT

9

50_HB_2G_WTR_TX_OUT

9

RADIO_2G

C4104_RF

100PF

21

5%

16V

NP0-C0G

01005

RADIO_2G

C4103_RF

100PF

21

5%

16V

NP0-C0G

01005

50_LB_2G_PA_IN

50_HB_2G_PA_IN

21 19 18 17 14 8

17 16 15 14 12 8 3

17 16 15 14 12 8 3

16

RFFE_VIO
RFFE1_DATA
RFFE1_CLK

U_2GPA_RF

SKY77357

LGA

LBRFIN
HBRFIN

VIO
SDATA
SCLK

GND

VCCVBATT

LBRFOUT

HBRFOUT

EPAD

50_HB_2G_PA_OUT

RADIO_2G

1

C4113_RF

0.8PF

+/-0.1PF
16V

2

NP0-C0G
01005

NOSTUFF

L4102_RF

1.5NH+/-0.1NH-1.0A

21

0201

50_HB_2G_ASM_IN

C

18

B

B

w w w . c h i n a f i x . c o m

A

PAGE TITLE

2G PA

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

41 OF 55
46 OF 60

A

D

D

345678

VERY LOW BAND PAD (B13, B17, B28)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

OMIT_TABLE

L4216_RF

7.5NH+/-3%-0.2A

01005

VPA_ET

12 15 16 17

2 1

C1332
R1300
L4215_RF
U1304

21

OMIT_TABLE

1

C4211_RF

2.2PF

+/-0.1PF
16V

2

NP0-C0G
01005-1

50_B28A_ASM_TRX

18

D

C

14

14

14

50_B28_PAD_IN
50_B12B17_PAD_IN
50_B13_PAD_IN

CTRL_VLB_BAND_SELECT_1

14

CTRL_VLB_BAND_SELECT_2

B28_IN
B17_IN
B13_IN

SW1
SW2

RX_OUT

1

C4208_RF

68PF

5%
16V

2

NP0-C0G
01005

12 15 16 17

VPA_BATT

RADIO_VLB_PAD

1

C4207_RF

1.0UF

20%
10V

2

X5R-CERM
0201-1

PLACE INDUCTOR CLOSE TO PA

L4217_RF

10NH-3%-0.170A

OMIT_TABLE

01005

21

OMIT_TABLE

1

C4213_RF

2.5PF

+/-0.1PF
16V

2

NP0-C0G
01005

FL_B17LP_RF

50_B28B_ASM_TRX

18

BAND17

VBAT

VCC

OMIT_TABLE

U_VLBPAD_RF

SKY77802-23

LGA

USE OMIT TABLE TO SELECT SKU VARIANT.

GND

THRM

PAD

B28A_ANT
B28B_ANT

B17_ANT
B13_ANT

B29_RX_IN

VIO

SCLK

SDATA

50_B28A_PAD_ANT
50_B28B_PAD_ANT
50_B17_PAD_ANT
50_B13_PAD_ANT

L4224_RF

22-OHM-25%-0.2A-0.9DCR

LB_VLB_VIO

15

01005

RFFE1_CLK
RFFE1_DATA

21

RFFE_VIO

3 8 12 13 15 16 17

1

C4230_RF

15PF

5%
16V

2

NP0-C0G-CERM
01005

PLACE INDUCTOR CLOSE TO PA

50_B29_PAD_ANT

8 13 16 17 18 19
21

L4222_RF

7.5NH+/-3%-0.2A

1

C4227_RF

2.7PF

+/-0.1PF
16V

2

NP0-C0G
01005-1

01005

21

50_B17_PAD_LPF_IN

L4223_RF

5.1NH-3%-0.250A

01005

OMIT_TABLE

LFL15710MTCTD717

0402

GND

1

21

OUTIN

24

3

OMIT_TABLE

1

C4231_RF

1.5PF

+/-0.05PF
16V

2

NP0-C0G-CERM
01005

50_B13_ASM_TRX

50_B17_ASM_TRX

18

18

C

B

SHORT-10L-0.1MM-SM

VCC_VLB_SW

1

2

XW4200_RF

C4201_RF

47PF

5%
16V
CERM
01005

PP_LDO14_RFSW

15

4 23

PLACE INDUCTOR CLOSE TO PA

w w w . c h i n a f i x . c o m

C4221_RF

100PF

50_B13_B17_B28_B29_PAD_RX

21

5%

16V

NP0-C0G

01005

50_B13_B17_B28_B29_MCH_RX

1

C4219_RF

1.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

NOSTUFF

L4211_RF

22NH-5%-0.1A

21

01005

L4221_RF

2.4NH+/-0.1NH-0.370A

21

01005

50_B13_B17_B28_B29_PRX_WTR_IN

50_B29_ASM_TRX

18

B

9

A

C4206_RF

100PF

5%
10V
NP0-C0G
01005

CTRL_VLB_BAND_SELECT_1

14

CTRL_VLB_BAND_SELECT_2

14

C4224_RF

100PF

5%
10V
NP0-C0G
01005

14

VDD

U_VLB_SW_RF

CXA2973GC

V1
V2

BGA

GND

RF1
RF2
RF3
RF4

OUT V2
RF3
RF2
RF4

50_B13_B17_B28_WTR_TX_OUT

50_B12B17_PAD_IN
50_B13_PAD_IN

50_B28_PAD_IN

V1

011

0

1

1

BAND
B12B17
B13
B28

14

14

9

NOSTUFF

1

C4223_RF

3.3PF

+/-0.1PF
16V

2

NP0-C0G
01005

P2 DOE

PAGE TITLE

VERY LOW BAND PAD

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

OMIT_TABLE

DRAWING NUMBER SIZE

051-00648

REVISION

4.0.0

BRANCH

PAGE

42 OF 55

SHEET

47 OF 60

A

D

8 7 5 4 2 1

36

LOW BAND PAD (B8, B26, B20)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C4318_RF
R1400
L4322_RF
U1402

D

17 16 14 12

VPA_BATT

C4300_RF

47PF

5%

16V

CERM

01005

1

2

VPA_ET

C4309_RF

100PF

21

5%

16V

NP0-C0G

01005

L4322_RF

18NH-3%-0.140A

01005-1

50_B20_PRX_WTR_IN50_B20_MATCH_1

9

D

C4314_RF

L4312_RF

7.5NH+/-3%-0.2A

01005

1

17 16 14 12

L4313_RF

8.2NH-3%-0.19A-1.6OHM

01005

2

21

50_B26_MATCH

47PF

5%

16V

CERM

01005

21

50_B26_PRX_WTR_IN

C

15

50_B20_WTR_TX_OUT

50_B26_WTR_TX_OUT

15

C4321_RF

0.7PF

+/-0.1PF
16V
NP0-C0G
01005

C4304_RF

100PF

21

5%

10V

NP0-C0G

01005

C4303_RF

18PF

21

5%

16V

CERM

01005

CAPACITOR THAT'S SUPPOSED TO GO HERE IS LOCATED ON

VERY LOW BAND PAD. THE 2 PAD'S NEED TO SHARE DECOUPLING

15

15

CTRL_LB_BAND_SELECT_1 50_B20_PAD_RX
CTRL_LB_BAND_SELECT_2

50_B20_PAD_IN

50_B26_PAD_IN
50_B8_PAD_IN

SW1
SW2

B20IN
B26IN
B8IN

GND

VBATT

VCC1

VCC2

U_LBPAD_RF

TQF6410

LGA

THRM

PAD

B20RX
B26RX

B8RX

B20ANT
B26ANT

B8ANT

VIO

SCLK

SDATA

50_B26_PAD_RX
50_B8_PAD_RX

50_B20_PAD_ANT
50_B26_PAD_ANT
50_B8_PAD_ANT

LB_VLB_VIO

RFFE1_CLK

RFFE1_DATA

14

C4311_RF

100PF

21

50_B8_MATCH_1 50_B8_PRX_WTR_IN

5%

16V

NP0-C0G

01005

L4315_RF

15NH-3%-0.140A

1

C4313_RF

0.9PF

+/-0.05PF
16V

2

CERM
01005

01005

21

9

C

L4316_RF

5.1NH-3%-0.250A

21

17 16 14 13 12 8 3

17 16 14 13 12 8 3

01005

1

C4317_RF

1.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

50_B20_ASM_TRX

18

B

50_B8_B26_B20_WTR_TX_OUT

A

WTR OUTPUT HAS DC
FIRST SHUNT MUST
BE A CAPACITOR.

9

15

15

C4301_RF

100PF

21

50_LB_SW_T_MCH

5%

10V

NP0-C0G

01005

CTRL_LB_BAND_SELECT_1
CTRL_LB_BAND_SELECT_2

L4301_RF

6.8NH-140MA

21

50_LB_SW_MCH_IN

01005

1

C4320_RF

2.7PF

+/-0.1PF
16V

2

NP0-C0G
01005

VCC_LB_SW

XW4300_RF

SHORT-10L-0.1MM-SM

PP_LDO14_RFSW

w w w . c h i n a f i x . c o m

5.6NH-3%-0.23A-1.3OHM

1

C4318_RF

1.5PF

+/-0.1PF
16V

2

NP0-C0G
01005

L4320_RF

01005

21

50_B26_ASM_TRX

18

B

C4305_RF

47PF

5%
16V
CERM
01005

1

RADIO_LB_PAD

1

VDD

U_LB_SW_RF

50_LB_SW_MCH_IN

CXA2973GC

15

BGA

GND
8

9

3

V1

2

V2

RF1
RF2
RF3
RF4

6
5
7
4

50_B8_PAD_IN
50_B26_WTR_TX_OUT
50_B20_WTR_TX_OUT

15

15

15

15

V2
0
1 B26

1 B8
0
11

BANDV1

B20

L4306_RF

18NH-3%-140MA

01005

NOSTUFF

2

3.3NH+/-0.1NH-290MA

L4321_RF

01005

21

PAGE TITLE

50_B8_ASM_TRX

18

A

LOW BAND PAD

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

43 OF 55

SHEET

48 OF 60

D

8 7 5 4 2 1

36

345678

MID BAND PAD (B1, B25, B3, B4, B34, B39)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

2 1

C4426_RF
R1500
L4409_RF
U1501

D

RADIO_MB_PAD

1

C4408_RF

47PF

5%
16V

2

CERM
01005

VPA_ET

12

L4404_RF

2.2NH+/-0.1NH-0.380A

21

01005

50_B3_PRX_MATCH

L4403_RF

3.6NH+/-0.1NH-0.280A

21

01005

17 15 14

C4425_RF

33PF

21

5%

16V

NP0-C0G-CERM

01005

RADIO_WFR

L4405_RF

50_B3_PRX_WFR_IN

11

D

1.5NH+/-0.1NH-0.400A

21

01005

50_B1_B4_PRX_WFR_IN

11

L4406_RF

2.7NH+/-0.1NH-0.370A

21

01005

RADIO_WFR

C

17 15 14 12

9

50_B3_B4_WTR_TX_OUT

35

B3/4IN

34

B1/25/34/39IN

VPA_BATT

RADIO_MB_PAD

1

C4407_RF

1.0UF

20%
10V

2

X5R-CERM
0201-1

U_MBPAD_RF

AFEM-8020-AP1

26

27

36

VCC1

VBATT

VCC2

RADIO_MB_PAD

LGA

B3RX

B1/4RX

B25RX

B1/3/4ANT

B25ANT

B34_39_OUT

VIO

SCLK

SDATA

12

50_B3_PAD_RX

10

50_B1_B4_PAD_RX

5

50_B25_PAD_RX

16

50_B1_B3_B4_PAD_ANT

8

50_B25_PAD_ANT

24

50_B34_B39_PAD_ANT

1

RFFE_VIO

2

RFFE1_CLK

3

RFFE1_DATA

21

L4409_RF

1.2NH+/-0.1NH-220MA

1

L4402_RF

2.2NH+/-0.1NH-200MA

01005

01005

21

50_B25_PRX_MATCH

C4423_RF

33PF

21

5%

16V

NP0-C0G-CERM

01005

RADIO_WFR

50_B25_PRX_WFR_IN

11

C

2

OMIT_TABLE

FL_B39LP_RF

OMIT_TABLE

L4421_RF

0.8NH+/-0.1NH-0.630A

01005

19 18 1714 13 8

1312 8 3

17 15 14

1312 8 3

17 15 14

50_B34_B39_LPF_IN

BAND34-39

LFL151G95TCSD734

0402

GND

1

OUTIN

24

3

50_B34_B39_HB_SWITCH_IN

19

B

9

50_B1_B25_B34_B39_WTR_TX_OUT

GND

4

GND

6

GND

7

GND

9

GND

11

GND

14

GND

13

GND

15

GND

17

GND

18

GND

19

GND

20

GND

21

GND

22

GND

23

GND

25

GND

28

GND

29

GND

30

GND

31

GND

32

GND

33

EPAD

38

37

EPAD

EPAD

39

EPAD

41

40

EPAD

EPAD

42

EPAD

43

EPAD

45

44

EPAD

EPAD

46

EPAD

48

47

EPAD

L4407_RF

1.3NH+/-0.1NH-0.400A

01005

21

1

C4418_RF

0.2PF

+/-0.1PF
16V

2

NP0-C0G
01005

NOSTUFF

50_B1_B3_B4_ASM_TRX

18

B

w w w . c h i n a f i x . c o m

L4401_RF

2.5NH+/-0.1NH-0.2A

2 1

01005

50_B25_ASM_MATCH

L4408_RF

3.6NH+/-0.1NH-180MA

21

01005

50_B25_ASM_TRX

18

A

1

C4413_RF

1.4PF

+/-0.1PF
16V

2

NP0-C0G
01005

PAGE TITLE

MID BAND PAD

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

44 OF 55

SHEET

49 OF 60

A

8 7 5 4 2 1

36

345678

HIGH BAND PAD (B7, B38, B40, B41, XGP)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

RADIO_WTR

2 1

L4512_RF

3.3NH+/-0.1NH-290MA

21

01005

C4533_RF
R1600
L1616
U1601

50_B7_PRX_WTR_IN

9

D

50_B7_WTR_TX_OUT

9

RADIO_HB_PAD

C4501_RF

18PF

2%

16V

CERM

01005

OMIT_TABLE

21

OMIT_TABLE

RADIO_HB_PAD

1

C4503_RF

1.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

OMIT_TABLE

16 15 14 12

OMIT_TABLE

1

C4507_RF

68PF

5%
16V

2

NP0-C0G
01005

VPA_BATT

RADIO_HB_PAD

1

C4505_RF

1.0UF

20%
10V

2

X5R-CERM
0201-1

OMIT_TABLE

1

2

VPA_ET

RADIO_HB_PAD

C4506_RF

1.0UF

20%
10V
X5R-CERM
0201-1

VPA_APT

1

C4532_RF

68PF

5%
25V

2

NP0-C0G-CERM
01005

OMIT_TABLE

16 15 14 12

OMIT_TABLE

1

C4522_RF

1.8PF

+/-0.1PF
16V

2

NP0-C0G
01005

R4509_RF

0.00

1

C4500_RF

0.7PF

+/-0.1PF
16V

2

NP0-C0G
01005

OMIT_TABLE

13 12

1/32W
01005

21

OMIT_TABLE

0%
MF

1

C4520_RF

0.3PF

+/-0.5PF
16V

2

CERM
01005

50_B7_ASM_TRX

2.7NH+/-0.1NH-0.6A

OMIT_TABLE

18

L4522_RF

50_B41B_FILTER_IN

17

0201

OMIT_TABLE

D

C

50_B40_B38_B41_WTR_TX_OUT

9

RADIO_HB_PAD

C4533_RF

100PF

5%

16V

NP0-C0G

01005

OMIT_TABLE

OMIT_TABLE

OMIT_TABLE

RADIO_HB_PAD

1

C4502_RF

1PF

+/-0.1PF
16V

2

NP0-C0G
01005

50_B40A_TX_HB_SWITCH_MCH

1

50_B38_B40_B41_PAD_IN

R4531_RF

0.00

1/32W
01005

21

50_B40A_TX_HB_SWITCH_IN

0%
MF

L4506_RF

4.3NH-3%-0.270A

01005

50_B7_PAD_IN

B7IN

B38_40_41

GND

GND

GND

GND

GND

GND

GND

VBATT

RADIO_HB_PAD

U_HBPAD_RF

TQF6430

LGA

OMIT_TABLE

GND

GND

GND

GND

GND

GND

VCC1

VCC2

VAPT

EPAD

B7RX

B7ANT

B41B
B40B
B41C

B40A/B41A

VIO

SCLK

SDATA

50_B7_RX_PAD
50_B7_ANT_PAD

50_B41B_TX_PAD
50_B40B_TX_PAD
50_B41C_TX_PAD
50_B40A_B41A_TX_PAD

RFFE_VIO
RFFE1_CLK
RFFE1_DATA

21

13 8

18 16

12 8 3

14 13

12 8 3

14

14

OMIT_TABLE

C

FT_B40_RF

TX-BAND40-LTE

L4520_RF

1.3NH+/-0.1NH-0.400A

21

01005

1

19
16

15
16

1513

L4527_RF

9.1NH-3%-0.17A-1.7OHM

01005

OMIT_TABLE

2

OMIT_TABLE

50_B40B_TX_FILTER_IN

UNBAL_PRT1 UNBAL_PRT4

SAFFU2G35MA0F57

LGA

OMIT_TABLE

GND

GND

GND

5

3

2

L4526_RF

2.2NH+/-0.1NH-0.380A

41

50_B40B_TX_FILTER_OUT 50_B40B_TX_HB_SWITCH_IN

01005

1

L4523_RF

9.1NH-3%-0.17A-1.7OHM

01005

OMIT_TABLE

2

2121

OMIT_TABLE

L4515_RF

2.7NH+/-0.1NH-0.6A

1

L4528_RF

7.5NH-5NH%-140MA

01005

OMIT_TABLE

2

0201

OMIT_TABLE

50_B41C_FILTER_IN

1

C4528_RF

OMIT_TABLE

0.3PF

+/-0.1PF
16V

2

NP0-C0G
01005

17

B

17

FTB40A41A_RF

SAW-BAND-40A-41A-TDD-LX

7

50_B40A_B41A_FILTER_IN

1

1.5NH+/-0.1NH-0.400A

01005

2

OMIT_TABLE

8

885058

LGA

9

10

2

OMIT_TABLE

4

ANT_B40A

1

ANT_B41A

B40A_PORT
B41A_PORT

50_B41A_TX_HB_SWITCH_IN

19

w w w . c h i n a f i x . c o m

GND

6

5

2

3

1

GND

GND

GND

GND

GND

L4507_RF

7.5NH+/-3%-0.2A

01005

OMIT_TABLE

2

OMIT_TABLE

1

L4516_RFL4517_RF

3.1NH-+/-0.1NH-0.29A

01005

2

OMIT_TABLE

C4521_RF

3.0PF

21

+/-0.1PF

16V

NP0-C0G

01005

OMIT_TABLE

50_B40A_B41A_FILTER_IN

B

A

L4524_RF

1.8NH+/-0.1%-0.380A

21

50_B41B_TX_HB_SWITCH_IN

RADIO_HB_PAD

OMIT_TABLE

OMIT_TABLE

01005

FT_41BC_RF

SAW-BAND-41B-41C-TDD-TX

50_B41B_FILTER_IN 50_B41B_TX_HB_SWITCH_MCH

17

50_B41C_FILTER_IN

17

9 1
6 4

SAWEN2G58QA0F57

B41BOUT

RF4/

B41COUT

GND

10

LGA

GND

8

GND

7

GND

5

B41BIN

B41CIN

GND

3

RF1/RF2/
RF3/

GND

2

50_B41C_TX_HB_SWITCH_MCH 50_B41C_TX_HB_SWITCH_IN

OMIT_TABLE

8 7 5 4 2 1

L4525_RF

1.4NH+/-0.1NH-1.1A

0201

36

PAGE TITLE

HIGH BAND PAD

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

45 OF 55
50 OF 60

A

D

ANTENNA SWITCH

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C1702
R1700
L4608_RF
U1702

D

VCC_ASM_FILTERED

1

2

C4602_RF

47PF

5%
16V
CERM
01005

R4607_RF

0.00

1/32W
01005

21

0%
MF

PP_BATT_VCC

D

27 21 19 12

C

B

C

29

OMIT_TABLE

OMIT_TABLE

L4601_RF

2.4NH+/-0.1NH-200MA

9

01005

21

50_B34_B39_FILT_RX50_B34_B39_PRX_WTR_IN

1

L4602_RF

3.3NH+/-0.1NH-180MA

01005

2

OMIT_TABLE

FRX34B39_RF

BAND34-39

SAWFD1G90LC0F57

LGA

GND

8

7

5

4

3

2

10

OUT_FIL1INPUT
OUT_FIL2

22
23
24

12
20

18

10
16
17
11

14
19

1
2
3

4

8

9

7

RF1
RF3
RF7

RX1
TRX6
TRX7
TRX8

HBTX

HBRF2
TRX2

TRX3
TRX0
TRX1
TRX4
TRX5
TRX11
RX2

LBTX

LBRF2

50_HB_SWITCH_TX

19

50_HB_SWITCH_RX

19

50_B7_ASM_TRX

17

91
6

TO DIVERSITY MODULE

50_B39_RX_ASM_OUT
50_B34_RX_ASM_OUT
50_B1_B3_B4_ASM_TRX

16

50_B25_ASM_TRX

16

50_HB_2G_ASM_IN

13

50_HB_DIVERSITY_ASM

21

50_B17_ASM_TRX

14

50_B8_ASM_TRX

15

50_B28A_ASM_TRX

14

50_B28B_ASM_TRX

14

50_B26_ASM_TRX

15

50_B13_ASM_TRX

14

50_B20_ASM_TRX

15

50_B29_ASM_TRX

14

50_LB_2G_ASM_IN

TO DIVERSITY MODULE

1

1

50_LB_DIVERSITY_ASM

21

U_ASM_RF_RF

L4603_RF L4604_RF

1.0NH+/-0.1NH-0.22A-0.9OHM

01005

NOSTUFF

1.0NH+/-0.1NH-0.22A-0.9OHM

01005

NOSTUFF

w w w . c h i n a f i x . c o m

13

VDD

RF5159

LGA

GND

25

15

30

A2

A1

VIO

32

21

5

26

RFFE_VIO

28

RFFE2_CLK

27

RFFE2_DATA

8 13 14 16 17 19 21

3 8 19 21

8 19 21

1

C4606_RF

22PF

5%
16V

2

CERM
01005

FWD/REV

SCLK

SDATA

6

33

31

50_FWD_OR_REV_RF

50_ANT2_CONN

50_ANT1_CONN

9

23

23

B

2

2

A

PAGE TITLE

ANTENNA SWITCH

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

46 OF 55
51 OF 60

A

D

HIGH BAND SWITCH

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

D

C

50_B40A_PRX_WTR_IN

9

50_B41A_PRX_WTR_IN

9

OMIT_TABLE

C4703_RF

18PF

21

5%

16V

CERM

01005

OMIT_TABLE

C4720_RF

100PF

5%

6.3V
CERM

01005

50_B41A_PRX_MATCH

21

1

OMIT_TABLE

L4705_RF

2.0NH+/-0.1NH-0.380A

01005

2

OMIT_TABLE

R4700_RF

0.00

1/32W
01005

21

0%
MF

50_B40A_PRX_FILTER

50_B41A_PRX_FILTER

1

OMIT_TABLE

L4706_RF

1.4NH+/-0.1NH-0.4A

01005

2

OMIT_TABLE

FR40A41A_RF

SAW-BAND-40A-41A-TDD-RX

GND

10

885055

LGA

GND

GND

8

7

GND

5

GND

4

ANT

GND

3

GND

9

RX_B40A

6

RX_B41A

D

XW4700_RF

SHORT-10L-0.1MM-SM

VCC_HBS

1

C4710_RF

47PF

5%
16V

2

CERM

2

1

50_B40A_B41A_RX

19

1

OMIT_TABLE

L4709_RF

2.2NH+/-0.1NH-200MA

01005

2

RFFE_VIO

8 13 14 16 17 18 21

RFFE2_CLK

3 8 18 21

RFFE2_DATA

18

8 21

50_B40B_TX_HB_SWITCH_IN
50_B41B_TX_HB_SWITCH_IN

17

50_B34_B39_HB_SWITCH_IN

16

50_B40A_TX_HB_SWITCH_IN

17

50_B41C_TX_HB_SWITCH_IN

17

50_B41A_TX_HB_SWITCH_IN

17

50_B40A_B41A_RX

19

50_B38X_RX

19

50_B40B_RX

19

11
12

7
8
9

10

14
13
15

4
3
2

TX1
TX2
TX3
TX4
TX5
TX6

RX1
RX2
RX3

VIO
SCLK
SDATA

1

VBATT

U_HBS_RF

CXM3652UR

UQFN

OMIT_TABLE

THRM

GND

6

PAD

17

01005

OMIT_TABLE

TX RF1

RX RF1

5

16

PP_BATT_VCC

50_HB_SWITCH_TX

50_HB_SWITCH_RX

12

18 21 27

C

18

B

50_B40B_B38X_PRX_WTR_IN

9

C4701_RF

100PF

21

50_B40B_B38X_PRX_MATCH2

5%

10V

NP0-C0G

01005

OMIT_TABLE

L4713_RF

2.7NH+/-0.1NH-0.370A

01005

1

L4704_RF

3.7NH-+/-0.1NH-0.27A

01005

OMIT_TABLE

2

OMIT_TABLE

21

50_B40B_B38X_PRX_FILTER

1

L4712_RF

2.7NH+/-0.1NH-0.370A

01005

OMIT_TABLE

2

OMIT_TABLE

FR38X40B_RF

SAW-BAND-40B-38X-TDD-RX

885056

2

RF1/ANT

GND

1

RADIO_HBSWITCH

3

RF3/RX_B40B

LGA

RF2/RX_B38X

GND

GND

GND

5

4

GND

7

GND

8

GND

10

9
6

19

50_B40B_RX

19

50_B38X_RX

1

L4708_RF

2.9NH-+/-0.1NH-0.36A

01005

OMIT_TABLE

w w w . c h i n a f i x . c o m

2

1

L4710_RF

12NH-3%-0.140A

01005

OMIT_TABLE

2

B

A

PAGE TITLE

HIGH BAND SWITCH

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

47 OF 55
52 OF 60

A

D

RX DIVERSITY (1)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

MIDBAND

345678

2 1

C4826_RF
R1800
L1829
U1801

D

C

MIDBAND DIVERSITY - WFR

50_B1_B4_DRX_WFR_IN

11

50_B3_DRX_WFR_IN

11

C4805_RF

100PF

21

5%

16V

NP0-C0G

01005

L4806_RF

1.1NH+/-0.1NH-220MA

21

01005

L4805_RF

1.8NH+/-0.1%-0.380A

50_B3_DRX_MATCH

01005

L4801_RF

2.4NH+/-0.1NH-0.370A

21

01005

HIGHBAND DIVERSITY - WTR

LOWBAND DIVERSITY - WTR

D

OMIT_TABLE

L4813_RF

3.3NH+/-0.1NH-290MA

50_B1_B4_DRX_DSM

1

C4803_RF

2.2PF

+/-0.1PF
16V

2

NP0-C0G
01005-1

50_B3_DRX_DSM

21

21

21

50_B7_DRX_WTR_IN

9

50_B38X_DRX_WTR_IN

9

01005

OMIT_TABLE

C4809_RF

1.1PF

21

+/-0.1PF

16V

NP0-C0G

01005

OMIT_TABLE

C4827_RF

100PF

21

5%

10V

NP0-C0G

01005

21

OMIT_TABLE

L4814_RF

1.8NH+/-0.1%-0.380A

21

01005

50_B7_DRX_DSM

50_B38X_DRX_DSM

21

21

50_B8_B28B_DRX_WTR_IN

9

50_B13_B17_DRX_WTR_IN

L4825_RF

22NH-5%-0.1A

01005

L4826_RF

22NH-5%-0.1A

21

01005

21

NOSTUFF

1

C4820_RF

0.3PF

+/-0.05PF
16V

2

C0G-CERM
01005

1

C4831_RF

0.8PF

+/-0.05PF
16V

2

C0G-CERM
01005

50_B8_B28B_DRX_DSM

50_B13_B17_DRX_DSM

21

21

C

B

OMIT_TABLE

C4804_RF

100PF

50_B25_DRX_WFR_IN

11 21

21

5%

16V

NP0-C0G

01005

1.6NH+/-0.1NH-0.390A

50_B25_DRX_MATCH

L4804_RF

21

01005

L4802_RF

2.3NH+/-0.1NH-0.370A

21

01005

50_B25_DRX_DSM

21

50_B40_DRX_WTR_IN

9

0.4NH+/-0.1NH-0.990A

L4830_RF

01005

21

50_B40_DRX_FILTER

OMIT_TABLE

L4816_RF

2.4NH+/-0.1NH-200MA

01005

L4823_RF

22NH-5%-0.1A

21

50_B20_B29_DRX_WTR_IN

21

9

01005

21

1

C4832_RF

0.8PF

+/-0.05PF
16V

2

C0G-CERM
01005

50_B20_B29_DRX_DSM

PLACE AT WTR END OF TRACE

50_B34_DRX_WTR_IN

9

MIDBAND DIVERSITY - WTR

L4807_RF

2.0NH+/-0.1NH-0.380A

21

01005

L4808_RF

3.6NH+/-0.1NH-180MA

21

01005

NOSTUFF

50_B34_DRX_DSM

21

OMIT_TABLE

C4816_RF

100PF

21

50_B41A_DRX_WTR_MCH

5%

16V

NP0-C0G

01005

OMIT_TABLE

R4815_RF

0.00

1/32W
01005

0%
MF

21

50_B41A_DRX_FILTER50_B41A_DRX_WTR_IN

OMIT_TABLE

50_B26_B28A_DRX_WTR_IN

21 9

9

L4817_RF

1.3NH+/-0.1NH-0.400A

w w w . c h i n a f i x . c o m

01005

PLACE AT WTR END OF TRACE

21

C4826_RF

100PF

21

5%

16V

NP0-C0G

01005

50_B26_B28A_DRX_WTR_MCH

8.2NH-3%-0.19A-1.6OHM

L4829_RF

01005

21

50_B26_B28A_DRX_DSM

21

1

L4827_RF

10NH-3%-0.170A

01005

2

B

A

C4808_RF

100PF

50_B39_DRX_WTR_IN

9 21

21

5%

16V

NP0-C0G

01005

50_B39_DRX_MATCH

2.4NH+/-0.1NH-0.370A

2.2NH+/-0.1NH-0.380A

L4809_RF

01005

L4810_RF

01005

21

21

50_B39_DRX_DSM

50_PCS_WTR_IN

9

50_DCS_WTR_IN

C4817_RF

100PF

21

50_PCS_DRX_MATCH

5%

16V

NP0-C0G

01005

C4818_RF

100PF

21

50_DCS_DRX_MATCH

5%

16V

NP0-C0G

01005

L4819_RF

2.2NH+/-0.1NH-0.380A

21

01005

L4820_RF

2.7NH+/-0.1NH-0.370A

21

01005

L4822_RF

2.2NH+/-0.1NH-0.380A

21

01005

L4821_RF

5.6NH-3%-0.23A-1.3OHM

21

01005

50_PCS_DSM_OUT

50_DCS_DSM_OUT

21

A

21 9

PAGE TITLE

RX DIVERSITY

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

48 OF 55

SHEET

53 OF 60

D

8 7 5 4 2 1

36

RX DIVERSITY (2)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C1900
R1900
L1900
U1901

D

D

C

50_B40_DRX_FILTER

20

50_B41A_DRX_FILTER

20

OMIT_TABLE

FD40B41A_RF

SAW-2-1-BAND-40-41A-DRX

6 4
9 1

B39252B9920P810

B40OUT

LGA

B40IN

B41AINB41AOUT

L4905_RF

22-OHM-25%-0.2A-0.9DCR

VCC_DSM

01005

1

C4901_RF

15PF

5%
16V

2

NP0-C0G-CERM
01005

2

VDD

50_B1_B4_DRX_DSM

20

50_B3_DRX_DSM

20

50_B7_DRX_DSM

20

50_B8_B28B_DRX_DSM

20

50_B13_B17_DRX_DSM

20

50_B25_DRX_DSM 50_HB_DIVERSITY_ASM

20 18

50_B26_B28A_DRX_DSM

20

50_B20_B29_DRX_DSM

20

50_B34_DRX_DSM

20

50_B39_DRX_DSM

20

50_B38X_DRX_DSM

20

50_B40_DRX_DSM
50_B41A_DRX_DSM

32

RX_BAND_1_4

33

RX_BAND_3

16

RX_BAND_7

19

RX_BAND_8+28B

25

RX_BAND_12+13

34

RX_BAND_25

21

RX_BAND_26+28A

23

RX_BAND_20

12

RX_BAND_34

13

RX_BAND_39

17

RX_BAND_38X

14

RX_BAND_40

15

RX_BAND_41A

U_DSM_RF

M472B

LGA

OMIT_TABLE

VIO

SDATA

SCLK

ANT_LB

ANT_HB

PCS

DCS

21

3
4
5
7
9
29
30

PP_BATT_VCC

RFFE_VIO
RFFE2_DATA
RFFE2_CLK
50_LB_DIVERSITY_ASM

50_PCS_DSM_OUT
50_DCS_DSM_OUT

27 19 18 12

18

20

20

C

19 18 17 16 14 13 8

19 18 8

19 18 8 3

B

1

OMIT_TABLE

L4901_RF L4903_RF

15NH-3%-0.140A

01005

2

1

OMIT_TABLE

L4902_RF L4904_RF

5.6NH-3%-0.23A-1.3OHM

01005

2

GND

10

GND

8

GND

7

GND

5

GND

3

GND

2

1

OMIT_TABLE

5.6NH-3%-140MA

01005

2

1

OMIT_TABLE

5.1NH-3%-0.250A

01005

2

THRM

36

PAD

37

38

39

40

GND

1

GND

6

GND

8

GND

10

GND

11

GND

18

GND

20

GND

22

GND

24

GND

26

GND

27

GND

28

GND

31

35

w w w . c h i n a f i x . c o m

B

A

PAGE TITLE

RX DIVERSITY (2)

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

49 OF 55
54 OF 60

A

D

GPS

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

C1900
R1900
L1900
U1901

D

D

C

23

50_GPS_DSM_IN

1

UNBAL_PORT

FL_GPSRF_RF

LNA-GNSS-BAL

B8821

LGA

BAL_PORT
BAL_PORT

GND

GND

5

2

C

L5002_RF

10NH-3%-0.170A

21

100_GPS_FIL_OUT_P

01005

3

4

RADIO_GPS

1

C5001_RF

1.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

L5003_RF

10NH-3%-0.170A

100_GPS_FIL_OUT_N 100_GPS_WTR_IN_N

01005

100_GPS_WTR_IN_P

21

9

9

B

B

w w w . c h i n a f i x . c o m

A

PAGE TITLE

GPS

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00648

4.0.0

50 OF 55
55 OF 60

A

D

ANTENNA FEEDS

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

D

ANT & COAX CONNECTOR FOR LOWER & UPPER SECTION OF MLB

UPPER_LBMB_ANT_RF

1.6X1.21MM

SM-NSP

20NH-3%-.14A-2.9OHM

1

L5103_RF

50_UPPER_LBMB

FL5146_RF

FLTR-GPS-0603

LFE18832MHC1D449

1

NC

2

NC

3

OUTIN

2.4NH+/-0.2NH-0.57A-0.07OHM

50_NTCH_FILT_OUT

1

C5105_RF

0.8PF

+/-0.05PF
16V

2

C0G-CERM
01005

L5101_RF

03015

21

50_UAT_PAC

23

50_UAT_CELL_F

VBAT

U_ANTPAC_RF

RF1346

WLCSP

RF1
RF2

GND

VIO

SDATA

SCLK

NC
NC
NC

PAC_VDD_3V0_IN

VIO_FILT

RFFE2_PAC_DATA_FILT

RFFE2_PAC_CLK_FILT

NC
NC
NC

23

1

C5106_RF

33PF

5%
16V

2

NP0-C0G-CERM
01005

23

23

1

C5107_RF

0.01UF

10%

6.3V

2

X5R
01005

L5107_RF

20NH-3%-.14A-2.9OHM

01005

PAC_VDD_3V0

BYPASS CAPS FOR ALTERNATE ANTENNA WITHOUT U_ASWNT

4 14 15 23

23 15 14 4

OMIT_TABLE

PP_LDO14_RFSW

C5109_RF

47PF

5%
16V
CERM
01005

R5137_RF

0.00

1%

1/20W

MF

0201

SHORT-10L-0.1MM-SM

XW5100_RF

VCC_SWANT

18

50_ANT2_CONN

RADIO_LOW_ANT

LOW_COAX_RF

MM5829-2700

F-ST-SM1

D

C

27

RFFE2_DATA_BUFFER

8

RFFE2_CLK_BUFFER

8

RFFE_VIO_S2R

01005

R5104_RF

0.00

0%

1/32W

MF

01005

R5105_RF

0.00

0%

1/32W

MF

01005

VIO_FILT

23

1

0.01UF

10%

6.3V

2

X5R
01005

RFFE2_PAC_DATA_FILT

23

RFFE2_PAC_CLK_FILT

1

C5101_RF

120PF

10%
10V

2

CER-X7R
01005

1

C5104_RFC5103_RF

33PF

5%
16V

2

NP0-C0G-CERM
01005

1

C5102_RF

23

2

120PF

10%
10V
CER-X7R
01005

UP_COAX_RF

MM5829-2700

F-ST-SM1

50_ANT2_UPPER_COAX_CONN

8

UAT_SELECT

0=UPPER_LBMB_ANT

1=UPPER_HB_ANT

VDD

U_SWUANT_RF

CXA4011GC

RF

VC1

OMIT_TABLE

XFLGA

GND

RF1

RF2

50_UAT_CELL

23

L5108_RF

2.5NH+/-0.1NH-500MA

0201

50_UAT_CELL_LPF

1

C5110_RF

1.1PF

+/-0.05PF
25V

2

C0G-CERM
0201

TO THE PAC FOR LBMB

L5109_RF

2.5NH+/-0.1NH-500MA

2121

50_UAT_CELL_F

0201

1

L5111_RF

7.5NH-+/-0.2NH-440MA

2

C

03015

B

RADIO_LOW_ANT

UPPER_HB_ANT_RF

MM5829-2700

F-ST-SM1

1

4

3

2

50_UPPER_HB_ANT_FEED

1

+/-0.1PF

25V

CER

0201

8.2PF

C5138_RF

2

50_UPPER_HB_ANT_FEED2 50_UPPER_HB_ANT_FEED1

1

2

1.2NH-+/-0.05NH-1.1A-0.04OHM

NOSTUFF

C5139_RF

0.2PF

+/-0.05PF
25V
COG-CERM
0201

L5102_RF

0201

DPX165950DT-8030D1

FLWIFDIP_RF

SM

LOW_BAND

HIGH_BAND

COMMON

GND

5

3

1

50_WIFI_2G_DIPLEXER_IN2

6

50_WIFI_5G_IN_OUT

4
2

50_WIFI_2G_NOTCHPLEXER_IN

57

BI

L5123_RF

1.7NH-+/-0.1NH-0.8A-0.07OHM

0201

FLCELWIF_RF

DIPLEXER-CELL-WIFI

885072

R5101_RF

0.00

21

1%

57

BI

1/20W

MF

0201

50_WIFI_2G_DIPLEXER_IN

1

9

RF1 RF3

7

SMD2_RF1/SMD4_GND

w w w . c h i n a f i x . c o m

L5120_RF

3.0NH+/-0.1NH-0.6A

0201

2

50_WICE_ANT2_GND

1

10

LGA

GND

8

1

50_WIFI_2G_NOTCHPLEXER_IN2

4

RF2

SMD1_RF2

5

3

2

6

50_WICE_CELL2_IN

L5121_RF

5.6NH-3%-0.23A-1.3OHM

01005

NOSTUFF

L5122_RF

12NH-3%-0.140A

01005

L5106_RF

4.3NH+/-3%-0.5A

21

0201

50_UPPER_HB_CELL

P2 DOE

21

R5102_RF

1%
MF

1/20W

201

NOSTUFF

49.9

B

A

GPS FEED

GPS_SP1_RF

1.6X1.21MM

SM-NSP

1

50_GPS_ANT_FEED 50_GPS_ANT_MATCH

SPRING-OVERPASS-GND-NORTH-X145

1

C5136_RF

+/-0.05PF

SP3_RF

CLIP-SM

1.8PF

21

25V

C0G-CERM

0201

R5135_RF

0.00

1

I248

NOSTUFF

L5135_RF

22NH-100MA

0201

2

1%

1/20W

MF

0201

R5136_RF

PP_LDO13_GPS

VOLTAGE=2.95V

1

C5129_RF

22PF

5%
16V

2

CERM
01005

MODULE INCLUDES INTERNAL DECOUPLING

VCC

NOSTUFF

U_GPSLNA_RF

SKY65736

21

50_GPS_ANT

RFIN

LGA

GND

RFOUT

THRM_PAD

0.00

1%

1/20W

MF

0201

50_GPS_DSM_IN

PP_LDO13

4 6

1

C5130_RF

2.2UF

20%

6.3V

2

X5R
0201-2

NOSTUFF

22

2

RADIO_LOW_ANT

LOW_ANT_RF

MM5829-2700

F-ST-SM1

1

4

3

2

PAGE TITLE

ANTENNA FEEDS

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

51 OF 55

SHEET

56 OF 60

A

18

50_ANT1_CONN

L5129_RF

1.4NH+/-0.1NH-1.1A

NOSTUFF

1

C5128_RF

0.3PF

+/-0.05PF
25V

2

C0G-CERM
0201

0201

21

50_ANT1_CONN_R

8 7 5 4 2 1

36

WLAN/BT

345678

2 1

D

C

WIFI_BT

C5201_RF

7.5UF

20%

4V
CERM
0402

1

3

WLAN_SR_LC

4

2

WIFI_BT

33 37 46 58 60

IN

PP_VCC_MAIN

32K INTERFACE TO AP

WIFI_BT

L5201_RF

2.2UH-20%-0.3A-0.38OHM

0603

33 36 60

OUT

33 60

OUT

33 57 60

IN

33 60

BI

33 60

IN

33 60

IN

33 36 60

IN

33 36 60

IN

33 36 60

OUT

33 36 60

OUT

HOST_WAKE_WLAN
WLAN_PCIE_WAKE_L
WLAN_PCIE_PERST_L
WLAN_PCIE_CLKREQ_L
90_WLAN_PCIE_REFCLK_N
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_RDN
90_WLAN_PCIE_RDP
90_WLAN_PCIE_TDN
90_WLAN_PCIE_TDP

WIFI_BT

1

C5220_RFC5221_RF

2.2UF

20%

6.3V
X5R-CERM
0201

33 60

IN

WIFI_BT

33 36 60

IN

33 36 60

IN

33 36 60

21

IN

CLK32K_AP

WLAN_BUCK_OUT

WLAN_SR_VLX

WLAN_REG_ON

BT_REG_ON

PP_WL_BT_VDDIO_AP

36

26

28

9

10

30

12
14
13
16
17
20
21
18
19

4.7UF

20%

6.3V
CER-X5R
0402

CLK32K

VIN_LDO
SR_VLX

WL_REG_ON
BT_REG_ON

GPIO_0
PCIE_WAKE*
PCIE_PRST*
PCIE_CLKREQ*
PCIE_REFCLK_N
PCIE_REFCLK_P
PCIE_RDN
PCIE_RDP
PCIE_TDN
PCIE_TDP

C5202_RF

4.7UF

20%

6.3V

2

CER-X5R
0402

WIFI_BT

R5208_RF

0.00

0%

1/32W

MF

01005

24

21

PP_WLAN_VDDIO_1V8

VOLTAGE=1.80V

1

C5204_RF

0.01UF

10%

6.3V

2

X5R
01005

WIFI_BT

1

C5203_RF

27PF

5%
16V

2

NP0-C0G
01005

WIFI_BTWIFI_BT

1

C5205_RF

27PF

5%
16V

2

NP0-C0G
01005

WIFI_BT

1

C5222_RF

27PF

5%
16V

2

NP0-C0G
01005

22

VDDIO_1P8V

24

23

VBATT

VBATT

WIFI_BT

55

54

VBATT_RF_VCC

VBATT_RF_VCC

U5201_RF

LBEE5U8ZKC-646

LGA

2G_ANT
5G_ANT

GPIO_1

BT_HOST_WAKE

BT_DEV_WAKE

BT_UART_CTS*
BT_UART_RTS*

BT_UART_RXD

BT_UART_TXD

BT_PCM_CLK

BT_PCM_SYNC

BT_PCM_IN

BT_PCM_OUT

50_WLAN_G_ANT

45

50_WLAN_A_ANT

58

PCIE_DEV_WAKE

8

HOST_WAKE_BT

43

WAKE_BT

42

BT_UART_CTS_L

38

BT_UART_RTS_L

39

BT_UART_RXD

41

BT_UART_TXD

40

BT_PCM_CLK

49

BT_PCM_SYNC

50

BT_PCM_IN

48

BT_PCM_OUT

47

1.3NH+/-0.1NH-1.1A

1

NOSTUFF
WIFI_BT

L5208_RF

0201

2.7NH+/-0.1NH-0.50A

2

33 60

IN

33 60 36

OUT

WIFI_BT

IN

OUT

IN

OUT

BI
BI

IN

OUT

33 36
60

33 36
60

33 36
60

33 36
60

33 60 36

33 60 36

33 60 36

33 60 36

1

R5210_RF

100K

5%
1/32W
MF
01005

2

L5216_RF

0201

33 36 60

IN

WIFI_BT

1

C5213_RF

0.2PF

+/-0.1PF
16V

2

NP0-C0G
01005

50_WIFI_5G_BPF_RADIO

WIFI_BT

1

C5212_RF

0.2PF

+/-0.05PF
25V

2

COG-CERM
0201

NOSTUFF

4

IN

WIFI_BT

R5214_RF

0

21

5%

1/20W

MF

201

WIFI_BT

FL5201_RF

LFH185G53RG1D868

SM

GND

OUT

31

D

WIFI_BT

1

C5211_RF

0.2PF

+/-0.1PF
16V

2

NP0-C0G
01005

50_WIFI_2G_NOTCHPLEXER_IN

56

BI

NOSTUFFNOSTUFF

2

50_WIFI_5G_IN_OUT

56

BI

C

B

DC BLOCKS LOCATED ON AP SIDE
SWIZZLE DATA LANE ON TOP-LEVEL

JTAG_SEL

24

36

IN

36

BI

33 60 36

IN

33 60 36

IN

WLAN_JTAG_SWDCLK
WLAN_JTAG_SWDIO
OSCAR_CONTEXT_A

OSCAR_CONTEXT_B

NC

11

JTAG_SEL

31

JTAG_TCK(GPIO_2)

34

JTAG_TMS(GPIO_3)

32

JTAG_TDI(GPIO_4)

35

JTAG_TDO(GPIO_5)

33

JTAG_TRST(GPIO_6)

1

25

15

GND THRM_PAD

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

57

53

52

51

46

44

37

29

27

76

77

78

79

80

WLAN_UART_RTS_L

98

56

WLAN_UART_CTS_L

4

WLAN_UART_RXD

3

WLAN_UART_TXD

2

WLAN_COEX_TXD

6

WLAN_COEX_RXD

5

7

NC

OUT

IN
IN

OUT

33 36 60

33 36 60

33 36 60

33 36 60

WIFI_BT

R5206_RF

0.00

0%

1/32W

MF

01005

WIFI_BT

R5205_RF

0.00

0%

1/32W

MF

01005

21

21

UART_RTS(GPIO_7)
UART_CTS(GPIO_8)

UART_RX(GPIO_9)

UART_TX(GPIO_10)

SECI_TX(GPIO_13)

SECI_RX(GPIO_14)

RF_SW_CTRL_8

97

96

95

94

93

92

91

90

89

88

87

86

85

84

83

82

81

w w w . c h i n a f i x . c o m

BB_COEX_UART_RXD

BB_COEX_UART_TXD

8 3

8 3

B

A

WLAN_PCIE_PERST_L

24 27

1

C5215_RF

100PF

5%
16V

2

NP0-C0G
01005

WIFI_BT

1

R5201_RF

10K

5%
1/32W
MF
01005

2

NOSTUFF

WIFI_BT

1

R5202_RF

10K

5%
1/32W
MF
01005

2

PP_WLAN_VDDIO_1V8

JTAG_SEL

24

24

MODULE BOOT-STRAPPED TO PCIE INTERNALLYMODULE BOOT-STRAPPED TO HSIC BY GPIO6/SDIO2/SDIO1=110

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

SYNC_MASTER=N/A

PAGE TITLE

WIFI/BT: MODULE AND FRONT END

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=N/A

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

52 OF 55

SHEET

57 OF 60

A

8 7 5 4 2 1

36

345678

2 1

C2101
R2100

D

STOCKHOLM

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

L5303_RF

1.8UH-0.7A

1

C5321_RF

USE LDO11 TO MATCH IMPLEMENTATION OF N71/66

2

15UF

20%

6.3V
X5R
0402-1

0603

21

STOCKHOLM_BOOST_SW

U5302_RF

WLCSP

VIN

B1

SW

B2

SW

B3

EN

PGND

C1

VOUT
VOUT

FAN48614BUC50X

PGND

AGND

C2

C3

A1A3
A2

1

15UF

20%

6.3V

2

X5R
0402-1

L2102
U2100

STOCKHOLM_5VPP_VCC_MAIN

1

C5323_RFC5322_RF

2

25 27 25 24 13 4

15UF

20%

6.3V
X5R
0402-1

D

C

B

58

58

60

60

60

60

25

PP_VCC_MAIN

4 13 24 25 27

RADIO_STOCKHOLM

1

C5324_RF

1UF

20%
10V

2

X5R
0201

PP_STOCKHOLM_1V8_S2R

25 27

RADIO_STOCKHOLM

1

2

33 36 60

OUT

3336 58

IN

36 38

OUT

36 38

IN

3336

IN

33 36 60

OUT

3336

IN

33 36 60

OUT

3336 58

IN

STOCKHOLM_TO_PMU_HOST_WAKE

AP_TO_STOCKHOLM_FW_DWLD_REQ
STOCKHOLM_TO_BBPMU_CLK_REQ

45_BBPMU_TO_STOCKHOLM_19P2M_CLK

STOCKHOLM_UART_RXD
STOCKHOLM_UART_TXD
STOCKHOLM_UART_CTS
STOCKHOLM_UART_RTS

AP_TO_STOCKHOLM_EN

PP_STOCKHOLM_ESE

25

STOCKHOLM_5V

R5310_RF

STOCKHOLM_DVDD

C5302_RF

1UF

20%
10V
X5R
0201

D1
A5

NC

B2
A2
A3

C1
B1
D2

A1
E1

E3
E4

NC

F4

NC

B3

NC

B4

NC

E6

NC

C3

NC

0.00

1/32W
01005

IRQ
SVDD_REQ
DWL
CLK_REQ
NFC_CLK_XTAL1
RX
TX
CTS
RTS

VEN

SMX_RST*

SMX_CLK

ESE_IO1
SPIM_MOSI
SPIM_MISO
SPIM_SCK

XTAL2

21

0%
MF

C6

VDD

PN66VEU3-A101D003

VSS

E2

D3

PVDD

G2

VUP

E7

C7

B5

VBAT

SIM_PMU_VCC

U5301_RF

UFLGA

AVSS

AVSS

AVSS

DVSS

F3

B6

D4

D6

C4

STOCKHOLM_TVDD

STOCKHOLM_SVDD_IN

25

D7

TVDD

AVDD

SPIM_IRQ

SIM_SWIO

SPIM_NSS

TX_PWR_REQ

ESE_DWPM_DBG

ESE_DWPS_DBG

WKUP_REQ

SE2_PWR_REQ

SE2_SVDD_IN

DVSS

TVSS

PVSS

C2

G4

RADIO_STOCKHOLM

1

2

PP_PN66_SIM_PMU

PP_STOCKHOLM_ESE

VOLTAGE=1.80V

C5

B7

SVDD

ESE_VDD

GPIO0

RXP

RXN

TX1

TX2

VMID

C5330_RF

1UF

20%
10V
X5R
0201

F1

NC

A4
A7
A6

NC

D5
G7

G6
F6

F5
G3

G5
E5

F7

STOCKHOLM_VMID

F2

G1

R5313_RF

0.00

0%

1/32W

MF

01005

VOLTAGE=1.80V

RADIO_STOCKHOLM

1

C5303_RF

0.1UF

10%
10V

2

X5R-CERM
0201

STOCKHOLM_TO_SIM_SWP

STOCKHOLM_SIM_PRES

STOCKHOLM_DC_BOOST
SH_DWP_M
SH_DWP_S

AP_TO_STOCKHOLM_DEV_WAKE

SE2_PWR_REQ
SE2_SVDD_IN

RADIO_STOCKHOLM

1

C5317_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

PP_LDO11

21

RADIO_STOCKHOLM

1

C5304_RF

1UF

20%
10V

2

X5R
0201

STOCKHOLM_RXP
STOCKHOLM_RXN

STOCKHOLM_TX1
STOCKHOLM_TX2

25

25

R5309_RF

0.00

1/32W
01005

21

0%
MF

STOCKHOLM_DC_BOOST_EN

160NH-10%-0.48A-0.33OHM

C5308_RF

1000PF

25V

C0G-NP0

0201

L5301_RF

0402

2%

R5303_RF

21

STOCKHOLM_RXP_CAP

560

5%

1/20W

MF

201

21

NOSTUFF

C

C5312_RF

21

1

C5310_RF

560PF

2%
25V

2

NPO-C0G
0201

STOCKHOLM_BAL1

STOCKHOLM_ANT_MATCH

41

3

BAL1

UNBAL

82PF

21

2%

50V

NP0-C0G

0201

STOCKHOLM_ANT

PP5302_RF

P2MM-NSM

STOCKHOLM

PP5303_RF

P2MM-NSM

STOCKHOLM

25 27

SM

PP

SM

PP

1

1

C5313_RF

36

BI

0805

T5301_RF

560PF

21

2%

25V

NPO-C0G

0201

1

C5315_RF

1000PF

2%
25V

2

C0G-NP0
0201

21

1000PF

25V

2%

C0G-NP0
0201

21

C5318_RFC5316_RF

330PF

2%

25V

NPO-COG
0201

ATB201206E-20011

BAL0

GND

2

C5314_RF

22PF

USE FIDUCIAL FOR SH ANTENNA GND

5%
50V
C0G

0201

NOSTUFF

21

33 58 60

IN

P2MM-NSM

R5316_RF

0.00

0%

1/32W

MF

01005

SM

1

PP5304_RF

PP

NOSTUFF

21

STOCKHOLM

25

w w w . c h i n a f i x . c o m

PP_STOCKHOLM_1V8_S2R

25

27

L5302_RF

160NH-10%-0.48A-0.33OHM

21

0402

C5309_RF

1000PF

2%

25V

C0G-NP0

0201

STOCKHOLM_RXN_CAP

21

1

C5311_RF

560PF

2%
25V

2

NPO-C0G
0201

STOCKHOLM_BAL0

R5304_RF

560

1/20W

5%
MF

201

21

NOSTUFF

1

C5319_RF

100PF

2%
50V

2

C0G
0201

TP5303_RF

A

1

TP-P55

B

A

TP5301_RF

A

1

TP-P55

STOCKHOLM_SIM_PRES

25

PU FOR MAUI IO WAKE GLITCH

PP_STOCKHOLM_1V8_S2R

25 27

RADIO_STOCKHOLM

1

R5301_RF

100K

5%
1/32W
MF
01005

2

33 36 58 60

33 36 58 60

33 58 60

AP_TO_STOCKHOLM_EN

IN

AP_TO_STOCKHOLM_FW_DWLD_REQ

IN

AP_TO_STOCKHOLM_DEV_WAKE

IN

RADIO_STOCKHOLM

1

R5302_RF

100K

5%
1/32W
MF
01005

2

RADIO_STOCKHOLM

1

R5305_RF

100K

5%
1/32W
MF
01005

2

33 36 58 60

33 36 58 60

PP_STOCKHOLM_1V8_S2R

25 27

STOCKHOLM_UART_CTS

IN

PP_STOCKHOLM_1V8_S2R

25 27

STOCKHOLM_UART_RXD

IN

RADIO_STOCKHOLM

1

R5306_RF

100K

5%
1/32W
MF
01005

2

RADIO_STOCKHOLM

1

R5307_RF

100K

5%
1/32W
MF
01005

2

SYNC_MASTER=N/A SYNC_DATE=N/A

PAGE TITLE

STOCKHOLM

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

53 OF 55

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D

A

8 7 5 4 2 1

36

N69 SKU BOM OPTION TABLE

345678

2 1

D

C

B

A

353S00374

152S1998

152S1567

131S0376

152S1977

131S0390

152S1853

353S3876 1

152S2045

152S1851

N69H TDD

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

RADIO HIGH BAND PAD

CRITICAL1353S4180 U_HBPAD_RF

1.0PF 01005 16V

68PF 01005 16V

3.3NH 01005 +/-0.1NH 131S0599

1

TDK MODULE M472A NO B12/B13/B17

IND 0.8NH 630MA 01005

SKY77827 U_VLBPAD_RF N69H1

2.2PF 0.1PF 01005 COG131S0387

1

3.3NH 01005

1

1.1PF 01005

10NH 01005 170MA

2.5PF 0.1PF 01005 COG

U_DSM_RF

L4421_RF

C4211_RF

C4809_RF N69H1

L4217_RF

C4213_RF

CRITICAL N69H1.8PF 01005 16V131S0247 C4522_RF

CRITICAL N69H1

CRITICAL1 N69H

CRITICAL353S00390

CRITICAL

CRITICAL N69H

CRITICAL

CRITICAL1

7.5NH 3% 01005 200MA

1 R3312_RF118S0726 N69H

162K 1% 01005

SWTICH SPDT 1.1X1.1

1

3.0NH 0201

5.6NH 01005

1 N69H

U_SWUANT_RF CRITICAL

L5120_RF

L5121_RF

1

CRITICAL

CRITICAL

CRITICAL01005 49.9R C4231_RF118S0652

BOM OPTIONCRITICAL

N69H

N69H1 CRITICAL131S0417 18PF 01005 16V C4501_RF

N69HCRITICAL1131S0375 C4503_RF

N69H1 CRITICAL131S0635 C4507_RF

N69H1UF 0201 10V138S0706 1 CRITICALC4505_RF

N69HCRITICAL1152S1907 L4512_RF

N69H

N69H1 CRITICAL

N69H

N69H1 L4216_RF CRITICAL

N69H

N69HCRITICAL

N69H

TABLE_5_ITEM

TABLE_5_ITEM

100PF 01005

TABLE_5_ITEM

152S1720

TABLE_5_ITEM

152S1544

TABLE_5_ITEM

152S1564

TABLE_5_ITEM

131S0307

TABLE_5_ITEM TABLE_5_ITEM

117S0161

152S1900

TABLE_5_ITEM

TABLE_5_ITEM

152S1996

TABLE_5_ITEM TABLE_5_ITEM

152S1571

TABLE_5_ITEM

152S1571

TABLE_5_ITEM

152S1623

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

1.8NH 01005 L4814_RF

1 CRITICAL

0.4NH 01005

2.4NH 01005

100PF 01005

0R 01005

1.3NH 01005

15NH 01005

5.6NH 01005

1

1 5.6NH 01005

1

5.1NH 01005L4813_RF

SAW DRX B40B41A

1 CRITICAL117S0161 0R 01005 N69H

3.3NH 01005 290MA1

L4830_RF

L4816_RF

C4816_RF

R4815_RF

L4817_RF

L4901_RF

L4902_RF

L4903_RF

L4904_RF

FD40B41A_RF

R4509_RF

L4602_RF

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL1155S0908

FLTR SAW DUAL FILTER B34B39 CRITICAL155S0981 FRX34B39_RF1

TABLE_5_ITEM

152S1988 CRITICAL

TABLE_5_ITEM

155S0906

TABLE_5_ITEM

152S1983

TABLE_5_ITEM

152S2061

117S0161 1

TABLE_5_ITEM

131S00042

131S0307

131S0244

2.4NH 01005 370MA

1 L4601_RF

1

SAW FILTER B40A B41A

1

1.5NH 01005 +/-0.1NH

FTB40A41A_RF

L4517_RF

L4507_RF

0R 01005

4.3NH 01005 3%

1

1 0.3PF +-0.05PF 01005 16V

1

100PF 01005 16V

1PF 01005 16V

1UF 0201 10V

68PF 01005 25V

1

0.3PF 01005 16V131S00042

R4531_RF

L4506_RF

C4528_RF

C4533_RF

C4502_RF

C4506_RF

C4532_RF

C4520_RF

1

L4520_RF

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

L4526_RF

CRITICAL

CRITICAL

2.7NH 0201 +/-0.1NH152S2002

7.5NH 01005 5%152S1408

3.1NH 01005 +/-0.1NH

w w w . c h i n a f i x . c o m

L4515_RF

L4528_RF

L4516_RF

C4521_RF

CRITICAL

CRITICAL

CRITICAL

N69HC4827_RF131S0307 1 CRITICAL

N69H

N69H1

N69H1

N69H1

N69H1 CRITICAL

N69H1

N69HCRITICAL1

N69H

N69H

N69HCRITICAL

N69H

N69HCRITICAL152S1907

N69H

N69H

N69H

N69H

N69H7.5NH 01005 3%1

N69H

N69H152S2040

N69H

N69HCRITICAL

N69H1

N69H1138S0706

N69H1 CRITICAL131S0644

N69HCRITICAL

N69H152S2002 L4522_RF2.7NH 0201 +/-0.1NH

N69H1 1.3NH 01005 +/-0.1NH152S1982

N69H1 FILTER B40155S0982 FT_B40_RF

N69H2.2NH 01005 +/-0.1NH1152S1986

N69H9.1NH 01005 3% L4523_RF152S1853 1

N69H1

N69H1

N69H1152S00035

N69HCRITICAL1131S0395 3.0PF 01005 +/-0.1PF

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

N69HCRITICAL1152S1853 L4527_RF9.1NH 01005 3%

TABLE_5_ITEM

N69H

TABLE_5_ITEM

N69HCRITICAL152S1965 L4524_RF1

TABLE_5_ITEM

N69H152S2024 1.4NH 0201 1.1A L4525_RF1

TABLE_5_ITEM

N69HSWITCH IC LGA161 U_HBS_RF

TABLE_5_ITEM

N69HCRITICAL1155S0903 FR38X40B_RF

TABLE_5_ITEM

N69HCRITICAL1 FILTER LOW PASS B39

TABLE_5_ITEM

N69HCRITICAL1

TABLE_5_ITEM

N69H2.0NH 01005 380MA

TABLE_5_ITEM

N69HCRITICAL1

TABLE_5_ITEM

N69HCRITICAL

TABLE_5_ITEM

N69HCRITICAL155S0902

TABLE_5_ITEM

N69H1

TABLE_5_ITEM

N69HCRITICAL

TABLE_5_ITEM

N69HCRITICAL3.7NH 01005 270MA

TABLE_5_ITEM

N69HCRITICALL4713_RF1

TABLE_5_ITEM

353S4167

155S0881

131S0214

152S1917

117S0161

131S0307

131S0214 18PF 010051

152S00036

152S1989

1.8NH 01005 380MA

FILTER SAW B40B 38X

18PF 01005 C4703_RF

1

0OHM 01005 R4700_RF

100PF 01005

1

FILTER SAW BAND 40A B41A

1

2.2NH 01005 200MA152S1619

1

2.7NH 01005 370MA

FL_B39LP_RF

C4720_RF

FR40A41A_RF

L4709_RF

C4701_RF

L4704_RF

CRITICAL155S0900 1 FILTER SAW BAND 41B 41C FT_41BC_RF

CRITICAL

CRITICAL

CRITICALL4705_RF

CRITICAL

N69HCRITICAL152S1989 2.7NH 01005 370MA L4712_RF1

TABLE_5_ITEM

2.9NH 01005 360MA

12NH 01005 140MA L4710_RF1152S1576

47PF 010051131S0216

CRITICAL

CRITICAL

CRITICALC4710_RF

N69HL4708_RF1152S00034

TABLE_5_ITEM

N69H

TABLE_5_ITEM

N69H

TABLE_5_ITEM

1 CRITICAL N69H1.4NH 01005 220MA152S1946 L4706_RF

N69N69H

353S00331

118S0724

118S0652

118S0652

39K 1% 01005

1

0R 0201

1 N695.1NH 0.1NH 01005 250MA152S1993

01005 49.9R

01005 49.9R

1

1 CRITICAL N6901005 49.9R

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

BOM OPTIONCRITICAL

TABLE_5_ITEM

N691 U_DSM_RFDSM M471A NO B7 CRITICAL353S00373

TABLE_5_ITEM

D

N69SKY77826 CRITICALU_VLBPAD_RF1

TABLE_5_ITEM

N69R3312_RF CRITICAL118S0729

TABLE_5_ITEM

N69R5137_RF1 CRITICAL

TABLE_5_ITEM

L4223_RF CRITICAL

TABLE_5_ITEM

N69C4231_RF CRITICAL01005 1.5PF1

TABLE_5_ITEM

C4211_RF

C4213_RF

N69CRITICAL1

TABLE_5_ITEM

N69CRITICAL118S0652

TABLE_5_ITEM

C4500_RF

R4509_RF

N691 CRITICAL117S0161 0R 01005

C

B

A

PAGE TITLE

OMIT_TABLE_RF

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00648

REVISION

4.0.0

BRANCH

PAGE

54 OF 55

SHEET

59 OF 60

D

8 7 5 4 2 1

36

RADIO SYMBOL(HEIARCHY)

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

345678

2 1

23 15 14 4

D

C

21 19 18 12

25 24 13 4

24

25

23

FCT TESTING

3

3

3

3

PP_STOCKHOLM_1V8_S2R

RFFE_VIO_S2R

PAC_VDD_3V0

PP_BATT_VCC

PP_VCC_MAIN

ADC_SMPS1

ADC_PP_LDO11

ADC_PP_LDO5

ADC_SMPS4

PP_WL_BT_VDDIO_AP

IO

IO

OUT
OUT
OUT
OUT

IO

IO

IO

IO

CELLULAR HOUSE KEEPING

5 3

8 3

5 3

5 3

8

8 3

8 3

8

8

5 3

AP_TO_BB_MESA_ON

RADIO_ON_L

BB_RESET_DET_L

RF_PMIC_RESET_L

BB_RST_L

AP_WAKE_MODEM

BB_WAKE_HOST_L

GSM_TXBURST_IND

BB_IPC_GPIO1

BB_FORCE_PWM

OUT

OUT
OUT
OUT
OUT

HSIC IPC

7 3

7 3

8 3

8 3

8 3

50_BB_HSIC_DATA

50_BB_HSIC_STROBE

BB_HOST_RDY

BB_DEVICE_RDY

BB_GPS_SYNC

OUT

OUT
OUT

D

WLAN/BT HOUSE KEEPING

ANTENNA CONTROL

24 3

24 3

27 24 3

24 3

24 3

36 33

36 33

36 33

36 33

24

CLK32K_AP

WLAN_REG_ON

HOST_WAKE_WLAN

BT_REG_ON

WAKE_BT

HOST_WAKE_BT

OUT

OUT

IN
IN

IN
IN

57 36 33

57 36 33

60 57 36 33

57 36 33

57 36 33

57 36 33

BB_LAT_GPIO1

8

BB_LAT_GPIO2

8

OUT
OUT

41 33

41 33

WLAN PCIE IPC

27 24 3

24

24

24

24

24

24 3

IN

IN
IN

IN

IN

IN
IN

38 36 33

41 36 33

38 36 33

38 36 33

41 33

41 36 33

41 36 33

41 33

41 33

38 36 33

40 36 33

40 36 33

41 36 33

41 36 33

41 36 33

24 3

24 3

24 3

24

WLAN/BT UART

24 3

24 3

24 3

24 3

24 3

24 3

24 3

24 3

HOST_WAKE_WLAN
WLAN_PCIE_WAKE_L
WLAN_PCIE_PERST_L
WLAN_PCIE_CLKREQ_L
90_WLAN_PCIE_REFCLK_N
90_WLAN_PCIE_REFCLK_P
90_WLAN_PCIE_RDN
90_WLAN_PCIE_RDP
90_WLAN_PCIE_TDN
90_WLAN_PCIE_TDP

PCIE_DEV_WAKE

WLAN_UART_CTS_L

WLAN_UART_RTS_L

WLAN_UART_TXD

WLAN_UART_RXD
BT_UART_CTS_L
BT_UART_RTS_L

BT_UART_RXD

BT_UART_TXD

OUT
OUT

IN

OUT

IN
IN
IN

IN
OUT
OUT

IN

OUT

IN

IN

OUT

IN

OUT

IN

OUT

60 57 36 33

57 33

57 33

57 33

57 33

57 33

57 36 33

57 36 33

57 36 33

57 36 33

57 33

57 36 33

57 36 33

57 36 33

57 36 33

57 36 33

57 36 33

57 36 33

57 36 33

WLAN/OWL UART

24

24

OSCAR_CONTEXT_A
OSCAR_CONTEXT_B

STOCKHOLM INTERFACES

25 3

25 3

25 3

25 3

25 3

25

25 3

25 3

STOCKHOLM_UART_RTS

STOCKHOLM_UART_CTS

STOCKHOLM_UART_TXD

STOCKHOLM_UART_RXD

AP_TO_STOCKHOLM_FW_DWLD_REQ

AP_TO_STOCKHOLM_DEV_WAKE
STOCKHOLM_TO_PMU_HOST_WAKE

AP_TO_STOCKHOLM_EN

IN
IN

57 36 33

57 36 33

C

OUT

IN

OUT

IN
IN

IN

OUT

IN

58 36 33

58 36 33

58 36 33

58 36 33

58 36 33

58 33

58 36 33

58 36 33

B

AUDIO I2S

8

8 3

8 3

8 3

OSCAR UART

8 3

8 3

BB_I2S_CLK
BB_I2S_RXD
BB_I2S_TXD

BB_I2S_WS

BB_OTHER_RXD
BB_OTHER_TXD

OUT

IN

OUT

B

BT AUDIO PCM

w w w . c h i n a f i x . c o m

24

IN
IN

IN

41 36 33

41 36 33

41 36 33

41 36 33

41 36 33

41 36 33

24

24

24

BB UART

8 3

8 3

8 3

8 3

BB_UART_TXD
BB_UART_RXD

BB_UART_CTS_L
BB_UART_RTS_L

BT_PCM_CLK

BT_PCM_IN

BT_PCM_OUT

BT_PCM_SYNC

IN
IN

OUT

IN

OUT

IN
IN

OUT

57 36 33

57 36 33

57 36 33

57 36 33

41 36 33

41 36 33

41 36 33

41 36 33

A

BB DEBUG INTERFACES

8 3

7 3

7 3

7 3

7 3

7 3

BB_CORE_DUMP

BB_USB_VBUS
90_BB_USB_N
90_BB_USB_P

BB_JTAG_TCK

BB_JTAG_TMS

IN

IO
OUT
OUT

IN
IN

8 7 5 4 2 1

41 36 33

40 36 33

40 36 33

40 33

40 36 33

PAGE TITLE

Radio Subdesign Ports

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36

DRAWING NUMBER SIZE

051-00648

REVISION

D

4.0.0

BRANCH

PAGE

55 OF 55

SHEET

60 OF 60

A