Apple iPhone7 Plus Schematic

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

7

D11 MLB - PVT

6 5 4 3

LAST_MODIFICATION=Wed Jul 6 08:55:26 2016

2 1

ECNREV DESCRIPTION OF REVISION

CK
APPD

DATE

2016-07-0600065328798 ENGINEERING RELEASED

D

C

B

<CSA>

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TABLE OF CONTENTS

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TABLE OF CONTENTS
SYSTEM:BOM TABLES
SYSTEM:EEEE CALLOUTS
SYSTEM:MECHANICAL COMPONENTS
SYSTEM: BOARDID
spare
SOC:JTAG,USB,XTAL
SOC:PCIE
SOC:MIPI AND ISP
SOC:LPDP
SOC:SERIAL
SOC:GPIO & UART
SOC:AOP
SOC:POWER (1/3)
SOC:POWER (2/3)
SOC:POWER (3/3)
NAND
SYSTEM POWER:PMU (1/3)
SYSTEM POWER:PMU (2/3)
SYSTEM POWER:PMU (3/3)
SYSTEM POWER:CHARGER
SYSTEM POWER:BATTERY CONN
SYSTEM POWER:BOOST
SENSORS
B2B FILTERS: UTAH
CAMERA:STROBE DRIVER
Accessory: Buck Circuit
TRINITY:FF SPECIFIC
B2B:FOREHEAD
B2B:NEVADA
AUDIO:CALTRA CODEC (1/2)
AUDIO:CALTRA CODEC (2/2)
AUDIO:SPEAKER AMP 2
AUDIO:SPEAKER AMP 1
ARC:DRIVER
ARC:MAGGIE
DISPLAY & MESA:POWER
B2B:ORB & MESA
B2B FILTERS: DISPLAY & TOUCH
TRISTAR 2
B2B:DOCK FLEX
spare
spare
B2B FILTERS: RIGHT BUTTON FLEX
B2B FF SPECIFIC

SYNC

<SYNC_MASTER1>
<SYNC_MASTER2>
<SYNC_MASTER3>
<SYNC_MASTER4>
<SYNC_MASTER5>

<SYNC_DATE1>

<SYNC_DATE2>

<SYNC_DATE3>

<SYNC_DATE4>

<SYNC_DATE5>

<SYNC_DATE27>

<SYNC_DATE30>

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<CSA>

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<CSA_PAGE78>

<CSA_PAGE79>

<CSA_PAGE80>

<CSA_PAGE81>

<CSA_PAGE82>

<CSA_PAGE83>

<CSA_PAGE84>

<CSA_PAGE85>

<CSA_PAGE86>

<CSA_PAGE87>

<CSA_PAGE88>

<CSA_PAGE89>

<CSA_PAGE90>

CONTENTSPAGEDATE

LARGE FORM FACTOR SPECIFIC
I2C MAP: AP, TOUCH, HOMER, I2C5
I2C MAP AOP
I2C TABLE
spare
spare
MLB UNIQUE
CELL,WIFI,NFC
page1
NFC
page1
METROCIRC [2]
UAT MATCH AND TUNER [3]
WIFI_MLB SCHEMATIC
PERENNIAL
WIFI FRONT-END [77]
page1
BOM_OMIT_TABLE
PMU: CONTROL AND CLOCKS
PMU: SWITCHERS AND LDOS
BASEBAND: POWER2
BASEBAND: CONTROL
BASEBAND GPIOS
TRANSCEIVER0/1: POWER
TRANSCEIVER0/1: TX PORTS
TRANSCEIVER0/1: PRX PORTS
RECEIVE MATCHING
LOWER ANTENNA & COUPLERS
DIVERSITY RECEIVE ASM'S
DIVERSITY RECEIVE LNA'S
UPPER ANTENNA FEEDS
PMU: ET MODULATOR
TEST POINTS & BOOT CONFIG
TDD TRANSMIT
FDD TRANSMIT
ICEFALL, SIM, DEBUG_CONN

<SYNC_MASTER48>
<SYNC_MASTER49>
<SYNC_MASTER50>
<SYNC_MASTER51>
<SYNC_MASTER52>
<SYNC_MASTER53>

<SYNC_MASTER71>
<SYNC_MASTER72>
<SYNC_MASTER73>
<SYNC_MASTER74>
d

<SYNC_MASTER78>
<SYNC_MASTER79>
<SYNC_MASTER80>
<SYNC_MASTER81>
<SYNC_MASTER82>
<SYNC_MASTER83>
<SYNC_MASTER84>
<SYNC_MASTER85>
<SYNC_MASTER86>
<SYNC_MASTER87>
<SYNC_MASTER88>
<SYNC_MASTER89>
<SYNC_MASTER90>

DATESYNC

<SYNC_DATE46>

<SYNC_DATE48>

<SYNC_DATE49>

<SYNC_DATE50>

<SYNC_DATE51>

<SYNC_DATE52>

<SYNC_DATE53>

<SYNC_DATE71>

<SYNC_DATE72>

<SYNC_DATE73>

<SYNC_DATE74>

<SYNC_DATE78>

<SYNC_DATE79>

<SYNC_DATE80>

<SYNC_DATE81>

<SYNC_DATE82>

<SYNC_DATE83>

<SYNC_DATE84>

<SYNC_DATE85>

<SYNC_DATE86>

<SYNC_DATE87>

<SYNC_DATE88>

<SYNC_DATE89>

<SYNC_DATE90>

C

B

A

Schematic & PCB Callouts

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

051-00482 SCH CRITICAL

820-00229 1 CRITICAL

SCH,MLB,D11-121

PCBPCBF,MLB,D11-12

BOM OPTIONCRITICAL

?

?

TABLE_5_HEAD

TABLE_5_ITEM

SCH 051-00482
BRD 820-00229
MCO 056-01585

System Block Diagram:

<rdar://problem/16684269>

3

TABLE OF CONTENTS

DRAWING TITLE

SCH,MLB,D11

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=03/01/2016SYNC_MASTER=david-copy

051-00482

REVISION

8.0.0

BRANCH

PAGE

1 OF 53

SHEET

1 OF 81

1245678

A

SIZEDRAWING NUMBER

D

34567 8

2 1

D

NAND BOM Options

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

NAND,H,32GB,16nm,MLC

335S00182

335S00183 CRITICAL

138S0867

138S00003

138S00003 5 CRITICAL

1 U1701 CRITICAL

NAND,H,128GB,16nm,TLC

NAND,T,256GB,3Dv3,TLC

1 U1701

CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C1733

5 CRITICAL

5

CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1721,C1733

CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402

PART NUMBER

C1748,C1713,C1716,C1721,C1733

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

335S00201 ALTERNATE T,15nm,MLC,32GBU1701335S00169

U1701ALTERNATE335S00169 S,16nm,MLC,32GB335S00209

335S00182 SS,1Ynm,TLC,128GB335S00195 ALTERNATE U1701

335S00180 U1701 T,15nm,TLC,128GBALTERNATE335S00182

335S00182 SD,15nm,TLC,128GBALTERNATE335S00179 U1701

335S00148 335S00183 SD,3Dv2,TLC,256GBU1701ALTERNATE

U1701335S00183 SS,3Dv3,TLC,256GB335S00190 ALTERNATE

#22686038:See Radar

CRITICAL1 U1701335S00169

CRITICAL

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

BOM OPTIONCRITICAL

NAND_32G

NAND_128G

NAND_256G

NAND_32G

NAND_128G

NAND_256G

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

Active Diode Alternate

PART NUMBER

376S00047 ALTERNATE376S00106 Q2101 DIODES INC. ACT DIODE

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

DDR PLL Alternate

PART NUMBER

155S00068155S00095

ALTERNATE FL1501

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

FERR BD,100OHM,25%,100MA,2OHM,01005

Power Inductor Alternates

PART NUMBER

152S00075152S00118

ALTERNATE ALL

ALTERNATE152S00077

ALL152S00397

152S00121 152S00081 ALTERNATE ALL

ALTERNATE152S1936152S00123 ALL

152S00366152S00402 ALLALTERNATE

152S00297 ALL152S1843 ALTERNATE

ALTERNATE152S00365 152S00297 ALL

ALTERNATE152S00398 152S00204 ALL

152S00120 ALTERNATE

152S00074152S00117

ALTERNATE

ALL152S00077

L1806,L1810,L1814,L1816,L1817

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

IND,PWR,SHLD,1.2 UH,3.0A,0.080 OHM,2016

IND,PWR,SHLD,1.0 UH,2.25A,0.150 OHM,2016

IND,PWR,SHLD,0.47 UH,3.8A,0.048 OHM,2012

IND,PWR,SHLD,15 UH,0.72A,0.900 OHM,3225

IND,MULT,1UH,1.2A,0.320 OHM,0603

CYNTEC 2012 1UH

CYNTEC 2012 1UH

IND,PWR,0.22UH,20%,6.7a,23MOHM,2012

For Chestnut inductor only

IND,PWR,SHLD,1.0 UH,3.0A,0.060 OHM,2016

Acc Buck Alternates

TABLE_ALT_HEAD

TABLE_ALT_ITEM

152S00558 ALTERNATE L2700152S00557

TABLE_ALT_HEAD

TABLE_ALT_ITEM

Load Switch OMIT TABLE

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

updated 11/12

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

updated 11/12

TABLE_ALT_ITEM

reverted 11/13

TABLE_ALT_ITEM

TABLE_ALT_ITEM

For Chestnut inductor; so it doesn't interfere with PMU inducotr Buck 7 alts

TABLE_ALT_ITEM

Except BUCK5 LX (BUCK5 LX is Taiyo only)

TABLE_ALT_ITEM

353S01007 CRITICAL1

PART NUMBER

ALTERNATE371S00064371S00087 D2700

376S00164 ALTERNATE376S00166

ONSEMI,IC,LOAD,SWITCH,WLCSP4

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

DIODE,SHOTTKY,30V,200MA,0201

IND,MLD,0.47UH,2.5A,80Mohm,1608

Q2700,Q2701 PFET,12V,CSP4

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

U2710,NFCSW_RF

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

D

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

C

Magnesium Alternates

PART NUMBER

338S00203 ALTERNATE U2402338S00173

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

Larger Wafer (-29 flow) Magnesium

TABLE_ALT_HEAD

TABLE_ALT_ITEM

Global R/C Alternates

PART NUMBER

118S0764 118S0717

138S0657 ALTERNATE ALL138S0702

138S0648 ALTERNATE

138S0986 ALTERNATE ALL138S00024

138S0706 138S0739 ALLALTERNATE

138S0739 ALTERNATE138S0945 ALL

132S0436

132S0400

ALTERNATE ALL

ALLALTERNATE138S0835138S00006

ALL138S0652

ALTERNATE ALL132S0400 132S0436

ALTERNATE

ALL

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

RES, 3.92K, 0.1%, 0201

CAP, X5R, 4.3UF, 4V, 0610

CAP, 3-TERM, 4.3UF, 4V, 0402

CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO

CAP,X5R,0.22UF,6.3V,01005,TDK

CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK

CAP,CER,1UF,20%,10V,X5R,0201,MURATA

CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA

CAP,CER,X5R,0.22UF,20%,6.3V,20%

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

MUR+KYO 15UF

N&V 15uF Cap Alternates

PART NUMBER

138S00005 138S00003 ALTERNATE

138S00005 138S00003

ALTERNATE

138S00005 ALTERNATE138S00003

138S00005 ALTERNATE138S00003

138S00005 138S00003

138S00005

138S00005 138S00003

ALTERNATE

ALTERNATE138S00003

ALTERNATE

138S00005 138S00003 ALTERNATE

138S00005 138S00003 ALTERNATE

138S00005 ALTERNATE138S00003

138S00003 ALTERNATE138S00048

(C1818, C1825, C1831)

(C1837, C1842, C1844)

(C1819, C1826, C1832)

(C1838, C1843, C1845)

(C1401, C1408, C1434)

(C1813, C1820, C1827)

(C1833, C1839, C1865)

(C1814, C1821, C1828)

(C1834, C1866, C1414)

(C1806, C1810)

ALL

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,TY

CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERA

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

C

CPU

GPU + GPU_SRAM

B

UT LDO Alternates

PART NUMBER

353S00889 353S00015 U2501ALTERNATE

Mamba LDO Alternates

PART NUMBER

353S00576353S00932 U3801

ALTERNATE

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

ST, LDO REG, 2.925V, CSP 0.65x0.65

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

ST, LDO REG, 2.75V

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_HEAD

TABLE_ALT_ITEM

Global Ferrite Alternates

PART NUMBER

155S0581 ALTERNATE ALL155S00067

155S00012 ALLALTERNATE155S00168

152S00489 ALL152S00456

ALTERNATE155S0581 ALL155S00067

ALLALTERNATE155S00194 155S0610

ALLALTERNATE155S00200 155S0610

ALTERNATE

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

FERR, 240OHM, 0.38OHM DCR, 0201

FERR, 240OHM, 0.38OHM DCR, 0201

FLTR, 65 OHMS, 0605

FERR BD, 150OHM, TDK

FERR BD, 150OHM, TY

FERR BD, 0.47UH, TY

Global Varistor Alternates

PART NUMBER

377S0140 ALL377S0168 ALTERNATE

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

VARISTOR, 6.8V, 100PF, 01005

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_HEAD

TABLE_ALT_ITEM

B

A

I2C5 Alternate

PART NUMBER

ALTERNATE335S00234 335S00233 U1101

8 7 5 4 2 1

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

I2C5 ALTERNATE

TABLE_ALT_HEAD

TABLE_ALT_ITEM

SYNC_MASTER=Sync

PAGE TITLE

SYNC_DATE=06/29/2016

A

SYSTEM:BOM TABLES

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00482

REVISION

8.0.0

BRANCH

PAGE

2 OF 53

SHEET

2 OF 81

D

36

D

D11 EEEE CALLOUTS

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

EEEE CODE FOR 639-01812

EEEE CODE FOR 639-01813

EEEE CODE FOR 639-01814

1 CRITICAL825-6838

825-6838 1 CRITICALEEEE_H3RN

825-6838

825-6838

EEEE CODE FOR 639-02138

EEEE CODE FOR 639-02139

EEEE CODE FOR 639-02140

1

EEEE CODE FOR 639-02460

1

EEEE CODE FOR 639-02465

EEEE CODE FOR 639-02462

EEEE_GY2T1825-6838 CRITICAL

EEEE_GY2V1825-6838

EEEE_GY2W

EEEE_H3RP1 CRITICAL825-6838

EEEE_H3RQ825-6838

EEEE_H8C31 CRITICAL

CRITICAL

CRITICAL

CRITICAL825-6838 1 EEEE_H8C1

CRITICALEEEE_H8CK

BOM OPTIONCRITICAL

EEEE_D11_BEST_JP

EEEE_D11_SUPREME_JP

EEEE_D11_EXTREME_JP

EEEE_D11_BEST_ROW

EEEE_D11_SUPREME_ROW

EEEE_D11_EXTREME_ROW

EEEE_D11_BEST_CH

EEEE_D11_SUPREME_CH

EEEE_D11_EXTREME_CH

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

34567 8

2 1

D

C

CAYMAN DDR Alternates

TABLE_ALT_ITEM

ALTERNATE

ALL339S00258 DDR-S, 3G, B1339S00257

CAYMAN OMIT TABLE

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

339S00257 U07001 CRITICAL

CAYMAN, DDR-H, 3G, B1

2.2uF CAP Alts

TABLE_ALT_HEAD

PART NUMBER

138S00032

ALLALTERNATE138S00049 138S00032

ALL138S0831 ALTERNATE

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

CAP,CER,X5R,2,2UF,20%6.3V,20%, KYOCERA

TABLE_ALT_ITEM

CAP,CER,X5R,2,2UF,20%,6.3V,20%,MURATA

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

C

B

SIP Alternates

PART NUMBER

ALTERNATE ALL339M00009 339M00003 TRINITY BLUE,STATS

ALTERNATE ALL339M00008 339M00002 NEO,STATS

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

TABLE_ALT_ITEM

B

A

SYNC_MASTER=david-copy SYNC_DATE=03/01/2016

PAGE TITLE

SYSTEM:EEEE CALLOUTS

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

3 OF 53
3 OF 81

A

D

D

Current as of D11 MCO 056-01585 rev. 63

O

O

BS0415

2.70R1.80-NSP

1

UP_RFFE

BS0401

2.70R1.80-NSP

1

PTH per Rev63 for 1.8mm Drill

Contained in radio_mlb pages

BS0402

STDOFF-2.9OD0.888H-SM

NORTH_SCREW_EXPOSED

O

NEO Stiffener

BS0403

STDOFF-2.9OD0.81H-SM

1

CHASSIS_GND_BS402 CHASSIS_GND_BS403CHASSIS_GND_BS401

4 4 44 4

1

#25046211

1

C0413

220PF

5%
10V

2

C0G-CERM
01005

1

C0414

56PF

5%
25V

2

NP0-C0G-CERM
01005

1

C0415

18PF

2%
16V

2

CERM
01005

1

C0416

4PF

+/-0.1PF
16V

2

NP0-C0G
01005

TESTPOINTS

POWER

41 40 21

22 21

PP5V0_USB

PP_BATT_VCC

TP0420

1

TP-P55

ROOM=TEST

TP0421

1

TP-P55

ROOM=TEST

TP0415

1

TP-P55

ROOM=TEST

TP0422

1

TP-P55

ROOM=TEST

A

A

A

A

345678

POWER GROUND

VBUS

VBATT

PP_LCM_BL_CAT1_CONN

45 39

PP_LCM_BL_CAT2_CONN

45 39

PP_LCM_BL_ANODE_CONN

45 39

46 45

PP_LCM_BL34_CAT1_CONN

2 1

LCM

TP0409

1

TP-P55

ROOM=TEST

TP0410

1

TP-P55

ROOM=TEST

TP0411

1

TP-P55

ROOM=TEST

TP0417

1

TP-P55

ROOM=TEST

A

A

A

A

LCM BACKLIGHT SINK1

LCM BACKLIGHT SINK2

LCM BACKLIGHT SOURCE

LCM BACKLIGHT SINK3

D

C

B

CHASSIS_GND_BS401

44 4

1

C0401

220PF

5%
10V

2

C0G-CERM
01005

CHASSIS_GND_BS402

4

1

C0407

220PF

5%
10V

2

C0G-CERM
01005

CHASSIS_GND_BS403

4

1

C0417

220PF

5%
10V

2

C0G-CERM

1

2

1

2

1

2

C0402

220PF

5%
10V
C0G-CERM
01005

C0408

220PF

5%
10V
C0G-CERM
01005

C0418

220PF

5%
10V
C0G-CERM
0100501005

1

C0403

100PF

5%
16V

2

NP0-C0G
01005

1

C0409

100PF

5%
16V

2

NP0-C0G
01005

1

C0419

100PF

5%
16V

2

NP0-C0G
01005

1

C0404

56PF

5%
25V

2

NP0-C0G-CERM
01005

1

C0410

56PF

5%
25V

2

NP0-C0G-CERM
01005

1

C0420

56PF

5%
25V

2

NP0-C0G-CERM
01005

1

C0405

18PF

2%
16V

2

CERM
01005

1

C0411

18PF

2%
16V

2

CERM
01005

1

C0421

18PF

2%
16V

2

CERM

Back Shields

1

SH0400

SM

SHLD-SOFT-UP-BK-D11

1

SH0402

SM

SHLD-SOFT-LOWER-BK-D11

1

C0406

4PF

+/-0.1PF
16V

2

NP0-C0G
01005

1

C0412

4PF

+/-0.1PF
16V

2

NP0-C0G
01005

1

C0422

4PF

+/-0.1PF
16V

2

NP0-C0G
0100501005

BS0404

2.70R1.80-NSP

1

BS0405

STDOFF-2.9OD0.888H-SM

1

Front Shields

1

SH0401

SM

SHLD-UP-FRT-D11

1

SH0403

SM

SHLD-LOWER-FRT-D11

28 27 26 25 23 21 19 18 10 9
46 41 40 39 37 35 34 33 31 30

DFU

20 12

PMU_TO_AP_FORCE_DFU

E75

41 40

41 40

41 40

41 40

41 40

41 40

TRISTAR_CON_DETECT_L

41 40

90_TRISTAR_DP1_CONN_P

90_TRISTAR_DP1_CONN_N

90_TRISTAR_DP2_CONN_P

90_TRISTAR_DP2_CONN_N

PP_TRISTAR_ACC1

PP_TRISTAR_ACC2

AMUX

PMU_AMUX_AY

20

PMU_AMUX_BY

20

MOJAVE

53

PP_VDD_MAIN

#25244799

100k to 200k

TP0423

1

TP-P55

ROOM=TEST

TP0419

TP0408

1

TP-P55

ROOM=TEST

A

FD0408

FID

0P5SM1P0SQ-NSP

1

ROOM=TEST

VDD_MAIN

Note: Fiducial used as test point

PP_LCM_BL34_CAT2_CONN

46 45

PP_LCM_BL34_ANODE_CONN

46 45

1

ROOM=TEST

TP0418

1

ROOM=TEST

A

TP-P55

A

TP-P55

LCM BACKLIGHT SINK4

LCM BACKLIGHT SOURCE (3/4)

FIDUCIALS

FD0410

FID

TP0414

1

TP-P55

ROOM=TEST

TP0402

1

TP-P55

ROOM=TEST

TP0403

1

TP-P55

ROOM=TEST

TP0404

1

TP-P55

ROOM=TEST

TP0405

1

TP-P55

ROOM=TEST

TP0406

1

TP-P55

ROOM=TEST

TP0407

1

TP-P55

ROOM=TEST

TP0416

1

TP-P55

ROOM=TEST

TP0412

1

TP-P55

ROOM=TEST

TP0413

ROOM=TEST

1

R0413

200K

1%
1/32W
MF
01005

2

A

ROOM=SOC

1

TP-P55

A

FORCE DFU

A

A

A

A

A

ACCESSORY ID AND POWER

A

A

TP IS TO HELP WITH USB SI
IN THE FACTORY FIXTURE.

A

FOR DIAGS

A

ANALOG MUX A OUTPUT

ANALOG MUX B OUTPUT

Note: Fiducial used as test point

0P5SM1P0SQ-NSP

1

ROOM=ASSEMBLY

FD0409

FID

0P5SM1P0SQ-NSP

1

ROOM=ASSEMBLY

FD0405

FID

0P5SM1P0SQ-NSP

1

ROOM=ASSEMBLY

FD0406

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0404

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0403

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0402

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0401

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0400

0P5SQ-SMP3SQ-NSP

FID

1

ROOM=ASSEMBLY

FD0407

FID

0P5SM1P0SQ-NSP

1

ROOM=TEST

FD0411

0P5SQ-SMP3SQ-NSP

FID

1

C

B

A

BS0406

CLIP-COAX-RETENTION-D11

CL0401

SM

1

STDOFF-2.9OD1.9ID-0.85H-SM

1

38 37

38 37

MESA_TO_BOOST_EN

PP16V0_MESA

TOP SIDE

8 7 5 4 2 1

TP0400

1

TP-P55

ROOM=TEST

TP0401

1

TP-P55

ROOM=TEST

A

A

SYNC_MASTER=sync SYNC_DATE=05/17/2016

PAGE TITLE

SYSTEM:MECHANICAL COMPONENTS

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

REVISION

BRANCH

PAGE

SHEET

36

051-00482

8.0.0

4 OF 53
4 OF 81

A

D

345678

2 1

D

C

BOOTSTRAPPING:BOARD REV

12

BOARD_REV3

12

BOARD_REV2

BOARD_REV1

12

12

BOARD_REV0

BOARD_ID4=No connect

NOSTUFF

R0509

01005

NOSTUFF

R0505

01005

R0508

01005 MF

NOSTUFF

R0504

01005

ROOM=SOC

MF

5%

ROOM=SOC

MF

5%

ROOM=SOC

5%

ROOM=SOC

MF 5%

21

1/32W

21

1/32W

21

1/32W

21

1/32W

1.00K

1.00K

1.00K

1.00K

MAKE_BASE=TRUE

BOARD ID
BOOT CONFIG

PP1V8

SELECTED -->

52 48 47 46 39 30

BOARD_REV[3:0]

FLOAT=LOW, PULLUP=HIGH

1111 Pre-Proto w/D520 (non enclosure)
1110 PROTO1
1101 PROTO2
1100 PROTO2.5
1011 EVT
xxxx SPARE
1000 CARRIER
xxxx SPARE
0010 DVT
xxxx SPARE
0000 PVT

29 25 18 17 16 13 12 11 9 8 7

D

C

BOARD_ID3

11

11

BOARD_ID2

0=EUREKA, 1=KAROO

BOARD_ID1

11

0=FORM FACTOR A, 1=FORM FACTOR B

BOARD_ID0=No connect

PP1V8

12

BOOT_CONFIG1=No connect

R0502

NOSTUFF

R0503

R0501

ROOM=SOC

MF01005 1/32W

ROOM=SOC

ROOM=SOC

21

1.00K

5%

21

1.00K

5%MF01005 1/32W

21

1.00K

1/32W

5%MF01005

MAKE_BASE=TRUE

SELECTED -->

BOARD_ID[4:0]

FLOAT=LOW, PULLUP=HIGH
01000 D10 MLB
01001 D10 DEV
01010 D11 MLB
01011 D11 DEV
01100 D101 MLB
01101 D101 DEV
01110 D111 MLB
01111 D111 DEV

0=MLB, 1=DEV
0=FORM FACTOR A, 1=FORM FACTOR B
0=EUREKA, 1=KAROO

B

BOOT_CONFIG0=No connect

SELECTED -->

BOOT_CONFIG[2:0]

FLOAT=LOW, PULLUP=HIGH
000 SPI0
001 SPI0 TEST MODE
010 NVME0_X2
011 NVME0 X2 TEST
100 NVME0 X1
101 NVME0 X1 TEST
110 SLOW SPI0 TEST
111 FAST SPI0 TEST

B

A

PAGE TITLE

SYSTEM: BOARDID

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=03/01/2016SYNC_MASTER=david-copy

051-00482

8.0.0

5 OF 53

5 OF 81

A

D

34567 8

2 1

D

D

C

C

B

B

A

SYNC_MASTER=Sync

PAGE TITLE

spare

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

6 OF 53
6 OF 81

D

SYNC_DATE=06/06/2016

A

345678

2 1

D

SOC - USB, JTAG, XTAL

VDD18_AMUX: 1.62-1.98V @1mA MAX

PP1V1_XTAL

C0700

1

0.1UF

20%

2

6.3V
X5R-CERM
01005

ROOM=SOC

C0704

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

PP3V3_USB

FL0700

240-OHM-25%-0.20A-0.9DCR

21

01005

ROOM=SOC

30 19

VDD18_USB: 1.71-1.89V @20mA MAX

PP1V8

VDD11_XTAL:1.06-1.17V @TBD mA MAX

PP1V1

C0705

1

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

52 48 47 46 39 30

29 25 18 17 16 13 12 11 9 8 7 5

D

18 15

C

25 18 17 16 13 12 11 9 8 7 5

52 48 47 46 39 30 29

PP1V8

CKPLUS_WAIVE=PWRTERM2GND

CL20

VDD12_UH1_HSIC0

AJ60

VDD18_AMUX

CE25

VDD18_USB

U0700

CAYMAN-2GB-20NM-DDR-M

CSP

CG50

VDD11_XTAL

CG26

C0701

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

CC25

VDD33_USB

VDD_FIXED_USB

PP0V9_SOC_FIXED

3.14-3.46V @20mA MAX

18 15 10 9 8

tbd - tbd V @5mA MAX

C

B

Dev ONLY

40 37 20 13

PP0701

P2MM-NSM

SM

1

PP

40

SWD_DOCK_BI_AP_SWDIO
SWD_DOCK_TO_AP_SWCLK

40

20 13

PMU_TO_SYSTEM_COLD_RESET_L
PMU_TO_AOP_TRISTAR_ACTIVE_READY

20

AP_TO_PMU_TEST_CLKOUT

17

AP_TO_NAND_RESET_L

NC
NC

NC
NC
NC

CM22
CM20

CL31

CL29

CG37

CJ35
CK33
CH37

CM14

BJ3
BJ2

BL65

UH1_HSIC0_DATA
UH1_HSIC0_STB

JTAG_SEL

JTAG_TRST*
JTAG_TDO
JTAG_TDI
JTAG_TMS
JTAG_TCK

COLD_RESET*
CFSB
TST_CLKOUT

S3E_RESET*

SYM 1 OF 16

OMIT_TABLE

ANALOGMUX_OUT

USB_DP

USB_DM

USB_VBUS

USB_ID

USB_REXT

N64

CM26
CL26

CH26

CJ26

CK26

AP_TO_PMU_AMUX_OUT

90_USB_AP_DATA_P
90_USB_AP_DATA_N

USB_VBUS_DETECT

NC

AP_USB_REXT

20

40

40

21

1

R0700

200

1%
1/32W
MF

2

01005

ROOM=SOC

B

BJ4

HOLD_RESET

BL3

TESTMODE

WDOG

XI0

XO0

CK35

CM42
CL42

AP_TO_PMU_WDOG_RESET

XTAL_AP_24M_IN
XTAL_AP_24M_OUT

20

1

R0701

511K

1%
1/32W
MF

2

01005

ROOM=SOC

R0702

0.00

0%

1/32W

MF

01005

ROOM=SOC

CRITICAL
ROOM=SOC

Y0700

1.60X1.20MM-SM

24.000MHZ-30PPM-9.5PF-60OHM

21

SOC_24M_O

1

C0702

12PF

5%
16V

2

CERM
01005

ROOM=SOC

31

42

1

C0703

12PF

5%
16V

2

CERM
01005

ROOM=SOC

A

SYNC_MASTER=Sync

PAGE TITLE

SOC:JTAG,USB,XTAL

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

7 OF 53
7 OF 81

D

SYNC_DATE=06/06/2016

A

SOC - PCIE INTERFACES

345678

2 1

D

19 16 10

PP1V2_SOC

1

C0805

2.2UF

20%

6.3V
X5R-CERM

2

0201-1

ROOM=SOC

R0804

0.00

0%

1/32W

MF

01005

ROOM=SOC

21

VDD12_PCIE_REFBUF:1.08-1.26V @40mA MAX

PP1V2_SOC_PCIE_REFBUF

C0802

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

VDD12_PCIE: 1.14-1.26V @10mA MAX

1

C0801

0.1UF

20%

6.3V
X5R-CERM

2

01005

ROOM=SOC

CE58

VDD_FIXED_PCIE_xxx:0.855-0.990V @225mA MAX

PP0V9_SOC_FIXED

18 15 10 9 7

D

R0803

PP0V9_SOC_FIXED_PCIE_REFBUF

1

C0804

0.1UF

CC47

CA60

CE49

CC49

VDD12_PCIE

CA55

CC53

CC62

CE55

CE60

BW55

20%

2

6.3V
X5R-CERM
01005

ROOM=SOC

0.00

1/32W
01005

ROOM=SOC

21

0%
MF

C0803

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

C0800

1

1.0UF

20%

2

6.3V
X5R
0201-1

ROOM=SOC

1

C0806

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=SOC

C

17

17

17

17

17

17

PCIE LINK 0

17

17

29 25 18 17 16 13 12 11 9 7 5

PCIE_NAND_BI_AP_CLKREQ_L

PP1V8

1

R0805

100K

5%
1/32W
MF

2

01005

ROOM=SOC

52 48 47 46 39 30

90_PCIE_AP_TO_NAND_REFCLK_P
90_PCIE_AP_TO_NAND_REFCLK_N

#24557655:replace with 20% caps. SI no negative impact

GND_VOID=TRUE

21

C0807

ROOM=SOC

90_PCIE_NAND_TO_AP_RXD_P
90_PCIE_NAND_TO_AP_RXD_N 90_PCIE_NAND_TO_AP_RXD_C_N

D10 NAND is now Gen3 (was Gen2). Caps intentionally 0.22uF

90_PCIE_AP_TO_NAND_TXD_P
90_PCIE_AP_TO_NAND_TXD_N

PCIE_AP_TO_NAND_RESET_L

C0808

ROOM=SOC

C0809

ROOM=SOC

C0810

ROOM=SOC

20%
X5R 01005

20%
X5R

20%
X5R

20%
X5R

6.3V

GND_VOID=TRUE

21

6.3V
01005

GND_VOID=TRUE

21

6.3V
01005

GND_VOID=TRUE

21

6.3V
01005

0.22UF

0.22UF

0.22UF

0.22UF

90_PCIE_NAND_TO_AP_RXD_C_P

90_PCIE_AP_TO_NAND_TXD_C_P
90_PCIE_AP_TO_NAND_TXD_C_N

BC64

CJ48

CK48

CM46

CL46

CK44

CJ44

BJ65

PCIE_CLKREQ0*
PCIE_REF_CLK0_P

PCIE_REF_CLK0_N

PCIE_RX0_P
PCIE_RX0_N

PCIE_TX0_P
PCIE_TX0_N

PCIE_PERST0*

VDD12_PCIE_REFBUF

VDD_FIXED_PCIE_CLK

U0700

CAYMAN-2GB-20NM-DDR-M

CSP

SYM 2 OF 16

VDD_FIXED_PCIE_ANA

PCIE_CLKREQ3*

PCIE_REF_CLK3_P
PCIE_REF_CLK3_N

PCIE_PERST3*

VDD_FIXED_PCIE_REFBUF

PCIE_RX3_P
PCIE_RX3_N

PCIE_TX3_P
PCIE_TX3_N

BE66
CL64

CM64

CM61
CL61

CK63
CJ63

BJ66

PCIE_WLAN_BI_AP_CLKREQ_L
90_PCIE_AP_TO_WLAN_REFCLK_P

90_PCIE_AP_TO_WLAN_REFCLK_N

90_AP_PCIE3_RXD_C_P
90_AP_PCIE3_RXD_C_N

90_AP_PCIE3_TXD_C_P
90_AP_PCIE3_TXD_C_N

52

52

52

52

52

52

52

PCIE_AP_TO_WLAN_RESET_L

52

C

B

PCIE LINK 1

1

R0802

100K

5%
1/32W
MF

2

01005

ROOM=SOC

LINK 1 USED ON AP_DEV ONLY

NC
NC

NC

NC
NC

NC
NC

NC

CL54

CM54

CK52

CJ52

CM50

CL50

CH57

CG57

PCIE_CLKREQ1*
PCIE_REF_CLK1_P

PCIE_REF_CLK1_N

PCIE_RX1_P
PCIE_RX1_N

PCIE_TX1_P
PCIE_TX1_N

PCIE_PERST1*

PCIE_EXT_REF_CLK_P
PCIE_EXT_REF_CLK_N

LINK0

LINK1

LINK3

LINK2

PCIE_CLKREQ2*

PCIE_REF_CLK2_P
PCIE_REF_CLK2_N

PCIE_RX2_P
PCIE_RX2_N

PCIE_TX2_P
PCIE_TX2_N

PCIE_PERST2*

BE65BG66
CK59

CJ59

CK56
CJ56

CM57
CL57

BE64BG64

PCIE_BB_BI_AP_CLKREQ_L
90_PCIE_AP_TO_BB_REFCLK_P

90_PCIE_AP_TO_BB_REFCLK_N

WLAN RX PP's are now managed on Page 52

90_AP_PCIE2_RXD_C_P
90_AP_PCIE2_RXD_C_N

90_AP_PCIE2_TXD_C_P
90_AP_PCIE2_TXD_C_N

52

52

52

52

52

52

52

1

R0806

100K

5%
1/32W
MF
01005

2

ROOM=SOC

PCIE_AP_TO_BB_RESET_L

1

R0801

100K

5%
1/32W
MF
01005

ROOM=SOC

2

B

PCIE LINK 2 PCIE LINK 3

52

A

PCIE_REXT

CG63

AP_PCIE_RCAL

1

R0800

3.01K

1%
1/32W
MF
01005

2

ROOM=SOC

SYNC_MASTER=Sync

PAGE TITLE

SOC:PCIE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

8 OF 53

SHEET

8 OF 81

SYNC_DATE=06/06/2016

A

8 7 5 4 2 1

36

SOC - MIPI & ISP INTERFACES

345678

2 1

D

0.825-0.94V @25mA MAX

18 15 10 8 7

90_MIPI_NH_TO_AP_DATA0_P

45

90_MIPI_NH_TO_AP_DATA0_N

45

PP0V9_SOC_FIXED

1

C0902

2

ROOM=SOC

0.1UF

20%

6.3V
X5R-CERM
01005

1

C0900

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

A18

MIPI0C_DPDATA0

B18

MIPI0C_DNDATA0

G6

G17

G13

VDD_FIXED_MIPI

G10

G15

U0700

CAYMAN-2GB-20NM-DDR-M

CSP

SYM 3 OF 16

G21

G19

VDD18_MIPI

ISP_I2C0_SCL

ISP_I2C0_SDA

1.62-1.98V @7mA MAX

1

C0901

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

N65
N66

I2C_ISP_UT_SCL
I2C_ISP_UT_SDA

1

C0903

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

PP1V8

48

48

D

52 48 47 46 39 30

29 25 18 17 16 13 12 11 8 7 5

C

R0900

4.02K

1/32W
01005

ROOM=SOC

D11/111 ONLY

1%
MF

U64
R65

U65
U66

W64
W66

AA64

B50
A48
C48

A50
E50
AA65
AE64
AC65

I2C_ISP_NV_SCL
I2C_ISP_NV_SDA

I2C_ISP_NH_SCL
I2C_ISP_NH_SDA

NC
NC

NC

Dev ONLY

Spare

AP_TO_UT_CLK_R
AP_TO_NV_CLK_R

AP_TO_NH_CLK_R

AP_TO_UT_SHUTDOWN_L
AP_TO_NV_SHUTDOWN_L
AP_TO_NH_SHUTDOWN_L

TP_SENSOR3_RST

NC

48

48

46 30

46 30

C

R0906

30

25

30

29

D11/111 ONLY

D11/111 ONLY

1

PP

PP0902

SM

P2MM-NSM

ROOM=SOC

33.2

1/32W
01005

ROOM=SOC

R0907

33.2

1/32W
01005

ROOM=SOC

Radar 20511449

<--- Needed for Cayman debug; this pin cannot be input

1%
MF

1%
MF

21

NOSTUFF

1

C0906

100PF

5%
35V

2

NP0-C0G
01005

21

NOSTUFF

1

C0907

100PF

5%
35V

2

NP0-C0G
01005

AP_TO_UT_CLK

AP_TO_NH_CLK

25

29

NC
NC

NC
NC

B20

MIPI0C_DPDATA1

C20

MIPI0C_DNDATA1

C24

MIPI0C_DPDATA2

B24

MIPI0C_DNDATA2

A26

MIPI0C_DPDATA3

B26

MIPI0C_DNDATA3

B22

MIPI0C_DPCLK

A22

MIPI0C_DNCLK

E24

MIPI0C_REXT

B4

MIPID_DPDATA0

A4

MIPID_DNDATA0

B5

MIPID_DPDATA1

C5

MIPID_DNDATA1

C9

MIPID_DPDATA2

B9

MIPID_DNDATA2

A11

MIPID_DPDATA3

B11

MIPID_DNDATA3

ISP_I2C1_SCL

ISP_I2C1_SDA

ISP_I2C2_SCL

ISP_I2C2_SDA

ISP_I2C3_SCL

ISP_I2C3_SDA

SENSOR_INT

SENSOR0_CLK
SENSOR1_CLK
SENSOR2_CLK

SENSOR0_RST
SENSOR1_RST
SENSOR2_RST
SENSOR3_RST
SENSOR4_RST

90_MIPI_NH_TO_AP_DATA1_P

45

90_MIPI_NH_TO_AP_DATA1_N

45

45

90_MIPI_NH_TO_AP_CLK_P
90_MIPI_NH_TO_AP_CLK_N

45

MIPI0C_REXT

1

90_MIPI_AP_TO_LCM_DATA0_P

39

90_MIPI_AP_TO_LCM_DATA0_N

2

39

90_MIPI_AP_TO_LCM_DATA1_P

39

90_MIPI_AP_TO_LCM_DATA1_N

39

46

90_MIPI_AP_TO_LCM_DATA2_P

46

90_MIPI_AP_TO_LCM_DATA2_N

46

90_MIPI_AP_TO_LCM_DATA3_P

46

90_MIPI_AP_TO_LCM_DATA3_N

B

39

90_MIPI_AP_TO_LCM_CLK_P
90_MIPI_AP_TO_LCM_CLK_N

39

AP_TO_STROBE_DRIVER_HWEN

26

SPI_AP_TO_MAGGIE_CS_L

36

MIPID_REXT

1%

1/32W

MF

01005

1

2

R0901

4.02K

ROOM=SOC

NC

B7

MIPID_DPCLK

A7

MIPID_DNCLK

BN4

DISP_TOUCH_BSYNC0

BR2

DISP_TOUCH_BSYNC1

BR4

DISP_TOUCH_EB

E11

MIPID_REXT

SENSOR0_ISTRB
SENSOR1_ISTRB

SENSOR0_XSHUTDOWN
SENSOR1_XSHUTDOWN

MIPI1C_REXT

MIPI1C_DPDATA0
MIPI1C_DNDATA0

MIPI1C_DPDATA1
MIPI1C_DNDATA1

MIPI1C_DPCLK
MIPI1C_DNCLK

E52
D50

C50
B48

E16

B12
C12

B16
C16

B14
A14

NC_SENSOR0_ISTRB

NC

NC

AP_TO_MUON_BL_STROBE_EN

Per Radar 21221938

46 37

B

Dev only

A

28 27 26 25 23 21 19 18 10 4
46 41 40 39 37 35 34 33 31 30

53

8 7 5 4 2 1

PP_VDD_MAIN

1

C0904

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SOC

AC return path for LCM MIPI which is referenced to GND and VDD_MAIN
Radar 21203307

1

C0905

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SOC

1

C0908

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SOC

1

C0909

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SOC

1

C0910

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SOC

SYNC_MASTER=Sync

PAGE TITLE

SYNC_DATE=06/06/2016

A

SOC:MIPI AND ISP

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00482

REVISION

8.0.0

BRANCH

PAGE

9 OF 53

SHEET

9 OF 81

36

D

345678

2 1

D

19 16 8

PP1V2_SOC

1

C1013

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

VDD12_PLL_LPDP:1.14-1.26V @3mA MAX
VDD12_LPDP:1.14-1.26V @60mA MAX

1

C1001

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

1

C1004

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

C1005

0.01UF

10%

6.3V

2

X5R
01005

ROOM=SOC

90_LPDP_NV_TO_AP_D0_P

30

90_LPDP_NV_TO_AP_D0_N

30

1

C1002

15PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=SOC

Desense for Wifi frequencies

CKPLUS_WAIVE=PWRTERM2GND
CKPLUS_WAIVE=PWRTERM2GND
CKPLUS_WAIVE=PWRTERM2GND

A54

LPDPRX_RX_D0_P

B54

LPDPRX_RX_D0_N

G25

G28

VDD12_LPDP_TX

G30

G55

G58

G60

VDD12_LPDP_RX

G62

G23

VDD12_PLL_LPDP

U0700

CAYMAN-2GB-20NM-DDR-M

CSP

SYM 4 OF 16

LPDP_TX0P
LPDP_TX0N

B27
C27

NC
NC

D

Dev ONLY

C

LPDP Lanes swapped between D10 and D11

D11/111 ONLY

D11/111 ONLY

90_LPDP_NV_TO_AP_D1_P

30

90_LPDP_NV_TO_AP_D1_N

30

90_LPDP_UT_TO_AP_D2_P

25

90_LPDP_UT_TO_AP_D2_N

25

90_LPDP_UT_TO_AP_D3_P

25

90_LPDP_UT_TO_AP_D3_N

25

GND ON MLB; other on Dev

30

LPDP_NV_BI_AP_AUX

LPDP_UT_BI_AP_AUX

25

NC

NC
NC

B56

LPDPRX_RX_D1_P

C56

LPDPRX_RX_D1_N

A61

LPDPRX_RX_D2_P

B61

LPDPRX_RX_D2_N

B63

LPDPRX_RX_D3_P

C63

LPDPRX_RX_D3_N

A64

LPDPRX_RX_D4_P

B64

LPDPRX_RX_D4_N

D54

LPDPRX_AUX_D0_P

E56

LPDPRX_AUX_D1_P

D61

LPDPRX_AUX_D2_P

E63

LPDPRX_AUX_D3_P

D64

LPDPRX_AUX_D4_P

LPDP_TX1P
LPDP_TX1N

LPDP_TX2P
LPDP_TX2N

LPDP_TX3P
LPDP_TX3N

LPDP_AUX_P
LPDP_AUX_N

LPDP_CAL_DRV_OUT

LPDP_CAL_VSS_EXT

A29
B29

B31
C31

A33
B33

D33
E33

E35
E31

NC
NC

C

NC
NC

NC

NC
NC

NC
NC

B

18 15 9 8 7

R1001

300

1%

1/32W

MF

01005-1

ROOM=SOC

C1006

100PF

5%

16V

NP0-C0G

01005

ROOM=SOC

GND ON MLB; other on Dev

PP0V9_SOC_FIXED

1

2

AP_LPDPRX_RCAL_NEG

1

2

#24401637:Unconnect LPDPRX_EXT_C

NC

B59

LPDPRX_BYP_CLK_P

C59

LPDPRX_BYP_CLK_N

A57

LPDPRX_RCAL_P

B57

LPDPRX_RCAL_N

D57

LPDPRX_EXT_C

EDP_HPD

DP_WAKEUP

BN3
AP2

NC
NC

Reserved for PanelID[1:0] on ap_dev board
Reserved for PanelID[1:0] on ap_dev board

B

A

53

28 27 26 25 23 21 19 18 9 4

46 41 40 39 37 35 34 33 31 30

8 7 5 4 2 1

PP_VDD_MAIN

1

C1010

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=SOC

AC return path for LCM LPDP which is referenced to GND and VDD_MAIN

1

C1011

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=SOC

SYNC_MASTER=Sync

PAGE TITLE

SOC:LPDP

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

10 OF 53
10 OF 81

D

SYNC_DATE=06/06/2016

A

SOC - SERIAL INTERFACES

345678

2 1

D

I2S_AP_TO_CODEC_MCLK

32

R1103

33.2

1%

1/32W

MF

01005

ROOM=SOC

D

CK7
CG12

AG64
AG66

U3
U4

AE66
AE65

I2C0_AP_SCL
I2C0_AP_SDA

I2C1_AP_SCL
I2C1_AP_SDA

I2C2_AP_SCL
I2C2_AP_SDA

I2C3_AP_SCL
I2C3_AP_SDA

47

47

47

47

47

47

47

47

NC

NC

BV65

BY66
BU64
BR64
BU65

D48
E48
A46
C46
E46

BU66
BR66
BN64
BN65

BJ64

I2S0_MCK
I2S0_BCLK
I2S0_LRCK
I2S0_DIN
I2S0_DOUT

I2S1_MCK
I2S1_BCLK
I2S1_LRCK
I2S1_DIN
I2S1_DOUT

I2S2_MCK
I2S2_BCLK
I2S2_LRCK
I2S2_DIN
I2S2_DOUT

U0700

CAYMAN-2GB-20NM-DDR-M

CSP

SYM 6 OF 16

21

I2S_AP_TO_CODEC_MCLK_R

32

I2S_AP_TO_CODEC_MSP_BCLK

32

I2S_AP_TO_CODEC_MSP_LRCLK

32

I2S_CODEC_TO_AP_MSP_DIN
I2S_AP_TO_CODEC_MSP_DOUT

32

I2S1/2/3 MCLK NC #24559456

53

I2S_AP_TO_BT_BCLK

53

I2S_AP_TO_BT_LRCLK

53

I2S_BT_TO_AP_DIN

53

I2S_AP_TO_BT_DOUT

36 35 34 33 32

36 35 34 33 32

I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK

36

I2S_MAGGIE_TO_AP_DIN

36

I2S_AP_TO_MAGGIE_DOUT

I2C0_SCL
I2C0_SDA

I2C1_SCL
I2C1_SDA

I2C2_SCL
I2C2_SDA

I2C3_SCL
I2C3_SDA

C

B

36 32

SPI_AP_TO_CODEC_MAGGIE_SCLK

Route as daisy-chain. No T's allowed.

SPI_AP_TO_TOUCH_SCLK

39

R1116

0.00

0%

1/32W

MF

01005

ROOM=SOC

R1101

0.00

0%

1/32W

MF

01005

ROOM=SOC

CH11

NC

53

I2S_BB_TO_AP_BCLK

53

I2S_BB_TO_AP_LRCLK

53

I2S_BB_TO_AP_DIN

53

I2S_AP_TO_BB_DOUT

5

BOARD_ID2

5

BOARD_ID1

BOARD_ID0

5

BOARD_ID3

36 32

SPI_CODEC_MAGGIE_TO_AP_MISO
SPI_AP_TO_CODEC_MAGGIE_MOSI

36 32

21

21

SPI_AP_TO_CODEC_MAGGIE_SCLK_R

32

SPI_AP_TO_CODEC_CS_L

39

SPI_TOUCH_TO_AP_MISO

39

SPI_AP_TO_TOUCH_MOSI
SPI_AP_TO_TOUCH_SCLK_R

39

SPI_AP_TO_TOUCH_CS_L

38

SPI_MESA_TO_AP_MISO

38

SPI_AP_TO_MESA_MOSI

38

SPI_AP_TO_MESA_SCLK

38

MESA_TO_AP_INT

CG18

NC

CM7

CK9

CJ9

CB2
BY4
BY3
CB4

N2
N3
N4
R3

C44
B44
A44
D44

B42
A42
E44
C42

I2S3_MCK
I2S3_BCLK
I2S3_LRCK
I2S3_DIN
I2S3_DOUT

SPI0_MISO
SPI0_MOSI
SPI0_SCLK
SPI0_SSIN

SPI1_MISO
SPI1_MOSI
SPI1_SCLK
SPI1_SSIN

SPI2_MISO
SPI2_MOSI
SPI2_SCLK
SPI2_SSIN

SPI3_MISO
SPI3_MOSI
SPI3_SCLK
SPI3_SSIN

SPI4_SCLK

SPI4_MISO
SPI4_MOSI

I2C5_SCL
I2C5_SDA

GPIO_42
GPIO_43

PMU_SCLK
PMU_MISO
PMU_MOSI

DWI_CLK

DWI_DO

DROOP

GPU_TRIGGER

SOCHOT

CLK32K_OUT

NAND_SYS_CLK

CJ12

NC

CG22

NC

CM9

NC

CH16
CJ14

CH20

NC

CH22

NC

AH65

SPI_PMGR_TO_PMU_SCLK

AH66

SPI_PMU_TO_PMGR_MISO

AK64

SPI_PMGR_TO_PMU_MOSI

AK65

DWI_PMGR_TO_BACKLIGHT_CLK

AM64

DWI_PMGR_TO_BACKLIGHT_DATA

AE3
BY2

AG4

AM66

AP_TO_CUMULUS_CLK32K

BN66

AP_TO_NAND_SYS_CLK_R

I2C5_SCL
I2C5_SDA

R1118

0.00

0%

1/32W

MF

01005

ROOM=SOC

20

20

20

39

C

47 11

47 11

PP1V8

1

R1113

10K

5%
1/32W
MF
01005

2

ROOM=SOC

46 37

46 37

1

R1114

10K

5%
1/32W
MF
01005

2

ROOM=SOC

52 48 47 46 39 30

PMU_TO_AP_PRE_UVLO_L
PMU_TO_AP_THROTTLE_GPU_L

AP_TO_PMU_SOCHOT_L

29 25 18 17 16 13 12 11 9 8 7 5

20

20

20

B

21

AP_TO_NAND_SYS_CLK

17

A

25 18 17 16 13 12 11 9 8 7 5

52 48 47 46 39 30 29

PP1V8

I2C5

See Radar#25316444 for Details

1

C1101

1.0UF

2

20%

6.3V
X5R
0201-1

ROOM=SOC

SCL

VCC

U1101

WLCSP

VSS

ROOM=SOC

CRITICAL

B2 A1

SDA

A2B1

I2C5_SDA
I2C5_SCL

47 11

47 11

To Cayman

SYNC_MASTER=Sync

PAGE TITLE

SOC:SERIAL

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

11 OF 53

SHEET

11 OF 81

SYNC_DATE=06/06/2016

A

8 7 5 4 2 1

36

.

345678

2 1

D

C

B

36

29 25 18 17 16 13 11 9 8 7 5

52 48 47 46 39 30

20

#24557547:Delete R1204

MAGGIE_TO_AP_CDONE

PP1V8

Nostuff per #24511702

PMU_TO_AP_THROTTLE_CPU_L

D101/D111 ONLY
D101/D111 ONLY

D101/D111 ONLY

NOSTUFF

1

R1210

10K

5%
1/32W
MF
01005

ROOM=SOC

2

D10/D11 ONLY

Dev only

SOC - GPIO INTERFACES

AP_TO_ACC_BUCK_VSEL

27

AP_TO_MAGGIE_CRESETB_L

36

44 20

BUTTON_VOL_UP_L

DEV ONLY

AP_TO_BB_RESET_L

53

RESERVERD FOR SSHB ID ON DEV BOARD

NC_AP_TO_BB_IPC_GPIO2
NC_AP_TO_GNSS_WAKE
AP_TO_BB_TIME_MARK

53

NC_AP_TO_GNSS_TIME_MARK

BB_TO_AP_RESET_DETECT_L

53

33

AP_TO_SPKAMP2_RESET_L
ALS_TO_AP_INT_L

29

53

AP_TO_NFC_FW_DWLD_REQ

AP_TO_NAND_FW_STRAP

17

39

TOUCH_TO_AP_INT_L

AP_TO_BBPMU_RADIO_ON_L

53

AP_TO_ICEFALL_FW_DWLD_REQ

53

AP_TO_LCM_RESET_L

39

AP_BI_HOMER_BOOTLOADER_ALIVE

36

20 4

PMU_TO_AP_FORCE_DFU
NC_DFU_STATUS

5

PP1V8

AP_TO_NFC_DEV_WAKE

53

20

PMU_TO_AP_BUF_RINGER_A

53

AP_TO_BT_WAKE

53

AP_TO_WLAN_DEVICE_WAKE

5

BOARD_REV3

5

BOARD_REV2
BOARD_REV1

5

BOARD_REV0

5

AP_TO_TOUCH_MAMBA_RESET_L

39

53

AP_TO_BB_MESA_ON
AP_TO_BB_COREDUMP

53

AP_TO_BB_IPC_GPIO1

53

BOOT_CONFIG0

#24608280

BOOT_CONFIG1

BOARD_ID4

NC

NC

NC

NC

NC

NC

BB64
BC65
BB66
AY65
AY66
AV65
AV67

AT67
AT66

AT64
AP66
AP65
AH64

AE4
AC3
AE2
BB2
BB4
BC3
BC4
BE2
BE4
BE3
BG2

CJ11

CL9

CH14

CK11

CG20

AA2
AA3

D42
E42
A41
C41
E41
A39
AT4

AT2
AV3
AY2
AY3

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41

U0700

CAYMAN-2GB-20NM-DDR-M

CSP

SYM 5 OF 16

TMR32_PWM0
TMR32_PWM1
TMR32_PWM2

UART5_RTXD

UART0_RXD

UART0_TXD

UART1_CTS*
UART1_RTS*

UART1_RXD

UART1_TXD

UART2_CTS*
UART2_RTS*

UART2_RXD

UART2_TXD

UART3_CTS*
UART3_RTS*

UART3_RXD

UART3_TXD

UART4_CTS*
UART4_RTS*

UART4_RXD

UART4_TXD

UART6_RXD

UART6_TXD

UART7_RXD

UART7_TXD

AG2
AH4
AH3

CL5
CJ7

E39
D39
C39
B39

AM4
AK3
AK4
AH2

AA4
W2
W4
U2

D37
C37
B37
A37

BG4

CG16
CG14

AP3
AM2

NC

PROX_BI_AP_AOP_INT_PWM_L
NC_BB_TO_AP_RESET_ACT_L

UART_AP_DEBUG_RXD
UART_AP_DEBUG_TXD

UART_BT_TO_AP_CTS_L
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_RXD
UART_AP_TO_BT_TXD

NC_AP_UART2_CTS_L
NC_AP_UART2_RTS_L
NC_AP_UART2_RXD
NC_AP_UART2_TXD

UART_NFC_TO_AP_CTS_L
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_TXD

UART_WLAN_TO_AP_CTS_L
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_TXD

SWI_AP_BI_TIGRIS

UART_ACCESSORY_TO_AP_RXD
UART_AP_TO_ACCESSORY_TXD

UART_HOMER_TO_AP_RXD
UART_AP_TO_HOMER_TXD

40

40

53

53

53

53

53

53

53

53

53

53

53

53

21

40

40

36

36

D

29 13

D101/D111 ONLY

C

D101/D111 ONLY; for GNSS

B

A

20

PMU_TO_AP_BUF_POWER_KEY_L
PMU_TO_AP_BUF_VOL_DOWN_L

20

#25120460:REQUEST_DFU Assignment

BU2
BU3

REQUEST_DFU1
REQUEST_DFU2

SYNC_MASTER=Sync

PAGE TITLE

SYNC_DATE=06/06/2016

A

SOC:GPIO & UART

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

12 OF 53
12 OF 81

D

SOC - AOP

345678

2 1

D

C

#24512059: Remove R1300 PU

Use internal pullup in SOC (AOP side).

Plan to use internal pullup in AOP. Radar 21210869

20

20 15

24

24

29 12

24

24

24

24

53 39 23 20

40

36

24

24

24

35 34 33 32

48

20

AOP_TO_PMU_SLEEP1_REQUEST
PMU_TO_AOP_SLEEP1_READY

SPI_AOP_TO_COMPASS_CS_L
COMPASS_TO_AOP_INT
PROX_BI_AP_AOP_INT_PWM_L
ACCEL_GYRO_TO_AOP_DATARDY
SPI_AOP_TO_ACCEL_GYRO_CS_L
ACCEL_GYRO_TO_AOP_INT
SPI_AOP_TO_PHOSPHORUS_CS_L
LCM_TO_MANY_BSYNC
TRISTAR_TO_AOP_INT
AOP_TO_MAGGIE_EN

PHOSPHORUS_TO_AOP_INT_L
SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L

BOT_ACCEL_GYRO_TO_AOP_DATARDY

AUDIO_TO_AOP_INT_L

AOP_TO_MESA_I2C_ISO_EN

PMU_TO_AOP_IRQ_L

CM16
CM29

CK12
CK16
CK18

CJ29
CG31
CH31

CK20

CJ31

CK27
CK24
CK29
CK22

CM12

CK31

CG33

CJ33

CAYMAN-2GB-20NM-DDR-M

AOP_DDR_REQ
AOP_DDR_RESET*

AOP_FUNC_0
AOP_FUNC_1
AOP_FUNC_2
AOP_FUNC_3
AOP_FUNC_4
AOP_FUNC_5
AOP_FUNC_6
AOP_FUNC_7
AOP_FUNC_8
AOP_FUNC_9
AOP_FUNC_10
AOP_FUNC_11
AOP_FUNC_12
AOP_FUNC_13
AOP_FUNC_14
AOP_FUNC_15

U0700

CSP

SYM 7 OF 16

CFSB_AOP

AWAKE_REQ

AWAKE_RESET*

AOP_PDM_CLK0
AOP_PDM_DATA0
AOP_PDM_DATA1

RT_CLK32768

AOP_SWD_TCK_OUT

AOP_SWD_TMS0
AOP_SWD_TMS1

SWD_TMS2
SWD_TMS3

CH35
CM31

CJ37
CM37

CH41
CK39

CM33
CL14

CL16
CG35
BU4
BV3

PP1V8

NOSTUFF

1

R1304

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

PMU_TO_SYSTEM_COLD_RESET_L
AOP_TO_PMU_ACTIVE_REQUEST

PMU_TO_AOP_TRISTAR_ACTIVE_READY

AOP_TO_MESA_BLANKING_EN

AOP_TO_WLAN_CONTEXT_B
AOP_TO_WLAN_CONTEXT_A

PMU_TO_AOP_CLK32K
SWD_AP_TO_MANY_SWCLK

HOMER_TO_AOP_WAKE_INT
SWD_AOP_BI_BB_SWDIO
SWD_AP_BI_NAND_SWDIO
SWD_AP_BI_HOMER_SWDIO

D

52 48 47 46 39

30 29 25 18 17 16 12 11 9 8 7 5

20 7

20

40 37 20 7

38

53

53

20

C

36

53

17

36

53 36 17

BB_SWDIO has pullup in Radio_MLB pages

B

#25756894:North Carbon R1

#25756894:South Carbon R2

24

24

SPI_AOP_TO_IMU_SCLK_R2

36 35 34 33

I2S_AOP_TO_MAGGIE_L26_MCLK

R1305

49.9

ROOM=SOC

1%

1/32W

MF

01005

21

R1306

49.9

ROOM=SOC

1%

1/32W

MF

01005

21

SPI_AOP_TO_IMU_SCLKSPI_AOP_TO_IMU_SCLK_R1

R1303

33.2

1%

1/32W

MF

01005

ROOM=SOC

I2C_AOP_SCL

48

48

I2C_AOP_SDA

24

SPI_IMU_TO_AOP_MISO
SPI_AOP_TO_IMU_MOSI

24

UART_BB_TO_AOP_RXD

53

53

UART_AOP_TO_BB_TXD

36

MAGGIE_TO_AOP_INT

36

UART_AOP_TO_MAGGIE_TXD
UART_TOUCH_TO_AOP_RXD

39

39

UART_AOP_TO_TOUCH_TXD

32

I2S_CODEC_XSP_TO_AOP_BCLK
I2S_CODEC_XSP_TO_AOP_DIN

32

21

I2S_AOP_TO_MAGGIE_L26_MCLK_R
I2S_CODEC_XSP_TO_AOP_LRCLK

32

32

I2S_AOP_TO_CODEC_XSP_DOUT

CM11

CJ24

CJ18
CJ27
CJ16

CK14

CJ20
CJ22

CL11

CG29

CH29

CL35
CJ39

CM35

CK37

CG39

AOP_I2C0_SCL
AOP_I2C0_SDA

AOP_SPI_MISO
AOP_SPI_MOSI
AOP_SPI_SCLK

AOP_UART0_RXD
AOP_UART0_TXD

AOP_UART1_RXD
AOP_UART1_TXD

AOP_UART2_RXD
AOP_UART2_TXD

AOP_I2S_BCLK
AOP_I2S_DIN
AOP_I2S_MCK
AOP_I2S_LRCK

AOP_I2S_DOUT

DOCK_ATTENTION

DOCK_CONNECT

CG41
CL37

AOP_TO_SPKAMP1_ARC_RESET_L

MESA_TO_AOP_FDINT

B

35 34

38

DOCK_CONNECT can be GPIO, but input only. Radar 21680759

A

SYNC_MASTER=Sync

PAGE TITLE

SOC:AOP

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

13 OF 53
13 OF 81

D

SYNC_DATE=06/06/2016

A

SOC - CPU, GPU & SOC RAILS

345678

2 1

D

C

B

PP_CPU_VAR

1.06V @17.4A MAX

0.9V @tbd A MAX

0.625V @tbd A MAX

1

C1401

15UF

20%

6.3V

2

X5R
0402-1

ROOM=SOC

C1404

7.5UF

20%

4V

CERM CERM

1

432

ROOM=SOC

C1405

4.3UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1406

0.47UF

20%

6.3V
CERM
0402

1

432

1

2

ROOM=SOC

C1411

7.5UF

1

ROOM=SOC

C1412

4.3UF

1

ROOM=SOC

C1413

0.47UF

1

1.06V @1.0A MAX

0.80V @TBDA MAX

18

PP_CPU_SRAM_VAR

ROOM=SOC

C1407

7.5UF

20%

4V
CERM
0402

1

1.03V @1.44A MAX

0.92V @1.50A MAX

0.80V @TBD A MAX

18

PP_GPU_SRAM_VAR

3

4

2

18 14

C1408

15UF

20%

6.3V
X5R
0402-1

20%

4V

0402

432

20%

4V
CERM
0402

432

20%

6.3V
CERM
0402

432

ROOM=SOC

C1435

7.5UF

20%

4V

CER

0402

1

4

2

ROOM=SOC

C1439

7.5UF

20%

4V

CER

0402

1

1

2

ROOM=SOC

C1417

7.5UF

1

ROOM=SOC

C1418

1UF

20%

CERM
0402

1

ROOM=SOC

C1419

0.47UF

20%

6.3V
CERM
0402

1

3

C1434

15UF

20%

6.3V
X5R
0402-1

20%

4V
CERM
0402

432

4V

432

432

18

ROOM=SOC

C1433

7.5UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1437

7.5UF

20%

4V
CERM
0402

1

1

2

ROOM=SOC

C1422

4.3UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1423

1UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1424

0.47UF

20%

6.3V
CERM
0402

1

432

ROOM=SOC

C1427

4.3UF

20%

4V
CERM
0402

1

ROOM=SOC

C1428

1UF 1UF

20%

4V
CERM
0402

1

ROOM=SOC

C1460

7.5UF

20%

4V
CERM
0402

1

BUCK0_PP_CPU_FB

C1458

1

10UF

20%

2

6.3V
CERM-X5R
0402-9

ROOM=SOC

1

C1459

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

C1449

2.2UF

20%

6.3V
X5R-CERM
0201-1

ROOM=SOC

ROOM=SOC

C1430

4.3UF

20%

CERM
04020402

1

432

ROOM=SOC

C1431

20%

CERM
0402

1

432

ROOM=SOC

C1461

7.5UF

20%

CERM
0402

1

432

OMIT

XW1402

SHORT-20L-0

NO_XNET_CONNECTION

2 1

ROOM=SOC

4V

432

4V

432

4V

432

.05MM-SM

AD10
AD15
AD19
AD23

AF13
AF17
AJ23
AL21

AL8
AN10
AN19
AN23
AR13
AR17
AR21
AU10
AU15

AW13
AW17
AW21

BA10
BA23
BD21

BD8
BF10
BF23

BH13
BH17
BH21
BK10
BK15

AJ10

AF8

AN15

AR8

AU19

AW8
BA15
BA19

BH8

AF43
AF47
AF51

P17
P21
P25
P30
P34
P38
P43
P47
P51
Y15
Y19
Y23
Y40
Y45
Y49
Y53

CAYMAN-2GB-20NM-DDR-M

VDD_CPU

VDD_CPU_SRAM

VDD_GPU_SRAM

U0700

CSP

SYM 8 OF 16

VDD_GPU

VDD_CPU_SENSE

VSS_CPU_SENSE

VDD_GPU_SENSE

VDD_SOC_SENSE

VSS_SENSE

AB13
AB17
AB21
AB25
AB43
AB47
AB51
AB55
AD40
AD45
AD49
AD53
AF55
AJ40
AJ49
AJ53
J25
J30
J38
J43
J47
J51
L15
L19
L23
L28
L32
L36
L40
L45
L49
L53
P13
T15
T36
T40
T53
V13
V25
V34
V38
V51
V55
Y28

BK23

BK21

TP_AP_VSS_CPU_SENSE

AJ45

AL47

TP_VDD_SOC_SENSE

AJ47

TP_VSS_SENSE

1

2

ROOM=SOC

C1402

4.3UF

20%

4V
CERM
0402

1

432

OMIT

NO_XNET_CONNECTION

C1414

15UF

20%

6.3V
X5R
0402-1

ROOM=SOC

PP1401

P2MM-NSM

ROOM=SOC

PP1402

P2MM-NSM

ROOM=SOC

XW1401

SHORT-20L-0.05MM-SM

ROOM=SOC

1

C1466

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

ROOM=SOC

SM

PP

SM

PP

21

C1409

4.3UF

20%

4V
CERM
0402

1

432

1

1

1

1

1

1

2

ROOM=SOC

C1452

4.3UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1410

1UF

20%

4V
CERM
0402

1

432

SM

PP

SM

PP

SM

PP

PP_GPU_VAR

PP_CPU_VAR

BUCK1_PP_GPU_FB

C1448

2.2UF

20%

6.3V
X5R-CERM
0201-1

ROOM=SOC

ROOM=SOC

C1454

4.3UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1415

1UF

20%

4V
CERM
0402

1

432

PP1403

P2MM-NSM

ROOM=SOC

PP1410

P2MM-NSM

ROOM=SOC

PP1411

P2MM-NSM

ROOM=SOC

ROOM=SOC

C1416

7.5UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1420

1UF

20%

4V
CERM
0402

1

432

1

1

18 14

18 14

18

ROOM=SOC

C1421

7.5UF

20%

4V
CERM
0402

1

432

ROOM=SOC ROOM=SOC

ROOM=SOC

C1426

1

C1425

0.47UF

20%

6.3V
CERM
0402

1

432

AP_VDD_CPU_SENSE

SM

PP1408

PP

P2MM-NSM

ROOM=SOC

AP_VDD_GPU_SENSE

SM

PP1409

PP

P2MM-NSM

ROOM=SOC

7.5UF

20%

4V
CERM
0402

432

C1429

0.47UF

20%

6.3V
CERM
0402

1

20

20

432

ROOM=SOC

C1432

7.5UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1456

0.47UF

6.3V
CERM
0402

1

1.03V @12.9A MAX

0.92V @10.7A MAX

0.80V @TBD A MAX

0.67V @TBD A MAX

PP_GPU_VAR

ROOM=SOC

C1457

0.47UF

1

20%

6.3V
CERM
0402

432

20%

432

PP_SOC_VAR

18

0.80V @4.1A MAX

1

C1436

10UF

20%

2

6.3V
CERM-X5R
0402-9

ROOM=SOC

1

C1444

10UF

20%

2

6.3V
CERM-X5R
0402-9

ROOM=SOC

1

C1403

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

ROOM=SOC

OMIT

XW1403

SHORT-20L-0

NO_XNET_CONNECTION

ROOM=SOC

C1465

4.3UF

20%

1

4V
CERM
0402

432

BK45
BK49
BK53
BM55
BP15
BP19
BP23
BP28
BP32
BP36
BP40
BP45
BP49
BP53
BP58
BT13
BT17
BT21
BT25
BT30
BT34
BT38
BT43
BT47
BT51
BT55
BW10
CA13
CA17
CA21
CA25
CA30
CA34
CA38
CA43
CA47
CE13
CE17
CE45
J13
J21
J34
P55
T10
T60
V30
Y10
Y36
Y60
BF40
J60

AW25

18 14

AD28
AD32
AF60

AJ28
AJ32
AJ36

AL6
AN28
AN32
AN36
AN40
AN45
AN49
AN53
AN58
AR25
AR30
AR34
AR38
AR43
AR47
AR51
AR55

AW30
AW34
AW38
AW43
AW47
AW51
AW55
AW60

BD25
BD30
BD34
BD38
BD43
BD47
BD51
BD55

BD6
BD60
BF28
BF32
BF36
BF45
BF49
BF53
BF58
BK28
BK32
BK36
BK40

CAYMAN-2GB-20NM-DDR-M

VDD_SOC

U0700

CSP

SYM 9 OF 16

VDD_SOC

0.67V @TBDA MAX

.05MM-SM

21

ROOM=SOC

BUCK2_PP_SOC_FB

C1438

1UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1440

7.5UF

20%

4V
CERM
0402

1

432

18

ROOM=SOC

C1442

0.47UF

20%

6.3V
CERM
0402

1

432

D

C

B

A

432

432

SYNC_MASTER=Sync

PAGE TITLE

SOC:POWER (1/3)

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

14 OF 53
14 OF 81

D

SYNC_DATE=06/06/2016

A

SOC - POWER SUPPLIES

345678

2 1

DDR IMPEDANCE CONTROL

D

C

B

18 10 9 8 7

TBD-TBDV @1.9A MAX

PP0V9_SOC_FIXED

ROOM=SOC

C1502

4.3UF

20%

4V
CERM
0402

1

432

C1501

1

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

ROOM=SOC

C1527

1UF

20%

4V
CERM
0402

1

432

ROOM=SOC

C1503

7.5UF

20%

4V
CERM
0402

1

0.797-0.945V @9 mA MAX

0.765-0.840V @60mA MAX

19

PP0V8_AOP

1

C1504

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

1.06-1.17V @0.85A MAX

18 15 7

AB30
AB34
AB38
AD58

AF25

432

AF30
AF34
AF38
AF62
AJ58
AL25
AL30
AL34
AL38
AL43
AL51
AL55

AL60
AR60
AU28
AU32
AU36
AU40
AU45
AU49
AU53
AU58

AU6
BA28
BA32
BA36
BA40
BA45
BA49
BA53
BA58
BH25
BH30
BH34
BH38
BH43
BH47
BH51
BH55
BK58

AW23

CC36
CE30
CE40

VDD_FIXED

VDD_FIXED_CPU

VDD_LOW

PP1V1

1

C1506

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

1

2

U0700

CAYMAN-2GB-20NM-DDR-M

CSP

SYM 10 OF 16

VDD_FIXED

C1528

10UF

20%

6.3V
CERM-X5R
0402-9

ROOM=SOC

BK6
BM13
BM17
BM21
BM25
BM30
BM34
BM38
BM43
BM47
BM51
BP10
BP60
BW15
BW19
BW23
BW28
BW32
BW36
BW40
BW45
BW49
BW53
BW58
BW8
CC10
CC15
CC19
CC23
CC28
CC32
CC45
G32
G36
J17
J23
J55
J62
L10
L58
L60
T32
T58
T8
Y58
Y8

1

C1518

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

1

C1519

2.2UF

20%

6.3V
X5R-CERM

2

0201-1

ROOM=SOC

1

C1514

2.2UF

20%

6.3V
X5R-CERM

2

0201-1

ROOM=SOC

1

C1522

2.2UF

20%

6.3V
X5R-CERM

2

0201-1

ROOM=SOC

BE1

BJ1
BL1

BM8

BP6

BT8

BW6

CA8
CC6
CD1
CH1

BE67
BH60

BJ67

BK62

BL67

BM60

BP62

BT60

BW62

CD67
CH67

AB8
AC1
AE1
AH1

E1
K1

L6
P8
T6
V8
Y6

AB60
AC67
AD62
AE67
AH67

E67
K67
P60
T62
V60
Y62

VDDIO11_DDR0

VDDIO11_DDR1

VDDIO11_DDR2

VDDIO11_DDR3

U0700

CAYMAN-2GB-20NM-DDR-M

CSP

SYM 11 OF 16

VDDIO11_RET_DDR0
VDDIO11_RET_DDR1
VDDIO11_RET_DDR2
VDDIO11_RET_DDR3

DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF

DDR0_ZQ
DDR3_ZQ

DDR0_RET*
DDR1_RET*
DDR2_RET*
DDR3_RET*

VDDIO11_PLL_DDR0
VDDIO11_PLL_DDR1
VDDIO11_PLL_DDR2
VDDIO11_PLL_DDR3

DDR0_SYS_ALIVE
DDR1_SYS_ALIVE
DDR2_SYS_ALIVE
DDR3_SYS_ALIVE

VDD2

18 15 7

CD3
BY64
K3
K65

BN2
AA66

CF3
CB65
K4
K64

CE8
BW60
J8
P58

CG3
CD65
H4
H64

CF4
CB64
H3
H65

AM3
AM65
BB3
BB65
BR1
BR67
BV1
BV67
BY1
BY67
C2
C66
CJ2
CJ66
CK2
CK66
D2
D66
N1
N67
R1
R67
W1
W67

PP1V1

1

R1501

240

1%
1/32W
MF
01005

2

ROOM=SOC

DDR0_RREF
DDR1_RREF
DDR2_RREF
DDR3_RREF

DDR0_ZQ
DDR3_ZQ

PMU_TO_AOP_SLEEP1_READY

1.06 - 1.17V @4mA MAX

PP1V1_DDR_PLL

C1508

1

0.22UF

20%

2

6.3V
X5R
01005-1

ROOM=SOC

(CURRENT INCLUDED IN VDD2)

C1509

1

0.22UF

20%

2

6.3V
X5R
01005-1

ROOM=SOC

PP1V1_SDRAM

SYSTEM_ALIVE

1.06 - 1.17V @1.74A MAX

C1512

1

10UF

20%

2

6.3V
CERM-X5R
0402-9

ROOM=SOC

C1513

1

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

21 20 17

1

R1502

240

1%
1/32W
MF
01005

2

ROOM=SOC

C1523

1

0.22UF

20%

6.3V

2

X5R
01005-1

ROOM=SOC

C1507

1

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=SOC

19 18 15

1

R1503

240

1%
1/32W
MF
01005

2

ROOM=SOC

20 13

1

2

1

R1504

240

1%
1/32W
MF
01005

2

ROOM=SOC

FL1501

100OHM-25%-0.12A

01005

C1510

0.22UF

20%

6.3V
X5R
01005-1

ROOM=SOC

C1529

1

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=SOC

ROOM=SOC

R1505

1

240

1%
1/32W
MF
01005

ROOM=SOC

2

21

PP1V1

PP1V1_SDRAM

C1511

1

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=SOC

R1506

1

240

1%
1/32W
MF
01005

ROOM=SOC

2

C1515

1

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=SOC

D

18 15 7

C

19 18 15

B

A

SYNC_MASTER=Sync

PAGE TITLE

SOC:POWER (2/3)

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

15 OF 53
15 OF 81

D

SYNC_DATE=06/06/2016

A

D

C

B

SOC - POWER SUPPLIES

A12
A16

A2
A20
A24
A27
A31
A35

A5
A52
A56
A59
A63
A66

A9

AA1
AA67
AB10
AB15
AB19
AB23
AB28
AB32
AB36
AB40
AB45
AB49
AB53
AB58

AB6
AB62

AC2

AC4
AC64
AC66
AD13
AD17
AD21
AD25
AD30
AD34
AD43
AD47
AD51
AD55
AD60

AD8

AF10
AF15
AF19
AF23
AF28
AF32
AF36
AF40
AF45
AF49
AF53
AF58

AF6
AG1
AG3

AG65
AG67

AJ21
AJ25
AJ30
AJ34
AJ38
AJ43

AL10

AJ51
AJ55

AJ8
AK1
AK2

AK66
AK67

U0700

CAYMAN-2GB-20NM-DDR-M

CSP

SYM 13 OF 16

VSS VSS

AL23
AL28
AL32
AL36
AL40
AL45
AL53
AL58
AL62
AN13
AN17
AN21
AN25
AN30
AN34
AN38
AN43
AN47
AN51
AN55
AN60
AN8
AP1
AP4
AP64
AP67
AR10
AR15
AR19
AR28
AR32
AR36
AR40
AR45
AR49
AR53
AR58
AR6
AR62
AT1
AT3
AT65
AU13
AU17
AU21
AU25
AU30
AU34
AU38
AU43
AU47
AU51
AU55
AU60
AU8
AV1
AV2
AV4
AV64
AV66
AW10
AW15
AW19
CH50
AW28
AW32
AW36

AW40

AW45
AW49
AW53
AW58
AW6
AW62
AY1
AY4
AY64
AY67

B1

B3
B35
B41
B46
B52
B65
B67

BA13
BA17
BA21
BA30
BA34
BA38
BA43
BA47
BA51
BA55
BA60

BA8
BC1
BC2

BC66
BC67
BD10
BD23
BD28
BD32
BD36
BD40
BD45
BD49
BD53
BD58
BD62

BF21
BF25
BF30
BF34
BF43
BF47
BF51
BF55

BF8
BG1
BG3

BG65
BG67

BH10
BH15
BH19
BH23
BH28
BH32
BH36
BH40
BH45
BH49
BH53
BH58

BH6

BH62
BK13
BK17

AL49
BK25
BK30
BK34
BK38
BK43
BK47
BK51
BK55
BK60

BK8

BL2
BL4

BL64

U0700

CSP

SYM 14 OF 16

VSS VSS

BL66
BM10
BM15
BM19
BM23
BM28
BM32
BM36
BM40
BM45
BM49
BM53
BM58
BM6
BM62
BN1
BN67
BP13
BP17
BP21
BP25
BP30
BP34
BP38
BP43
BP47
BP51
BP55
BP8
BR3
BR65
BT10
BT15
BT19
BT23
BT28
BT32
BT36
BT40
BT45
BT49
BT53
BT58
BT6
BT62
BU1
BU67
BV2
BV4
BV64
BV66
BW13
BW17
BW21
BW25
BW30
BW34
BW38
BW43
BW47
BW51
CE51
BY65
C11
C14
C18
C22
C26
C29
C33
C35
C4
C52
C54
C57
C61
C64
C7
CA10

CA15
CA19
CA23
CA28
CA32
CA36
CA40
CA45
CA49
CA53
CA58

CA6

CA62

CB1

CB3
CB66
CB67

CC13
CC17
CC21
CC30
CC34
CC38
CC43

CL22

T30
CC8
CD2
CD4

CD64
CD66

CE10
CE15
CE47
CE53

CE6

CE62

CF1

CF2
CF64
CF65
CF66
CF67

CG1

CG11

CG2
CG24
CG27

CG4
CG42
CG44
CG46
CG48

CG5
CG52
CG54
CG56
CG59
CG61
CG64
CG65
CG66
CG67
CH12
CH18

CH2
CH24
CH27

CH3
CH33
CH39

CH4
CH42
CH44
CH46
CH48

345678

2 1

1.70-1.95V @134mA MAX

CH5

U0700

CAYMAN-2GB-20NM-DDR-MCAYMAN-2GB-20NM-DDR-M

SYM 15 OF 16

VSSVSS

CH52
CH54
CH56
CH59
CH61
CH63
CH64
CH65
CH66
CH7
CH9
CJ1
CJ3
CJ4
CJ41
CJ42
CJ46
CJ5
CJ50
CJ54
CJ57
CJ61
CJ64
CJ65
CJ67
CK4
CK41
CK42
CK46
CK5
CK50
CK54
CK57
CK61
CK64
CL1
CL12
CL18
CL24
CL27
CL3
CL33
CL39
CL4
CL41
CL44
CL48
CL52
CL56
CL59
CL63
CL65
CL67
CL7
CM18
CM2
CM24
CM27
CM39
CM4
CM41
CM44
CM48
CM5
CM52
CM56
CM59
CM63
CM66
D1
D11
D12
D14
D16
D18

D20
D22
D24
D26
D27
D29

D3
D31
D35

D4
D41
D46

D5
D52
D56
D59
D63
D65
D67

D7

D9

E12
E14
E18

E2

E20
E22
E26
E27
E29

E3

E37

E4

E5

E54
E57
E59
E61
E64
E65
E66

E7

E9

F1
F2
F3

F4
F64
F65
F66
F67

G38
G43
G47
G51

G8
H1

H2
H66
H67

J10
J15
J19
J28
J32
J40
J45
J49
J53

J6

K2

K66

L13
L17
L21
L25
L30
L34

U0700

CAYMAN-2GB-20NM-DDR-M

CSPCSP

SYM 16 OF 16

L38
L43
L47
L51
L55
L62
L8
M1
M2
M3
M4
M64
M65
M66
M67
P10
P15
P19
P23
P28
P32
P36
P40
P45
P49
P53
P6
P62
R2
R4
R64
R66
T13
T25
T34

VSSVSS

T38
T51
T55
U1
U67
V10
V15
V28
V32
V36
V40
V53
V58
V6
V62
W3
W65
Y13
Y17
Y21
Y25
Y30
Y43
Y47
Y51
Y55
BF38
J58

46 41 40 37 36 32 21 20 18 16

29 25 18 17 13 12 11 9 8 7 5

46 41 40 37 36 32 21 20 18 16

19 10 8

PP1V2_SOC

53 52 48 47

52 48 47 46 39 30

53 52 48 47

19

C1604

2.2UF

X5R-CERM

ROOM=SOC

PP1V8_SDRAM

1.62-1.98V @43mA MAX

PP1V8

PP1V8_SDRAM

1

C1603

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

PP1V2_REF

R1602

0.00

1/32W
01005

ROOM=SOC

R1601

0.00

1/32W
01005

ROOM=SOC

20%

6.3V

0201-1

1

2

0%
MF

0%
MF

1

C1601

0.1UF

20%

6.3V
X5R-CERM

2

01005

ROOM=SOCROOM=SOC

1

C1615

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

1

C1602

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=SOC

1

2

1

2

C1611

1

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=SOC

VDD12_PLL_CPU:1.14-1.26V @13mA MAX

21

PP1V2_PLL_CPU

C1606

1

0.1UF

20%

2

6.3V
X5R-CERM
01005

ROOM=SOC

VDD12_PLL_SOC:1.14-1.26V @31mA MAX

PP1V2_PLL_SOC

21

C1605

2.2UF

20%

6.3V
X5R-CERM
0201-1

ROOM=SOC

C1607

2.2UF

20%

6.3V
X5R-CERM
0201-1

ROOM=SOC

1

C1608

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

1

C1610

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

1.62-1.98V @10mA MAX

1.62-1.98V @2mA MAX

1.62-1.98V @1mA MAX

1.62-1.98V @1mA MAX

TBD-TBDV @30mA MAX

1

C1609

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

1

C1612

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

1

C1614

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SOC

C1613

1

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

AM1

AM67

BB1

BB67

C3

C65

CK3

CK65

AJ62
AN62
AU62
BA62

BF62

G40
G45
G49
G53

AD6

AJ6
AN6
BA6

BF6

CE19
CE23

CE28
CE32
CE34
CE36
CE43
CE38

AR23
BK19

AF21

J36

CE21

BF60

CG9

CC40

AU23

T28

Y38

BA25

Y32

AD36
AD38

Y34

CAYMAN-2GB-20NM-DDR-M

VDD1

VDDIO18_GRP1

VDDIO18_GRP2

VDDIO18_GRP3

VDDIO18_GRP4

VDDIO18_GRP10

VDD18_TSADC0
VDD18_TSADC1
VDD18_TSADC2
VDD18_TSADC3
VDD18_TSADC4
VDD18_TSADC5

VDD18_FMON

VDD18_LPOSC

VDD12_CPU_UVD
VDD12_GPU_UVD
VDD12_SOC_UVD

VDD12_PLL_CPU

VDD12_PLL_SOC

U0700

CSP

SYM 12 OF 16

VDD18_EFUSE1
VDD18_EFUSE2

D

CKPLUS_WAIVE=PWRTERM2GND
CKPLUS_WAIVE=PWRTERM2GND

CG7
G34

C

B

A

SYNC_MASTER=Sync

PAGE TITLE

SOC:POWER (3/3)

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

16 OF 53
16 OF 81

D

SYNC_DATE=06/06/2016

A

345678

2 1

D

25 18 17 16 13 12 11 9 8 7 5

52 48 47 46 39 30 29

315mA MAX

PP1V8

1

C1701

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1739

1.0UF

20%

2

6.3V
X5R
0201-1

ROOM=NAND

R1703

24.9

1%

1/32W

MF

01005

ROOM=NAND

PP1V8_NAND_AVDD

21

17

1

C1741

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=NAND

NAND_AGND

1

C1707

15UF

20%

6.3V
X5R

2

0402-1

ROOM=NAND

1

C1743

1.0UF

20%

2

6.3V
X5R
0201-1

ROOM=NAND

1

C1726

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=NAND

1

C1729

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1745

1.0UF

20%

2

6.3V
X5R
0201-1

ROOM=NAND

1

C1710

0.1UF

20%

6.3V
X5R-CERM

2

01005

ROOM=NAND

1

C1730

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

1

C1747

1.0UF

20%

2

6.3V
X5R
0201-1

ROOM=NAND

PROBE POINTS

17 8

90_PCIE_AP_TO_NAND_REFCLK_P

90_PCIE_AP_TO_NAND_REFCLK_N

17 8

D

SM

1

1

PP1701

PP

P2MM-NSM

ROOM=NAND

SM

PP1702

PP

P2MM-NSM

ROOM=NAND

C

PP0V9_NAND

19

1007mA MAX

C1737

1

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=NAND

1

C1708

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND

1

C1704

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

C1738

1

1.0UF

20%

2

6.3V
X5R
0201-1

ROOM=NAND

1

C1711

22PF

5%
16V

2

CERM
01005

ROOM=NAND

1

C1702

15UF

20%

6.3V
X5R

2

0402-1

ROOM=NAND

C1740

1

1.0UF

20%

2

6.3V
X5R
0201-1

ROOM=NAND

1

C1717

68PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

1

C1705

15UF

20%

6.3V
X5R

2

0402-1

ROOM=NAND

C1742

1

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=NAND

1

C1723

39PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

C1722

1

15UF

20%

6.3V

2

0402-1

ROOM=NAND

C1744

1

1.0UF

20%

2

6.3V
X5R
0201-1 0201-1

ROOM=NAND

1

C1712

2

C1727

1

15UF

20%

6.3V

2

X5RX5R
0402-1

ROOM=NAND

C1746

1

2

100PF

5%
16V
NP0-C0G
01005

ROOM=NAND

1.0UF

20%

6.3V
X5R

ROOM=NAND

#24543147:10uF for 32GB
#26326159:10uF for C1719

OMIT

1

C1748

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

OMIT

1

C1713

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

OMIT

1

C1716

15UF

20%

6.3V

2

X5R
0402-1

1

C1719

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=NANDROOM=NAND

1230mA MAX (1us peak power)

PP3V0_NAND

OMIT

1

C1721

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

OMIT

1

C1733

15UF

20%

6.3V

2

X5R
0402-1

ROOM=NAND

C

B

C1703

1

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND

C1706

1

22PF

5%
16V

2

CERM
01005

ROOM=NAND

25 18 17 16 13 12 11 9 8 7 5

52 48 47 46 39 30 29

1

R1704

3.01K

1%
1/32W
MF
01005

ROOM=NAND

2

C1709

1

100PF

5%

2

16V
NP0-C0G
01005

ROOM=NAND

PP1V8

C1714

1

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND

1

C1724

0.01UF

10%

6.3V

2

X5R
01005

ROOM=NAND

1

C1725

0.01UF

10%

2

6.3V
X5R
01005

ROOM=NAND

C1720

1

100PF

5%

2

16V
NP0-C0G
01005

ROOM=NAND

11

AP_TO_NAND_SYS_CLK

17 8

90_PCIE_AP_TO_NAND_REFCLK_P

17 8

90_PCIE_AP_TO_NAND_REFCLK_N

8

PCIE_NAND_BI_AP_CLKREQ_L

C1728

1

68PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

PCIE_NAND_RESREF

8

90_PCIE_AP_TO_NAND_TXD_P

8

90_PCIE_AP_TO_NAND_TXD_N

8

90_PCIE_NAND_TO_AP_RXD_P
90_PCIE_NAND_TO_AP_RXD_N

8

NAND_VREF

NC
NC

NC
NC

M4

PCI_AVDD_CLK1

D2

CLK_IN

H8

PCIE_REFCLK_P

H6

PCIE_REFCLK_M

G9

PCIE_CLKREQ*

M6

PCI_RESREF

M8

PCIE_RX0_P

K8

PCIE_RX0_M

N5

PCIE_RX1_P

N3

PCIE_RX1_M

P8

PCIE_TX0_P

N7

PCIE_TX0_M

M2

PCIE_TX1_P

K2

PCIE_TX1_M

K6

K4

J7

J5

PCI_VDD2

PCI_VDD1

PCI_AVDD_H

PCI_AVDD_CLK2

C3

E5

AVDD1

A3

VREF

OB0

A5

R7

R3

J9

J1

F2

A7

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDDIO

U1701

THGBX6T1T82LFXF

VLGA

VER-1

ROOM=NAND

BOMOPTION=OMIT_TABLE

CRITICAL

OB10

VDDIO

VDDIO

OF10

OF0

VDDIO

VDDIO

R5

VDDIO

OA0

VCC

OD0

OA10

VCC

OD10

VCC

VCC

OG10

OG0

VCC

VCC

EXT_D0
EXT_D1
EXT_D2
EXT_D3
EXT_D4
EXT_D5
EXT_D6

EXT_D7
EXT_NCE
EXT_NRE

EXT_NWE

EXT_RNB

EXT_CLE
EXT_ALE

G3
J3
H2
E3
E7
F6
C7
B8

G1
F4
C5
G5
H4
D4

1

C1749

1.0UF 1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=NAND

1

C1715

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND

1

C1750

20%

6.3V

2

X5R
0201-1

ROOM=NAND

1

C1718

22PF

5%
16V

2

CERM
01005

ROOM=NAND

PMU_TO_NAND_LOW_BATT_BOOT_L
AP_TO_NAND_FW_STRAP

NC
NC
NC
NC
NC

SYSTEM_ALIVE
PCIE_AP_TO_NAND_RESET_L
SWD_AP_BI_NAND_SWDIO_R
SWD_AP_NAND_SWCLK_R

NC
NC

1

C1751

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=NAND

1

C1731

68PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

ROOM=NAND

ROOM=NAND

1/32W 0%

1

C1752

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=NAND

1

C1732

39PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

20

12

8

0.00

0%

0.00

1

C1753

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=NAND

1

C1734

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

1

C1754

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=NAND

1

C1735

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NAND

1

C1736

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NAND

B

21 20 15

R1702

21

01005 MF1/32W

R1707

21

01005 MF

SWD_AP_BI_NAND_SWDIO
SWD_AP_TO_MANY_SWCLK

13

53 36 13

A

F8
D8
D6

RESET*
TRST*
ZQ

SYNC_MASTER=Sync

PAGE TITLE

7

AP_TO_NAND_RESET_L

NC

NAND_ZQ

NAND

1

R1701

34.8

0.5%
1/32W
MF
01005

2

ROOM=NAND

NAND_AGND

17

VSSA

B2

VSS

B4

VSS

B6

VSS

VSS

G7

OE10

VSS

L3

VSS

L5

VSS

L7

P2

VSS

P4

VSS

P6

VSS

OC0

8 7 5 4 2 1

VSS

OC10

VSS

OE0

VSS

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

REVISION

BRANCH

PAGE

SHEET

36

051-00482

8.0.0

17 OF 53
17 OF 81

D

SYNC_DATE=06/06/2016

A

345678

2 1

D

C

B

A

BUCK5

3.2A MAX

BUCK6

1.5A MAX

BUCK7

1.5A MAX

BUCK8

1.5A MAX

BUCK9

0.75A MAX

15 10 9 8 7

30 25

28 27 26 25 23 21 19 10 9 4

46 41 40 39 37 35 34 33 31 30

1

C1867

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

PP1V25_BUCK

19

PP_CPU_SRAM_VAR

14

0.80V - 1.06V

PP_GPU_SRAM_VAR

14

0.80V - 0.92V

PP2V8_UT_AF_VAR

53

1

C1840

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1811

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C1868

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C1869

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

1

C1870

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

PP_VDD_MAIN

1

C1875

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1876

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1801

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1846

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C1847

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1848

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1803

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1804

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1805

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1806

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1862

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1850

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C1851

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1852

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1877

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1807

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1808

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1809

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1810

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1863

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

VDD_MAIN_SNS

19

1

C1853

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C1854

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1855

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1849

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

D10/D101:#24681501,TY ONLY, D11/D11: Both Vendor

CRITICAL

1

C1857

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=PMU

1

C1858

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1859

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1856

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

L1803

1.0UH-3.6A-0.06OHM

CRITICAL

2 1

MEKK2016T-SM

NO_XNET_CONNECTION=1

ROOM=PMU

OMIT

XW1802

SHORT-20L-0.05MM-SM

2 1

L1804

BUCK5_LX0PP0V9_SOC_FIXED

BUCK5_FB

NO_XNET_CONNECTION=1ROOM=SOC

1UH-20%-2.1A-0.12OHM

CRITICAL

2 1

PIQA20121T-SM

ROOM=PMU

OMIT

XW1807

SHORT-20L-0.05MM-SM

2 1

ROOM=SOC

L1805

BUCK6_LX0

BUCK6_FB

NO_XNET_CONNECTION=1

1.0UH-20%-2.25A-0.086OHM

2 1

SHORT-20L-0.05MM-SM

CRITICAL

MCFE2016T-SM

ROOM=PMU

OMIT

XW1803

2 1

ROOM=SOC NO_XNET_CONNECTION=1

L1801

BUCK7_LX0

BUCK7_FB

1UH-20%-2.1A-0.12OHM

CRITICAL

2 1

PIQA20121T-SM

ROOM=PMU

OMIT

XW1801

SHORT-20L-0.05MM-SM

2 1

ROOM=SOC

NO_XNET_CONNECTION=1

L1802

BUCK8_LX0

BUCK8_FB

1.0UH-20%-1.5A-0.161OHM

21

0603

OMIT

XW1806

SHORT-20L-0.05MM-SM

2 1

ROOM=SOC NO_XNET_CONNECTION=1

BUCK9_LX0

BUCK9_FB

M8

VDD_MAIN_SNS

N7

VDD_MAIN

H6

VDD_MAIN_E

F11

VDD_MAIN_N

R13

VDD_MAIN_SW

H14

VDD_MAIN_W

H13

VDD_MAIN_W

A5
B5
C5
D5

A9
B9
C9
D9

A17
B17
C17
D17

A13
B13
C13
D13

H1
H2
H3

T2
T3

M1
M2
M3

B1
C1
D1

K18
K19

U6
V6

F18
F19

L18
L19

B2
C2
D2
A2

F5

BUCK5_FB

J18
J19

H16

BUCK6_FB

U7
V7

R8

BUCK7_FB

G18
G19

H15

BUCK8_FB

M18
M19

P16

BUCK9_FB

VDD_BUCK0_01

VDD_BUCK0_23

VDD_BUCK1_01

VDD_BUCK1_23

VDD_BUCK2

VDD_BUCK3

VDD_BUCK4

VDD_BUCK5

VDD_BUCK6

VDD_BUCK7

VDD_BUCK8

VDD_BUCK9

BUCK5_LX0

BUCK6_LX0

BUCK7_LX0

BUCK8_LX0

BUCK9_LX0

U1801

D2333A1

WLCSP

SYM 2 OF 4

ROOM=PMU

BAT/USBBUCK INPUT

BUCK0_LX0

BUCK0_LX1

BUCK0_LX2

BUCK0_LX3

BUCK0_FB

BUCK1_LX0

BUCK1_LX1

BUCK1_LX2

BUCK1_LX3

BUCK1_FB

BUCK2_LX0

BUCK2_LX1

BUCK2_FB

BUCK3_LX0

BUCK3_FB

VBUCK3_SW

BUCK4_LX0

BUCK4_LX1

BUCK4_FB

VBUCK4_SW

BUCK3_SW1

BUCK3_SW2
BUCK3_SW3

SWITCH OUTPUTS

BUCK4_SW1

BUCK0_LX0

B4
C4
D4
A4

A6
B6
C6
D6

A8
B8
C8
D8

A10
B10
C10
D10

F10

BUCK0_PP_CPU_FB

B18
C18
D18
A18

A16
B16
C16
D16

A14
B14
C14
D14

A12
B12
C12
D12

F12

BUCK1_PP_GPU_FB

G1
G2
G3

J1
J2
J3

J5

BUCK2_PP_SOC_FB

R2
R3
R1
R7

U2
V2

N1
N2
N3

L1
L2
L3

K5

U5
V5

T1
U1

U3
V3

U4
V4

NO_XNET_CONNECTION=1

BUCK0_LX1

NO_XNET_CONNECTION=1

BUCK0_LX2

NO_XNET_CONNECTION=1

BUCK0_LX3

NO_XNET_CONNECTION=1

BUCK1_LX0

NO_XNET_CONNECTION=1

BUCK1_LX1

NO_XNET_CONNECTION=1

BUCK1_LX2

BUCK1_LX3

NO_XNET_CONNECTION=1

BUCK2_LX0

BUCK2_LX1

NO_XNET_CONNECTION=1

BUCK3_LX0

NO_XNET_CONNECTION=1

BUCK3_FB

NO_XNET_CONNECTION=1

BUCK4_LX0

NO_XNET_CONNECTION=1

BUCK4_LX1

NO_XNET_CONNECTION=1

BUCK4_FB

NO_XNET_CONNECTION=1 ROOM=SOC

L1806

1.0UH-20%-3.6A-0.060OHM

21

PIQA20161T-SM

ROOM=PMU

CRITICAL

L1807

0.22UH-20%-6.7A-0.023OHM

21

PINA20121T-SM

ROOM=PMU

CRITICAL

L1808

0.22UH-20%-6.7A-0.023OHM

2 1

PINA20121T-SM

ROOM=PMU

CRITICAL

L1809

0.22UH-20%-6.7A-0.023OHM

21

PINA20121T-SM

ROOM=PMU

14

CRITICAL

L1810

1.0UH-20%-3.6A-0.060OHM

21

PIQA20161T-SM

ROOM=PMU

CRITICAL

L1811

0.22UH-20%-6.7A-0.023OHM

21

PINA20121T-SM

ROOM=PMU

CRITICAL

L1812

0.22UH-20%-6.7A-0.023OHM

2 1

PINA20121T-SM

ROOM=PMUNO_XNET_CONNECTION=1

CRITICAL

L1813

0.22UH-20%-6.7A-0.023OHM

21

PINA20121T-SM

ROOM=PMU

14

CRITICAL

L1814

1.0UH-20%-3.6A-0.060OHM

21

PIQA20161T-SM

ROOM=PMU

CRITICAL

L1815

0.47UH-20%-3.8A-0.048OHM

2 1

PIQA20121T-SM

ROOM=PMU

14

L1816

CRITICAL

ROOM=PMU

1.0UH-20%-3.6A-0.060OHM

21

PIQA20161T-SM

OMIT

XW1804

SHORT-20L-0.05MM-SM

ROOM=SOC

CRITICAL

21

L1817

1.0UH-20%-3.6A-0.060OHM

21

PIQA20161T-SM

ROOM=PMU

CRITICAL

L1818

0.47UH-20%-3.8A-0.048OHM

2 1

PIQA20121T-SM

OMIT

ROOM=PMU

XW1805

SHORT-20L-0.05MM-SM

21

PP1V8

PP1V8_TOUCH
PP1V8_MAGGIE_IMU

PP1V1

CRITICAL

Voltages per Cayman Power Spec, Sec. 2.2, rev 0.9.2, #24557869

PP_CPU_VAR

1

C1818

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1819

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1825

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1826

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1831

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1832

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1837

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1838

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1842

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1843

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1844

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1845

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

2

0.625V - 1.06V

C1872

220PF

5%
10V
C0G-CERM
01005

ROOM=PMU

PP_GPU_VAR

1

C1813

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1814

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1820

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1821

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1827

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1828

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1833

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1834

15UF

20% 20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1839

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1866

15UF

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1865

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1873

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

0.67V - 0.92V

1.03V for overdrive only

PP_SOC_VAR

0.67V/0.80V

1

C1822

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1829

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1835

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1841

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1864

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1871

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

PP1V8_SDRAM

1

C1816

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1823

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1860

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

PP1V1_SDRAM

1

C1830

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

52 48 47 46 39

30 29 25 17 16 13 12 11 9 8 7 5

1

C1836

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1802

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1874

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

SYNC_MASTER=Sync

PAGE TITLE

1

C1861

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

14

14

14

13.4A MAX 4.7A MAX

BUCK0 BUCK2

D

13.4A MAX

BUCK1

C

(pending vendor qual)

53 52 48 47 46

19 15

41 40 37 36 32 21 20 16

1.7A MAX

4.7A MAX

B

BUCK4BUCK3

A

SYNC_DATE=06/06/2016

SYSTEM POWER:PMU (1/3)

DRAWING NUMBER SIZE

47 46 39 38

36 24

NOTICE OF PROPRIETARY PROPERTY:

15 7

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

Apple Inc.

R

051-00482

REVISION

8.0.0

BRANCH

PAGE

18 OF 53

SHEET

18 OF 81

D

8 7 5 4 2 1

36

345678

2 1

D

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

18

VDD_MAIN_SNS

20

PMU_PRE_UVLO_DET

53 46

PP_VDD_MAIN

OMIT

XW1901

SHORT-20L-0

2 1

ROOM=PMU

NO_XNET_CONNECTION

OMIT

XW1902

SHORT-20L-0.05MM-SM

2 1

ROOM=PMU

1

.05MM-SM

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

2

53 46

C1901

15UF

20%

6.3V
X5R
0402-1

ROOM=PMU

1

C1910

10UF

20%

6.3V

2

0402-9

ROOM=PMU

PP_VDD_MAIN

1

C1914

10UF

20%

6.3V
CERM-X5R

2

0402-9

ROOM=PMU

1

C1911

10UF

20%

6.3V

2

CERM-X5RCERM-X5R
0402-9

1

C1907

10UF

20%

6.3V
CERM-X5R

2

0402-9

ROOM=PMUROOM=PMU

LDO#

LDO1 (Ca)

LDO2 (Ca)
LDO3 (Ca)

LDO4 (D)
LDO5 (F)

LDO6 (Cb)

LDO8 (Cb)
LDO9 (Cb)

ADJ.RANGE, LOW

1.2-2.475V

1.2-2.475V

1.2-2.475V

0.7-1.2V

2.5-3.6V(tbc)

1.2-2.475V

1.2-2.475V

1.2-2.475V

ADJ.RANGE, HI

2.4-3.675V

2.4-3.675V

2.4-3.675V

2.4-3.675V

2.4-3.675V

2.4-3.675V

ACCURACY

+/-1.4%

+/-2.5%
+/-2.5%

MAX.CURRENT

50mA

50mA
50mA

+/-2.5% 60mA
+/-75mV

+/-2.5%

1000mA

250mA

(500/100mA in bypass)

250mA+/-30mV2.4-3.675V1.2-2.475VLDO7 (Cb)

+/-30mV
+/-25mV

250mA
250mA

ADELYN LDO SPECS

LDO#

LDO11 (Cb)
LDO12 (E)

LDO13 (Cb)
LDO14 (Gb)

LDO15 (Ca)

LDO16 (Cb)
LDO17 (Ca)

LDO18 (Gb)
LDO19 (Gb)

ADJ.RANGE, LOW

1.2-2.475V

1.8V

1.2-2.475V

0.7-1.4V

1.2-2.475V

1.2-2.475V

1.2-2.475V

0.7-1.4V

0.7-1.4V

ADJ.RANGE, HI

2.4-3.675V

2.4-3.675V

2.4-3.675V

2.4-3.675V

2.4-3.675V

ACCURACY

+/-30mV
+/-5%

+/-30mV
+/-3.0%

+/-2.5%

+/-30mV
+/-2.5%

+/-3.0%
+/-3.0%

MAX.CURRENT

250mA
10mA

250mA
400mA

50mA

250mA
50mA

400mA
400mA

D

C

B

A

U1801

D2333A1

WLCSP

SYM 4 OF 4

A1
A11
A15

H8
A19
P13

A3
P14

A7
B11
B15
B19

B3

B7
C11
C15
C19

C3

C7
D11
D15
D19

D3

D7

VSS VSS

E1

E10
E11
E12
E13
E14
E15
E16
E17
E18
E19

E2

E3

E4

E5

E6

E7

E8

E9

F1

F17

F2

F3

F4

18 15

PP1V1_SDRAM

53 38 37 32 30 25 23

G17
G4
H17
H18
H19
H4
J17
J4
J8
K1
K17
K2
K3
K4
K8
L17
L4
L8
M17
M4
N17
N18
N19
N4
P1
P2
P3
P4
P15
R17
R4
T5
T15
T4
T6
T7
T8
U15
T13
U8
V1
V12
V19
V8

U15 = PMU XTAL GND

PP_VDD_BOOST

1

C1915

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1908

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

18

PP1V25_BUCK

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

PMU_VSS_RTC

1

C1912

15UF

20%

6.3V

2

X5R
0402-1

ROOM=PMU

1

C1913

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

20

53 46

PP_VDD_MAIN

NC

R12

VDD_LDO1

V11

VDD_LDO2_15

R10

VDD_LDO3_17

R16

VDD_LDO4

V9

VDD_LDO5

V10

R14

VDD_LDO6_BYP

P19

VDD_LDO7_8

R19

VDD_LDO9

R9

VDD_LDO10

V13

VDD_LDO11_13

V16

VDD_LDO14

T19

VDD_LDO16

V17

VDD_LDO18

V18

VDD_LDO19

U19

VDD_LDO19

VPP_OTP

G15

TP_DET

VPUMP: 10nF min. @4.6V

1

C1905

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=PMU

U1801

D2333A1

WLCSP

SYM 1 OF 4

LDO INPUT

LDO

1

2

1

C1909

220PF

5%
10V

2

C0G-CERM
01005

ROOM=PMU

PMU_VPUMP

C1902

47NF

20%

6.3V
X5R-CERM
01005

ROOM=PMU

VLDO1
VLDO2
VLDO3

VLDO4
VLDO5_0
VLDO5_1

VLDO6

VBYPASS

VLDO7

VLDO8

VLDO9

VLDO9_FB

VLDO10
VLDO11
VLDO12
VLDO13
VLDO14
VLDO15
VLDO16
VLDO17
VLDO18
VLDO19

VBUF_1V2

VPUMP

T12
U11
T10
T16
U9
U10
T14

R15
T17

P18
R18

P17
T9

U13
P7
U14
U16
U12
T18
T11
U17
U18

P8J6

R5

NC

NC

1

C1916

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

LDO10 (Ga)

1

C1918

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1921

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

0.7-1.2V 1150mA

1

C1933

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=PMU

1

C1922

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1923

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1925

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=PMU

1

C1926

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

+/-4.5%

1

C1927

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

1

C1935

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=PMU

1

C1930

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

LDO_RTC
BUF_1V2

1

2

1

C1904

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

C1932

0.22UF

20%

6.3V
X5R
01005-1

ROOM=PMU

2.5V

1.2V

PP3V3_USB
PP1V8_VA
PP3V0_ALS_APS_CONVOY
PP0V8_AOP
PP3V0_NAND

+/-2.0%
+/-5.0%

30 7

35 34 33 32

30 29 25

15

17

PP_ACC_VAR

PP3V0_TRISTAR_ANT_PROX
PP2V9_NH_AVDD
PP1V8_HAWKING

PP0V9_NAND

29

44

17

PP1V8_ALWAYS
PP3V0_MESA

38

PP1V2_SOC
PP1V8_MESA

#24989262

PP_LDO17
PP1V2_UT_DVDD

1/20W

1%

R1901

0.00

2 1

MF

NOSTUFF

0201

25

PP1V2_NH_NV_DVDD

PP1V2_REF

#24989262:OTP-AO LDO17 default off,50mA Iout_max

SYNC_MASTER=Sync

PAGE TITLE

16

53 41 40 29

21 20

16 10 8

48 38

30 29

1

C1919

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

SYSTEM POWER:PMU (2/3)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

10mA
10mA

LDO1
LDO2
LDO3
LDO4
LDO5

40 27

LDO6

LDO7
LDO8
LDO9

LDO10
LDO11
LDO12
LDO13
LDO14
LDO15
LDO16
LDO17
LDO18
LDO19

VBUF_1V2

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

19 OF 53

SHEET

19 OF 81

C

New for ADELYN

B

A

SYNC_DATE=06/06/2016

8 7 5 4 2 1

36

46 41 40 37 36 32 21 20 18 16

53 52 48 47

PP1V8_SDRAM

PP1V8_ALWAYS

345678

2 1

BUTTON PULL-UP RESISTORS

1

SM

PP

1

PP

1

PP

21 20 19

PP2001

P2MM-NSM

ROOM=SOC

PP2002

SM

P2MM-NSM

ROOM=SOC

SM

PP2003

P2MM-NSM

ROOM=PMU

PP1V8_SDRAM

NOSTUFF

1

R2008

100K

5%
1/32W
MF
01005

2

ROOM=PMU

53 52 48 47

46 41 40 37 36 32 21 20 18 16

D

1

R2006

100K

5%
1/32W
MF
01005

2

ROOM=PMU

1

R2005

100K

5%
1/32W
MF
01005

2

ROOM=PMU

D101/D111 ONLY: TCXO_RF Supplies 32K

1

R2012

10K

5%
1/32W
MF
01005

2

ROOM=PMU
NO_XNET_CONNECTION

1

C2001

1000PF

10%
10V

2

X5R
01005

ROOM=PMU

40

13 7

13

15 13

13

40 37 13 7

13

21 17 15

53 39 23 13

13

7

AP_TO_PMU_WDOG_RESET
TRISTAR_TO_PMU_HOST_RESET

AP_TO_PMU_SOCHOT_L

11

PMU_TO_SYSTEM_COLD_RESET_L

Active high with int 200k PD

AOP_TO_PMU_SLEEP1_REQUEST
PMU_TO_AOP_SLEEP1_READY
AOP_TO_PMU_ACTIVE_REQUEST
PMU_TO_AOP_TRISTAR_ACTIVE_READY

PMU_TO_AOP_CLK32K

SYSTEM_ALIVE
LCM_TO_MANY_BSYNC

PMU_TO_AOP_IRQ_L

HIGH=FORCE PWM MODE

NC

NC

NC

P9
P10
P11

M5

P12

R11

L11
L12

J12

M9

M10

H5
L13
L10

G5

RESET_IN1
RESET_IN2
RESET_IN3
RESET*
SHDN

SLEEP1_REQ
SLEEP1_RDY
ACTIVE_REQ
ACTIVE_RDY

SLEEP_32K
OUT_32K

SYS_ALIVE
FORCE_SYNC
CRASH*
IRQ*

U1801

D2333A1

WLCSP

SYM 3 OF 4

REFS

RESETS

COMPARATORADC

IREF

VREF

PRE_UVLO*

VDROOP0*
VDROOP1*

VDROOP0_DET
VDROOP1_DET

K6

PMU_IREF

J7

PMU_VREF

1

C2006

0.22UF

20%

6.3V

2

X5R
0201

ROOM=PMU

N10

PMU_TO_AP_PRE_UVLO_L

G6

PMU_TO_AP_THROTTLE_CPU_L

G7

PMU_TO_AP_THROTTLE_GPU_L

F6

AP_VDD_CPU_SENSE

F7

AP_VDD_GPU_SENSE

1

R2011

200K

1%
1/20W
MF
201

ROOM=PMU

2

11

12

11

14

14

44 20

44 20

BUTTON_RINGER_A

BUTTON_POWER_KEY_L

BUTTON_VOL_DOWN_L

NOTE:VDROOP_DET filtering is now inside Adelyn

PP1V8_ALWAYS

NOSTUFF

1

R2007

220K

5%
1/32W
MF
01005

2

ROOM=PMU

PP1V8_SDRAM

NOSTUFF

1

R2015

220K

5%
1/32W
MF
01005

2

ROOM=PMU

21 20 19

D

53 52 48 47

46 41 40 37 36 32 21 20 18 16

44 20

C

B

C2007

100PF

NP0-C0G

ROOM=PMU

ROOM=PMU

ROOM=PMU

01005

C2008

100PF

NP0-C0G

01005

C2009

100PF

NP0-C0G

01005

5%

16V

5%

16V

5%

16V

FOREHEAD NTC

1

1

2

R2001

10KOHM-1%

01005

2

ROOM=PMU

REAR CAMERA NTC

1

1

R2002

10KOHM-1%

2

2

01005
ROOM=PMU

RADIO PA NTC

1

1

2

R2003

10KOHM-1%

01005
ROOM=PMU

2

FOREHEAD_NTC_RETURN

RCAM_NTC_RETURN

PA_NTC_RETURN

I2C1_AP_SDA

47

#24825674: Add R2020 to meet timing spec
#26169957: R2020 to 100ohm

OMIT

XW2002

SHORT-20L-0

ROOM=SOC

SHORT-20L-0

ROOM=SOC

SHORT-20L-0.05MM-SM

ROOM=SOC

SHORT-20L-0.05MM-SM

ROOM=SOC

.05MM-SM

21

OMIT

XW2003

.05MM-SM

21

OMIT

XW2004

21

OMIT

XW2005

21

R2020

100

5%

1/32W

MF

01005

1

C2013

1000PF

10%
10V

2

X5R
01005

ROOM=PMU
PLACE_NEAR=U1801:2mm

N13

M13

N6

N5

P5

J14
J15

J16
K16
K15
K14

J13
K13
K12

L14
L15
L16

M16
M15
M14

N16
N15
N14

R6

M6

P6

L5
L6

G16

V14
V15

N9

SCL
SDA

SCLK
MOSI
MISO

AMUX_A0
AMUX_A1
AMUX_A2
AMUX_A3
AMUX_A4
AMUX_A5
AMUX_A6
AMUX_A7
AMUX_AY

AMUX_B0
AMUX_B1
AMUX_B2
AMUX_B3
AMUX_B4
AMUX_B5
AMUX_B6
AMUX_B7
AMUX_BY

TDEV1
TDEV2
TDEV3
TDEV4
TDEV5
TCAL

XTAL1
XTAL2

VDD_RTC

IBAT

N8

PMU_PRE_UVLO_DET

L7

NC

M7

NC

H7

TRISTAR_TO_PMU_USB_BRICK_ID

PMU_ADC_IN

K7

M12

BUTTON_VOL_DOWN_L

N12

BUTTON_POWER_KEY_L

M11

BUTTON_RINGER_A

N11
H11

J11
K11

F16
F15
G14
F14
F13
G13
G12
H12
G11
G10
F9
G9
F8
G8
H9
H10
J9
J10
K9
K10
L9

Reserved for MENU key on dev board

NC

PMU_TO_AP_BUF_VOL_DOWN_L
PMU_TO_AP_BUF_POWER_KEY_L
PMU_TO_AP_BUF_RINGER_A

TIGRIS_TO_PMU_INT_L
BB_TO_PMU_PCIE_HOST_WAKE_L
PMU_TO_BBPMU_RESET_R_L
WLAN_TO_PMU_HOST_WAKE
NFC_TO_PMU_HOST_WAKE
PMU_TO_NAND_LOW_BATT_BOOT_L

NC_PMU_TO_GNSS_EN

PMUGPIO_TO_WLAN_CLK32K
PMU_TO_BT_REG_ON

NC_GNSS_TO_PMU_HOST_WAKE

PMU_TO_WLAN_REG_ON
BT_TO_PMU_HOST_WAKE
PMU_TO_CODEC_DIGLDO_PULLDN
PMU_TO_ACC_BUCK_SW_EN
PMU_TO_BB_USB_VBUS_DETECT
PMU_TO_NFC_EN

PMU_TO_BOOST_EN

PMU_TO_LCM_PANICB

PMU_TO_HOMER_RESET_L

I2C0_AP_SCL

19

20

12

12

12

40 20

44 20

44 20

44 20

21

53

53

53

17

53

53

53

32

27

53

53

23

39

36

37 47

Button for two-finger reset: 20711463 and 21196187

ROOM=PMU

53 20

#24511807: Stuff for Carrier

R2009

RS
RS

RS

Sequencer controllable

PRE_UVLO_DET

PMGR

VBAT

BRICK_ID

ADC_IN

BUTTON1
BUTTON2
BUTTON3
BUTTON4

AMUX

BUTTONS

NTCXTAL

GPIO

GPIO21 = I2C SCL is for Chestnut dark current mitigation RS = requires sequencer

BUTTONO1
BUTTONO2
BUTTONO3

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21

R2000

1.00K

5%

1/32W

MF

01005

0.00

1/32W
01005

21

0%
MF

C

21

PMU_TO_BBPMU_RESET_L

53

B

PMU_TO_AP_FORCE_DFUPMU_TO_AP_FORCE_DFU_R

12 4

I2C1_AP_SCL

47

21

44 12

39 37

40 20

TBD

53 20

I2C_PMU_SDA_R

11

SPI_PMGR_TO_PMU_SCLK
SPI_PMGR_TO_PMU_MOSI

11

SPI_PMU_TO_PMGR_MISO

11

AP_TO_PMU_AMUX_OUT

7

PMU_ADC_IN

20

BUTTON_VOL_UP_L

LCM_TO_CHESTNUT_PWR_EN
TRISTAR_TO_PMU_USB_BRICK_ID
PP1V2_MAGGIE

36

PMU_AMUX_AY

4

53

BBPMU_TO_PMU_AMUX1
BBPMU_TO_PMU_AMUX2

53

ACC_BUCK_TO_PMU_AMUX

27

PMUGPIO_TO_WLAN_CLK32K

CHESTNUT_TO_PMU_ADCMUX

37

7

AP_TO_PMU_TEST_CLKOUT

BBPMU_TO_PMU_AMUX3

53

PMU_AMUX_BY

4

NC

NC

NC

FOREHEAD_NTC
REAR_CAMERA_NTC
RADIO_PA_NTC
AP_NTC

PMU_TCAL

NC

PMU_XTAL1

PMU_XTAL2

PMU_VDD_RTC

1

C2002

0.22UF

20%

6.3V

2

X5R
0201

ROOM=PMU

A

AP NTC

1

C2010

100PF

NP0-C0G

ROOM=PMU

01005

5%

16V

1

2

R2004

10KOHM-1%

01005

2

ROOM=PMU

AP_NTC_RETURN

NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC

1

C2011

100PF

5%
16V

2

NP0-C0G MF
01005

ROOM=PMU

1

R2010

3.92K

0.1%
1/20W

0201

2

ROOM=PMU

C2003

22PF

5%

16V

CERM

01005

ROOM=PMU

1

2

19

CRITICAL

32.768KHZ-20PPM-12.5PF

Y2001

21

1.60X1.00-SM

ROOM=PMU

PMU_VSS_RTC

1

C2004

22PF

5%
16V

2

CERM
01005

ROOM=PMU

XW2001

SHORT-20L-0

ROOM=PMU

OMIT

.05MM-SM

21

SYNC_MASTER=Sync

PAGE TITLE

SYSTEM POWER:PMU (3/3)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

20 OF 53

SHEET

20 OF 81

SYNC_DATE=06/06/2016

A

8 7 5 4 2 1

36

TIGRIS CHARGER

345678

2 1

D

1

C2113

10UF

20%

6.3V

2

CERM-X5R
0402-9 0402-9

ROOM=CHARGER

1

2

C2114

10UF

20%

6.3V
CERM-X5R

ROOM=CHARGER

PP_VDD_MAIN

D

30 28 27 26 25 23 19 18 10 9 4

53 46 41 40 39 37 35 34 33 31

C

B

41 40 4

20 19

20

PP5V0_USB

PP1V8_ALWAYS

TIGRIS_TO_PMU_INT_L

7

USB_VBUS_DETECT

1

R2101

100K

5%
1/32W
MF
01005

2

ROOM=CHARGER

#24558610: Change to 100ohm

1

C2101

4.2UF

10%
16V

2

X5R-CERM
0402-1

ROOM=CHARGER

R2103

100

5%

1/32W

MF

01005

R2104

30.1K

1%

1/32W

MF

01005

TIGRIS_PMID

1

C2103

100PF

5%
35V

2

NP0-C0G
01005

ROOM=CHARGER

1

C2110

330PF

10%
16V

2

CER-X7R
01005

F4: 100 kOhm pullup to VLDO (regulated output voltage)

21

ROOM=CHARGER

21

ROOM=CHARGER

1

2

ROOM=CHARGER

20 17 15

1

C2109

4.2UF

10%
16V
X5R-CERM
0402-1

ROOM=CHARGER

47

I2C1_AP_SDA

47

I2C1_AP_SCL

C2111

4.2UF

10%
16V

2

X5R-CERM
0402-1

ROOM=CHARGER

SYSTEM_ALIVE

40

TRISTAR_TO_TIGRIS_VBUS_OFF

TIGRIS_TO_PMU_INT_R_L

TIGRIS_VBUS_DETECT

1

C2112

100PF

5%
35V

2

NP0-C0G
01005

ROOM=CHARGER

F5

PMID

A5

VBUS

B5

VBUS

D5

VBUS

C5

VBUS

E5

VBUS

G3

SDA

E4

SCL

E3

SYS_ALIVE

F4

VBUS_OVP_OFF

G2

INT

F1

VBUS_DET

F3

TEST

C2

D2

B2

A2

VDD_MAIN

VDD_MAIN

VDD_MAIN

VDD_MAIN

U2101

SN2400AB0

WCSP

ROOM=CHARGER

CRITICAL

PGND

PGND

PGND

PGND

B3

A3

D3

C3

LDO

BOOT

BUCK_SW
BUCK_SW
BUCK_SW
BUCK_SW

BAT
BAT
BAT
BAT

BAT_SNS

ACT_DIODE

HDQ_HOST

HDQ_GAUGE

G4
G5
A4

B4
D4
C4

A1
B1
D1
C1

E1
E2
G1

F2

TIGRIS_LDO

1

C2104

220PF

5%
10V

2

C0G-CERM
01005

ROOM=CHARGER

NO_XNET_CONNECTION

C2105

0.047UF

TIGRIS_BOOT

ROOM=CHARGER

TIGRIS_BUCK_LX

VBATT_SENSE
TIGRIS_ACTIVE_DIODE
SWI_AP_BI_TIGRIS

TIGRIS_TO_BATTERY_SWI_1V8

10%
16V
X5R

0201

1

C2115

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=CHARGER

28

TO TRINITY

A1

A3

A2

G

#25112685,Remove Snub

10%
16V

1

2

C2106

21

22

12

330PF

CER-X7R

ROOM=CHARGER

01005

C2102

220PF

C0G-CERM

ROOM=CHARGER

NOSTUFF

01005

R2102

47 46 41 40 37 36 32 20 18 16

53 52 48

PP1V8_SDRAM

ROOM=CHARGER

5%

10V

100K

5%

1/32W

MF

01005

1

2

1

2

C1

1

C2108

330PF

10%
16V

2

CER-X7R
01005

B3

B2

B1

C2

S

D

C3

ROOM=CHARGER

CRITICAL

Q2101

CSD68827W

BGA

ROOM=CHARGER

PP_BATT_VCC

1

C2117

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=CHARGER

1

C2118

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=CHARGER

22 4

C

B

1

R2105

40.2K

1%
1/32W
MF
01005

2

2

RV3C002UN

1

G

S

SYM_VER_1

Q2102

DFN

D

3

TIGRIS_TO_BATTERY_SWI

22

A

SYNC_MASTER=Sync

PAGE TITLE

SYSTEM POWER:CHARGER

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

21 OF 53
21 OF 81

D

SYNC_DATE=06/06/2016

A

345678

2 1

D

D

BATTERY CONNECTOR

THIS ONE ON MLB ---> 516S00172 (matches d10 mlb MCO rev 27)

C

TIGRIS_TO_BATTERY_SWI

21

R2201

100

1/32W
01005

ROOM=BATTERY_B2B

21

5%
MF

TIGRIS_BATTERY_SWI_CONN

1

C2201

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=BATTERY_B2B

RCPT-BATT-SHORT

J2201

F-ST-SM

1
3 2
4

ROOM=BATTERY_B2B

CRITICAL

ALLOW_APPLE_PREFIX

11
87

5

6

109
12

XW2201

SHORT-20L-0

PLACE_NEAR=J2201:2mm

ROOM=BATTERY_B2B

NO_XNET_CONNECTION=1

.05MM-SM

21

VBATT_SENSE

1

C2202

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=BATTERY_B2B

21

1

C2203

100PF

5%
16V

2

NP0-C0G
01005

ROOM=BATTERY_B2B

1

C2204

220PF

5%
10V

2

C0G-CERM
01005

ROOM=BATTERY_B2B

PP_BATT_VCC

C

21 4

B

B

A

SYNC_MASTER=Sync

PAGE TITLE

SYSTEM POWER:BATTERY CONN

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

22 OF 53
22 OF 81

D

SYNC_DATE=06/06/2016

A

34567 8

2 1

D

D

C

28 27 26 25 21 19 18 10 9 4

46 41 40 39 37 35 34 33 31 30

53

PP_VDD_MAIN

1

C2309

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=BOOST

1

C2301

4.7UF

20%

6.3V

2

X5R-CERM1
402

ROOM=BOOST

20

PMU_TO_BOOST_EN

1

R2301

511K

1%
1/32W
MF
01005

2

L2301

ROOM=BOOST

0.47UH-20%-4.2A-0.048OHM

21

SYS_BOOST_LX

PIUA20121T-SM

I2C0_AP_SCL

47

I2C0_AP_SDA

47

BOOST

A3

VIN

A4
C3

C4
A1
B2
C2
B1
C1

VIN

SW
SW

EN
SCL
SDA
VSEL
BYP*

U2301

SN61280D

DSBGA

ROOM=BOOST

VOUT
VOUT

B3
B4

1

C2302

15UF

20%

6.3V

2

X5R
0402-1

ROOM=BOOST

1

C2303

15UF

20%

6.3V

2

X5R
0402-1

ROOM=BOOST

1

C2304

15UF

20%

6.3V

2

X5R
0402-1

ROOM=BOOST

1

C2307

15UF

20%

6.3V

2

X5R
0402-1

ROOM=BOOST

1

C2308

15UF

20%

6.3V

2

X5R
0402-1

ROOM=BOOST

1

C2306

220PF

5%
10V

2

C0G-CERM
01005

ROOM=BOOST

When VDD_MAIN < 3.4, boosts to 3.4
Otherwise tracks VDD_MAIN

PP_VDD_BOOST

53 38 37 32 30 25 19

C

B

53 39 20 13

LCM_TO_MANY_BSYNC

HIGH=FORCE PWM MODE

Control details from Radar 19634006

A2

GPIO

PGND

D3

D2

D4

AGND

D1

B

A

SYNC_MASTER=Sync

PAGE TITLE

SYSTEM POWER:BOOST

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

23 OF 53
23 OF 81

D

SYNC_DATE=06/06/2016

A

345678

2 1

D

C

36 24 18

36 24 18

PP1V8_MAGGIE_IMU

13

PP1V8_MAGGIE_IMU

1

2

BOMOPTION=CARBON_1

1

R2401

100K

5%
1/32W
MF
01005

2

ROOM=SOC

SPI_AOP_TO_ACCEL_GYRO_CS_L

GYRO_CHARGE_PUMP

13

ACCEL_GYRO_TO_AOP_INT

BOMOPTION=CARBON_1

1

C2403

0.1UF

10%

6.3V

2

X6S
0201

ROOM=CARBON

CARBON - ACCEL & GYRO

C2418

2.2UF

20%

6.3V
X5R-CERM
0201-1

ROOM=CARBON

INVENSENSE, MPU-6800: C2403=0.1UF

BOMOPTION=CARBON_1

1

C2402

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CARBON

BOMOPTION=CARBON_1

1

C2415

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CARBON

16

VDD

1

BOMOPTION=CARBON_1

VDDIO

U2401

MPU-6900-21

LGA

5
8

14

7

CS
FSYNC
REGOUT

INT

GND

9

ROOM=CARBON

CRITICAL

GND

GND

12

11

10

GND

GND

13

SPC

SDI

SDO

DRDY

GND

15

BOMOPTION: CARBON_1
#25765850:Update Carbon APN

2

SPI_AOP_TO_IMU_SCLK_R1

3

SPI_AOP_TO_IMU_MOSI

4

SPI_IMU_TO_AOP_MISO

6

ACCEL_GYRO_TO_AOP_DATARDY

13

MAGNESIUM - COMPASS

D

PP1V8_MAGGIE_IMU_FILT

24

1

C2401

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=MAGNESIUM

24 13

24 13

24 13

BOMOPTION=CARBON_1

1

C2419

5PF

+/-0.1PF
16V

2

NP0-C0G
01005

ROOM=CARBON

PP1V8_MAGGIE_IMU_FILT

24

1

C2408

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=MAGNESIUM

NC
NC

NC
NC
NC

C2

B1

B3
D1
D2

D4

C4

VDD

U2402

HSCDTD601A-19A

VPP
RSV

RSV
RSV
RSV

RST*

ROOM=MAGNESIUM

LGA

CRITICAL

VSS

C1

SDO

SDA/SDI

SCL/SCK

114K INT PU

114K INT PD1.09M INT PU

CSB

TRG/SE

DRDY

B4
A4
A3
A2
C3
A1

NC

SPI_IMU_TO_AOP_MISO
SPI_AOP_TO_IMU_MOSI
SPI_AOP_TO_IMU_SCLK_R1
SPI_AOP_TO_COMPASS_CS_L

COMPASS_TO_AOP_INT

PP2404

1

SM

PP

P2MM-NSM

ROOM=MAGNESIUM

PP2401

1

PP

ROOM=MAGNESIUM

SM

P2MM-NSM

24 13

24 13

24 13

13

13

C

B

36 24 18

#25782019:Add 0ohm

R2404

PP1V8_MAGGIE_IMU PP1V8_MAGGIE_IMU_R

ROOM=BOT_CARBON

PP1V8_MAGGIE_IMU_R

24

13

0.00

0%

1/32W

MF

01005

1

R2441

100K

5%
1/32W
MF
01005

2

ROOM=SOC

BOT_GYRO_CHARGE_PUMP

1

C2443

0.1UF

10%

6.3V

2

X6S
0201

ROOM=BOT_CARBON

24

21

1

C2448

2.2UF

20%

6.3V

2

X5R-CERM X5R-CERM
0201-1

ROOM=BOT_CARBON

1

C2442

0.1UF

2

SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L

OMIT

XW2404

SHORT-20L-0.05MM-SM

21

NC

ROOM=BOT_CARBON
NO_XNET_CONNECTION=1

XW2404 to balance Via/Cu at INT pin

BOT_ACCEL_GYRO_TO_XW_INT

20%

6.3V
X5R-CERM
01005

ROOM=BOT_CARBON

1

C2445

0.1UF

20%

6.3V

2

01005

ROOM=BOT_CARBON

14

5
8

7

VDD

CS
FSYNC
REGOUT

INT

GND

9

16

1

VDDIO

U2404

MPU-6900-21

LGA

ROOM=BOT_CARBON

CRITICAL

GND

GND

GND

13

12

11

10

GND

SPC

SDI

SDO

DRDY

GND

15

#25740540:PP for South Carbon MOSI

2

SPI_AOP_TO_IMU_SCLK_R2

3

SPI_AOP_TO_IMU_MOSI

4

SPI_IMU_TO_AOP_MISO

6

BOT_ACCEL_GYRO_TO_AOP_DATARDY

PP2402

SM

1

PP

P2MM-NSM

ROOM=MAGNESIUM

PP2403

1

PP

24 13

24 13

PP2440

SM

P2MM-NSM

ROOM=HOMER

13

NOSTUFF

1

C2449

5PF

+/-0.1PF
16V

2

NP0-C0G
01005

ROOM=BOT_CARBON

13

1

PP

ROOM=MAGNESIUM

SM

P2MM-NSM

B

A

PP1V8_MAGGIE_IMU_FILT

24

BOSCH: Internal PU

13

NOSTUFF

1

R2403

100K

5%
1/32W
MF
01005

ROOM=SOC

2

SPI_AOP_TO_IMU_SCLK_R1

24 13

SPI_AOP_TO_PHOSPHORUS_CS_L

PP1V8_MAGGIE_IMU_FILT

24

VDD

U2403

BMP284AA

SDI SDO

4

SCK

2

CS*

8

GND

LGA

1

6

VDDIO

IRQ

1

C2413

20%

6.3V

2

X5R-CERM
01005

ROOM=PHOSPHORUS

53

7

PHOSPHORUS

#24593845

BOSCH (APN:338S00188): nostuff C2420/C2421/C2422/C2423 and R2403 PU

ST (APN:338S00230): stuff C2420-C2423, C2420R2422 with 155S00017, stuff R2403 PU
C2420=4pF(131S0253),C2405=3pF(131S0251) per #25691124

R2422

1

C2405

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=PHOSPHORUS

SPI_IMU_TO_AOP_MISOSPI_AOP_TO_IMU_MOSI

PHOSPHORUS_TO_AOP_INT_L

13

NOSTUFF

1

C2420

4PF

+/-0.1PF
16V

2

NP0-C0G
01005

ROOM=PHOSPHORUS

24 13 24 13

NOSTUFF

1

C2421

20PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=PHOSPHORUS

0.00

1/32W
01005

ROOM=PHOSPHORUS

0%
MF

21

NOSTUFF

1

C2422

20PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=PHOSPHORUS

NOSTUFF

1

C2423

5.6PF

+/-0.1PF
16V

2

NP0-C0G-CERM
01005

ROOM=PHOSPHORUS

1

C2414

2.2UF0.1UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PHOSPHORUS

PP1V8_MAGGIE_IMU

SYNC_MASTER=Sync

PAGE TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36 24 18

Apple Inc.

R

SENSORS

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

24 OF 53

SHEET

24 OF 81

SYNC_DATE=06/06/2016

A

8 7 5 4 2 1

36

345678

2 1

D

Scrub voltage selection

NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM

IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.
VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY

U2501

LP5907UVX2.925-S

53 38 37 32 30 23 19 46 45

PP_VDD_BOOST

1

C2527

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=RCAM_B2B

B1

VIN

VEN

DSBGA

ROOM=RCAM_B2B

GND

B2

VOUT

A2A1

1

See Page46: D11x C2507 is 4UF

C2502

0.22UF

10%

6.3V

2

CER-X5R
01005

ROOM=RCAM_B2B

PP2V9_UT_AVDD_CONN

1

C2504

220PF

5%
10V

2

C0G-CERM
01005

ROOM=RCAM_B2B

L2501

33-OHM-25%-1500MA

30 18

PP2V8_UT_AF_VAR

0201

ROOM=RCAM_B2B

21

1

C2505

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=RCAM_B2B

PP2V8_UT_AF_VAR_CONN

1

C2501

220PF

5%
10V

2

C0G-CERM
01005

ROOM=RCAM_B2B

IO FILTERSUTAH POWER

FL2504

150OHM-25%-200MA-0.7DCR

AP_TO_UT_CLK

9

1

C2512

100PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

NOSTUFF

01005

ROOM=RCAM_B2B

21

1

C2513

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=RCAM_B2B

FL2501

150OHM-25%-200MA-0.7DCR

45 45

9

AP_TO_UT_SHUTDOWN_L

01005

ROOM=RCAM_B2B

21

1

C2514

220PF

5%
10V

2

C0G-CERM
01005

ROOM=RCAM_B2B

AP_TO_UT_CLK_CONN

AP_TO_UT_SHUTDOWN_CONN_L

45

D

C

30 29 19

19

29 18 17 16 13 12 11 9 8 7 5

52 48 47 46 39 30

PP3V0_ALS_APS_CONVOY

PP1V2_UT_DVDD

PP1V8

L2502

33-OHM-25%-1500MA

21

0201

ROOM=RCAM_B2B

L2503

33-OHM-25%-1500MA

21

0201

ROOM=RCAM_B2B

L2504

33-OHM-25%-1500MA

21

0201

ROOM=RCAM_B2B

1

C2506

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=RCAM_B2B

1

C2519

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=RCAM_B2B

1

C2508

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=RCAM_B2B

1

2

1

C2510

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

C2509

1.0UF

20%

6.3V
X5R
0201-1

ROOM=RCAM_B2B

ROOM=RCAM_B2B

PP3V0_UT_SVDD_CONN

1

C2518

220PF

5%
10V

2

C0G-CERM
01005

ROOM=RCAM_B2B

PP1V2_UT_VDD_CONN

1

C2503

220PF

5%
10V

2

C0G-CERM
01005

ROOM=RCAM_B2B

1

2

PP1V8_UT_CONN

1

C2511

220PF

5%
10V

2

C0G-CERM
01005

ROOM=RCAM_B2B

45

45

C2521

15PF

5%
16V
NP0-C0G-CERM
01005

ROOM=RCAM_B2B

Desense for Wifi frequencies

45

26

28 27 26 23 21 19 18 10 9 4

46 41 40 39 37 35 34 33 31 30

53

UT_AND_NV_TO_STROBE_DRIVER_STROBE

LPDP FILTERS

AC return path for LPDP which is referenced to GND and VDD_MAIN

PP_VDD_MAIN

FL2503

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=RCAM_B2B

1

C2515

220PF

5%
10V

2

C0G-CERM
01005

ROOM=RCAM_B2B

UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN

45 30

C

B

10

90_LPDP_UT_TO_AP_D2_P

10

90_LPDP_UT_TO_AP_D2_N

90_LPDP_UT_TO_AP_D3_P

10

10

90_LPDP_UT_TO_AP_D3_N

1

C2522

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=RCAM_B2B

90_LPDP_UT_TO_AP_D2_P

MAKE_BASE=TRUE

90_LPDP_UT_TO_AP_D2_N

MAKE_BASE=TRUE

90_LPDP_UT_TO_AP_D3_P

MAKE_BASE=TRUE

90_LPDP_UT_TO_AP_D3_N

MAKE_BASE=TRUE

1

C2528

33PF

5%
16V

2

NP0-C0G-CERM
01005

C2523

ROOM=RCAM_B2B

C2524

ROOM=RCAM_B2B

C2525

ROOM=RCAM_B2B

C2526

ROOM=RCAM_B2B

ROOM=RCAM_B2B

21

6.3V20%

X5R-CERM

X5R-CERM

X5R-CERM

X5R-CERM 01005

01005

21

6.3V20%
01005

21

6.3V20%
01005

21

6.3V20%

1

C2529

33PF

5%
16V

2

NP0-C0G-CERM
01005

0.1UF

0.1UF

0.1UF

0.1UF

ROOM=RCAM_B2B

90_LPDP_UT_TO_AP_D2_CONN_P

90_LPDP_UT_TO_AP_D2_CONN_N

90_LPDP_UT_TO_AP_D3_CONN_P

90_LPDP_UT_TO_AP_D3_CONN_N

B

45

45

45

45

A

10

LPDP_UT_BI_AP_AUX

LPDP_UT_BI_AP_AUX

MAKE_BASE=TRUE

C2530

0.1UF

21

20%

6.3V

X5R-CERM

01005

ROOM=RCAM_B2B

LPDP_UT_BI_AP_AUX_CONN

1

C2520

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=RCAM_B2B

45

SYNC_MASTER=sync

PAGE TITLE

B2B FILTERS: UTAH

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=05/17/2016

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

25 OF 53

SHEET

25 OF 81

A

8 7 5 4 2 1

36

STROBE DRIVERS INSIDE NEO SIP MODULE

D10/sip_neo

34567 8

2 1

D

25

53 46 37

AP_TO_STROBE_DRIVER_HWEN

9

UT_AND_NV_TO_STROBE_DRIVER_STROBE

BB_TO_STROBE_DRIVER_GSM_BURST_IND

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

53 46

ROOM=STROBE

PP_VDD_MAIN

C2609

10UF

CERM-X5R

0402-9

1

20%

6.3V

2

I2C_ISP_UT_SDA

48

48

I2C_ISP_UT_SCL

C2610

10UF

20%

6.3V

CERM-X5R

0402-9

ROOM=STROBE

M2600

D

NEO

SIP

5%

10V

1

B8

VDD

2

D2
D3

C9
C8

D8
B9

B10

VDD
VDD

HWEN1
STB1

GSM1
SDA1
SCL1

SYM 1 OF 3

ROOM=STROBE

CRITICAL

LED1
LED1

LED2
LED2

NTC

D9
D10

D6
D7

C10

PP_STROBE_DRIVER1_COOL_LED

PP_STROBE_DRIVER1_WARM_LED

45 44

45 44

STROBE_MODULE_NTC

44

1

C2613

220PF

2

C0G-CERM

01005

ROOM=STROBE

C

B

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

53 46

C2611

ROOM=STROBE2

PP_VDD_MAIN

1

10UF

20%

6.3V

CERM-X5R

0402-9

2

ROOM=STROBE2

46

I2C_ISP_NV_SDA

46

I2C_ISP_NV_SCL

C2612

10UF

20%

6.3V

CERM-X5R

0402-9

41 40 39 37 35 34 33 31 30 28

5%

10V

1

2

53 46

1

C2614

220PF

2

27 26 25 23 21 19 18 10 9 4

C0G-CERM

01005

ROOM=STROBE

B18

VDD

B19

VDD
VDD

D13

HWEN0

C12
C13

STB0

GSM0

B13

SDA2

D12
D11

SCL2

PP_VDD_MAIN

M2600

NEO

SIP

SYM 2 OF 3

NTC

B11
B12

B14
B15

C11

1

C2618

220PF

5%
10V

2

C0G-CERM
01005

ROOM=STROBE2

LED1
LED1

LED2
LED2

1

C2617

220PF

5%
10V

2

C0G-CERM
01005

ROOM=STROBE2

AC return path for plane edge termination, which occurs near the Strobe modules.

PP_STROBE_DRIVER2_COOL_LED

PP_STROBE_DRIVER2_WARM_LED

45 44

45 44

A2
A3
A4
A5
A6
A7
A8

A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20

B2

B3

B4

B5

B6

B7
B16
B17
B20

C1
C2
C3
C4
C5
C6
C7

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

M2600

NEO

SIP

SYM 3 OF 3

GND1

GND1S

GND2

GND2S

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

C14
C15
C16
C17
C18
C19
C20
D1
D4
D5
D14
D15
D16
D17
D18
D19
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19

C

B

A

B1

A1

SYNC_MASTER=Sync

PAGE TITLE

E20

D20

CAMERA:STROBE DRIVER

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

CDS_LIB=apple

051-00482

8.0.0

26 OF 53
26 OF 81

D

SYNC_DATE=06/06/2016

A

D

C

ACCESSORY BUCK

28 26 25 23 21 19 18 10 9 4

46 41 40 39 37 35 34 33 31 30

From PMU GPIO14

53

20

PMU_TO_ACC_BUCK_SW_EN

1

R2700

100K

5%
1/32W
MF
01005

2

ROOM=ACC_BUCK

12

AP_TO_ACC_BUCK_VSEL

From AP GPIO1

#25761020:Add Bypass 0ohm

NOSTUFF

R2711

OMIT_TABLE

VIN

B2

ON

1

R2710

100K

1%
1/32W
MF
01005

2

ROOM=ACC_BUCK

0.00

1/20W

0201

ROOM=ACC_BUCK

U2710

FPF1204UCX

WLCSP-COMBO

ROOM=ACC_BUCK

1%
MF

GND

B1

21

VOUT

A1A2

1

R2701

100K

5%
1/32W
MF
01005

2

ROOM=ACC_BUCK

1

C2700

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=ACC_BUCK

34567 8

2 1

D

From PMU LDO6

C2704

1

2.2UF

PP_VDD_MAIN_ACC_BUCK_VINPP_VDD_MAIN

K

D2700

SOD962-2

20%

6.3V

2

X5R-CERM
0201-1

ROOM=PMU

PMEG3002ESF

ROOM=ACC_BUCK

A

FET Changes per #25687842 4/12/2016

ACC_BUCK_EN

1

C2710

0.22UF

10%

6.3V

2

CER-X5R
01005

ROOM=ACC_BUCK

A2

VIN

U2700

FAN53612-1.5V-1.9V

WLCSP

B2

EN

A1

VSEL

ROOM=ACC_BUCK

GND

C2

SW

FB

B1

ACC_BUCK_SW

C1

ACC_BUCK_FB

CRITICAL

L2700

0.47UH-20%-2.52A-0.08OHM

21

PIGA1608-SM

ROOM=ACC_BUCK

27

R2705

ROOM=ACC_BUCK

ACC_BUCK_TO_PMU_AMUX

20

PMU_AMUX_B3 FOR NOW

10K

5%

1/32W

MF

01005

PMCM4401VPE

#25370332: For EMC
#25919133: C2707 on P46

46

PP_ACC_BUCK_VAR

OMIT

1

C2702

10UF

20%

6.3V

2

CERM-X5R
0402-9

1

2

ROOM=ACC_BUCK

1

C2703

220PF

5%
10V

2

C0G-CERM
01005

ROOM=ACC_BUCK

1

C2701

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=ACC_BUCK

#25172498

27

ACC_BUCK_FB

1

R2702

200K

0.1%
1/32W
TF
01005

2

ROOM=ACC_BUCK

ACT_DIODE_TO_COMP_POS

XW2700

SHORT-20L-0.05MM-SM

21

ROOM=ACC_BUCK

NO_XNET_CONNECTION=1

PLACE_NEAR=Q2700:2mm

ACT_DIODE_TO_COMP_OUT

B1

B1

Q2700

WLCSP

D

Q2701

PMCM4401VPE

WLCSP

D

C2705

1

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=PMU

S

G

ROOM=TRISTAR

A1

S

G

ROOM=TRISTAR

A1

A2
B2

A2
B2

2

OMIT

XW2707

SHORT-20L-0.05MM-SM

ROOM=TRISTAR
NO_XNET_CONNECTION=1

1

ACT_DIODE_TO_COMP_SENSE

1

R2704

200K

0.1%
1/32W
TF
01005

2

ROOM=ACC_BUCK

To Tristar on Pg40

PP_ACC_VAR

1

C2708

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=TRISTAR

#25741319: Change to 4UF

C

40 27 19

B

ACT_DIODE_TO_COMP_NEG

1

R2706

200K

0.1%
1/32W
TF
01005

2

ROOM=ACC_BUCK

40 27 19

PP_ACC_VAR

C2706

0.22UF

ROOM=ACC_BUCK

10%

6.3V

CER-X5R

01005

1

5

2

VCC

U2701

SCY992200A

4

IN+

3

IN-

UDFN

VEE

1

NC

6
2

VOUT

ROOM=ACC_BUCK

NC

#25987909: To Resistor Divider

1

R2703

200K

0.1%
1/32W
TF
01005

2

ROOM=ACC_BUCK

B

A

PAGE TITLE

Accessory: Buck Circuit

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=05/17/2016SYNC_MASTER=sync

051-00482

8.0.0

27 OF 53
27 OF 81

A

D

345678

2 1

D

C

B

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

53 46

M2800

TRINITY_BLUE

SIP

PP_VDD_MAIN PP_VDD_MAIN

L4

VDD_T TIG

M4

VDD_T

N4

VDD_T

SYM 1 OF 6

TIG
TIG

L6

TIGRIS_BUCK_LX

M6
N6

21

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

53 46

M2800

TRINITY_BLUE

SIP

V2

VDD_A ARC

V3

VDD_A

SYM 2 OF 6

ARC

X2
X3

ARC1_LX

35

M2800

TRINITY_BLUE

SIP

V5
V6

VDD_S

SYM 3 OF 6

SPKVDD_S
SPK

X5

SPEAKERAMP1_LX

X6

34

D5
D6

F2
G2
H2

J2

D2
D3

Q2
R2
S2

T2

VDD1_2
VDD1_2

VDDX_1
VDDX_1
VDDX_1
VDDX_1

VDD2_2
VDD2_2

VDDX_1
VDDX_1
VDDX_1
VDDX_1

M2800

TRINITY_BLUE

SIP

SYM 4 OF 6

M2800

TRINITY_BLUE

SIP

SYM 5 OF 6

BL1_1
BL1_1
BL1_1
BL1_1

BL1_2
BL1_2

BL2_1
BL2_1
BL2_1
BL2_1

BL2_2
BL2_2

F6
G6
H6
J6

B5
B6

Q6
R6
S6
T6

B2
B3

BL_SW1_LX

BL_SW2_LX

BL34_SW1_LX

BL34_SW2_LX

37

37

46

46

A3
A4
A5
A6
A7
B1
B4
B7
C1
C2
C3
C4
C5
C6
C7
D1
D4
D7
E1
E2
E3
E4
E5
E6
E7

F1
F3
F4
F5

F7
G1
G3
G4
G5
G7
H1
H3
H4
H5
H7

J1
J3
J4
J5

J7
K1
K2
K3
K4
K5
K6
K7

L1

L2

L3

L5

L7

M1
M2
M3

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

M2800

TRINITY_BLUE

SIP

SYM 6 OF 6

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

M5
M7
N1
N2
N3
N5
N7
P1
P2
P3
P4
P5
P6
P7
Q1
Q3
Q4
Q5
Q7
R1
R3
R4
R5
R7
S1
S3
S4
S5
S7
T1
T3
T4
T5
T7
U1
U2
U3
U4
U5
U6
U7
V1
V4
V7
W1
W2
W3
W4
W5
W6
W7
X1
X4
X7
Y1
Y2
Y3
Y4
Y5

D

C

B

A

GND1S

GND1

A2

A1

GND2

GND2S

Y6

Y7

SYNC_MASTER=sync SYNC_DATE=05/17/2016

PAGE TITLE

TRINITY:FF SPECIFIC

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00482

REVISION

8.0.0

BRANCH

PAGE

28 OF 53

SHEET

28 OF 81

D

A

8 7 5 4 2 1

36

345678

2 1

D

17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 25 18

30 19

19

NEW HAMPSHIRE POWER

FL2901

33-OHM-25%-1500MA

PP1V8

0201

ROOM=FOREHEAD

FL2902

33-OHM-25%-1500MA

PP1V2_NH_NV_DVDD

0201

ROOM=FOREHEAD

FL2903

10-OHM-750MA

PP2V9_NH_AVDD

01005-1

ROOM=FOREHEAD

21

21

1

2

21

1

2

C2916

2.2UF

20%

6.3V
X5R-CERM
0201-1

ROOM=FOREHEAD

C2909

2.2UF

20%

6.3V
X5R-CERM
0201-1

ROOM=FOREHEAD

1

C2914

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=FOREHEAD

1

C2915

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=FOREHEAD

1

C2901

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=FOREHEAD

PP1V8_NH_IO_CONN

1

C2902

220PF

5%
10V

2

C0G-CERM
01005

ROOM=FOREHEAD

PP1V2_NH_DVDD_CONN

1

C2903

220PF

5%
10V

2

C0G-CERM
01005

ROOM=FOREHEAD

PP2V9_NH_AVDD_CONN

1

C2904

220PF

5%
10V

2

C0G-CERM
01005

ROOM=FOREHEAD

45

45

45

30 25 19

53 41 40 19

PROX, ALS, & CONVOY POWER

FL2913

150OHM-25%-200MA-0.7DCR

PP3V0_ALS_APS_CONVOY

PP3V0_TRISTAR_ANT_PROX

21

01005

ROOM=FOREHEAD

150OHM-25%-200MA-0.7DCR

FL2910

01005

ROOM=FOREHEAD

21

#24511567: Remove C2918

1

2

C2917

2.2UF

20%

6.3V
X5R-CERM
0201-1

ROOM=FOREHEAD

PP3V0_ALS_CONVOY_CONN

PP3V0_PROX_CONN

1

C2927

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=FOREHEAD

45

1

C2926

220PF

5%
10V

2

C0G-CERM
01005

ROOM=FOREHEAD

1

C2908

220PF

5%
10V

2

C0G-CERM
01005

ROOM=FOREHEAD

D

C

B

NEW HAMPSHIRE I/O

FL2907

150OHM-25%-200MA-0.7DCR

AP_TO_NH_CLK

9

01005

ROOM=FOREHEAD

21

1

C2910

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=FOREHEAD

AP_TO_NH_CLK_CONN

FL2908

150OHM-25%-200MA-0.7DCR

AP_TO_NH_SHUTDOWN_L AP_TO_NH_SHUTDOWN_CONN_L

9

01005

ROOM=FOREHEAD

21

1

C2911

220PF

5%
10V

2

C0G-CERM
01005

ROOM=FOREHEAD

CONVOY I/O

#25657495: Update FL2905 to 100ohm

R2905

100

5%
MF

21

1

C2905

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=FOREHEAD

PDM_ADARE_TO_CONVOY_CLK PDM_ADARE_TO_CONVOY_CLK_CONN

33 45

1/32W
01005

ROOM=FOREHEAD

FL2906

150OHM-25%-200MA-0.7DCR

33

PDM_CONVOY_TO_ADARE_DATA

21

01005

ROOM=FOREHEAD

PDM_CONVOY_TO_ADARE_DATA_CONN

1

C2906

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=FOREHEAD

PROX/ALS I/O

#25170697: R2915 to 240ohm/C2921 to 220pF

45

45

46 45 33

33

33

32

SPEAKER2

SPEAKERAMP2_TO_SPEAKER_OUT_POS

SPEAKERAMP2_TO_SPEAKER_OUT_NEG

SPEAKER_TO_SPEAKERAMP2_VSENSE_P

SPEAKER_TO_SPEAKERAMP2_VSENSE_N

MIC3

PP_CODEC_TO_FRONTMIC3_BIAS

NO_XNET_CONNECTION=1

ROOM=FOREHEAD

R2903

0.00

1/32W
01005

ROOM=FOREHEAD

21

0%
MF

R2904

0.00

1/32W
01005

ROOM=FOREHEAD

21

0%
MF

FL2914

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=FOREHEAD

NO_XNET_CONNECTION=1

1

C2932

220PF

5%
10V

2

C0G-CERM
01005

ROOM=FOREHEAD

NO_XNET_CONNECTION=1

1

C2935

220PF

5%
10V

2

C0G-CERM
01005

ROOM=FOREHEAD

5%

10V

1

2

C2931

220PF

C0G-CERM

01005

SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P

NO_XNET_CONNECTION=1

1

C2933

100PF

5%
35V

2

NP0-C0G
01005

ROOM=FOREHEAD

SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N

NO_XNET_CONNECTION=1

1

C2934

100PF

5%
35V

2

NP0-C0G
01005

ROOM=FOREHEAD

PP_CODEC_TO_FRONTMIC3_BIAS_CONN

1

DZ2905

6.8V-100PF

01005

ROOM=FOREHEAD

2

C

46 45 33

45

45

B

45

A

PROX_BI_AP_AOP_INT_PWM_L

13 12

R2915

240

21

1%

1/32W

MF

01005

ROOM=FOREHEAD

PROX_BI_AP_AOP_INT_PWM_L_CONN

1

C2921

220PF

5%
10V

2

C0G-CERM
01005

ROOM=FOREHEAD

FL2911

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=FOREHEAD

ALS_TO_AP_INT_CONN_LALS_TO_AP_INT_L

1

C2924

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=FOREHEAD

45

31

FRONTMIC3_TO_CODEC_AIN4_N

150OHM-25%-200MA-0.7DCR

FL2904

01005

ROOM=FOREHEAD

21

NO_XNET_CONNECTION=1

1

DZ2906

6.8V-100PF

01005

ROOM=FOREHEAD

2

FRONTMIC3_TO_CODEC_AIN4_CONN_N

45

FL2909

150OHM-25%-200MA-0.7DCR

45 12

31

FRONTMIC3_TO_CODEC_AIN4_P

2 1

01005

ROOM=FOREHEAD

NO_XNET_CONNECTION=1

1

DZ2907

6.8V-100PF

01005

ROOM=FOREHEAD

2

FRONTMIC3_TO_CODEC_AIN4_CONN_P

45

SYNC_MASTER=Sync

PAGE TITLE

B2B:FOREHEAD

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

29 OF 53

SHEET

29 OF 81

SYNC_DATE=06/06/2016

A

8 7 5 4 2 1

36

D

53 38 37 32 25 23 19

30 25 18

29 19

NEVADA POWER

NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM
IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.

VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY

U3001

LP5907UVX2.925-S

PP_VDD_BOOST

PP2V8_UT_AF_VAR

PP1V2_NH_NV_DVDD

VIN

B1

VEN

1

C3002

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=NEVADA

L3003

33-OHM-25%-1500MA

0201

ROOM=NEVADA

DSBGA

ROOM=NEVADA

GND

B2

21

VOUT

1

C3016

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=NEVADA

345678

2 1

THIS PAGE UNIQUE TO LARGE FORM FACTOR

NEVADA CONNECTOR

THIS ONE --->

A2A1

1

C3006

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=NEVADA

1

C3019

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=NEVADA

1

C3007

0.22UF

10%

6.3V

2

CER-X5R
01005

ROOM=NEVADA

1

C3021

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=NEVADA

1

C3009

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NEVADA

1

C3001

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NEVADA

1

C3028

15PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=NEVADA
Desense for Wifi frequencies

PP2V9_NV_AVDD_CONN

PP1V2_NV_VDD_CONN

30

30

I2C_NV_SDA_CONN

30

I2C_NV_SCL_CONN

30 30

45 30 25

UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN
AP_TO_NV_SHUTDOWN_CONN_L

30

UT_TO_NV_SYNC_J3001_CONN

30

PP1V8_NV_IO_CONN

30

LPDP_NV_BI_AP_AUX_CONN

30

PP3V3_NV_SVDD_CONN

30

PP1V8_NV_AF_CONN

30

PP1V2_NV_VDD_CONN

30

516S00152 RCPT (USED ON MLB)
516S00151 PLUG

AA26D-S022VA1

ROOM=NEVADA

J3001

F-ST-SM

24 23

2 1
4 3
6 5

8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21

26 25

90_LPDP_NV_TO_AP_D0_CONN_N
90_LPDP_NV_TO_AP_D0_CONN_P

90_LPDP_NV_TO_AP_D1_CONN_N
90_LPDP_NV_TO_AP_D1_CONN_P

AP_TO_NV_CLK_CONN
PP2V9_NV_AVDD_CONN

OTHER FORM FACTOR SPECIFIC PAGES:

4 - Mechanical

46 - FF Specific

30

30

30

30

30

D

C

B

A

30 25 18

25 18 17 16 13 12 11 9 8 7 5

26 25 23 21 19 18 10 9 4

40 39 37 35 34 33 31 28 27

52 48 47 46 39 29

19 7

29 25 19

53 46 41

10

10

10

10

10

PP2V8_UT_AF_VAR

PP1V8

PP3V3_USB

PP3V0_ALS_APS_CONVOY

LPDP FILTERS

PP_VDD_MAIN

1

C3003

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=NEVADA

LPDP_NV_BI_AP_AUX

90_LPDP_NV_TO_AP_D0_P

90_LPDP_NV_TO_AP_D0_N

90_LPDP_NV_TO_AP_D1_P

90_LPDP_NV_TO_AP_D1_N

NOSTUFF

L3005

33-OHM-25%-1500MA

21

0201

ROOM=NEVADA

L3001

33-OHM-25%-1500MA

21

0201

ROOM=NEVADA

L3002

33-OHM-25%-1500MA

21

0201

ROOM=NEVADA

L3004

33-OHM-25%-1500MA

21

0201

ROOM=NEVADA

NOSTUFF

L3006

33-OHM-25%-1500MA

21

0201

ROOM=NEVADA

1

C3004

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=NEVADA

LPDP_NV_BI_AP_AUX

MAKE_BASE=TRUE

90_LPDP_NV_TO_AP_D0_P

MAKE_BASE=TRUE

90_LPDP_NV_TO_AP_D0_N

MAKE_BASE=TRUE

90_LPDP_NV_TO_AP_D1_P

MAKE_BASE=TRUE

90_LPDP_NV_TO_AP_D1_N

MAKE_BASE=TRUE

1

C3032

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=NEVADA

D11: STUFF L3001, L3004. NOSTUFF L3005, L3006
D12: NOSTUFF L3001, L3004. STUFF L3005, L3006

1

C3017

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NEVADA

1

C3026

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NEVADA

1

C3030

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=NEVADA

1

C3033

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=NEVADA

1

C3020

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=NEVADA

1

C3018

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NEVADA

C3031

0.1UF

21

ROOM=NEVADA

C3022

ROOM=NEVADA

C3023

ROOM=NEVADA

C3024

ROOM=NEVADA

C3025

ROOM=NEVADA

X5R-CERM

X5R-CERM

20%

6.3V

X5R-CERM

01005

21

6.3V20%
01005

21

20% 6.3V

20% 6.3V

01005

21

01005X5R-CERM

21

6.3V20%
01005X5R-CERM

0.1UF

GND_VOID=TRUE

0.1UF

GND_VOID=TRUE

0.1UF

GND_VOID=TRUE

0.1UF

GND_VOID=TRUE

1

2

PP1V8_NV_AF_CONN

PP1V8_NV_IO_CONN

PP3V3_NV_SVDD_CONN

LPDP_NV_BI_AP_AUX_CONN

C3010

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=NEVADA

90_LPDP_NV_TO_AP_D0_CONN_P

90_LPDP_NV_TO_AP_D0_CONN_N

90_LPDP_NV_TO_AP_D1_CONN_P

90_LPDP_NV_TO_AP_D1_CONN_N

30

30

30

30

30

30

30

30

GPIO FILTERS

FL3002

150OHM-25%-200MA-0.7DCR

UT_TO_NV_SYNC_J2501_CONN UT_TO_NV_SYNC_J3001_CONN

45 30

01005

ROOM=NEVADA

45 30 25

UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN

1

C3029

100PF

5%
16V

2

NP0-C0G
01005

ROOM=RCAM_B2B

FL3001

150OHM-25%-200MA-0.7DCR

9

AP_TO_NV_SHUTDOWN_L

AP_TO_NV_SHUTDOWN_L

MAKE_BASE=TRUE

01005

ROOM=NEVADA

R3002

0.00

MAKE_BASE=TRUE

0%

1/32W

MF

01005

ROOM=NEVADA

R3001

I2C_ISP_NV_SDA

46 9

MAKE_BASE=TRUE

0.00

0%

1/32W

MF

01005

ROOM=NEVADA

FL3004

R3003

9

AP_TO_NV_CLK_R

AP_TO_NV_CLK_R

MAKE_BASE=TRUE

33.2

1/32W
01005

ROOM=SOC

21

1%
MF

NEAR SOC

1

C3005

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NEVADA

NOSTUFF

AP_TO_NV_CLK

1

C3008

100PF

5%
16V

2

NP0-C0G
01005

150OHM-25%-200MA-0.7DCR

01005

ROOM=NEVADA

ROOM=NEVADA

NOSTUFF

NEAR B2B

21

1

C3027

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NEVADA

1

C3011

100PF

5%
16V

2

NP0-C0G
01005

ROOM=NEVADA

21

21

21

21

AP_TO_NV_SHUTDOWN_CONN_L

1

C3012

220PF

5%
10V

2

C0G-CERM
01005

ROOM=NEVADA

CKPLUS_WAIVE=I2C_PULLUP

I2C_NV_SCL_CONNI2C_ISP_NV_SCL

1

C3013

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=NEVADA

CKPLUS_WAIVE=I2C_PULLUP

I2C_NV_SDA_CONN

1

C3014

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=NEVADA

AP_TO_NV_CLK_CONN

1

C3015

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=NEVADA

PAGE TITLE

30

30 46 9

30

30

SYNC_DATE=05/17/2016SYNC_MASTER=sync

C

B

A

B2B:NEVADA

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00482

REVISION

8.0.0

BRANCH

PAGE

30 OF 53

SHEET

30 OF 81

D

8 7 5 4 2 1

36

CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS)

34567 8

2 1

D

LOWERMIC1_TO_CODEC_AIN1_P

41

LOWERMIC1_TO_CODEC_AIN1_N

41

LOWERMIC4_TO_CODEC_AIN2_P

41

LOWERMIC4_TO_CODEC_AIN2_N

41

REARMIC2_TO_CODEC_AIN3_P

44

REARMIC2_TO_CODEC_AIN3_N

44

L2
L1

K3

L3

K2
K1

AIN1+
AIN1-

AIN2+
AIN2-

AIN3+
AIN3-

CRITICAL

ROOM=CODEC

U3101

WLCSP-1

SYM 1 OF 3

CS42L71

AOUT1+

AOUT1-

AOUT2+

AOUT2-

HPOUTA
HPOUTB

HS3
HS4

HS3_REF
HS4_REF

L9
M9

L8
M8

K10
K11

M5
M4
L10

M10

NC
NC

NC
NC

NC
NC

D

WAS FOR RECEIVER; REPLACED BY SPEAKER IN D1xy

C

For Borealis

HAWKING_TO_CODEC_AIN7_P

44

HAWKING_TO_CODEC_AIN7_N

44

FRONTMIC3_TO_CODEC_AIN4_P

29

FRONTMIC3_TO_CODEC_AIN4_N

29

NC
NC

NC
NC

NC
NC

AIN4+

J3

AIN4-

J4

AIN5+

F1

AIN5-

G1

AIN6+

F2

AIN6-

F3

G2

AIN7+

G3

AIN7-

A4

DMIC1_CLK

B4

DMIC1_DATA

HSIN+

HSIN-

HPDETECT

DP
DN

J9

D1
E1

J12
H12

NC
NC

NC

90_MIKEYBUS_CALTRA_DATA_P
90_MIKEYBUS_CALTRA_DATA_N

R3104

20.0

5%

1/32W

MF

01005

ROOM=CODEC

C

ROOM=CODEC

C3107

100PF

21

5%

16V

NP0-C0G

01005

21

90_MIKEYBUS_DATA_P

40

B

33

PDM_CODEC_TO_SPKAMP2_CLK
PDM_CODEC_TO_SPKAMP2_DATA

33

NC
NC

NC
NC

NC

C4

DMIC2_CLK

C3

DMIC2_DATA

A3

DMIC3_CLK

B3

DMIC3_DATA

A2

DMIC4_CLK

B2

DMIC4_DATA

A9

PDM_CLK

B9

PDM_DATA

MBUS_REF

G10

MIKEYBUS_REFERENCE

1

R3101

100

5%
1/32W
MF
01005

2

ROOM=CODEC

41

R3103

20.0

5%

1/32W

MF

01005

ROOM=CODEC

21

C3106

100PF

21

5%

16V

NP0-C0G

01005

ROOM=CODEC

90_MIKEYBUS_DATA_N

40

B

A

53

27 26 25 23 21 19 18 10 9 4

46 41 40 39 37 35 34 33 30 28

8 7 5 4 2 1

PP_VDD_MAIN

C3112

1

220PF

5%

2

10V
C0G-CERM
01005

ROOM=CODEC

AC return path for Mikeybus which is referenced to GND and VDD_MAIN

Radar 21203307

C3113

1

220PF

5%

2

10V
C0G-CERM
01005

ROOM=CODEC

SYNC_MASTER=Sync

PAGE TITLE

AUDIO:CALTRA CODEC (1/2)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

31 OF 53

SHEET

31 OF 81

SYNC_DATE=06/06/2016

A

CALTRA AUDIO CODEC (POWER & I/O)

345678

2 1

D

C

53 38 37 30 25 23 19

46 41 40 37 36 32 21 20 18 16

41

LOWERMIC1_TO_CODEC_BIAS_FILT_RET

41

LOWERMIC4_TO_CODEC_BIAS_FILT_RET

REARMIC2_TO_CODEC_BIAS_FILT_RET

45

35 34 33 19

53 52 48 47

PP1V8_VA

PP_VDD_BOOST

PP1V8_SDRAM

C3203

4.7UF

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

41

21

C3204

4.7UF

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

41

21

C3201

4.7UF

21

44

1

C3209

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=CODEC

CODEC_AGND

1

C3211

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=CODEC

1

C3212

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

1

C3213

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

32

PP_CODEC_TO_LOWERMIC1_BIAS
LOWERMIC1_BIAS_FILT_IN

PP_CODEC_TO_LOWERMIC4_BIAS
LOWERMIC4_BIAS_FILT_IN

PP_CODEC_TO_REARMIC2_BIAS
REARMIC2_BIAS_FILT_IN

1

C3214

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

1

C3215

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

1

C3205

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=CODEC

PP1V2_VD_FILT

1

C3217

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CODEC

1

C3221

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CODEC

M6

MIC1_BIAS

K7

MIC1_BIAS_FILT

L6

MIC2_BIAS

J7

MIC2_BIAS_FILT

K6

MIC3_BIAS

L5

MIC3_BIAS_FILT

J11

VCP

D12
VD

G12
VD

E12

C1

VD_FILT

VD_FILT

U3101

WLCSP-1

SYM 2 OF 3

CS42L71

ROOM=CODEC

CRITICAL

A5
VL

H11

M7
VP

VPROG_CP

J1
VA

H10

VP_MBUS

FLYP

FLYC

K12

L12

NC

NC

46 41 40 37 36 32 21 20 18 16

11

SPI_AP_TO_CODEC_CS_L

53 52 48 47

R3202

ROOM=CODEC

PP1V8_SDRAM

1

100K

5%

1/32W

MF

01005

2

36 35 34 33 11

36 35 34 33 11

1

R3201

1.00K

5%
1/32W
MF
01005

2

ROOM=CODEC

35 34 33 13

36 11

36 11

36 11

11

36 35 34 33

36 35 34 33

13

13

13

13

CODEC_RESET_L

AUDIO_TO_AOP_INT_L

SPI_AP_TO_CODEC_MAGGIE_SCLK

SPI_AP_TO_CODEC_MAGGIE_MOSI
SPI_CODEC_MAGGIE_TO_AP_MISO

I2S_AP_TO_CODEC_MCLK

I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
I2S_MAGGIE_TO_L26_CODEC_DOUT
I2S_L26_CODEC_TO_MAGGIE_DIN

I2S_CODEC_XSP_TO_AOP_BCLK
I2S_CODEC_XSP_TO_AOP_LRCLK
I2S_AOP_TO_CODEC_XSP_DOUT
I2S_CODEC_XSP_TO_AOP_DIN

NC

H3

RESET*

K8

WAKE*

K9

INT*

C9

CS*

C8

CCLK

B8

MOSI

A8

MISO

C12

MCLK

C6

ASP_SCLK

C5

ASP_LRCK/FSYNC

B5

ASP_SDIN

B6

ASP_SDOUT

B11

XSP_SCLK

C11

XSP_LRCK/FSYNC

A11

XSP_SDIN/DAC2B_MUTE

A10

XSP_SDOUT

U3101

WLCSP-1

SYM 3 OF 3

CS42L71

ROOM=CODEC

CRITICAL

JTAG_TMS

JTAG_TCK

JTAG_TDI

JTAG_TDO

TSTO
TSTO
TSTO
TSTO
TSTO
TSTO
TSTO
TSTO

TSTI
TSTI
TSTI
TSTI
TSTI
TSTI
TSTI
TSTI
TSTI

D3
D4
D2
C2

D11
B10
D5
D6
E5
E6
E7
K4

C10
D10
D7
D9
E8
E9
G11
H4
M1

NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC

D

C

B

FRONTMIC3_TO_CODEC_BIAS_FILT_RET

2

XW3203

SHORT-20L-0.05MM-SM

ROOM=FOREHEAD

1

NO_XNET_CONNECTION

OMIT

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

C3202

4.7UF

21

20%

6.3V

X5R-CERM1

402

ROOM=CODEC

29

PP_CODEC_TO_FRONTMIC3_BIAS

FRONTMIC3_BIAS_FILT_IN

1

C3222

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=CODEC

1

C3223

1.0UF

20%

6.3V

2

X5R
0201-1 0201-1

ROOM=CODEC

1

2

1

2

C3225

1.0UF

20%

6.3V
X5R
0201-1

ROOM=CODEC

C3224

1.0UF

20%

6.3V
X5R

ROOM=CODEC

NC
NC

J6

MIC4_BIAS

K5

MIC4_BIAS_FILT

M3

HS_BIAS_FILT

M2

HS_BIAS_FILT_REF

FLYN

+VCP_FILT

GNDCP

-VCP_FILT
LP_FILT+

FILT+

M12

J10

L11

M11

F12

H1

NC

NC

NC

CALTRA_LP_FILTP

CALTRA_FILTP

1

C3220

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=CODEC

11

I2S_AP_TO_CODEC_MSP_BCLK

11

I2S_AP_TO_CODEC_MSP_LRCLK

11

I2S_AP_TO_CODEC_MSP_DOUT

11

I2S_CODEC_TO_AP_MSP_DIN

20

PMU_TO_CODEC_DIGLDO_PULLDN

B7

MSP_SCLK

C7

MSP_LRCK/FSYNC

D8

MSP_SDIN

A7

MSP_SDOUT

H5

DIGLDO_PULLDN

J5

DIGLDO_PDN

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND

A1
A12
B12
E2
E3
E4
E10
F4
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
H6
H7
H8
H9

J8

B

A

GNDD

GNDD

GNDD

B1

A6

E11

XW3202

SHORT-10L-0.1MM-SM

2 1

ROOM=CODEC

GNDHS

GNDD

L4

F11

GNDP
L7

GNDA
J2

FILT-

H2

1

C3208

10UF

20%

6.3V

2

CERM-X5R
0402-9

ROOM=CODEC

CODEC_AGND

32

SYNC_MASTER=Sync

PAGE TITLE

AUDIO:CALTRA CODEC (2/2)

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

32 OF 53

SHEET

32 OF 81

SYNC_DATE=06/06/2016

A

8 7 5 4 2 1

36

34567 8

2 1

D

27 26 25 23 21 19 18 10 9 4

46 41 40 39 37 35 34 31 30 28

53

SPEAKER AMPLIFIER 2 (North)

PP_VDD_MAIN

C3327

10UF

20%
10V

X5R-CERM

0402-8

ROOM=SPKAMP2

D

PP1V8_VA

1

C3316

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SPKAMP2

20%

6.3V

1

2

1

C3326

10UF

2

CERM-X5R

0402-9

ROOM=SPKAMP2

20%

6.3V

1

2

C3328

10UF

20%

6.3V

CERM-X5R

ROOM=SPKAMP2

0402-9

1

2

C3313

10UF

CERM-X5R

0402-9

ROOM=SPKAMP2

C3329

2.2UF

X5R-CERM

0201-1

ROOM=SPKAMP2

20%

6.3V

1

2

1

C3315

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SPKAMP2

35 34 32 19

C

AP_TO_SPKAMP2_RESET_L

12

1

R3301

100K

5%
1/32W
MF
01005

2

ROOM=SPKAMP2

1.2UH-20%-3.0A-0.080OHM

PDM_ADARE_TO_CONVOY_CLK

29

1

R3304

100K

5%
1/32W
MF
01005

2

ROOM=SPKAMP2

MAKE_BASE=TRUE

CRITICAL

L3302

PIQA20161T-SM

ROOM=SPKAMP2

36 35 34 32 11

36 35 34 32 11

21

47

47

35 34 32 13

34

36 35 34 13

36 35 34 32

36 35 34 32

SPEAKERAMP2_LX

I2C2_AP_SDA
I2C2_AP_SCL
AUDIO_TO_AOP_INT_L

SPKAMP1_TO_SPKAMP2_SYNC
PDM_ADARE_TO_CONVOY_CLK
I2S_AOP_TO_MAGGIE_L26_MCLK
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
I2S_MAGGIE_TO_L26_CODEC_DOUT
I2S_L26_CODEC_TO_MAGGIE_DIN

A2

SW

B2

SW

D6

SDA

E6

SCL
INT*

A7

RESET*

A6
F6

ALIVE/SYNC
AD0/PDM_CLK1

E5
B7

MCLK

C7

SCLK

C6

LRCK/FSYNC

D7

SDIN

B6

SDOUT

A5

VP

F5

VA

U3301

CS35L26-A1

WLCSP

ROOM=SPKAMP2

CRITICAL

VBST_B
VBST_B

VBST_A
VBST_A

ISNS+

ISNS-

VSNS+

VSNS-

OUT+

OUT-

A1

PP_SPKR2_VBOOST

B1
C1

D1

SPEAKERAMP2_ISENSE_P

F1

SPEAKERAMP2_ISENSE_N

E1

E2

SPEAKER_TO_SPEAKERAMP2_VSENSE_P

E3

SPEAKER_TO_SPEAKERAMP2_VSENSE_N

D2
C2

1

C3312

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SPKAMP2

1

C3311

0.1UF

10%
16V

2

X5R-CERM
0201

ROOM=SPKAMP2

1

C3324

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=SPKAMP2

29

29

1

C3325

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=SPKAMP2

1

C3319

0.01UF

10%

6.3V

2

X5R
01005

ROOM=SPKAMP2

NO_XNET_CONNECTION

1

C3306

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=SPKAMP2

1

C3308

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=SPKAMP2

SPEAKERAMP2_TO_SPEAKER_OUT_POS
SPEAKERAMP2_TO_SPEAKER_OUT_NEG

C

46 45 29

46 45 29

B

31

PDM_CODEC_TO_SPKAMP2_CLK

31

PDM_CODEC_TO_SPKAMP2_DATA

29

PDM_CONVOY_TO_ADARE_DATA

PDM_CLK0

F7
E7

PDM_DATA0

D5

PDM_DATA1 AD1

A4

A3

B3

B4

GNDP

C4

C3

C5

D3

D4

GNDA

B5

E4

F2

FILT+

F4

SPEAKERAMP2_FILT

F3

1

C3318

1UF

10%
10V

2

X5R
402-1

ROOM=SPKAMP2

C3331

1000PF

10%
10V
X5R

ROOM=SPKAMP2

01005

1

2

1

C3323

1000PF

10%
10V

2

X5R
01005

ROOM=SPKAMP2

Pg46: Compass Compensation Coil

B

A

SYNC_MASTER=Sync

PAGE TITLE

AUDIO:SPEAKER AMP 2

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

33 OF 53
33 OF 81

D

SYNC_DATE=06/06/2016

A

SPEAKER AMPLIFIER 1

34567 8

(South)

2 1

D

27 26 25 23 21 19 18 10 9 4

46 41 40 39 37 35 33 31 30 28

53

PP_VDD_MAIN

C3407

10UF

20%
10V

X5R-CERM

0402-8

ROOM=SPKAMP1

D

#25112685,Remove C3414

PP1V8_VA

20%

6.3V

1

2

1

C3425

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SPKAMP1

1

C3426

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=SPKAMP1

1

C3405

10UF

2

CERM-X5R

0402-9

ROOM=SPKAMP1

20%

6.3V

1

C3424

10UF

2

CERM-X5R

0402-9

ROOM=SPKAMP1

35 33 32 19

C

B

35 13

PULLED LOW ON PG 35

AOP_TO_SPKAMP1_ARC_RESET_L

TO TRINITY

MAKE_BASE=TRUE

28

48

48

35 33 32 13

33

36 35 33 13

36 35 33 32 11

36 35 33 32 11

36 35 33 32

36 35 33 32

SPEAKERAMP1_LX

I2C_AOP_SDA
I2C_AOP_SCL
AUDIO_TO_AOP_INT_L

SPKAMP1_TO_SPKAMP2_SYNC
GND
I2S_AOP_TO_MAGGIE_L26_MCLK
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
I2S_MAGGIE_TO_L26_CODEC_DOUT
I2S_L26_CODEC_TO_MAGGIE_DIN

NC
NC

A5

VP

A2

SW

B2

SW

D6

SDA

E6

SCL

A7

INT*

A6

RESET*

F6

ALIVE/SYNC

E5

AD0/PDM_CLK1

B7

MCLK

C7

SCLK

C6

LRCK/FSYNC

D7

SDIN

B6

SDOUT

F7

PDM_CLK0

E7

PDM_DATA0

D5

PDM_DATA1 AD1

B4

B3

A4

A3

U3402

CS35L26-A1

WLCSP

ROOM=SPKAMP1

CRITICAL

GNDP

C5

C4

C3

D3

D4

F5

VA

GNDA

B5

E4

VBST_B
VBST_B

VBST_A
VBST_A

ISNS+

ISNS-

VSNS+

VSNS-

OUT+

OUT-

FILT+

F2

A1
B1

C1
D1

F1

SPEAKERAMP1_ISENSE_P

E1

SPEAKERAMP1_ISENSE_N

E2

SPEAKER_TO_SPEAKERAMP1_VSENSE_P

E3

SPEAKER_TO_SPEAKERAMP1_VSENSE_N

D2
C2

F4

SPEAKERAMP1_FILT

F3

PP_SPKR1_VBOOST

1

C3427

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SPKAMP1

1

2

C3428

0.1UF

10%
16V
X5R-CERM
0201

ROOM=SPKAMP1

1

C3429

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=SPKAMP1

1

C3403

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=SPKAMP1

41

41

1

C3404

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=SPKAMP1

1

C3430

0.01UF

10%

6.3V

2

X5R
01005

ROOM=SPKAMP1
NO_XNET_CONNECTION

1

C3431

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=SPKAMP1

SPEAKERAMP1_TO_SPEAKER_OUT_POS
SPEAKERAMP1_TO_SPEAKER_OUT_NEG

10%
10V
X5R

1

2

C3422

1000PF

01005

ROOM=SPKAMP1 ROOM=SPKAMP1

1

C3434

1000PF

10%
10V

2

X5R
01005

1

C3432

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=SPKAMP1

C

41

41

B

A

SYNC_MASTER=Sync

PAGE TITLE

AUDIO:SPEAKER AMP 1

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

34 OF 53
34 OF 81

D

SYNC_DATE=06/06/2016

A

ARC DRIVER

345678

2 1

D

#25742582,Add back C3531 for D10x at Pg46

0201 C3525 is at Pg46

53

27 26 25 23 21 19 18 10 9 4

46 41 40 39 37 34 33 31 30 28

PP_VDD_MAIN

C3530

10UF

X5R-CERM

0402-8

ROOM=ARC1

20%
10V

1

2

C3532

10UF

20%

6.3V

CERM-X5R

0402-9

ROOM=ARC1

D

PP1V8_VA

1

2

1

C3527

0.1UF

20%

6.3V

2

X5R-CERM
01005 0201-1

ROOM=ARC1

1

2

C3534

2.2UF

20%

6.3V
X5R-CERM

ROOM=ARC1

35 34 33 32 19

C

B

34 13

AOP_TO_SPKAMP1_ARC_RESET_L

1

R3508

100K

5%
1/32W
MF
01005

2

ROOM=ARC1

35 34 33 32 19

NOSTUFF

C3501

10PF

01005

ROOM=ARC1

PP1V8_VA

1

5%

16V

2

CERM

TO TRINITY

34 33 32 13

MAKE_BASE=TRUE

36 34 33 13

36 34 33 32 11

36 34 33 32 11

36 34 33 32

36 34 33 32

ARC1_LX

28

I2C_AOP_SDA

48

48

I2C_AOP_SCL
AUDIO_TO_AOP_INT_L

NC FROM HOMER PER #25452686

PP1V8_VA
I2S_AOP_TO_MAGGIE_L26_MCLK

I2S_MAGGIE_TO_AP_L26_CODEC_BCLK

I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
I2S_MAGGIE_TO_L26_CODEC_DOUT
I2S_L26_CODEC_TO_MAGGIE_DIN

NC

NC
NC

A5

VP

A2

SW

B2

SW

D6

SDA

E6

SCL

A7

INT*

A6

RESET*

F6

ALIVE/SYNC

E5

AD0/PDM_CLK1

B7

MCLK

C7

SCLK

C6

LRCK/FSYNC

D7

SDIN

B6

SDOUT

F7

PDM_CLK0

E7

PDM_DATA0

D5

PDM_DATA1 AD1

A4

A3

B3

GNDP

B4

U3502

CS35L26-A1

WLCSP

ROOM=SPKAMP2

CRITICAL

C5

C4

C3

D3

D4

F5

VA

GNDA

B5

VBST_B
VBST_B

VBST_A
VBST_A

F2

E4

ISNS+

ISNS-

VSNS+

VSNS-

OUT+

OUT-

FILT+

A1
B1

C1
D1

F1

ARC1_ISENSE_P

E1

ARC1_ISENSE_N

E2

SOLENOID1_TO_ARC1_VSENSE_POS

E3

SOLENOID1_TO_ARC1_VSENSE_NEG

D2
C2

F4

ARC1_FILT

F3

PP_ARC1_VBOOST

1

C3526

220PF

5%
10V

2

C0G-CERM
01005

ROOM=ARC1

1

C3535

0.1UF

10%
16V

2

X5R-CERM
0201

ROOM=ARC1

C3536

1

2.2UF

20%

2

6.3V
X5R-CERM
0201-1

ROOM=ARC1

VOLTAGE=8.0V

1

C3537

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=ARC1

VOLTAGE=8.0V

VOLTAGE=8.0V

41

41

C3529

1000PF

ROOM=ARC1

1

C3524

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=ARC1

1

C3528

2

10%
10V
X5R

01005

0.01UF

10%

6.3V
X5R
01005

ROOM=ARC1

NO_XNET_CONNECTION

1

2

1

C3542

1000PF

10%
10V

2

X5R
01005

1

C3538

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=ARC1

1

C3539

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=ARC1

ARC1_TO_SOLENOID1_OUT_POS
ARC1_TO_SOLENOID1_OUT_NEG

ROOM=ARC1

C

41

41

B

A

SYNC_MASTER=Sync

PAGE TITLE

ARC:DRIVER

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

35 OF 53
35 OF 81

D

SYNC_DATE=06/06/2016

A

345678

2 1

D

46 41 40 37 36 32 21 20 18 16

53 52 48 47

APN: 353S00842

PP1V8_SDRAM

B1

U3603

LD39130S-1.2V/AP

IN
EN

CSP

GND

B2

OUT

D

MAGGIEMAGGIE LDO

APN: 336S00020

A2A1

PP1V2_MAGGIE

1

2

C3605

4UF

20%

6.3V
CER-X5R
0201

ROOM=ARC_CTRL

R3601

100

5%

1/32W

MF

01005

ROOM=ARC_CTRL

1

C3601

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=ARC_CTRL

21

PP1V2_MAGGIE_PLL

1

C3602

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=ARC_CTRL

C

B

HOMER STM32L0 MICRO

STM32L03 APN: 337S00231

PP3601

P2MM-NSM

ROOM=HOMER

PP3602

P2MM-NSM

ROOM=HOMER

12

UART_HOMER_TO_AP_RXD

12

UART_AP_TO_HOMER_TXD

R3607

100

5%

1/32W

MF

01005

ROOM=HOMER

21

AP_BI_HOMER_BOOTLOADER_ALIVE_R

47 41

47 41

53 17 13

46 41 40 37 36 32 21 20 18 16

SM

SM

PP

MAGGIE_TO_HOMER_WAKE

36

13

HOMER_TO_AOP_WAKE_INT

1

PP

1

53 52 48 47

I2C_HOMER_SCL
I2C_HOMER_SDA

13

SWD_AP_BI_HOMER_SWDIO

SWD_AP_TO_MANY_SWCLK

PP1V8_SDRAM

C3603

2.2UF

6.3V

X5R-CERM

0201-1

ROOM=HOMER

20%

1

2

NC
NC

NC

NC

E5

PA0_CLK_IN

B4

PA1

D4

PA2

E4

PA3

B3

PA4

D3

PA5

E3

PA6

C3

PA7

C1

PA8

B1

PA9

C2

PA10

A1

PA13

A2

PA14

C4

D1

VDDAVDD

U3601

STM32L031E6Y6D

ROOM=HOMER

WLCSP

PC14_OSC32_IN

PC15_OSC32_OUT

RST*

BOOT0

VSSA

E1

PB0
PB1
PB3
PB6
PB7

E2
D2

SPI_MAGGIE_TO_HOMER_POS_MOSI

B2
A3
A4

NC

B5

NC

C5

NC

D5

PMU_TO_HOMER_RESET_L

A5

AP_BI_HOMER_BOOTLOADER_ALIVE

NOTE: RESET HAS INTERNAL 65K PULLUP

1

R3611

27K

5%
1/32W
MF
01005

2

ROOM=HOMER

36 24 18

12

VPP_2V5 must be > 1.71V for SPI Slave programming

PP1V8_MAGGIE_IMU

1

C3604

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=ARC_CTRL

36

MAGGIE_TO_HOMER_WAKE

SPI_MAGGIE_TO_HOMER_POS_SCLK

SPI_HOMER_TO_MAGGIE_POS_MISO

13

AOP_TO_MAGGIE_EN

13

MAGGIE_TO_AOP_INT

20

1

C3607

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=HOMER

1

C3606

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=ARC_CTRL

NC
NC

NC
NC

NC

A2

IRLED

C6

RGB0

B6

RGB1

A6

RGB2

B5

IOT_46B_G0

F6

IOB_2A

E6

IOB_3B_G6

D6

IOB_4A

D5

IOB_5B

F5

IOB_6A

E5

IOB_7B

B3

C4

A4

VCCPLL

VCCIO_2

VCCIO_0

ICE5LP4K-SWG36I

U3602

BANK 0

ROOM=ARC_CTRL

CRITICAL

GND_LED

A1

D4

WLCSP

BANK 2

GND

C5

A5

VCC

VPP_2V5

IOB_12A_G4_CDONE

BANK 1

IOB_32A_SPI_SO

IOB_33B_SPI_SI

IOB_34A_SPI_SCK

IOB_35B_SPI_CSN

GND

A3

C3

SPI_VCCIO1

IOB_10A

IOB_11B_G5

IOB_16A
IOB_20A

IOB_25B_G3

IOB_26A
IOB_27B
IOB_29B
IOB_30A
IOB_31B

CRESET_B

B4
F4
E4
F3
E3
C2
B1
D2
E2
C1
B2
F2
D1
E1
F1

D3

NC

I2S_MAGGIE_TO_AP_L26_CODEC_BCLK_R
MAGGIE_TO_AP_CDONE
UART_AOP_TO_MAGGIE_TXD
I2S_MAGGIE_TO_AP_DIN
I2S_AOP_TO_MAGGIE_L26_MCLK
I2S_MAGGIE_TO_L26_CODEC_DOUT
I2S_L26_CODEC_TO_MAGGIE_DIN
I2S_AP_TO_MAGGIE_DOUT

I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
SPI_CODEC_MAGGIE_TO_AP_MISO
SPI_AP_TO_CODEC_MAGGIE_MOSI
SPI_AP_TO_CODEC_MAGGIE_SCLK
SPI_AP_TO_MAGGIE_CS_L

AP_TO_MAGGIE_CRESETB_L

1

R3603

511K

1%
1/32W
MF
01005

2

12

13

11

11

35

C

R3604

33.2

1%

1/32W

MF

01005

ROOM=ARC_CTRL

35 34 33 13

35 34 33 32

MAGGIE <-> ARC, SPKRS, CODEC (SDOUT)
MAGGIE <-> ARC, SPKRS, CODEC (SDIN)

35 34 33 32

MAGGIE <-> AP (SDOUT)

34 33 32 11

MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC

32 11

32 11

32 11

MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC

21

I2S_MAGGIE_TO_AP_L26_CODEC_BCLK

MAGGIE <-> AP (SDIN)

PP1V8_MAGGIE_IMU

1

R3605

10K

5%
1/32W
MF
01005

2

1

R3602

10K

5%
1/32W
MF
01005

2

9

12

35 34 33 32 11

36 24 18

B

A

#24543115: Scrub Value

SYNC_MASTER=Sync

PAGE TITLE

ARC:MAGGIE

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

36 OF 53
36 OF 81

D

SYNC_DATE=06/06/2016

A

DISPLAY & TOUCH - POWER SUPPLIES

345678

2 1

D

CHESTNUT DISPLAY PMU

APN:338S1172

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

53 46

1.0UH-20%-2.25A-0.15OHM

PP_VDD_MAIN

CRITICAL

L3704

PIXB2016FE-SM

ROOM=CHESTNUT

1

2

20 47

47

39 20

40 20 13 7

20

C3722 See Page46

C3710

10UF

20%

6.3V

CERM-X5R

0402-9

ROOM=CHESTNUT

CHESTNUT_LX

I2C0_AP_SCL
I2C0_AP_SDA
LCM_TO_CHESTNUT_PWR_EN

PMU_TO_AOP_TRISTAR_ACTIVE_READY
CHESTNUT_TO_PMU_ADCMUX

6.3V

PP_CHESTNUT_CP

1

C3707

10UF

20%
VOLTAGE=10V
X5R-CERM

2

0402-8

1

ROOM=CHESTNUT

PN_CHESTNUT_CN

D

NOSTUFF

2

D1

VIN

B2

SW

A2

SYNC

NO INT PULL

D3

SCL

D2

SDA

C3

LCM_EN

200K INT PD

C2

RESET*

NO INT PULL

E1

ADCMUX

U3703

TPS65730A0PYFF

BGA

ROOM=CHESTNUT

CF1
CF2

CRITICAL

LCMBST

CPUMP

VNEG

VNEG(SUB)

HVLDO1
HVLDO2

PGND1

PGND2

D4

HVLDO3

C1

AGND

B1

C4
E4

B3
B4

E3
E2
A4
A3
A1

PP6V0_LCM_BOOST

1

C3711

1UF

20%
16V

2

CER-X5R
0201

ROOM=CHESTNUT

1

C3712

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=CHESTNUT

1

C3713

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=CHESTNUT

1

C3726

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=CHESTNUT

1

C3714

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=CHESTNUT

NOSTUFF

1

C3727

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=CHESTNUT

1

2

#24543286: Densense Cap for Chestnut Charge Pump

C3715

4.7UF

20%
10V
X5R-CERM
0402

ROOM=CHESTNUT

1

C3716

4.7UF

20%
10V

2

X5R-CERM
0402

ROOM=CHESTNUT

1

C3717

220PF

5%
10V

2

C0G-CERM
01005

ROOM=CHESTNUT

PN5V7_LCM_MESON_AVDDN

PP5V7_MESON_AVDDH
PP5V7_LCM_AVDDH
PP5V1_TOUCH_VDDH

39

39

39

39

C

LED BACKLIGHT DRIVER - 6LED

APN:353s00640

27 26 25 23 21 19 18 10 9 4

40 39 37 35 34 33 31 30 28

47 46 41 40 36 32 21 20 18 16

53 46 41

PP_VDD_MAIN

C3702

VOLTAGE=6.3V

CERM-X5R

0402-9

ROOM=BACKLIGHT

53 52 48

PP1V8_SDRAM

46 11

DWI_PMGR_TO_BACKLIGHT_DATA

46 11

DWI_PMGR_TO_BACKLIGHT_CLK

10UF

20%

1

2

TO TRINITY

D4

IN OUT

D3

VIO/HWEN

C2

SDI

C3

SCK

BL_SW2_LX

28

BL_SW1_LX

28

U3701

LM3539A1

DSBGA

CRITICAL

25V

25V

SW1

SW2_1
SW2_2

A1
C4
A3

A4

CRITICAL

D3701

DSN2

KA

NSR05F30NXT5G

ROOM=BACKLIGHT

CRITICAL

D3702

NSR0530P2T5G

A K

SOD-923-1

ROOM=BACKLIGHT

#26634069:D1x, C3715/C3716 to 138S0719 0402 4.7uF

1

C3703

220PF

2%
50V 35V

2

C0G
0201

ROOM=BACKLIGHT
PLACE_NEAR=U3701:2MM

1

C3725

2.2UF

20%
35V

2

X5R
0402

1

C3704

2.2UF

20%
35V

2

0402

1

C3706

2.2UF

20%
35V

2

X5RX5R
0402

1

C3705

2.2UF

20%
35V

2

X5R
0402

1

C3721

2.2UF

20%

2

X5R
0402

PP_LCM_BL_ANODE

C

39

B

A

I2C0_AP_SDA

47

I2C0_AP_SCL

47

AP_TO_MUON_BL_STROBE_EN

46 9

53 46 26

BB_TO_STROBE_DRIVER_GSM_BURST_IND

MOJAVE MESA BOOST

APN:353S00671

L3703

1.0UH-20%-0.4A-0.636OHM

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

53 38 32 30 25 23 19

53 46

PP_VDD_BOOST

C3718

10UF

6.3V

CERM-X5R

0402-9

ROOM=MOJAVE

C3724

10UF

6.3V

CERM-X5R

0402-9

ROOM=MOJAVE

20%

20%

1

ROOM=MOJAVE

CRITICAL

2

1

2

0403

21

POS18V0_MESA_LXPP_VDD_MAIN

MESA_TO_BOOST_EN

38 4

PP17V0_MOJAVE_LDOIN

1

R3701

200K

1%
1/32W
MF
01005

2

ROOM=BACKLIGHT

B2
A2

D1
D2

B1

B2
A3

C2

SDA
SCL

TRIG
INHIBIT

SW

VIN
EN_M

EN_S
LDOIN

ROOM=BACKLIGHT

GND

GND

B4

B3

U3702

LM3638A0

BGA

ROOM=MOJAVE

CRITICAL

PGND

AGND

A1

B3

LED1

LED2

VOUT

PMID

C1
B1

C3A2

C1

1

C3708

100PF

5%
35V

2

NP0-C0G
01005

ROOM=MOJAVE

1

C3709

100PF

5%
35V

2

NP0-C0G
01005

ROOM=MOJAVE

PP_LCM_BL_CAT1
PP_LCM_BL_CAT2

PP16V0_MESA

1

C3720

2.2UF

20%
35V

2

X5R
0402

ROOM=MOJAVE

1

C3719

2.2UF

20%
35V

2

X5R
0402

ROOM=MOJAVE

39

39

SYNC_MASTER=Sync

PAGE TITLE

DISPLAY & MESA:POWER

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

37 OF 53

SHEET

37 OF 81

SYNC_DATE=06/17/2016

B

A

8 7 5 4 2 1

36

345678

2 1

D

MESA POWER

19

PP3V0_MESA

1

C3813

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=MAMBA_MESA

1

C3814

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=MAMBA_MESA

1

C3815

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=MAMBA_MESA

1

C3821

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=MAMBA_MESA

FL3801

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=MAMBA_MESA

1

C3802

220PF

5%
10V

2

C0G-CERM
01005

ROOM=MAMBA_MESA

FL3803

80-OHM-25%-0.52A-0.17OHM

21

0201

ROOM=MAMBA_MESA

PP1V8_MESA_CONNPP1V8_MESA

1

C3822

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=MAMBA_MESA

CRITICAL

MAMBA AND MESA CONNECTOR

MLB: 516S00141 (RCPT)
FLEX: 516S00142 (PLUG)

PP3V0_MESA_CONN

1

C3804

220PF

5%
10V

2

C0G-CERM
01005

ROOM=MAMBA_MESA

38 48 19

38

LCM_TO_MAMBA_MSYNC_CONN

45

1

C3807

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=MAMBA_MESA

P2MM-NSM

SM

1

PP

PP3801

38

PP3V0_MESA_CONN

38

PP16V0_MESA_CONN

38

MAMBA_TO_LCM_MDRIVE_CONN_MESA

45 39

AP_TO_TOUCH_MAMBA_RESET_CONN_L

TP_MAMBA_HINT_L

I2C_TOUCH_BI_MAMBA_SDA

47

I2C_TOUCH_TO_MAMBA_SCL

47

38

PP1V8_TOUCH_TO_MAMBA_CONN

GUARD

J3801

BB35C-RA24-3A

F-ST-SM

26 25

2 1
4 3
6 5

8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21
24 23

28 27

29

Matches flex_x452_acf, schematic revision 1.5.0 pinout

PP1V8_MESA_CONN

MESA_TO_AOP_FDINT_CONN
I2C_MESA_TURTLE_SDA_CONN
I2C_MESA_TURTLE_SCL_CONN
MESA_TO_BOOST_EN_CONN
MESA_TO_AP_INT_CONN
SPI_AP_TO_MESA_SCLK_CONN
SPI_AP_TO_MESA_MOSI_CONN
AOP_TO_MESA_BLANKING_EN_CONN
SPI_MESA_TO_AP_MISO_CONN
PP2V75_MAMBA_CONN

38

38

48

48

38

38

38

38

38

38

38

D

C

FL3802

150OHM-25%-200MA-0.7DCR

01005

ROOM=MAMBA_MESA

21

1

C3803

100PF

5%
35V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

PP16V0_MESA_CONNPP16V0_MESA

38 37 4

MESA DIGITAL I/O

FL3807

150OHM-25%-200MA-0.7DCR

SPI_AP_TO_MESA_MOSI SPI_AP_TO_MESA_MOSI_CONN

11 38

1

R3807

511K

1%
1/32W
MF
01005

2

ROOM=MAMBA_MESA

01005

ROOM=MAMBA_MESA

R3809

11

SPI_AP_TO_MESA_SCLK

1

R3808

511K

1%
1/32W
MF
01005

2

ROOM=MAMBA_MESA

0.00

0%

1/32W

MF

ROOM=MAMBA_MESA

01005

R3811

11 38

SPI_MESA_TO_AP_MISO SPI_MESA_TO_AP_MISO_CONN

33.2

1%

1/32W

MF

01005

ROOM=MAMBA_MESA

21

1

C3816

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=MAMBA_MESA

21

1

C3817

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=MAMBA_MESA

21

1

C3818

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=MAMBA_MESA

SPI_AP_TO_MESA_SCLK_CONN

38

47 46 39 38 18

53 37 32 30 25 23 19

PP1V8_TOUCH

PP_VDD_BOOST

MAMBA POWER

C3828

2.2UF

X5R-CERM

0201-1

ROOM=MAMBA_MESA

XW3801

SHORT-20L-0.05MM-SM

21

ROOM=PMU

OMIT

1

20%

6.3V

2

MAMBA_LDO_EN

47 46 39 38 18

LP5907SNX-2.75

VIN

ROOM=MAMBA_MESA

EN

3

PP1V8_TOUCH

U3801

X2SON

MAMBA DIGITAL I/O

150OHM-25%-200MA-0.7DCR

MAMBA_TO_LCM_MDRIVE

45

5%

25V

1

2

C3805

56PF

NP0-C0G-CERM

ROOM=MAMBA_MESA

01005

NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM
IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.

VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY

VOUT

EPADGND

5

2

14

1

C3823

10UF

20%
10V

2

X5R-CERM
0402-8

ROOM=MAMBA_MESA

R3805

0.00

1/32W
01005

ROOM=MAMBA_MESA

21

0%
MF

FL3804

21

01005

ROOM=MAMBA_MESA

1

2

30

ROOM=MAMBA_MESA

1

C3812

220PF

5%
10V

2

C0G-CERM
01005

ROOM=MAMBA_MESA

1

C3824

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=MAMBA_MESA

NOSTUFF

C3806

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=MAMBA_MESA

TI:353S00576
ST:353S00932

PP2V75_MAMBA_CONN

PP1V8_TOUCH_TO_MAMBA_CONN

1

C3811

220PF

5%
10V

2

C0G-CERM
01005

ROOM=MAMBA_MESA

MAMBA_TO_LCM_MDRIVE_CONN_MESA

38

C

38

38

B

R3801

11

MESA_TO_AP_INT

681

1/32W
01005

ROOM=MAMBA_MESA

1%
MF

21

1

C3819

100PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

MESA_TO_AP_INT_CONN

R3802

37 4

MESA_TO_BOOST_EN

681

1/32W
01005

ROOM=MAMBA_MESA

150OHM-25%-200MA-0.7DCR

AOP_TO_MESA_BLANKING_EN

13 38

21

1%
MF

FL3811

01005

1

C3801

100PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

21

AOP_TO_MESA_BLANKING_EN_CONN

1

C3825

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=MAMBA_MESA

MESA_TO_BOOST_EN_CONN

38

38

FL3806

150OHM-25%-200MA-0.7DCR

MESA_TO_AOP_FDINT

13 38

01005

ROOM=MAMBA_MESA

21

1

C3826

100PF

5%
16V

2

NP0-C0G
01005

ROOM=MAMBA_MESA

MESA_TO_AOP_FDINT_CONN

#24543342: stuff 100pF

B

A

SYNC_MASTER=Sync

PAGE TITLE

B2B:ORB & MESA

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

38 OF 53
38 OF 81

D

SYNC_DATE=06/06/2016

A

D

37

PP5V7_LCM_AVDDH

C3901

10UF

X5R-CERM

ROOM=DISPLAY_B2B

0402-8

25 18 17 16 13 12 11 9 8 7 5

1

20%
10V

2

52 48 47 46 30 29

1

2

PP1V8

C3929

10UF

20%
10V
X5R-CERM
0402-8

ROOM=DISPLAY_B2B

FL3912

240-OHM-25%-0.42A-0.31DCR

2 1

0201

ROOM=DISPLAY_B2B

1

C3933

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=DISPLAY_B2B

FL3906

240-OHM-25%-0.42A-0.31DCR

2 1

0201

ROOM=DISPLAY_B2B

1

C3934

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=DISPLAY_B2B

PP5V7_LCM_AVDDH_CONN

1

C3913

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

PP1V8_LCM_CONN

1

C3914

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

45

45

345678

DISPLAY MIPIDISPLAY POWER

90_MIPI_AP_TO_LCM_CLK_P

9

90_MIPI_AP_TO_LCM_DATA0_P

9

L3901

65OHM-0.7-2GHZ-3.4OHM

65OHM-0.7-2GHZ-3.4OHM

TAM0605

SYM_VER-1

4

3 2

ROOM=DISPLAY_B2B

L3902

TAM0605

SYM_VER-1

4

CRITICAL

1

1

CRITICAL

90_MIPI_AP_TO_LCM_CLK_CONN_P

90_MIPI_AP_TO_LCM_CLK_CONN_N90_MIPI_AP_TO_LCM_CLK_N

90_MIPI_AP_TO_LCM_DATA0_CONN_P

45

45 9

AP/TOUCH INTERFACE

45

2 1

D

9

90_MIPI_AP_TO_LCM_DATA0_N

9

90_MIPI_AP_TO_LCM_DATA1_P

3 2

ROOM=DISPLAY_B2B

L3903

65OHM-0.7-2GHZ-3.4OHM

4

TAM0605

SYM_VER-1

1

CRITICAL

90_MIPI_AP_TO_LCM_DATA0_CONN_N

90_MIPI_AP_TO_LCM_DATA1_CONN_P

45

45

C

B

37

37

47 46 38 18

37

BACKLIGHT

AC Coupling Caps

PN5V7_LCM_MESON_AVDDN

PP5V7_MESON_AVDDH

PP1V8_TOUCH

ROOM=DISPLAY_B2B

PP5V1_TOUCH_VDDH

37

37

37

PP_LCM_BL_ANODE

PP_LCM_BL_CAT1

PP_LCM_BL_CAT2

FL3908

240-OHM-25%-0.42A-0.31DCR

2 1

0201

ROOM=DISPLAY_B2B

FL3909

240-OHM-25%-0.42A-0.31DCR

2 1

0201

ROOM=DISPLAY_B2B

FL3910

33-OHM-25%-1500MA

21

0201

ROOM=DISPLAY_B2B

C3932

2.2UF

20%

6.3V

X5R-CERM

0201-1

1

2

FL3911

240-OHM-25%-0.42A-0.31DCR

2 1

0201

ROOM=DISPLAY_B2B

FL3901

33-OHM-25%-1500MA

21

0201

ROOM=DISPLAY_B2B

FL3902

33-OHM-25%-1500MA

21

0201

ROOM=DISPLAY_B2B

FL3903

33-OHM-25%-1500MA

21

0201

ROOM=DISPLAY_B2B

PN5V7_LCM_MESON_AVDDN_CONN

1

C3909

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

PP5V7_MESON_AVDDH_CONN

1

C3910

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

1

C3940

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=DISPLAY_B2B

PP1V8_TOUCH_CONN

1

C3911

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

PP5V1_TOUCH_VDDH_CONN

1

C3912

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

PP_LCM_BL_ANODE_CONN

1

C3903

220PF

2%
50V

2

C0G
0201

ROOM=DISPLAY_B2B

VOLTAGE=25.0V

PP_LCM_BL_CAT1_CONN

1

C3904

100PF

5%
35V

2

NP0-C0G
01005

ROOM=DISPLAY_B2B

PP_LCM_BL_CAT2_CONN

1

C3905

100PF

5%
35V

2

NP0-C0G
01005

ROOM=DISPLAY_B2B

90_MIPI_AP_TO_LCM_DATA1_N

9

LCM_TO_CHESTNUT_PWR_EN

37 20

AP_TO_LCM_RESET_L

12

R3901

ROOM=DISPLAY_B2B

PMU_TO_LCM_PANICB

20

AOP/TOUCH INTERFACE

53 23 20 13

LCM_TO_MANY_BSYNC

UART_TOUCH_TO_AOP_RXD

13

13

UART_AOP_TO_TOUCH_TXD

3 2

ROOM=DISPLAY_B2B

150OHM-25%-200MA-0.7DCR

150OHM-25%-200MA-0.7DCR

01005

1

100K

5%

1/32W

MF

01005

2

150OHM-25%-200MA-0.7DCR

150OHM-25%-200MA-0.7DCR

150OHM-25%-200MA-0.7DCR

FL3913

2 1

01005

ROOM=DISPLAY_B2B

FL3915

R3915

10

21

5%

1/32W

MF

01005

ROOM=DISPLAY_B2B

FL3916

2 1

01005

ROOM=DISPLAY_B2B

FL3917

2 1

01005

ROOM=DISPLAY_B2B

FL3918

2 1

01005

ROOM=DISPLAY_B2B

FL3904

90_MIPI_AP_TO_LCM_DATA1_CONN_N

LCM_TO_CHESTNUT_PWR_EN_CONN

1

C3916

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

21

AP_TO_LCM_RESET_CONN_L

1

C3917

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

PMU_TO_LCM_PANICB_CONN

1

C3918

100PF

5%
16V

2

NP0-C0G
01005

ROOM=DISPLAY_B2B

45

45

45

45

AP_TO_TOUCH_MAMBA_RESET_L

12

11

SPI_AP_TO_TOUCH_CS_L

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DISPLAY_B2B

To Display B2B

FL3922

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DISPLAY_B2B

1

C3915

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

1

C3924

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

AP_TO_TOUCH_MAMBA_RESET_CONN_L

1

C3902

220PF

5%
10V

2

C0G-CERM
01005

ROOM=MAMBA_MESA

To Mamba/Mesa B2B

SPI_AP_TO_TOUCH_CS_CONN_L

45 38

C

45

R3923

LCM_TO_MANY_BSYNC_CONN

1

C3919

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

45

11 45

SPI_AP_TO_TOUCH_SCLK SPI_AP_TO_TOUCH_SCLK_CONN

NOSTUFF

5%

25V

1

2

C3922

56PF

NP0-C0G-CERM

ROOM=DISPLAY_B2B

01005

0.00

1/32W
01005

ROOM=DISPLAY_B2B

FL3924

150OHM-25%-200MA-0.7DCR

SPI_AP_TO_TOUCH_MOSI

11

2 1

01005

ROOM=DISPLAY_B2B

0%
MF

21

1

C3923

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

1

C3925

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

SPI_AP_TO_TOUCH_MOSI_CONN

45

B

FL3919

150OHM-25%-200MA-0.7DCR

UART_TOUCH_TO_AOP_RXD_CONN

1

C3920

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

UART_AOP_TO_TOUCH_TXD_CONN

1

C3921

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

45

45

SPI_TOUCH_TO_AP_MISO

11

12

TOUCH_TO_AP_INT_L

AP_TO_CUMULUS_CLK32K

11

2 1

01005

ROOM=DISPLAY_B2B

1

2

FL3920

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DISPLAY_B2B

1

2

R3908

33.2

2

1/32W

ROOM=DISPLAY_B2B

01005

1%
MF

1

1

2

C3926

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

C3927

100PF

5%
16V
NP0-C0G
01005

ROOM=DISPLAY_B2B

C3928

100PF

5%
16V
NP0-C0G
01005

ROOM=DISPLAY_B2B

AP_TO_CUMULUS_CLK_32K_CONN

SPI_TOUCH_TO_AP_MISO_CONN

TOUCH_TO_AP_INT_L_CONN

45

45

45

A

28 27 26 25 23 21 19 18 10 9 4

53 46 41 40 37 35 34 33 31 30

8 7 5 4 2 1

PP_VDD_MAIN

1

C3930

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B

AC return path for LCM MIPI which is referenced to GND and VDD_MAIN

1

C3931

220PF

5%
10V

2

C0G-CERM
01005

1

C3935

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

1

C3936

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

1

C3937

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

For placement "along the way" as we route from SOC to B2B.

1

C3938

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2B

1

C3939

220PF

5%
10V

2

C0G-CERM
01005

SYNC_MASTER=Sync

PAGE TITLE

SYNC_DATE=06/06/2016

A

B2B FILTERS: DISPLAY & TOUCH

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00482

REVISION

8.0.0

BRANCH

PAGE

39 OF 53

SHEET

39 OF 81

D

36

345678

2 1

D

C

53 41 29 19

PP3V0_TRISTAR_ANT_PROX

TRISTAR 2

z=0.45mm

<rdar:/24285280> EVT: 343S00091 (P2:343S00078)

1

C4003

1.0UF

20%

6.3V

2

X5R
0201-1

1

C4002

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=TRISTARROOM=TRISTAR

47 46 41 37 36 32 21 20 18 16

53 52 48

PP1V8_SDRAM

1

C4004

0.01UF

10%

6.3V

2

X5R
01005

ROOM=TRISTAR

PP_ACC_VAR

27 19

TRISTAR_REVERSE_GATE

D

PP5V0_USB

3

D

CRITICAL

Q4001

G

1

RV3CA01ZP

DFN

41 21 4

C

B

TRISTAR_TO_PMU_USB_BRICK_ID

20

90_USB_AP_DATA_P

7

90_USB_AP_DATA_N

7

53

27 26 25 23 21 19 18 10 9 4

46 41 39 37 35 34 33 31 30 28

AC return path for USB pairs which is referenced to GND and VDD_MAIN

PP_VDD_MAIN

1

C4007

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SOC

1

2

C4008

220PF

5%
10V
C0G-CERM
01005

ROOM=SOC

1

C4001

0.01UF

10%

6.3V

2

X5R
01005

ROOM=PMU

R4001

6.34K

1/32W
01005

ROOM=PMU

L4022

15NH-250MA

0201

ROOM=TRISTAR

L4021

15NH-250MA

0201

ROOM=TRISTAR

1%
MF

21

21

F4

F3

21

VDD_1V8

D5

VDD_3V0

ACC_PWR

1

R4002

10K

5%
1/32W
MF
01005

2

ROOM=TRISTAR

S

2

ROOM=TRISTAR

Sm Footprint: 376S00135

U4001

CBTL1610A3BUK

90_MIKEYBUS_DATA_P

31

90_MIKEYBUS_DATA_N

31

90_USB_BB_DATA_P

53

90_USB_BB_DATA_N

53

TRISTAR_USB_BRICK_ID_R
90_USB_AP_DATA_L_P

90_USB_AP_DATA_L_N
UART_AP_TO_ACCESSORY_TXD

12

UART_ACCESSORY_TO_AP_RXD

12

UART_AP_DEBUG_TXD

12

UART_AP_DEBUG_RXD

12

SWD_DOCK_TO_AP_SWCLK

7

SWD_DOCK_BI_AP_SWDIO

7

NC

C3
C4

A1
B1

C2

A3
B3

E2
E1

F2
F1

D2
D1

A5
B5

DIG_DP
DIG_DN

USB1_DP
USB1_DN

BRICK_ID
USB0_DP

USB0_DN
UART0_TX

UART0_RX
UART1_TX

UART1_RX
UART2_TX

UART2_RX
JTAG_CLK

JTAG_DIO

WLCSP

CON_DET_L

POW_GATE_EN*

SWITCH_EN

HOST_RESET

BYPASS

DVSS

DVSS

DVSS

F5

A6

C1

P_IN
ACC1
ACC2

DP1
DN1

DP2
DN2

21

SDA

SCL

INT

F6

PP5V0_USB_RVP

C5

PP_TRISTAR_ACC1

E5

PP_TRISTAR_ACC2

A2

90_TRISTAR_DP1_CONN_P

B2

90_TRISTAR_DP1_CONN_N

A4

90_TRISTAR_DP2_CONN_P

B4

90_TRISTAR_DP2_CONN_N

E3

TRISTAR_CON_DETECT_L

D6

TRISTAR_TO_TIGRIS_VBUS_OFF

POW_GATE_EN* is 6V-tolerant

E4

PMU_TO_AOP_TRISTAR_ACTIVE_READY

B6

TRISTAR_TO_PMU_HOST_RESET

D3

I2C0_AP_SDA

D4

I2C0_AP_SCL

C6

TRISTAR_TO_AOP_INT

E6

TRISTAR_BYPASS

1

C4005

1.0UF

20%

6.3V

2

X5R
0201-1

ROOM=TRISTAR

20

47

47

13

41 4

41 4

41 4

41 4

41 4

41 4

PP4001

37 20 13 7

P2MM-NSM

SM

1

PP

1

C4006

1UF

20%
16V

2

CER-X5R
0201

ROOM=TRISTAR

41 4

#25714843: Remove R4003 Weak PD

B

A

SYNC_MASTER=Sync

PAGE TITLE

TRISTAR 2

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

40 OF 53
40 OF 81

D

SYNC_DATE=06/06/2016

A

D

C

B

Please loop in Matt Mow (Antenna Team)
when changing these components!

FL4103

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DOCK_B2B

FL4107

150OHM-25%-200MA-0.7DCR

53 40 29 19

PP3V0_TRISTAR_ANT_PROX

2 1

01005

ROOM=DOCK_B2B

FL4108

150OHM-25%-200MA-0.7DCR

53 52 48
32 21 20 18 16
47 46 40 37 36

PP1V8_SDRAM

2 1

01005

ROOM=DOCK_B2B

R4109

53

BB_TO_LAT_ANT_SCLK

ROOM=DOCK_B2B

R4110

53 41

BB_TO_LAT_ANT_DATA BB_TO_LAT_ANT_DATA_CONN

ROOM=DOCK_B2B

VOLTAGE=16.0V

40 21 4

C4109

0.1UF

10%
25V
X5R

0201

ROOM=DOCK_B2B

PP5V0_USB

1

C4105

0.1UF

2

ROOM=DOCK_B2B

10%
25V
X5R

0201

1

C4106

0.1UF

2

ROOM=DOCK_B2B ROOM=DOCK_B2B

10%
25V
X5R

0201

1

2

C4107

330PF

CER-X7R

10%
16V

01005

1

2

0.00

1/32W
01005

0.00

0%
MF

0%

1/32W

MF

01005

21

21

C4108

56PF

5%

NP0-C0G-CERM

ROOM=DOCK_B2B

25V

01005

345678

2 1

LOWER MIC1/4ANTENNA

FL4116

150OHM-25%-200MA-0.7DCR

ARC CONTROL

LOWERMIC1_TO_CODEC_AIN1_P

31

2 1

01005

ROOM=DOCK_B2B

#26118161: Update FL4104 to 49.9ohm

R4104

49.9

1%

1/32W

MF

01005

ROOM=DOCK_B2B

FL4112

01005

ROOM=DOCK_B2B

FL4101

2 1

01005

ROOM=DOCK_B2B

21

21

C4101

220PF

C0G-CERM

01005

5%

10V

1

C4135

56PF

5%
25V

2

NP0-C0G-CERM
01005

1

C4136

56PF

5%
25V

2

NP0-C0G-CERM
01005

1

2

1

2

ROOM=DOCK_B2B

ROOM=DOCK_B2B

C4102

C0G-CERM

ROOM=DOCK_B2B

C4110

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=DOCK_B2B

220PF

5%

10V

01005

I2C_HOMER_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C_HOMER_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

1

2

BB_TO_LAT_GPO1_CONN

41

41

41

31

LOWERMIC1_TO_CODEC_AIN1_N

32

PP_CODEC_TO_LOWERMIC1_BIAS

31

LOWERMIC4_TO_CODEC_AIN2_P

31

LOWERMIC4_TO_CODEC_AIN2_N

32

PP_CODEC_TO_LOWERMIC4_BIAS

SPEAKER1

FL4117

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DOCK_B2B

FL4118

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DOCK_B2B

FL4119

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DOCK_B2B

FL4120

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DOCK_B2B

FL4121

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DOCK_B2B

1

C4134

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DOCK_B2B

1

C4119

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DOCK_B2B

1

C4120

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DOCK_B2B

1

C4121

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=DOCK_B2B

1

C4122

33PF

5%
16V

2

NP0-C0G-CERM
01005

ROOM=DOCK_B2B

PP3V0_LAT_CONN

PP3V0_LAT1_CONN

VOLTAGE=3.0V

PP1V8_LAT_ARC_CONN

BB_TO_LAT_ANT_SCLK_CONN

41

41

41

41

I2C_HOMER_SCL

47 36

I2C_HOMER_SDA

47 36

ARC1

41 35

ARC1_TO_SOLENOID1_OUT_POS

41 35

ARC1_TO_SOLENOID1_OUT_NEG

Antenna GPIO

53

BB_TO_LAT_GPO1

150OHM-25%-200MA-0.7DCR

150OHM-25%-200MA-0.7DCR

FL4102

53

BB_TO_LAT_GPO2

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DOCK_B2B

1

C4111

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DOCK_B2B

BB_TO_LAT_GPO2_CONN

41

34

SPEAKER_TO_SPEAKERAMP1_VSENSE_P

150OHM-25%-200MA-0.7DCR

FL4114

2 1

01005

ROOM=DOCK_B2B

FL4115

Per ANT Erdinc, change to cap

34

SPEAKER_TO_SPEAKERAMP1_VSENSE_N

41 34

J4101

1

2

245857

F-ST-SM

53

5049

SPEAKERAMP1_TO_SPEAKER_OUT_POS

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DOCK_B2B

LOWERMIC1_TO_CODEC_AIN1_CONN_POS

1

C4128

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DOCK_B2B

LOWERMIC1_TO_CODEC_AIN1_CONN_NEG

1

C4129

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DOCK_B2B

PP_CODEC_TO_LOWERMIC1_BIAS_CONN

1

C4130

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DOCK_B2B

LOWERMIC4_TO_CODEC_AIN2_CONN_POS

1

C4131

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DOCK_B2B

LOWERMIC4_TO_CODEC_AIN2_CONN_NEG

1

C4132

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DOCK_B2B

PP_CODEC_TO_LOWERMIC4_BIAS_CONN

1

C4133

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DOCK_B2B

SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS

1

C4126

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DOCK_B2B

SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG

1

C4127

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DOCK_B2B

1

C4103

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DOCK_B2B

41

41

D

41

41

41

C

41

41

41

B

A

41 34

SPEAKERAMP1_TO_SPEAKER_OUT_NEG
SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG

41

46

BB_TO_LAT_GPO3_CONN

41

LOWERMIC4_TO_CODEC_AIN2_CONN_NEG

41

PP_CODEC_TO_LOWERMIC4_BIAS_CONN

41

PP_TRISTAR_ACC1_CONN

#22499940:Change Net Name to POS/NEG

40 4

90_TRISTAR_DP2_CONN_P

40 4

90_TRISTAR_DP2_CONN_N

40 4

90_TRISTAR_DP1_CONN_N

40 4

90_TRISTAR_DP1_CONN_P

31

MIKEYBUS_REFERENCE

32

LOWERMIC1_TO_CODEC_BIAS_FILT_RET

47

I2C_MIC1_SDA_CONN

47

I2C_MIC1_SCL_CONN

41 35

ARC1_TO_SOLENOID1_OUT_POS
SOLENOID1_TO_ARC1_VSENSE_POS

35

41

PP3V0_LAT_CONN
SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS

41

SPEAKERAMP1_TO_SPEAKER_OUT_POS

41 34

DOCK FLEX CONNECTOR

54

SPEAKERAMP1_TO_SPEAKER_OUT_NEG

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635
3837
4039
4241
4443
4645
4847

5251

PP_TRISTAR_ACC2_CONN
BB_TO_LAT_GPO2_CONN

LOWERMIC4_TO_CODEC_AIN2_CONN_POS
LOWERMIC4_TO_CODEC_BIAS_FILT_RET
BB_TO_LAT_GPO1_CONN
BB_TO_LAT_ANT_SCLK_CONN
BB_TO_LAT_ANT_DATA_CONN
PP1V8_LAT_ARC_CONN

PP3V0_LAT1_CONN

LOWERMIC1_TO_CODEC_AIN1_CONN_NEGLOWERMIC1_TO_CODEC_AIN1_CONN_POS
PP_CODEC_TO_LOWERMIC1_BIAS_CONN

TRISTAR_CON_DETECT_CONN_L

ARC1_TO_SOLENOID1_OUT_NEG
ARC1_TO_SOLENOID1_OUT_POS
SOLENOID1_TO_ARC1_VSENSE_NEG
I2C_HOMER_SDA_CONN

I2C_HOMER_SCL_CONN

#25429221:Carrier Dock flex to add +1 ACC2 pin

41

41

41

32

41

41

41

41

41

41 41

41

41

41 35

41 35

35

41

41

TRISTAR

TRISTAR_CON_DETECT_L

40 4

40 4

PP_TRISTAR_ACC1

ROOM=DOCK_B2B

10-OHM-1.1A

FL4106

22-OHM-25%-1800MA

0201

ROOM=DOCK_B2B

#25098110: Decrease DCR

R4102

1.00K

2 1

5%

1/32W

MF

01005

FL4105

01005

ROOM=DOCK_B2B

21

TRISTAR_CON_DETECT_CONN_L

1

C4116

27PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

21

1

C4117

100PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

PP_TRISTAR_ACC1_CONN

PP_TRISTAR_ACC2_CONNPP_TRISTAR_ACC2

1

C4118

100PF

5%
16V

2

NP0-C0G
01005

ROOM=DOCK_B2B

41 34

VOLTAGE=4.3V

VOLTAGE=4.3V

41

41

41 40 4

1

C4104

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DOCK_B2B

USB AC Coupling

AC return path for USB pairs which is referenced to GND and VDD_MAIN

53

27 26 25 23 21 19 18 10 9 4

46 40 39 37 35 34 33 31 30 28

PP_VDD_MAIN

SYNC_MASTER=Sync

PAGE TITLE

B2B:DOCK FLEX

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

1

C4143

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SOC

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

41 OF 53

SHEET

41 OF 81

SYNC_DATE=06/06/2016

A

8 7 5 4 2 1

36

34567 8

2 1

D

D

C

C

B

B

A

SYNC_MASTER=Sync

PAGE TITLE

spare

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

42 OF 53
42 OF 81

D

SYNC_DATE=06/06/2016

A

34567 8

2 1

D

D

C

C

B

B

A

SYNC_MASTER=Sync

PAGE TITLE

spare

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

43 OF 53
43 OF 81

D

SYNC_DATE=06/06/2016

A

34567 8

2 1

D

STROBE1

PP_STROBE_DRIVER1_WARM_LED

ROOM=RIGHT_BUTTON

PP_STROBE_DRIVER1_COOL_LED

ROOM=RIGHT_BUTTON

150OHM-25%-200MA-0.7DCR

STROBE_MODULE_NTC

26

R4401

27K

0.5%

1/32W

ROOM=RIGHT_BUTTON

#24544474: Can R4401 be changed to 5%?

01005

C4402

220PF

5%

10V

C0G-CERM

01005

C4406

220PF

5%

10V

C0G-CERM

01005

1

MF

2

1

2

1

2

FL4404

01005

ROOM=RIGHT_BUTTON

STROBE2 BUTTONS

R4402

45 26

1

C4409

27PF

5%
16V

2

NP0-C0G
01005

ROOM=RIGHT_BUTTON

45 26

1

C4408

27PF

5%
16V

2

NP0-C0G
01005

ROOM=RIGHT_BUTTON

21

1

C4407

220PF

5%
10V

2

C0G-CERM
01005

STROBE_MODULE_NTC_CONN

ROOM=RIGHT_BUTTON

45

PP_STROBE_DRIVER2_WARM_LED

C4410

220PF

10V

C0G-CERM

01005

ROOM=RIGHT_BUTTON

PP_STROBE_DRIVER2_COOL_LED

C4411

220PF

10V

C0G-CERM

01005

ROOM=RIGHT_BUTTON

5%

5%

1

2

1

2

1

C4413

27PF

5%
16V

2

NP0-C0G
01005

ROOM=RIGHT_BUTTON

1

C4412

27PF

5%
16V

2

NP0-C0G
01005

ROOM=RIGHT_BUTTON

45 26

45 26

BUTTON_POWER_KEY_L

20

ROOM=RIGHT_BUTTON

ROOM=LEFT_BUTTON

20

BUTTON_VOL_DOWN_L

ROOM=LEFT_BUTTON

C4401

27PF

5%

6.3V

NP0-C0G

0201

C4418

27PF

5%

6.3V

NP0-C0G

0201

C4419

100PF

5%

16V

NP0-C0G

01005

1

2

1

2

1

2

100

1/32W
01005

ROOM=RIGHT_BUTTON

FL4407

120-OHM-0.220A

ROOM=LEFT_BUTTON

ROOM=LEFT_BUTTON

21

5%
MF

01005

R4405

100

1/32W
01005

21

5%
MF

BUTTON_POWER_KEY_CONN_L

1

0201

45

5.5V-6.2PF

DZ4401

ROOM=RIGHT_BUTTON

2

CHASSIS_GND_BS401

21

1

0201

BUTTON_RINGER_A_CONNBUTTON_RINGER_A

44 4

45 20

D

5.5V-6.2PF

DZ4402

ROOM=LEFT_BUTTON

2

CHASSIS_GND_BS401

1

DZ4403

12V-33PF

01005-1

ROOM=LEFT_BUTTON

2

CHASSIS_GND_BS401

BUTTON_VOL_DOWN_CONN_L

44 4

45

44 4

C

HAWKING

31

31

HAWKING_TO_CODEC_AIN7_N

#24678255:DOE with 10% and/20% cap

C4417

0.22UF

21

20%

6.3V
X5R

01005

ROOM=RIGHT_BUTTON

C4421

0.22UF

21

20%

6.3V
X5R

01005

ROOM=RIGHT_BUTTON

HAWKING_TO_CODEC_AIN7_C_PHAWKING_TO_CODEC_AIN7_P

CKPLUS_WAIVE=MISS_N_DIFFPAIR

FL4405

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=RIGHT_BUTTON

HAWKING_TO_CODEC_AIN7_N_CONN

HAWKING_TO_CODEC_AIN7_P_CONN

NOSTUFF

1

C4415

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=RIGHT_BUTTON

1

C4422

180PF

10%
10V

2

CERM
01005

ROOM=RIGHT_BUTTON

45

45

20 12

BUTTON_VOL_UP_L

C4420

100PF

16V

NP0-C0G

01005

ROOM=LEFT_BUTTON

5%

R4406

1

ROOM=LEFT_BUTTON

2

100

5%

1/32W

MF

01005

C

21

1

DZ4404

12V-33PF

01005-1

ROOM=LEFT_BUTTON

2

BUTTON_VOL_UP_CONN_L

CHASSIS_GND_BS401

44 4

45

B

MIC2 (ANC REF)

32

PP_CODEC_TO_REARMIC2_BIAS

19

PP1V8_HAWKING

FL4403

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=RIGHT_BUTTON

FL4406

150OHM-25%-200MA-0.7DCR

21

01005

ROOM=RIGHT_BUTTON

PP_CODEC_TO_REARMIC2_BIAS_CONN

1

C4403

220PF

5%
10V

2

C0G-CERM
01005

ROOM=RIGHT_BUTTON

PP1V8_HAWKING_CONN

1

C4416

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=RIGHT_BUTTON

45

1

C4414

220PF

5%
10V

2

C0G-CERM
01005

ROOM=RIGHT_BUTTON

45

B

A

REARMIC2_TO_CODEC_AIN3_P

31

FL4401

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=RIGHT_BUTTON

1

2

FL4402

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=RIGHT_BUTTON

1

2

REARMIC2_TO_CODEC_AIN3_CONN_P

C4404

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=RIGHT_BUTTON

REARMIC2_TO_CODEC_AIN3_CONN_NREARMIC2_TO_CODEC_AIN3_N

C4405

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=RIGHT_BUTTON

45

45 31

SYNC_MASTER=Sync

PAGE TITLE

B2B FILTERS: RIGHT BUTTON FLEX

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

44 OF 53

SHEET

44 OF 81

SYNC_DATE=06/06/2016

A

8 7 5 4 2 1

36

D

UTAH-D FLEX CONNECTOR

<-- THIS ONE516S00152 RCPT (USED ON MLB)

516S00151 PLUG

PP3V0_UT_SVDD_CONN

25

LPDP_UT_BI_AP_AUX_CONN
AP_TO_UT_SHUTDOWN_CONN_L

25

UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN

30 25

UT_TO_NV_SYNC_J2501_CONN
PP1V8_UT_CONN

25

I2C_UT_SDA_CONN

48

I2C_UT_SCL_CONN

48

PP2V8_UT_AF_VAR_CONN

25

PP1V2_UT_VDD_CONN

25

J4501

AA26D-S022VA1

F-ST-SM

24 23

2 1
4 3
6 5

8 7
10 9
12 11
14 13
16 15
18 17
20 19
22 21

26 25

ROOM=RCAM_B2B

90_LPDP_UT_TO_AP_D2_CONN_N
90_LPDP_UT_TO_AP_D2_CONN_P

90_LPDP_UT_TO_AP_D3_CONN_N
90_LPDP_UT_TO_AP_D3_CONN_P

AP_TO_UT_CLK_CONN

PP2V9_UT_AVDD_CONN

25

25 25

25

25 30

25

345678

2 1

DISPLAY / TOUCH FLEX CONNECTOR

MLB: 516S00050

MAMBA_TO_LCM_MDRIVE

38

R4501

200

I2C_TOUCH_TO_MAMBA_SCL

47

1/32W
01005

ROOM=DISPLAY_B2B

46 25

LCM_TO_MAMBA_MSYNC_CONN

38

1

C4507

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

PP4501

P2MM-NSM

SM

PP

21

1%
MF

1

I2C_DISP_EEPROM_SDA_CONN

47

I2C_TOUCH_SCL_CONN

SPI_TOUCH_TO_AP_MISO_CONN

39

SPI_AP_TO_TOUCH_CS_CONN_L

39

AP_TO_CUMULUS_CLK_32K_CONN

39

SPI_AP_TO_TOUCH_SCLK_CONN

39

UART_TOUCH_TO_AOP_RXD_CONN

39

AP_TO_LCM_RESET_CONN_L

39

PP5V1_TOUCH_VDDH_CONN

39

39

PP1V8_TOUCH_CONN

39

PN5V7_LCM_MESON_AVDDN_CONN

39

PP5V7_MESON_AVDDH_CONN
TP_LCM_PIFA

90_MIPI_AP_TO_LCM_CLK_CONN_P

39

39

90_MIPI_AP_TO_LCM_CLK_CONN_N

39 4

PP_LCM_BL_CAT1_CONN
PP_LCM_BL_ANODE_CONN

39 4

PP_LCM_BL_CAT2_CONN

4

39

PP_LCM_BL34_CAT1_CONN

46 4

PP_LCM_BL34_ANODE_CONN

46 4

PP_LCM_BL34_CAT2_CONN

46 4

CKPLUS_WAIVE=I2C_PULLUP

J4502

BB35C-RA48-3A

F-ST-SM

53

5049

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635
3837
4039
4241
4443
4645
4847

I2C_DISP_EEPROM_SCL_CONN
I2C_TOUCH_BI_MAMBA_SDA
SPI_AP_TO_TOUCH_MOSI_CONN

TOUCH_TO_AP_INT_L_CONN
AP_TO_TOUCH_MAMBA_RESET_CONN_L

Per #25048465:No Satin flex support in CRB

UART_AOP_TO_TOUCH_TXD_CONN
PMU_TO_LCM_PANICB_CONN
PP1V8_LCM_CONN
PP5V7_LCM_AVDDH_CONN
LCM_TO_CHESTNUT_PWR_EN_CONN
LCM_TO_MANY_BSYNC_CONN

90_MIPI_AP_TO_LCM_DATA0_CONN_P
90_MIPI_AP_TO_LCM_DATA0_CONN_N

90_MIPI_AP_TO_LCM_DATA1_CONN_P
90_MIPI_AP_TO_LCM_DATA1_CONN_N

90_MIPI_AP_TO_LCM_DATA2_CONN_P
90_MIPI_AP_TO_LCM_DATA2_CONN_N

90_MIPI_AP_TO_LCM_DATA3_CONN_P
90_MIPI_AP_TO_LCM_DATA3_CONN_N

47

47

39

39

39

39

39

39

39

39

39

39

39

39

46

46

46

46

CKPLUS_WAIVE=I2C_PULLUP

39 38

D

C

B

FOREHEAD FLEX CONNECTOR

MLB: 516S00146 (MCO REV 27)

ROOM=FOREHEAD

CRITICAL

J4503

245858036201829

F-ST-SM

41

3837

PP2V9_NH_AVDD_CONN

29

PP1V8_NH_IO_CONN

29

AP_TO_NH_SHUTDOWN_CONN_L

29

AP_TO_NH_CLK_CONN

29

I2C_NH_SCL_CONN

48

I2C_ALS_CONVOY_SCL_CONN

47

PDM_CONVOY_TO_ADARE_DATA_CONN

29

PP3V0_PROX_CONN

29

29

SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N

46 33 29

SPEAKERAMP2_TO_SPEAKER_OUT_NEG
I2C_PROX_SDA_CONN

48

I2C_PROX_SCL_CONN

48

PROX_BI_AP_AOP_INT_PWM_L_CONN

29 29

PP_CODEC_TO_FRONTMIC3_BIAS_CONN

29

FRONTMIC3_TO_CODEC_AIN4_CONN_P

42

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635

4039

90_MIPI_NH_TO_AP_DATA0_P
90_MIPI_NH_TO_AP_DATA0_N

90_MIPI_NH_TO_AP_CLK_P
90_MIPI_NH_TO_AP_CLK_N

90_MIPI_NH_TO_AP_DATA1_P
90_MIPI_NH_TO_AP_DATA1_N

PP1V2_NH_DVDD_CONN
I2C_NH_SDA_CONN
ALS_TO_AP_INT_CONN_L
I2C_ALS_CONVOY_SDA_CONN
PDM_ADARE_TO_CONVOY_CLK_CONN
PP3V0_ALS_CONVOY_CONN
SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P
SPEAKERAMP2_TO_SPEAKER_OUT_POS
FRONTMIC3_TO_CODEC_AIN4_CONN_N

9

9

9

9

9

9

29

48

29

47

29

29

29 29

5251

54

C

COMBO BUTTON FLEX CONNECTOR

APPLE APN: 516S00150
APPLE APN: 516S00149

MAKE_BASE=TRUE

XW4501

SHORT-20L-0.05MM-SM

HAWKING_TO_CODEC_AIN7_N_CONN

44

46 33 29

21

GND

PP_STROBE_DRIVER2_COOL_LED

44 26

STROBE_MODULE_NTC_CONN

44

PP1V8_HAWKING_CONN

44

HAWKING_TO_CODEC_AIN7_P_CONN

44

BUTTON_RINGER_A_CONN

44

BUTTON_VOL_UP_CONN_L

44

BUTTON_VOL_DOWN_CONN_L

44

PP_STROBE_DRIVER1_WARM_LED

44 26

<-- THIS ONE ON MLB (matched MCO rev 27)

ROOM=RIGHT_BUTTON

J4504

AA37D-S014SVA1

F-ST-SM

20 19

16 15

2 1
4 3
6 5

8 7
10 9
12 11
14 13

18 17

22 21

PP_CODEC_TO_REARMIC2_BIAS_CONN
REARMIC2_TO_CODEC_AIN3_CONN_N
REARMIC2_TO_CODEC_AIN3_CONN_P
REARMIC2_TO_CODEC_BIAS_FILT_RET

I2C_MIC2_SDA_CONN
I2C_MIC2_SCL_CONN
BUTTON_POWER_KEY_CONN_L

PP_STROBE_DRIVER1_COOL_LEDPP_STROBE_DRIVER2_WARM_LED

44

44

44

32

47

47

44

B

44 26 44 26

CRITICAL

A

SYNC_MASTER=sync SYNC_DATE=05/17/2016

PAGE TITLE

B2B FF SPECIFIC

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

45 OF 53
45 OF 81

A

D

2ND BACKLIGHT DRIVER - 4LED

345678

2 1

THIS PAGE UNIQUE TO LARGE FORM FACTOR

D

40 37 36 32 21 20 18 16

53 52 48 47 41

37 11

37 11

47

47

37 9

53 37 26

ISP I2C1

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

53 46

PP_VDD_MAIN

C4601

10UF

20%

6.3V

CERM-X5R

0402-9

ROOM=BACKLIGHT34

1

2

PP1V8_SDRAM
DWI_PMGR_TO_BACKLIGHT_DATA

DWI_PMGR_TO_BACKLIGHT_CLK
I2C1_AP_SDA

I2C1_AP_SCL
AP_TO_MUON_BL_STROBE_EN

BB_TO_STROBE_DRIVER_GSM_BURST_IND

U4601

LM3539A1

D4

IN OUT

D3

VIO/HWEN

C2

SDI

C3

SCK

B2

SDA

A2

SCL
D1
D2

ROOM=BACKLIGHT34

TRIG

INHIBIT

DSBGA

CRITICAL

GND

GND

B4

B3

SW1

SW2_1
SW2_2

LED1

LED2

A1
C4
A3

A4
C1

B1

1

C4604

220PF

2%
50V

2

C0G
0201

ROOM=BACKLIGHT34

K

1

C4609

2.2UF

20%
35V

2

X5R
0402

ROOM=BACKLIGHT34

D4602

NSR0530P2T5G

SOD-923-1

A

ROOM=BACKLIGHT34

CRITICAL

BL34_SW1_LX

PP_LCM_BL34_CAT1
PP_LCM_BL34_CAT2

TOUCH I2C

46

46

28

1

C4610

2.2UF

20%
35V

2

X5R
0402

ROOM=BACKLIGHT34

K

D4601

DSN2

NSR05F30NXT5G

ROOM=BACKLIGHT34

A

CRITICAL

BL34_SW2_LX

1

C4611

2.2UF

20%
35V

2

X5R
0402

ROOM=BACKLIGHT34

28

1

C4612

2.2UF

20%
35V

2

X5R
0402

ROOM=BACKLIGHT34

PP_LCM_BL34_ANODE

1

C4602

2.2UF

20%
35V

2

X5R
0402

ROOM=BACKLIGHT34

46

9

90_MIPI_AP_TO_LCM_DATA2_P

9

90_MIPI_AP_TO_LCM_DATA2_N

90_MIPI_AP_TO_LCM_DATA3_P

9

90_MIPI_AP_TO_LCM_DATA3_N

9

MAKE_BASE=TRUE

90_MIPI_AP_TO_LCM_DATA2_N

MAKE_BASE=TRUE

90_MIPI_AP_TO_LCM_DATA3_P

MAKE_BASE=TRUE

90_MIPI_AP_TO_LCM_DATA3_N

MAKE_BASE=TRUE

46

PP_LCM_BL34_ANODE

46

PP_LCM_BL34_CAT1

L4602

65OHM-0.7-2GHZ-3.4OHM

65OHM-0.7-2GHZ-3.4OHM

TAM0605

SYM_VER-1

4

3 2

L4603

TAM0605

SYM_VER-1

4

3 2

1

1

FL4601

33-OHM-25%-1500MA

21

0201

ROOM=DISPLAY_B2B

FL4602

33-OHM-25%-1500MA

21

0201

ROOM=DISPLAY_B2B

CRITICAL

ROOM=DISPLAY_B2B

90_MIPI_AP_TO_LCM_DATA2_CONN_P90_MIPI_AP_TO_LCM_DATA2_P

90_MIPI_AP_TO_LCM_DATA2_CONN_N

CRITICAL

ROOM=DISPLAY_B2B

90_MIPI_AP_TO_LCM_DATA3_CONN_P

90_MIPI_AP_TO_LCM_DATA3_CONN_N

1

C4605

220PF

2%
50V

2

C0G
0201

ROOM=DISPLAY_B2B

1

C4606

100PF

5%
35V

2

NP0-C0G
01005

ROOM=DISPLAY_B2B

PP_LCM_BL34_ANODE_CONN

PP_LCM_BL34_CAT1_CONN

45

45

D

45

45

45 4

45 4

C

B

25 18 17 16 13 12 11 9 8 7 5

30 9

30 9

52 48 47 39 30 29

I2C_ISP_NV_SCL
I2C_ISP_NV_SDA

VDD MAIN CAP
AC Coupling Caps

27 26 25 23 21 19 18 10 9 4

40 39 37 35 34 33 31 30 28

53 46 41

PP1V8

PP_VDD_MAIN

1

R4603

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

1

C4618

220PF

5%
10V

2

C0G-CERM
01005

AC return path for LCM MIPI which is referenced to GND and VDD_MAIN

1

R4604

1.00K

5%
1/32W
MF
01005

2

ROOM=SOC

MAKE_BASE=TRUE

MAKE_BASE=TRUE

ROOM=DISPLAY_B2B

1

C4603

220PF

5%
10V

2

C0G-CERM
01005

I2C_ISP_NV_SCL
I2C_ISP_NV_SDA

1

C4613

220PF

5%
10V

2

C0G-CERM
01005

ROOM=DISPLAY_B2BROOM=DISPLAY_B2B

26

26

47 39 38 18

1

C4615

220PF

5%
10V

2

C0G-CERM
01005

PP1V8_TOUCH

ARC CAP

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

ROOM=DISPLAY_B2B

1

R4711

10K

5%
1/32W
MF
01005

2

ROOM=MAMBA_MESA

I2C_TOUCH_TO_MAMBA_SCL

47

CHESTNUT CAP

53 46

PP_VDD_MAIN PP_VDD_MAIN

20%

6.3V

1

2

C3525

10UF

CERM-X5R

0402-9

ROOM=ARC1

28 27 26 25 23 21 19 18 10 9 4

46 41 40 39 37 35 34 33 31 30

53

C3722

10UF

6.3V

CERM-X5R

0402-9

ROOM=CHESTNUT

20%

FL4603

46

PP_LCM_BL34_CAT2

33-OHM-25%-1500MA

21

0201

ROOM=DISPLAY_B2B

1

C4607

100PF

5%
35V

2

NP0-C0G
01005

ROOM=DISPLAY_B2B

PP_LCM_BL34_CAT2_CONN

45 4

C

Dock B2B (Pg 41)

FL4604

150OHM-25%-200MA-0.7DCR

53

BB_TO_LAT_GPO3

1

2

UT B2B

PP2V9_UT_AVDD_CONN

2 1

01005

ROOM=DOCK_B2B

1

C2507

4UF

20%

6.3V

2

CER-X5R
0201

ROOM=RCAM_B2B

1

C4608

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DOCK_B2B

BB_TO_LAT_GPO3_CONN

41

45 25

B

A

ACC Buck Caps

PP_ACC_BUCK_VAR

1

C2707

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

ROOM=TRISTAR

27

45 33 29

Top Speaker Compass Coil

SPEAKERAMP2_TO_SPEAKER_OUT_POS
SPEAKERAMP2_TO_SPEAKER_OUT_NEG

1

R3332

1.1K

1%
1/32W
MF
01005

2

ROOM=SPKAMP2

NEG_COMPASS_COIL_COMP

1

C3332

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SPKAMP2

1

XW3333

SHORT-20L-0.05MM-SM

NO_XNET_CONNECTION

ROOM=MAMBA_MESA

2

45 33 29

POS_COMPASS_COIL_COMP

OMIT

1

R3333

1.1K

1%
1/32W
MF
01005

2

ROOM=SPKAMP2

1

C3333

220PF

5%
10V

2

C0G-CERM
01005

ROOM=SPKAMP2

Extra RF GND

TP4602

1

TP-P55

A

rf GROUND

PAGE TITLE

LARGE FORM FACTOR SPECIFIC

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=06/17/2016SYNC_MASTER=sync

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

46 OF 53

SHEET

46 OF 81

A

8 7 5 4 2 1

36

345678

2 1

D

AP

25 18 17 16 13 12 11 9 8 7 5

I2C0

I2C1

52 48 47 46 39 30 29

I2C0_AP_SCL

11

I2C0_AP_SDA

11

25 18 17 16 13 12 11 9 8 7 5

52 48 47 46 39 30 29

PP1V8

R4701

4.02K

1%

1/32W

MF

01005

ROOM=SOC

#24544434

PP1V8

R4703

4.02K

1%

1/32W

MF

01005

ROOM=SOC

1

2

1

2

R4702

4.02K

1%

1/32W

MF

01005

ROOM=SOC

NOSTUFF

NP0-C0G-CERM

R4704

4.02K

1%

1/32W

MF

01005

ROOM=SOC

1

2

C4701

56PF

01005

ROOM=SOC

1

2

5%

25V

TOUCH

46 39 38 18

MAKE_BASE=TRUE
MAKE_BASE=TRUE

NOSTUFF

C4702

1

2

1

56PF

5%

25V

2

NP0-C0G-CERM
01005

ROOM=SOC

I2C0_AP_SCL
I2C0_AP_SDA

I2C0_AP_SCL
I2C0_AP_SDA

I2C0_AP_SCL
I2C0_AP_SDA

I2C0_AP_SCL
I2C0_AP_SDA

37

37

23

23

40

40

20 37

37

PP1V8_TOUCH

NOSTUFF

1

R4712

10K

5%
1/32W
MF
01005

2

ROOM=MAMBA_MESA

I2C_TOUCH_TO_MAMBA_SCL

46

I2C_TOUCH_BI_MAMBA_SDA

NOTE:MAMBA I2C 2.2K PULL-UPS TO PP1V8_TOUCH INSIDE GALILEO
ADDING R3803, R3804 AS OPTION FOR TWEAKING VALUE

MAKE_BASE=TRUE
MAKE_BASE=TRUE

NOSTUFF

C4709

56PF

5%

NP0-C0G-CERM

ROOM=MAMBA_MESA

C4711

NP0-C0G-CERM

ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B

01005

56PF

5%

25V

01005

25V

1

2

I2C_TOUCH_TO_MAMBA_SCL
I2C_TOUCH_BI_MAMBA_SDA

NOSTUFF

C4710

1

2

1

56PF

5%

2

25V

NP0-C0G-CERM
01005

ROOM=MAMBA_MESA

I2C_TOUCH_TO_MAMBA_SCL
I2C_TOUCH_BI_MAMBA_SDA

C4712

1

56PF

5%

2

25V

NP0-C0G-CERM
01005

TO MAMBA / MESA FLEX

38

38

TO DISPLAY / TOUCH FLEX

45

45

D

C

I2C1_AP_SCL

11

I2C1_AP_SDA

11

#24544426

I2C2

25 18 17 16 13 12 11 9 8 7 5

52 48 47 46 39 30 29

NOSTUFF

C4703

56PF

5%

NP0-C0G-CERM

PP1V8

R4705

2.2K

ROOM=SOC

01005

ROOM=PMU

5%

1/32W

MF

01005

25V

1

2

1

2

R4706

1

2

2.2K

1/32W
01005

ROOM=SOC

5%
MF

MAKE_BASE=TRUE
MAKE_BASE=TRUE

NOSTUFF

C4704

56PF

5%

25V

NP0-C0G-CERM
01005

ROOM=PMU

1

2

I2C1_AP_SCL
I2C1_AP_SDA

I2C1_AP_SCL
I2C1_AP_SDA

I2C1_AP_SCL
I2C1_AP_SDA

D11/111 ONLY

46

46

20

20

21

21

25 18 17 16 13 12 11 9 8 7 5

52 48 47 46 39 30 29

PP1V8

I2C3

HOMER

46 41 40 37 36 32 21 20 18 16

53 52 48

PP1V8_SDRAM

1

R4713

1.00K

5%
1/32W
MF

2

01005

ROOM=HOMER

1

R4714

1.00K

5%
1/32W
MF

2

01005

ROOM=HOMER

I2C_HOMER_SCL
I2C_HOMER_SDA

I2C5

25 18 17 16 13 12 11 9 8 7 5

41 36

41 36

52 48 47 46 39 30 29

R4715

2.2K

5%

1/32W

MF

01005

ROOM=SOC

PP1V8

1

2

R4716

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

2

I2C5_SCL
I2C5_SDA

11

11

C

B

I2C2_AP_SCL

11

I2C2_AP_SDA

11

MAKE_BASE=TRUE
MAKE_BASE=TRUE

ROOM=FOREHEAD

R4707

0.00

R4708

0.00

0%

1/32W

ROOM=FOREHEAD

21

MF0%

010051/32W

21

MF

01005

I2C2_AP_SCL
I2C2_AP_SDA

C4707

56PF

5%

NP0-C0G-CERM

ROOM=FOREHEAD

25V

01005

I2C_ALS_CONVOY_SCL_CONN

I2C_ALS_CONVOY_SDA_CONN

1

2

C4708

1

56PF

5%

2

25V
NP0-C0G-CERM
01005

ROOM=FOREHEAD

TO FOREHEAD FLEX

33

33

45

45

I2C3_AP_SCL

11

I2C3_AP_SDA

11

R4709

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

2

R4710

2.2K

5%

1/32W

MF

01005

ROOM=SOC

1

ROOM=DOCK

2

150OHM-25%-200MA-0.7DCR

FL4730

2 1

01005

ckplus_waive=I2C_PULLUP

I2C_MIC1_SCL_CONN

41

TO DOCK FLEX

FL4729

100

2 1

5%

1/32W

MF

01005

ROOM=DOCK

ROOM=RIGHT_BUTTON

C4730

56PF

5%

NP0-C0G-CERM

ROOM=DOCK_B2B

25V

01005

1

2

CKPLUS_WAIVE=I2C_PULLUP

I2C_MIC1_SDA_CONN

1

C4729

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DOCK_B2B

41

B

FL4732

150OHM-25%-200MA-0.7DCR

2 1

01005

FL4731

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=RIGHT_BUTTON

C4732

NP0-C0G-CERM

ROOM=RIGHT_BUTTON

5%

25V

01005

1

2

I2C_MIC2_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C_MIC2_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

C4731

1

56PF56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=RIGHT_BUTTON

45

TO COMBINED BUTTON FLEX

45

A

FL4742

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DISPLAY_B2B

FL4741

150OHM-25%-200MA-0.7DCR

2 1

01005

ROOM=DISPLAY_B2B

1

C4742

2

8 7 5 4 2 1

I2C_DISP_EEPROM_SCL_CONN

I2C_DISP_EEPROM_SDA_CONN

1

C4741

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=DISPLAY_B2B

45

PAGE TITLE

TO DISPLAY FLEX

45

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

I2C MAP: AP, TOUCH, HOMER, I2C5

DRAWING NUMBER SIZE

Apple Inc.

R

REVISION

BRANCH

PAGE

SHEET

36

051-00482

8.0.0

47 OF 53
47 OF 81

D

A

SYNC_DATE=06/17/2016SYNC_MASTER=Sync

345678

2 1

AOP

46 41 40 37 36 32 21 20 18 16

53 52 48 47

I2C

13

D

#24958320:Intentional R4815 Change

Reduce undershoot when Prox Driving

C

B

I2C_AOP_SCL
I2C_AOP_SDA

13

PP1V8_SDRAM

1

R4801

2.2K

5%
1/32W
MF
01005

2

46 41 40 37 36 32 21 20 18 16

1

R4802

2.2K

5%
1/32W
MF
01005

2

MAKE_BASE=TRUE

MAKE_BASE=TRUE

53 52 48 47

Intentional R4815 Change

AOP_TO_MESA_I2C_ISO_EN

13

PP1V8_SDRAM

1

C4807

0.1UF

20%

6.3V

2

X5R-CERM
01005

ROOM=SOC

U4802

MAX20312

A2
B2

IOVCC1
IOVCC2

WLP

ROOM=SOC

I2C_AOP_SCL
I2C_AOP_SDA

I2C_AOP_SCL
I2C_AOP_SDA

ROOM=FOREHEAD

FL4815

150OHM-25%-200MA-0.7DCR

2 1

01005

R4815

33.2

2 1

1%

1/32W

MF

01005

ROOM=FOREHEAD

6

S

4 1

Z

1

R4805

511K

1%
1/32W
MF
01005

2

6

S

4 1

Z

B1

VCC

GND

A1

34

34

35

35

1

2

PP1V8_SDRAM

5

VCC

U4805

74LVC1G3157GX

X2SON6

GND

2

PP1V8_SDRAM

5

VCC

U4806

74LVC1G3157GX

X2SON6

GND

2

#24544699: Support 1MHz

TO FCAM FLEX

I2C_PROX_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C_PROX_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

C4803

56PF

5%
25V
NP0-C0G-CERM
01005

ROOM=FOREHEAD

3

Y0

Y1

Y0

Y1

NC

I2C_AOP_SCL_ISO

3

NC

I2C_AOP_SDA_ISO

1

C4804

56PF

5%
25V
NP0-C0G-CERM

2

01005

ROOM=FOREHEAD

53 52 48 47

53 52 48 47

PP1V8_MESA

38 19

46 41 40 37 36 32 21 20 18 16

46 41 40 37 36 32 21 20 18 16

1

R4803

4.7K

1%
1/32W
MF
01005

2

ROOM=MAMBA_MESA

45

45

1

R4804

4.7K

1%
1/32W
MF
01005

2

ROOM=MAMBA_MESA

R4806

0.00

2 1

1/32W0%
01005MF

R4807

0.00

2 1

0%

1/32W

MF

01005

ROOM=MAMBA_MESA

ROOM=MAMBA_MESA

ISP

I2C0

25 18 17 16 13 12 11 9 8 7 5

I2C_ISP_UT_SCL

9

9

I2C_ISP_UT_SDA

I2C1

See page 46

I2C2

25 18 17 16 13 12 11 9 8 7 5

9

I2C_ISP_NH_SCL

9

I2C_ISP_NH_SDA

I2C_MESA_TURTLE_SCL_CONN

I2C_MESA_TURTLE_SDA_CONN

52 48 47 46 39 30 29

1

C4809

56PF

5%
25V

2

NP0-C0G-CERM
01005

ROOM=MAMBA_MESA

1

C4810

56PF

5%

2

25V
NP0-C0G-CERM
01005

ROOM=MAMBA_MESA

52 48

47 46 39 30 29

PP1V8

PP1V8

1

R4808

1.00K

5%
1/32W
MF

2

01005

ROOM=SOC

1

R4810

5%
1/32W
MF
01005

2

ROOM=SOC

TO MAMBA/MESA FLEX

38

38

1

R4811

2.2K2.2K

5%
1/32W
MF
01005

2

ROOM=SOC

#24550735: ISP I2C0 PU

1

R4809

1.00K

5%
1/32W
MF

2

01005

ROOM=SOC

MAKE_BASE=TRUE
MAKE_BASE=TRUE

MAKE_BASE=TRUE
MAKE_BASE=TRUE

R4816

0.00

1/32W
01005

ROOM=RCAM_B2B

R4817

0.00

1/32W
01005

ROOM=RCAM_B2B

21

0%
MF

21

0%
MF

R4812

0.00

0%

1/32W

MF

01005

ROOM=FOREHEAD

R4813

0.00

0%

1/32W

MF

01005

ROOM=FOREHEAD

I2C_ISP_UT_SCL
I2C_ISP_UT_SDA

1

C4817

56PF

5%

2

25V
NP0-C0G-CERM
01005

1

C4816

56PF

5%
25V
NP0-C0G-CERM

2

01005

21

C4812

1

56PF

5%

2

25V
NP0-C0G-CERM
01005

ROOM=FOREHEAD

21

1

C4813

56PF

5%
25V
NP0-C0G-CERM

2

01005

ROOM=FOREHEAD

ROOM=RCAM_B2B

ROOM=RCAM_B2B

26

26

I2C_UT_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C_UT_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C_NH_SCL_CONN

CKPLUS_WAIVE=I2C_PULLUP

I2C_NH_SDA_CONN

CKPLUS_WAIVE=I2C_PULLUP

D

45

45

45

C

45

B

A

SYNC_MASTER=Sync

PAGE TITLE

I2C MAP AOP

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

48 OF 53
48 OF 81

D

SYNC_DATE=06/06/2016

A

345678

2 1

D

D

C

C

B

B

A

SYNC_MASTER=Sync

PAGE TITLE

I2C TABLE

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

49 OF 53
49 OF 81

SYNC_DATE=06/06/2016

D

A

spare

spare

D

This page controls elements different accross all MLBs

PCIe Lanes

PP801

P2MM-NSM

SM

ROOM=SOC

PP802

P2MM-NSM

ROOM=SOC

SM

PP

PP

1

90_AP_PCIE3_RXD_C_P
90_AP_PCIE3_RXD_C_N

1

52 8

52 8

345678

2 1

D

C

21

01005

21

6.3V20%

21

01005

21

6.3V20%
01005

0.1UF

GND_VOID=TRUE

0.1UF

GND_VOID=TRUE

0.1UF

GND_VOID=TRUE

0.1UF

GND_VOID=TRUE

90_PCIE_BB_TO_AP_RXD_P

90_PCIE_BB_TO_AP_RXD_N

90_PCIE_AP_TO_BB_TXD_P

90_PCIE_AP_TO_BB_TXD_N

53

53 8

53

90_AP_PCIE2_RXD_C_P

8

90_AP_PCIE2_RXD_C_N

90_AP_PCIE2_TXD_C_P

8

90_AP_PCIE2_TXD_C_N

8 53

C0816

ROOM=SOC

C0817

ROOM=SOC

C0815

ROOM=SOC

C0818

ROOM=SOC

X5R-CERM

X5R-CERM 01005

X5R-CERM

X5R-CERM

20% 6.3V

20% 6.3V

MAKE_BASE=TRUE

MAKE_BASE=TRUE

C

MAKE_BASE=TRUE

MAKE_BASE=TRUE

B

90_AP_PCIE3_RXD_C_P

52 8

90_AP_PCIE3_RXD_C_N

52 8

90_AP_PCIE3_TXD_C_P

90_AP_PCIE3_TXD_C_N

8 53

90_PCIE_AP_TO_WLAN_REFCLK_P

8

90_PCIE_AP_TO_WLAN_REFCLK_N

8

90_PCIE_AP_TO_BB_REFCLK_P

8

90_PCIE_AP_TO_BB_REFCLK_N

8

PCIE_AP_TO_WLAN_RESET_L

8

PCIE_AP_TO_BB_RESET_L

8

PCIE_WLAN_BI_AP_CLKREQ_L

8

PCIE_BB_BI_AP_CLKREQ_L

8

C0811

ROOM=SOC

C0812

ROOM=SOC

C0814

ROOM=SOC

C0813

ROOM=SOC

X5R-CERM

X5R-CERM 01005

X5R-CERM

X5R-CERM

20%

21

6.3V
01005

21

6.3V20%

21

6.3V20%
01005

21

6.3V20%
01005

0.1UF

0.1UF

0.1UF

0.1UF

90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N

PCIE_AP_TO_WLAN_RESET_L
PCIE_AP_TO_BB_RESET_L

PCIE_WLAN_BI_AP_CLKREQ_L
PCIE_BB_BI_AP_CLKREQ_L

90_PCIE_WLAN_TO_AP_RXD_P

GND_VOID=TRUE

90_PCIE_WLAN_TO_AP_RXD_N

GND_VOID=TRUE

90_PCIE_AP_TO_WLAN_TXD_P

GND_VOID=TRUE

90_PCIE_AP_TO_WLAN_TXD_N

GND_VOID=TRUE

53

53

53 8

53

53

53

53

53

53

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE

53 52

MAKE_BASE=TRUE

53 52

25 18 17 16 13 12 11 9 8 7 5

53 52

46 41 40 37 36 32 21 20 18 16

48 47 46 39 30 29

PCIE_WLAN_BI_AP_CLKREQ_L

53 48 47

53 52

PP1V8

PP1V8_SDRAM

ROOM=RADIO_BB

PCIE_BB_BI_AP_CLKREQ_L

R5206

100K

1%

1/32W

MF

01005

1

R0807

100K

5%
1/32W
MF
01005

2

ROOM=SOC

1

#24556007:Parallel to 100kohm R5906_RF(nostuff)

2

B

A

SYNC_MASTER=david-copy SYNC_DATE=03/01/2016

PAGE TITLE

MLB UNIQUE

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

52 OF 53
52 OF 81

A

D

77 60 57 55 53 46 41
27 26 25 23 21 19 18 10 9 4
40 39 37 35 34 33 31 30 28

46 41 40 37 36 32 21 20 18 16

68 60 58 55 53 52 48 47

60 20

60 20

60 20

60 20

60 12

PP_VDD_MAIN
PP1V8_SDRAM

PMUGPIO_TO_WLAN_CLK32K

PMU_TO_WLAN_REG_ON
PMU_TO_BT_REG_ON
BT_TO_PMU_HOST_WAKE
AP_TO_BT_WAKE

PP_VDD_MAIN
PP1V8_SDRAM

PMU_TO_WLAN_32K

PMU_TO_WLAN_REG_ON
PMU_TO_BT_REG_ON
BT_TO_PMU_HOST_WAKE
AP_TO_BT_WAKE

Wifi/BT

I32

Cellular

77 60 57 55 53 46 41
27 26 25 23 21 19 18 10 9 4
40 39 37 35 34 33 31 30 28

46 41 40 37 36 32 21 20 18 16

68 60 58 55 53 52 48 47

65 38 37 32 30 25 23 19

65 20

65 20

69 20

345678

PP_VDD_MAIN
PP1V8_SDRAM

PP_VDD_BOOST
BBPMU_TO_PMU_AMUX1
BBPMU_TO_PMU_AMUX2
BBPMU_TO_PMU_AMUX3

2 1

PP_VDD_MAIN

PP1V8_SDRAM

PP_VDD_BOOST_RF
BBPMU_TO_PMU_AMUX1
BBPMU_TO_PMU_AMUX2
BBPMU_TO_PMU_AMUX3

NC

D

C

B

60 52

60 52

60 52

60 52

60 52

60 52

60 52

60 52

60 20

60 12

60 12

60 12

60 12

60 12

60 12

60 12

60 12

60 12

60 13

60 13

60 11

60 11

60 11

60 11

68 60 53

68 60 53

61 57 53

61 57 53

61 57 53

60 57 53

60 57 53

61 58 53

90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N
PCIE_AP_TO_WLAN_RESET_L
PCIE_WLAN_BI_AP_CLKREQ_L
WLAN_TO_PMU_HOST_WAKE
AP_TO_WLAN_DEVICE_WAKE

UART_AP_TO_WLAN_TXD
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_CTS_L

UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L

AOP_TO_WLAN_CONTEXT_A
AOP_TO_WLAN_CONTEXT_B

I2S_AP_TO_BT_BCLK
I2S_AP_TO_BT_LRCLK
I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_DOUT

UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

50_UAT_WLAN_5G_WEST
50_UAT_WLAN_2G_EAST
50_UAT_WLAN_5G_EAST
50_WLAN_G_1
50_WLAN_A_1

50_UAT2_M

FF SPECIFIC

60 57 53

60 57 53

61 57 53 73 57 53

61 57 53

61 57 53

61 58 53

27 26 25 23 21 19 18 10 9 4

41 40 39 37 35 34 33 31 30 28

77 60 57 55 53 46

50_WLAN_A_1
50_WLAN_G_1
50_UAT_WLAN_5G_EAST
50_UAT_WLAN_2G_EAST
50_UAT_WLAN_5G_WEST

50_UAT2_M

PP_VDD_MAIN

100_PCIE_AP_TO_WLAN_REFCLK_P
100_PCIE_AP_TO_WLAN_REFCLK_N
100_PCIE_AP_TO_WLAN_TX_P
100_PCIE_AP_TO_WLAN_TX_N
100_PCIE_WLAN_TO_AP_RX_P
100_PCIE_WLAN_TO_AP_RX_N
PCIE_AP_TO_WLAN_PERST_L
PCIE_AP_BI_WLAN_CLKREQ_L
PCIE_WLAN_TO_PMU_WAKE
AP_TO_WLAN_DEV_WAKE

UART_AP_TO_WLAN_TXD
UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_RTS_L
UART_WLAN_TO_AP_CTS_L

UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L

AOP_TO_WLAN_CONTEXT_A
AOP_TO_WLAN_CONTEXT_B

I2S_AP_TO_BT_BCLK
I2S_AP_TO_BT_LRCK
I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_DOUT

UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

50_UAT_WLAN_5G_WEST
50_UAT_WLAN_2G_EAST

50_UAT_WLAN_5G_EAST
50_WLAN_G_1
50_WLAN_A_1
50_UAT2_M

RADIO_MLB_FF

50_WLAN_A_1
50_WLAN_G_1
50_UAT_WLAN_5G_EAST 50_UAT_MB_HB_SOUTH
50_UAT_WLAN_2G_EAST
50_UAT_WLAN_5G_WEST
50_UAT2_M

PP_VDD_MAIN

50_UAT_WLAN_2G_WEST_PLEXER

50_UUAT_LB_MLB_NORTH

50_UAT_LB_MLB_SOUTH

PP3V0_TRISTAR_ARC_PROX

VDD_TUNER_RFFE_VIO_1V8

UAT_TUNER_RFFE_CLK

UAT_TUNER_RFFE_DATA

BB_TO_LAT_ANT_SCLK

BB_TO_LAT_ANT_SDATA

WIFI_MLB

50_UAT1_WEST

50_UAT1_TUNER

BUFFER_GPO1

I16

50_UAT_WLAN_2G_WEST_PLEXER
50_UUAT_LB_MLB_NORTH

50_UAT_MB_HB_SOUTH
50_UAT_LB_MLB_SOUTH
50_UAT1_WEST
50_UAT1_TUNER

PP3V0_TRISTAR_ANT_PROX
PP1V8_SDRAM
BB_TO_UAT_SCLK
BB_TO_UAT_DATA
BUFFER_GPO1

BB_TO_LAT_ANT_SCLK
BB_TO_LAT_ANT_DATA

Opposite polarity on Karoo -->

68 46 37 26

64 39 23 20 13

68 60 53

68 60 53

81 55 53

64 55 53

64 55 53

78 55 53

78 55 53

AP_TO_ICEFALL_FW_DWLD_REQ

12

76 57 53

75 57 53

73 57 53

75 57 53

76 58 53

58 41 40 29 19

46 41 40 37 36 32 21 20 18 16

68 58 53

68 58 53

68 58 53

68 58 53 41
68 58 53 41

68 60 58 55 53 52 48 47

78

78 55 53

81 55 53

78 55 53

67 36 17 13

76 57 53

73 57 53

73 57 53

75 57 53

AP_TO_BBPMU_RADIO_ON_L

64 12

PMU_TO_BBPMU_RESET_L

64 20

AP_TO_BB_RESET_L

64 12

BB_TO_AP_RESET_DETECT_L

68 12

BB_TO_STROBE_DRIVER_GSM_BURST_IND
AP_TO_BB_MESA_ON

68 12

AP_TO_BB_TIME_MARK

68 12

68 12

AP_TO_BB_COREDUMP
LCM_TO_MANY_BSYNC
AP_TO_BB_IPC_GPIO1

68 12

67 52

90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N

67 52

67 52

90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_TXD_N

67 52

90_PCIE_BB_TO_AP_RXD_P

67 52

90_PCIE_BB_TO_AP_RXD_N

67 52

PCIE_AP_TO_BB_RESET_L

68 52

68 52

PCIE_BB_BI_AP_CLKREQ_L
BB_TO_PMU_PCIE_HOST_WAKE_L

68 20

UART_AOP_TO_BB_TXD

68 13

UART_BB_TO_AOP_RXD

68 13

I2S_BB_TO_AP_BCLK

68 11

68 11

I2S_BB_TO_AP_LRCLK

68 11

I2S_AP_TO_BB_DOUT

68 11

I2S_BB_TO_AP_DIN
UART_BB_TO_WLAN_COEX

UART_WLAN_TO_BB_COEX

NFC_SWP
NFC_TO_BB_CLK_REQ

BB_TO_NFC_CLK
NFC_SWP_MUX

SE2_READY
AP_TO_ICEFALL_FW_DWLD_REQ
SE2_PWR_REQ

SE2_PRESENT
ICEFALL_LDO_ENABLE

SWD_AP_TO_MANY_SWCLK

67 13

SWD_AOP_BI_BB_SWDIO

64 20

PMU_TO_BB_USB_VBUS_DETECT
90_USB_BB_DATA_P

67 40

90_USB_BB_DATA_N

67 40

50_UAT_WLAN_2G_WEST_PLEXER
50_UAT_LB_MLB_SOUTH

50_UAT_MB_HB_SOUTH
50_UUAT_LB_MLB_NORTH

MAKE_BASE=TRUE

AP_TO_BBPMU_RADIO_ON_L
PMU_TO_BBPMU_RESET_L
AP_TO_BB_RESET_L

BB_TO_AP_RESET_ACT_L

BB_TO_AP_RESET_DETECT_L
BB_TO_AP_GSM_TXBURST
AP_TO_BB_GYRO_FORCE_PWM
AP_TO_BB_TIME_MARK
AP_TO_BB_COREDUMP_TRIG
TOUCH_TO_BBPMU_FORCE_PWM
AP_TO_BB_MESA_ON

AP_TO_BB_IPC_GPIO2

100_PCIE_AP_TO_BB_REFCLK_P
100_PCIE_AP_TO_BB_REFCLK_N
100_PCIE_AP_TO_BB_TX_P
100_PCIE_AP_TO_BB_TX_N
100_PCIE_BB_TO_AP_RX_P
100_PCIE_BB_TO_AP_RX_N
PCIE_AP_TO_BB_PERST_L
PCIE_AP_BI_BB_CLKREQ_L
PCIE_BB_TO_PMU_WAKE_L

UART_AP_TO_BB_TXD
UART_BB_TO_AP_RXD

UART_AOP_TO_BB_TXD
UART_BB_TO_AOP_RXD

UART_AOP_TO_GNSS_TXD
UART_GNSS_TO_AOP_RXD

I2S_AP_TO_BB_BCLK
I2S_AP_TO_BB_LRCLK
I2S_AP_TO_BB_DOUT
I2S_BB_TO_AP_DIN

UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

NFC_SWP
NFC_TO_BB_CLKREQ
BB_TO_NFC_CLK
NFC_SWP_MUX
SE2_READY
AP_TO_ICEFALL_FW_DWLD
SE2_PWR_REQ
SE2_PRESENT
ICEFALL_LDO_ENABLE

SWD_AP_TO_BB_CLK
SWD_AP_BI_BB_IO
USB_BB_VBUS
90_USB_BB_P
90_USB_BB_N

50_UAT_WLAN_2G_WEST_PLEXER
50_UAT_LB_MLB_SOUTH
50_UAT_MB_HB_SOUTH
50_UUAT_LB_MLB_NORTH

RADIO_MLB

I33

ieee
ieee.std_logic_1164.all
work.all

TRUE

D

C

B

A

77 60 57 55 53 46 41
27 26 25 23 21 19 18 10 9 4
40 39 37 35 34 33 31 30 28

46 41 40 37 36 32 21 20 18 16

68 60 58 55 53 52 48 47

55 20

53

64 55

64 55 53

55 12

55 12

55 20

55 12

55 12

55 12

55 12

NFC

PP_VDD_MAIN
PP1V8_SDRAM

PMU_TO_NFC_EN
BB_TO_NFC_CLK
NFC_TO_BB_CLK_REQ
AP_TO_NFC_FW_DWLD_REQ
AP_TO_NFC_DEV_WAKE

NFC_TO_PMU_HOST_WAKE

UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_CTS_L

P2MM-NSM

ROOM=UAT_DEBUG

ROOM=UAT_DEBUG

ROOM=UAT_DEBUG

ROOM=UAT_DEBUG

PP_VDD_MAIN
PP1V8_SDRAM

PMU_TO_NFC_EN
BB_TO_NFC_CLK
NFC_TO_BB_CLK_REQ
AP_TO_NFC_FW_DWLD
AP_TO_NFC_DEV_WAKE
NFC_TO_PMU_HOST_WAKE

UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_CTS_L

P2MM-NSM

P2MM-NSM

P2MM-NSM

STOCKHOLM_MLB

SM

SM

SM

SM

PP5304
PP5301
PP5302
PP5303

I10

PP

PP

PP

PP

1

75 57 53

50_UAT1_WEST

50_UAT1_WEST

1

68 58 53

1
1

68 58 53

76 58 53

68 58 53

BB_TO_UAT_SCLK
BB_TO_UAT_DATA
50_UAT1_TUNER
BUFFER_GPO1

Per JimYang 3/17, D11 only, NC BUFFER_GPO2

68 58 53 41

68 58 53 41

BB_TO_LAT_ANT_SCLK
BB_TO_LAT_ANT_DATA

BB_TO_LAT_GPO1

68 41

68 41

BB_TO_LAT_GPO2

68 46

BB_TO_LAT_GPO3

MAKE_BASE=TRUE
MAKE_BASE=TRUE

NC

UAT_RFFE_CLK
UAT_RFFE_DATA
50_UAT1_TUNER
BUFFER_GPO1
BUFFER_GPO2

LAT_RFFE_CLK

LAT_RFFE_DATA

RFFE_GPO1
RFFE_GPO2
RFFE_GPO3

PMU_TO_GNSS_EN
UART_AP_TO_GNSS_TXD
UART_GNSS_TO_AP_RXD
UART_AP_TO_GNSS_RTS_L
UART_GNSS_TO_AP_CTS_L
GNSS_TO_PMU_HOST_WAKE
AP_TO_GNSS_TIME_MARK

SYNC_MASTER=david-copy

PAGE TITLE

SYNC_DATE=03/01/2016

A

81 55 53

78 55 53

78 55 53

81 55 53

78 55 53

78 55 53

NFC_SWP
SE2_READY

SE2_PWR_REQ
SE2_PRESENT

NFC_SWP_MUX
ICEFALL_LDO_ENABLE

8 7 5 4 2 1

NFC_SWP
SE2_READY
SE2_PWR_REQ
SE2_PRESENT

NFC_SWP_MUX
ICEFALL_LDO_ENABLE

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36

CELL,WIFI,NFC

Apple Inc.

DRAWING NUMBER SIZE

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

53 OF 53
53 OF 81

D

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

7

6 5 4 3

2 1

ECNREV DESCRIPTION OF REVISION

CK
APPD

DATE

2016-07-0600065328798 ENGINEERING RELEASED

D

D

STOCKHOLM_MLB
JUNE 22, 2016

C

2

2

IN

2

IN

2

OUT

2

IN

2

IN

2

OUT

2

IN

2

IN

2

OUT

2

IN

2

OUT

2

IO

2

IN

2

IN

2

IN

2

OUT

PP_VDD_MAIN
PP1V8_SDRAM

PMU_TO_NFC_EN
NFC_TO_PMU_HOST_WAKE
AP_TO_NFC_DEV_WAKE
AP_TO_NFC_FW_DWLD_REQ
NFC_TO_BB_CLK_REQ
BB_TO_NFC_CLK

UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_CTS_L

NFC_SWP
SE2_READY
SE2_PWR_REQ
SE2_PRESENT

NFC_SWP_MUX

C

B

ALTERNATES

PART NUMBER

ALTERNATE FOR

PART NUMBER

132S0400

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

2

OUT

ICEFALL_LDO_ENABLE

DESCRIPTION BOM OPTIONREFERENCE DESIGNATOR(S)

C7504_RF132S0436

CRITICALNFCSW_RFONSEMI,IC LOAD SWITCH, WLCSP41353S01007

0.22UF 20% 6.3V 01005

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

B

A

BOM OPTIONS

PART# DESCRIPTIONQTY

22PF, 0201 2% 50V D10_JP1131S00055 C7512_RF

150PF, 0201 2% 50V131S00019 D10_JP1 C7518_RF

560PF, 0201 2% 50V D10_JP1131S0825 C7516_RF

220PF, 0201 2% 50V D10_ROW1 C7514_RF131S0883

22PF, 0201 2% 50V D10_ROW1131S00055 C7512_RF

120PF, 0201 2% 50V1 D10_ROWC7518_RF131S00117

BOM OPTIONREFERENCE DESIGNATOR(S)

C7514_RF1 D101131S0883 220PF, 0201 2% 50V

C7512_RF D10122PF, 0201 2% 50V131S00055 1

D101C7518_RF120PF, 0201 2% 50V131S00117 1

C7516_RF131S00026 1 820PF, 0201 2% 50V D101

C7514_RF D10_JP220PF, 0201 2% 50V1131S0883

D10_ROWC7516_RF820PF, 0201 2% 50V1131S00026

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

PART# DESCRIPTIONQTY

C7518_RF1 D111180PF, 0201 2% 50V131S00118

131S00033 1 680PF, 0201 2% 50V D111C7516_RF

131S00081 1 D11_JPC7514_RF270PF, 0201 2% 25V

1 D11_JPC7518_RF131S0731 100PF, 0201 2% 50V

C7516_RF D11_JP1131S00033 680PF, 0201 2% 50V

C7514_RF131S00081 1 270PF, 0201 2% 25V D11_ROW

C7518_RF D11_ROW1 180PF, 0201 2% 50V131S00118

TABLE_5_HEAD

BOM OPTIONREFERENCE DESIGNATOR(S)

TABLE_5_ITEM

D1111 C7514_RF270PF, 0201 2% 25V131S00081

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

D11_ROWC7516_RF1 680PF, 0201 2% 50V131S00033

DRAWING TITLE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

page1

SCH,MLB,D11

051-00482

REVISION

8.0.0

BRANCH

PAGE

1 OF 75

SHEET

54 OF 81

A

SIZEDRAWING NUMBER

D

3

1245678

345678

2 1

D

STOCKHOLM

NFC CONTROLLER

VDD_NFC_5V

PP1V8_SDRAM VDD_NFC_TVDD

1 2

PP_VDD_MAIN_NFC

2

VDD_NFC_DVDD

1

C7500_RF

1UF
20%

2

X5R
0201

NFC

1

C7502_RF

1UF
20%

10V10V

2

X5R
0201

NFC

C6

VDD

C7

VBAT

B5

D3

PVDD

G2

VUP

E7

TVDD

D7

AVDD

VDD_NFC_AVDD

VOLTAGE=1.80V

VDD_NFC_ESE

VOLTAGE=1.80V

B7

C5

SVDD

ESE_VDD

VDD_NFC_AVDD

2

2

1

C7520_RF

1UF

20%
10V

2

X5R
0201

NFC

R7502_RF

0.00

1/32W
01005

NFC

21

0%
MF

2

1

C7504_RF

0.22UF
20%

6.3V

2

X5R
01005

NFC

2

1

C7505_RF

1UF

20%
10V

2

X5R
0201

NFC

1

C7506_RF

2

1

C7526_RF

2.2UF2.2UF 2.2UF
20%20% 20%

6.3V6.3V 6.3V

2

X5R-CERMX5R-CERM X5R-CERM
0201-10201-1 0201-1

1

C7527_RF

2

2

NFC_RXP

5V BOOSTER

PP_VDD_MAIN_NFC

2

L7502_RF

1

C7521_RF

2

1

C7511_RF

15UF
20% 20%

6.3V 6.3V

2

X5R X5R
0402-1

NFC

1.8UH-0.7A

0603

NFC

21

NFC_BOOST_SW

NFC_BOOST_EN

2

NFC FRONT END

C7507_RF

1000PF

21

2%

25V

C0G-NP0

0201

NFC

NFC_RXP_CAP

R7508_RF

560

1%

1/20W

MF

201

NFC

21

B1
B2

B3

VIN
SW

SW
EN

NFBST_RF

WLCSP

FAN48614BUC50X

PGND

PGND

C1

C2

AGND

C3

VOUT
VOUT

NFC

A1A3
A2

VDD_NFC_5V

1

C7517_RF

15UF

2

0402-1

NFC

2

1

C7522_RF

100PF100PF

5%5%
16V16V

2

NP0-C0GNP0-C0G
0100501005

NFCNFC

D

C

B

SIM_PMU_VCC

NFC_RF

1 2

OUT

1

IN

1

IN

1

OUT

1

IN

1 2

IN

1 2

OUT

1 2

IN

1 2

OUT

1 2

IN

1

IN

1

OUT

1

OUT

NFC_TO_PMU_HOST_WAKE
SE2_PRESENT
AP_TO_NFC_FW_DWLD_REQ
NFC_TO_BB_CLK_REQ
BB_TO_NFC_CLK
UART_AP_TO_NFC_TXD
UART_NFC_TO_AP_RXD
UART_AP_TO_NFC_RTS_L
UART_NFC_TO_AP_CTS_L
PMU_TO_NFC_EN

VDD_NFC_ESE

2

SE2_READY
ICEFALL_LDO_ENABLE
NFC_SWP_MUX

NC

NC

D1

IRQ

A5

SVDD_REQ

B2

DWL

A2

CLK_REQ

A3

NFC_CLK_XTAL1

C1

RX

B1

TX

D2

CTS

A1

RTS

E1

VEN

E3

SMX_RST*

E4

SMX_CLK

F4

ESE_IO1

B3

SE2_BUSY

B4

IC2

E6

EXT_MUX

C3

XTAL2

PN67VEU3-B001D004

UFLGA

AVSS

D4

AVSS

F3

D6

VSS

E2

AVSS

B6

SIM_SWIO

TX_PWR_REQ

ESE_DWPM_DBG

ESE_DWPS_DBG

WKUP_REQ

SE2_ENABLE

SE2_SVDD_IN

PVSS

TVSS

DVSS

DVSS

G4

C2

C4

GPIO0

VMID

IC00

IC01

RX+

RX-

TX1
TX2

F1
A4

A7
A6
D5

G7
G6

F6
F5

G3
G5

E5
F7
F2

G1

1 2

NC

NFC_SWP
NFC_TEST_OUT

NC

NFC_BOOST_EN

NC
NC

NFC_RXP
NFC_RXN

NFC_TXP
NFC_TXN

AP_TO_NFC_DEV_WAKE

NFC_VMID

SE2_PWR_REQ
PP1V8_SDRAM

SE2_PWR_REQ

BI

2

2

2

2

2

2

IN

OUT

IN

1

R7599_RF

1.00K
5%
1/32W
MF
01005

2

1

1 2

1 2

1 2

1

C7503_RF

0.1UF
20%

6.3V

2

X5R-CERM
01005

NFC

2

2

2

NFC_TXP

NFC_TXN

NFC_RXN

160NH-10%-0.48A-0.33OHM

160NH-10%-0.48A-0.33OHM

L7500_RF

0402

NFC

L7501_RF

0402

NFC

C7508_RF

1000PF

21

2%

25V

C0G-NP0

0201
NFC

21

1

C7509_RF

680PF

2%
25V

2

C0G-NP0
0201

NFC

21

1

C7510_RF

680PF

2%
25V

2

C0G-NP0
0201

NFC

NFC_RXN_CAP

NFC_BALP

BALUN_RF

NFC_BALN

R7509_RF

560

1%

1/20W

MF

201

NFC

GND

BAL0

SM

ATB161006F-20011

UNBAL

BAL1

4 1

3 2

NFC_ANT_MATCH

21

180 PHASE SHIFT INTRODUCED BY BALUN
DONE FOR BEST ROUTING

C7514_RF

220PF

21

2%
50V
C0G

0201

OMIT_TABLE

C7512_RF

22PF

21

2%

50V

C0G-CERM

0201

OMIT

1

C7515_RF

1000PF 820PF
2% 2%
25V 25V

2

C0G-NP0 C0G-NP0
0201 0201

NFC NFC

1

C7516_RF

2

OMIT_TABLE

NFC_TEST_OUT

2

1

C7518_RF

120PF

2%
50V

2

NP0-C0G
0201

OMIT_TABLE

NFC_ANT

TP7500_RF

1

SM-TP1P25-TOP

TP7505_RF

1

TP-P55

OMIT

NFC

OMIT

A

A

C

B

A

PP7503_RF

P2MM-NSM

SM

UART_AP_TO_NFC_TXD

1 2

UART_NFC_TO_AP_RXD

1 2

UART_AP_TO_NFC_RTS_L AP_TO_NFC_DEV_WAKE

UART_NFC_TO_AP_CTS_L

1 2

1

PP

OMIT

PP7504_RF

P2MM-NSM

SM

1

PP

OMIT

PP7505_RF

P2MM-NSM

SM

1

PP

OMIT

PP7506_RF

P2MM-NSM

SM

1

PP

OMIT

NFC_TO_PMU_HOST_WAKE

1 2

PMU_TO_NFC_EN

1 2

1 2 1 2

PP7507_RF

P2MM-NSM

SM

1

PP

OMIT

PP7508_RF

P2MM-NSM

SM

1

PP

OMIT

PP7509_RF

P2MM-NSM

SM

1

PP

OMIT

NFC LOAD SWITCH

OMIT_TABLE

NFCSW_RF

FPF1204UCX

PP_VDD_MAIN PP_VDD_MAIN_NFC

PP1V8_SDRAM

2 1

1 2 2

A2

B2

WLCSP-COMBO

VIN

ON

GND

R7520_RF

0.00

1%

1/20W

MF

0201

NOSTUFF

VOUT

B1

21

A1

PP_VDD_MAIN_NFCPP_VDD_MAIN

2 2 1

PAGE TITLE

NFC

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

75 OF 75

SHEET

55 OF 81

A

8 7 5 4 2 1

36

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

D11 RADIO_MLB_FF

7

6 5 4 3

2 1

ECNREV DESCRIPTION OF REVISION

CK
APPD

DATE

2016-07-0600065328798 ENGINEERING RELEASED

D

FEB 05, 2016

PDF PAGE

TABLE_TABLEOFCONTENTS_HEAD

2

TABLE_TABLEOFCONTENTS_ITEM

CONTENTS
METROCIRC

D

NOLMBRF:LMBRF:

C

152S2001 L8008_RF

2.4NH,600MA,0201

6.8NH,2%,1.5A,0.055OHM,0402

1 CRITICAL152S0983 L8009_RF

TABLE_5_HEAD

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

TABLE_5_ITEM

CRITICAL1

LMBRF

LMBRF

152S00610

1.4NH,1.1A,0201

3.6NH,2%,1.7A,0.045OHM,0402

1 L8009_RF

CRITICAL1152S2024 L8008_RF

CRITICAL

BOM OPTIONCRITICAL

TABLE_5_ITEM

NOLMBRF

TABLE_5_ITEMTABLE_5_ITEM

NOLMBRF

C

B

B

A

3

DRAWING TITLE

SCH,MLB,D11

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

?

051-00482

REVISION

8.0.0

BRANCH

PAGE

1 OF 3

SHEET

56 OF 81

1245678

A

SIZEDRAWING NUMBER

D

METROCIRC

345678

2 1

D

C

D11 NORTH-SOUTH METROCIRC
339S00147

UPPER MLB

RADIO MLB
WIFI MLB

METROCIRC RADIO MLB

2

50_UAT1_EAST

BI

50_LAT_WLAN_NORTH

2

50_UUAT_LB_MLB_NORTH 50_UAT_LB_MLB_SOUTH

IN IO

6

SIGNAL1-U

2

SIGNAL2-U SIGNAL2-L

4

SIGNAL3-U

1
3
5

8
10
12
21
22
23
24
25
26
27
28
29
30
31
32

MCNS_RF

FLTPSSL-765E

SM

GND

SIGNAL1-L

SIGNAL3-L

GND

7
11
9

33
34
35
36
37
38

39

LOWER MLB

50_UAT_MB_HB_SOUTH
50_LAT_WLAN_SOUTH

2

OUT

RADIO MLB
WIFI MLB

D11 EAST-WEST METROCIRC

339S00146

WEST MLB

50_UAT_WLAN_2G_WEST
50_UAT_WLAN_5G_WEST
50_UAT1_WEST

R6711_RF

3.9PF

21

50_UAT_WLAN_2G_WEST_PLEXER

+/-0.1PF

25V

C0G-CERM

0201

UP_RFFE

OMIT

1

WIFI MLB
WIFI MLB

METROCIRC

EAST MLB

MCEW_RF

FLTPSSL-672E

50_UAT_WLAN_2G_EAST

IO

50_UAT_WLAN_5G_EAST

IO

BI

50_UAT1_EAST

3

SIGNAL1-E

1

SIGNAL2-E

5

SIGNAL3-E

2
4
6
8

GND

9
12
21
22

50_UAT_WLAN_2G_WEST

2

SM

SIGNAL1-W
SIGNAL2-W
SIGNAL3-W

GND

7
10
11

23
24
25
26
27
28
29
30

2

IO
IO

WIFI MLB
RADIO MLB

IO

INOUT

D

C

RADIO MLB

INOUT

B

A

50_WLAN_G_1

IO

WIFI_BULK CAP

PP_VDD_MAIN

L7700_RF

0.00

1/32W
01005

WLAN_RFFE

OMIT

21

0%
MF

1

C7610_RF

10UF

20%

6.3V

2

CERM-X5R
0402-9

WLAN

50_WLAN_G_1_BPF

1

1

2

L7701_RF

9.1NH-3%-0.17A-1.7OHM

01005

2

WIFI LOWER ANTENNA FEED

R7700_RF

C7611_RF

1000PF

10%
10V
X5R
01005

NOSTUFF

W2BPF_RF

WLAN-BT-LTE

B39242B8847P810

4 1

IN/OUT IN/OUT

6

LGA

GND

5

50_WLAN_G_1_M

3

2

9.1NH-3%-0.17A-1.7OHM

IO

L7702_RF

01005
WLAN_RFFE

OMIT

50_WLAN_A_1

1

2

1

2

0.00

C7700_RF

0.2PF

+/-0.1PF
16V
NP0-C0G
01005

WLAN_RFFE
NOSTUFF

1/32W
01005

WLAN_RFFE

OMIT

C7701_RF

3.6PF

21

+/-0.1PF

16V

NP0-C0G

01005

WLAN_RFFE

OMIT

4.0NH-+/-0.1NH-0.27A

WLAN_RFFE

21

0%
MF

50_WLAN_G_1_DPLX

L7703_RF

01005

OMIT

50_WLAN_A_1_DPLX

1

C7702_RF

4.3NH-3%-0.270A

01005

WLAN_RFFE

OMIT

2

1

2

W25DI_RF

DPX205850DT-9173C1SJ

0805

6

HI

4

LO

1

GND

3

COM

5

2

WLAN_RFFE

50_LAT_WLAN_M

1

C7703_RF

0.2PF

+/-0.1PF
16V

2

NP0-C0G
01005

WLAN_RFFE
NOSTUFF

R7701_RF

0.00

0%

1/32W

MF

01005

WLAN_RFFE

OMIT

C6729_RF

7.5NH+/-0.3%-0.4A

0201

UP_RFFE
OMIT

2

COAX

JLAT3_RF

MM7829-2700

F-ST-SM

2

21

50_LAT_WLAN_NORTH

1

C7704_RF

0.2PF

+/-0.1PF
16V

2

NP0-C0G
01005

WLAN_RFFE
NOSTUFF

2 2

50_LAT_WLAN_SOUTH

1

3

B

THROUGH METROCIRC

A

PAGE TITLE

METROCIRC [2]

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

2 OF 3

57 OF 81

D

D

UAT TUNER FLEX

345678

PLEASE CONTACT ANTENNA (MATT MOW)
FOR ANY COMPONENT CHANGE.

2 1

D

3

PP1V8_SDRAM

IO

FL6701_RF

BB_TO_UAT_DATA BB_TO_UAT_SCLK

0.00

1/32W
01005

FL6700_RF

0%
MF

21

UAT_TUNER_RFFE_DATA_FILT

1

C6702_RF

27PF

5%
16V

2

NP0-C0G
01005

UAT

150OHM-25%-200MA-0.7DCR

21

01005

VDD_TUNER_RFFE_VIO_1V8_FILT PP3V0_TRISTAR_UAT_TUNER_B2B_FILT

1

C6701_RF

27PF

5%
16V

2

NP0-C0G
01005

UAT

TUNFX_RF

505066-0620

F-ST-SM

8 7

2 1
4 3
6 5

10 9

UAT

UAT_TUNER_RFFE_CLK_FILT

1

C6703_RF

27PF

5%
16V

2

NP0-C0G
01005

UAT

1

C6705_RF

27PF

5%
16V

2

NP0-C0G
01005

UAT

150OHM-25%-200MA-0.7DCR

FL6702_RF

0.00

0%

1/32W

MF

01005

FL6703_RF

01005

21

PP3V0_TRISTAR_ANT_PROX

21

3

INIO

3

C

3

BB_TO_UAT_DATA

3

BB_TO_UAT_SCLK

1

C5904_RF

100PF

5%
35V

2

NP0-C0G
01005

1

C5905_RF

82PF

5%

6.3V

2

NP0-C0G
01005

IN

IN

BB_TO_LAT_ANT_SCLK

BB_TO_LAT_ANT_DATA

1

C5908_RF

33PF

5%
16V

2

NP0-C0G-CERM
01005

NOSTUFF

1

C5909_RF

22PF

2%
16V

2

CERM
01005

SP6701_RF

2.85R1.5-NSP

1

BUFFER_GPO1

IN

ALT UAT1 GND

L8010_RF

120NH-5%-40MA

0201

21

UAT_TUNER_GPO_FIL

1

C8005_RF

33PF

5%
16V

2

NP0-C0G-CERM
01005

VDD

USPDT_RF

RF1341

3

WLCSP

CB

GNDA

5

4

RF1

RFGND

2

1

USPDT_RF

6

L8007_RF

560NH-5%-2.80OHM

USPDT_VDD

1

1

C8001_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

OMIT_TABLE

C8006_RF

33PF

5%
16V

2

NP0-C0G-CERM
01005

L8008_RF

2.4NH+/-0.1NH-0.6A

21

0201

0201

DC_BLOCK

PP3V0_TRISTAR_ANT_PROX

21

1

C8008_RF

18PF

2%
25V

2

C0H-CERM
0201

3

IO

AGND_RF

STDOFF-2.2OD0.25H-0.50-1.70

ALT_GND

1

C

B

FROM RADIO SCHEMATICS

50_UAT1_TUNER

IO

1

C6734_RF

100PF

5%
16V

2

NP0-C0G
01005

UP_RFFE

1

C6735_RF

2

UP_RFFE

18PF

5%
16V
CERM
01005

L6708_RF

1.4NH+/-0.1NH-1.1A

21

0201

1

C6730_RF

220PF

5%

6.3V

2

CERM
01005

1

C6731_RF

56PF

5%
16V

2

NP0-C0G
01005

50_UAT1_NOTCH

1

C6736_RF

0.3PF

+/-0.05PF
25V

2

C0G-CERM
0201

1

C6732_RF

4.7PF

+/-0.1PF
16V

2

NP0-C0G
01005-1

L6707_RF

18NH-3%-0.22A-0.54OHM

03015

UP_RFFE

N

O_XNET_CONNECTION

1

C6733_RF

220PF

5%

6.3V

2

CERM
01005

LB/MLB/GNSS/MB/HB
STANDOFF

C6716_RF

18PF

21

50_UAT1_FEED

2%

25V

C0H-CERM

0201

1

2

UP_RFFE

STDOFF-2.56OD1.4ID.99H-SM

1

C6714_RF

0.8PF

+/-0.05PF
25V

2

C0G
0201

UP_RFFE

NO_XNET_CONNECTION

CHASSIS_GND

SUAT1_RF

1

UP_RFFE

3

50_UAT2_M

IO

CHASSIS_GND

3

C7731_RF

0.8NH-+/-0.05NH-1.1A-0.04OHM

21

1

C7730_RF

0.6PF

+/-0.05PF
25V

2

CERM
0201

UP_RFFE

0201

UP_RFFE

50_UAT2_FEED

STDOFF-2.56OD1.4ID.99H-SM

1

NOSTUFF

L7709_RF

1.5NH+/-0.1NH-1.0A

0201

UP_RFFE

2

5G WIFI
STANDOFF

SUAT2_RF

1

UP_RFFE

1

L8009_RF

6.8NH-1.5A-0.055OHM

0402

OMIT_TABLE

2

CHASSIS_GND

3

B

A

PAGE TITLE

UAT MATCH AND TUNER [3]

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

3 OF 3

58 OF 81

A

D

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

D1X WIFI_MLB (PERENNIAL)

7

6 5 4 3

2 1

ECNREV DESCRIPTION OF REVISION

CK
APPD

DATE

2016-07-0600065328798 ENGINEERING RELEASED

D

C

D

FEBRUARY 1, 2016

CONTENTSCSA PAGEPDF PAGE

TABLE_TABLEOFCONTENTS_HEAD

2

TABLE_TABLEOFCONTENTS_ITEM

3

TABLE_TABLEOFCONTENTS_ITEM

76
77

POWER

2

2

IN

2

IN

2

IN

2

IN

2

OUT

2

IN

PP_VDD_MAIN
PP1V8_SDRAM

CLOCKS

PMUGPIO_TO_WLAN_CLK32K

CONTROL

PMU_TO_WLAN_REG_ON
PMU_TO_BT_REG_ON
BT_TO_PMU_HOST_WAKE
AP_TO_BT_WAKE

152S00029 1 R7703_RF D10_JPCRITICAL

131S0893 1 D10_JPCRITICALC7706_RF

117S0161

117S0161

152S1980 1 D10_JPCRITICALIND,1.0NH,UH-Q,01005

WLAN PCIE

2

IN

2

IN

2

IN

2

IN

2

OUT

2

OUT

2

IN

2

2

OUT

2

IN

2

OUT

2

IN

2

OUT

2

IN

90_PCIE_AP_TO_WLAN_REFCLK_P
90_PCIE_AP_TO_WLAN_REFCLK_N
90_PCIE_AP_TO_WLAN_TXD_P
90_PCIE_AP_TO_WLAN_TXD_N
90_PCIE_WLAN_TO_AP_RXD_P
90_PCIE_WLAN_TO_AP_RXD_N
PCIE_AP_TO_WLAN_RESET_L
PCIE_WLAN_BI_AP_CLKREQ_L

IO

WLAN_TO_PMU_HOST_WAKE
AP_TO_WLAN_DEVICE_WAKE

WLAN UART

UART_WLAN_TO_AP_RXD
UART_AP_TO_WLAN_TXD
UART_WLAN_TO_AP_CTS_L
UART_AP_TO_WLAN_RTS_L

152S2043 IND,6.2NH,UH-Q,01005 D10_JPCRITICALC7702_RF1

152S1853 1

131S0401 1

NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF

PERENNIAL
WIFI FRONT-END

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

C7705_RF1131S0648 CAP,CER,0.3PF,+/-0.05,01005 D10_JPCRITICAL

IND,1.1NH,UH-Q,01005

CAP,CER,0.2PF,+/-0.05,01005

1

1 D10_JPCRITICALRES,MF,0 OHM,1/32W,01005

CAP,3.9PF,+/-1.0PF,01005

1152S2061 D10_JPCRITICAL

IND,7.5NH,UH-Q,01005

RES,MF,0 OHM,1/32W,01005

TRUE

1 CRITICAL152S2043 IND,6.2NH,UH-Q,01005 D10_JP

IND,9.1NH,UH-Q,01005

CAP,3.6PF,+/-0.1PF,01005

IND,4.0NH,+/-0.1NH,UH-Q,01005

RES,MF,0 OHM,1/32W,01005

C7700_RF, C7703_RF,C7704_RF

R7702_RF

R7704_RF

R6711_RF

C6729_RF

L7700_RF

L7701_RF

L7702_RF

C7701_RF

L7703_RF

R7701_RF

CRITICALR7700_RF D10_JP1117S0161

CRITICAL D10_JP

BOM OPTIONS:

D101_WIFI:D10_ROW:D10_JP:

TABLE_5_HEAD

BOM OPTIONCRITICAL

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

BOM OPTIONCRITICAL

CAP,CER,0.3PF,+/-0.05,01005 CRITICAL1 C7705_RF131S0648 D10_ROW

TABLE_5_ITEM

IND,1.1NH,UH-Q,01005152S00029 1 R7703_RF D10_ROWCRITICAL

TABLE_5_ITEM

1131S0893 CAP,CER,0.2PF,+/-0.05,01005 C7706_RF D10_ROWCRITICAL

TABLE_5_ITEM

TRUE

D10_JPCRITICALRES,MF,0 OHM,1/32W,01005 R7711_RF

TABLE_5_ITEM

1 CRITICALR7711_RFRES,MF,0 OHM,1/32W,01005117S0161 D10_ROW

TRUE1 R7702_RFRES,MF,0 OHM,1/32W,01005 D10_ROWCRITICAL117S0161

TABLE_5_ITEM

TRUE

TABLE_5_ITEM

D10_JP1131S0404 CRITICAL

TABLE_5_ITEM

152S1853 1 C6729_RF CRITICAL D10_ROW

TABLE_5_ITEM

117S0161 1 CRITICAL D10_ROWR7700_RF

TABLE_5_ITEM

TRUE

TRUE

152S2043 D10_ROW

TABLE_5_ITEM

D10_JP1152S1998 IND, 0.8NH,UH-Q,01005 CRITICAL

TABLE_5_ITEM

TRUE

IND,2.4NH,UH-Q,01005

1117S0161 R6711_RF D10_ROWCRITICALTRUE

RES,MF,0 OHM,1/32W,01005

IND,9.1NH,UH-Q,01005

RES,MF,0 OHM,1/32W,01005

1 C7702_RF CRITICAL

IND,6.2NH,UH-Q,01005

1152S1998

CRITICAL D10_ROW1 R7704_RF152S1988

D10_ROWL7700_RFIND, 0.8NH,UH-Q,01005 CRITICAL

D10_ROWIND,6.2NH,UH-Q,01005152S2043 1 L7701_RF CRITICAL

TABLE_5_ITEM

D10_JPCRITICAL

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM TABLE_5_ITEM

D10_JP1117S0161 CRITICAL

152S1853 1 IND,9.1NH,UH-Q,01005

131S0401

152S00038 CRITICAL1152S00038 D10_JPCRITICAL1

TRUE

CAP,3.6PF,+/-0.1PF,01005 C7701_RF1 CRITICAL

IND,4.0NH,+/-0.1NH,UH-Q,01005

RES,MF,0 OHM,1/32W,01005

1 D10_ROW117S0161 CRITICAL

L7702_RF CRITICAL

L7703_RF

R7701_RF

D10_ROW

D10_ROW

D10_ROW

NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF

C7700_RF, C7703_RF,C7704_RF

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

CAP,CER,0.3PF,+/-0.05,01005131S0648 C7705_RF1 D101CRITICAL

IND,1.1NH,UH-Q,01005152S00029 1 R7703_RF D101CRITICAL

TRUE

IND,2.4NH,UH-Q,010051 R7704_RF D101152S1988 CRITICAL

TRUE

TRUE

TRUE

RES,MF, 0 OHM,1/20W, 02011 CRITICALR6711_RF118S0724

IND,9.1NH,UH-Q,02011 D101152S2054

C7708_RF CRITICAL1 D101CAP,CER,0.3PF,+/-0.05PF,01005131S0648

R7700_RF CRITICALRES,MF,0 OHM,1/32W,01005 D1011117S0161

TRUE

TRUE

IND, 0.8NH,UH-Q,01005152S1998 CRITICAL1 L7700_RF D101

C7702_RF

IND,6.2NH,UH-Q,01005152S2043 CRITICAL1 L7701_RF D101

IND,9.1NH,UH-Q,010051152S1853

1 CRITICALL7703_RF152S00038 IND,4.0NH,+/-0.1NH,UH-Q,01005

NOSTUFF: C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF

BOM OPTIONCRITICAL

CRITICALC7706_RFCAP,CER,0.2PF,+/-0.05,01005131S0893 D1011

D101R7711_RF1 RES,MF,0 OHM,1/32W,01005117S0161 CRITICAL

D1011 RES,MF,0 OHM,1/32W,01005 R7702_RF117S0161 CRITICAL

D101

CRITICALC6729_RF

CRITICAL1 D101IND,6.2NH,UH-Q,01005152S2043

CRITICALL7702_RF

CRITICAL1 C7701_RFCAP,3.6PF,+/-0.1PF,01005131S0401

D101

D101

D101

CRITICAL1117S0161 R7701_RF D101RES,MF,0 OHM,1/32W,01005

C7700_RF, C7703_RF,C7704_RF

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

C

B

A

BLUETOOTH UART

2

IN

2

OUT

2

IN

2

OUT

UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD
UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L

AOP

2

IN

2

IN

AOP_TO_WLAN_CONTEXT_A
AOP_TO_WLAN_CONTEXT_B

AUDIO

2

IN

2

IN

2

OUT

2

IN

I2S_AP_TO_BT_BCLK
I2S_AP_TO_BT_LRCLK
I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_DOUT

COEX

2

IN

2

OUT

UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

ANTENNA

3

3

3

2

2

3

50_UAT_WLAN_5G_WEST

IO

50_UAT_WLAN_2G_EAST

IO

50_UAT_WLAN_5G_EAST

IO

50_WLAN_G_1

IO

50_WLAN_A_1

IO

50_UAT2_M

IO

D11_JP:

TRUE

TRUE

152S00273

152S1976

TRUE

TRUE

TRUE

152S1986 CRITICAL1

TRUE

IND,0.6NH,UH-Q,01005

1 D11_JP

IND,0.7NH,UH-Q,01005

1131S0400

CAP,CER,3.5PF+/-0.1,01005

IND,FILM,2.2NH,UH-Q,01005

CAP,CER,0.3PF,+/-0.05PF,01005

TRUE

TRUE

TRUE

131S0893

131S0648 1 CRITICAL D11_JP

TRUE

TTT RRR UUU EEE
TRUE

TRUE

131S0648 CAP,CER,0.3PF,+/-0.05PF,01005

131S0405 1

152S00273

TRUE

TRUE

TRUE

CAP,3.9PF,+/-1.0PF,0201,HI-Q

IND,7.5NH,UH-Q,0201

1 CRITICAL131S0893 D11_JP

CAP,CER,0.2PF,+/-0.05PF,01005

1 D11_JP

CAP,CER,0.3PF,+/-0.05PF,01005 C7700_RF

IND,1.0NH,+/-0.1NH,UH-Q,01005 D11_JP1152S1980

CAP,CER,4.0PF,+/-0.1PF,01005

1 D11_JPL7700_RF

IND,0.6NH,+/-1NH,UH-Q,01005

RES,MF,0 OHM,1/32W,01005117S0161 1

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

R7703_RF1

CRITICAL D11_JP 152S00273

BOM OPTIONCRITICAL

R7702_RF CRITICAL D11_JP

R7704_RF

C7708_RF131S0648 1

R6711_RF CRITICAL

D11_JP

D11_JPCRITICAL

D11_JP1131S0593

C6729_RF1 D11_JPCRITICAL152S2055

C7705_RF

C7729_RF

R7700_RF

C7702_RF

R7701_RF

CRITICAL

CRITICAL1

CRITICAL

D11_JP

D11_JP

CRITICAL

L7701_RF

L7702_RF

C7701_RF

CRITICAL

CRITICAL

D11_JP152S1853 1 IND,9.1NH,UH-Q,01005 L7702_RF152S1853 CRITICAL1

D11_JP152S1853 1 IND,9.1NH,UH-Q,01005

D11_JPCRITICAL

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

NOSTUFF:C7706_RF, C7711_RF,C7709_RF,C7710_RF, C7707_RF

C7703_RF,C7704_RF,L7703_RF

D11_ROW:

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

IND,0.6NH,UH-Q,01005 D11_ROWCRITICAL1 R7703_RF

152S1976CRITICALR7711_RF

IND,0.7NH,UH-Q,01005 CRITICALR7711_RF1

CRITICAL

TRUE

1 IND,FILM,2.2NH,UH-Q,01005152S1986

118S0724 D11_ROW1

152S2054 CRITICAL D11_ROW1

131S0893 1

131S0648 1 CRITICAL

TRUE

TRUE

RES,MF,0 OHM,1/20W,0201

IND,9.1NH,UH-Q,0201

CAP,CER,0.2PF,+/-0.05PF,01005

TRUE

1 CRITICAL131S0893 D11_ROWC7729_RF

CAP,CER,0.2PF,+/-0.05PF,01005

TRUE
TRUE

TRUE

CAP,CER,0.3PF,+/-0.05PF,01005 C7700_RFCRITICALCAP,CER,0.2PF,+/-0.05PF,01005

IND,1.0NH,+/-0.1NH,UH-Q,01005 R7700_RF

1 CRITICAL152S1980 D11_ROW

131S0648 CAP,CER,0.3PF,+/-0.05PF,01005TRUE

131S0405 1 CRITICALR7701_RF D11_ROW

152S00273

TRUE

TRUE

CAP,CER,4.0PF,+/-0.1PF,01005

IND,0.6NH,+/-1NH,UH-Q,01005

1

1

IND,9.1NH,UH-Q,01005

R7704_RF

R6711_RF

C6729_RF

C7705_RF

C7702_RF

L7701_RF CRITICAL152S1853

CRITICAL

CRITICAL D11_ROW

CRITICAL1 D11_ROW

CRITICALL7700_RF

IND,9.1NH,UH-Q,01005

RES,MF,0 OHM,1/32W,01005

NOSTUFF:C7706_RF, C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF

C7703_RF,C7704_RF,L7703_RF

BOM OPTIONCRITICAL

D11_ROW

D11_ROWCAP,CER,3.5PF+/-0.1,01005131S0400 1 R7702_RF

D11_ROWCRITICAL

D11_ROW

D11_ROW

D11_ROW

D11_ROW

D11_ROW1 CRITICALC7701_RF117S0161

TABLE_5_HEAD

TABLE_5_ITEMTABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

D111_WIFI:

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

1 IND,0.6NH,UH-Q,01005 R7703_RF D111CRITICAL152S00273

R7702_RF D111CRITICAL1131S0400 CAP,CER,3.5PF+/-0.1,01005

152S1986 R7704_RF1 D111CRITICALIND,FILM,2.2NH,UH-Q,01005

118S0724

152S2054 1

152S00273 IND,0.6NH,+/-1NH,UH-Q,01005 D111

117S0161 C7701_RF CRITICALRES,MF,0 OHM,1/32W,010051 D111

TRUE

TRUE

1 D111R6711_RFRES,MF, 0 OHM,1/20W, 0201 CRITICAL

TRUE

1 CRITICAL D111C7705_RF131S0893 CAP,CER,0.2PF,+/-0.05PF,01005

1 CRITICAL D111C7729_RF131S0893 CAP,CER,0.2PF,+/-0.05PF,01005

TRUE

TRUE
TRUE

1 CRITICAL152S1980 IND,1.0NH,+/-0.1NH,UH-Q,01005 D111

TRUE

TRUE

CAP,CER,4.0PF,+/-0.1PF,01005131S0405

1 CRITICALR7701_RF D111

TRUE

1 CRITICALL7700_RF

TRUE

C7700_RF131S0648 1 CAP,CER,0.3PF,+/-0.05PF,01005 CRITICAL

R7700_RF

CRITICALCAP,CER,0.3PF,+/-0.05PF,010051131S0648 D111C7702_RF

CRITICAL152S1853 IND,9.1NH,UH-Q,01005 L7701_RF1

CRITICAL152S1853 IND,9.1NH,UH-Q,010051

NOSTUFF:C7706_RF, C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF

C7703_RF,C7704_RF,L7703_RF

WIFI_MLB SCHEMATIC

DRAWING TITLE

BOM OPTIONCRITICAL

D1111 CRITICALR7711_RF152S1976 IND,0.7NH,UH-Q,01005

D111IND,9.1NH,UH-Q,0201 C6729_RF CRITICAL

D111

D111

D111L7702_RF

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

B

A

SCH,MLB,D11

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

3

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00482

REVISION

8.0.0

BRANCH

PAGE

1 OF 77

SHEET

59 OF 81

1245678

SIZEDRAWING NUMBER

D

WIFI/BT

345678

2 1

D

C

B

PP1V8_SDRAM

JTAG_WLAN_SEL

2

1

R7600_RF

10K

5%
1/32W
MF
01005

2

WLAN
NOSTUFF

2 1

2

2 1

2 1

2 1

2 1

2

1

WLAN_RF

LBEE5W11GJ-943

LGA

SYM 2 OF 2

PP1V8_SDRAM

2 1

1

C7600_RF

27PF

5%
16V

2

NP0-C0G
01005

WLAN

1

C7601_RF

0.01UF

10%

6.3V

2

X5R
01005

WLAN

15

28

29

30

31

1

C7602_RF

10UF

20%

6.3V

2

CERM-X5R
0402-9

PP_VDD_MAIN

1

C7606_RF

0.01UF

10%

6.3V

2

X5R
01005

WLAN WLAN

1

2

C7607_RF

27PF

5%
16V
NP0-C0G
01005

4
6

1

18
21
24
27
32
34
36
45
46

PMUGPIO_TO_WLAN_CLK32K

IN

1

1

UART_BB_TO_WLAN_COEX

IN

UART_WLAN_TO_BB_COEX

OUT

54

8
7

LPO_IN
SECI_RX

SECI_TX

VDDIO_1P8V

VBAT_VCC

VBAT_VCC

VBAT_RF_VCC

VBAT_RF_VCC

47
48
49
50

GND

51

55

WLAN_RF

1

PMU_TO_WLAN_REG_ON

IN

92

WL_REG_ON

LBEE5W11GJ-943

BT_DEV_WAKE

AP_TO_BT_WAKE

2 1

IN

LGA

PMU_TO_BT_REG_ON

IN

JTAG_WLAN_SEL

2

JTAG_WLAN_TCK

2

JTAG_WLAN_TMS

2

JTAG_WLAN_TRST_L

2

UART_WLAN_TO_AP_RXD

OUT

UART_AP_TO_WLAN_TXD

IN

93

BT_REG_ON

61

JTAG_SEL

64

JTAG_TCK

62

JTAG_TMS

2

JTAG_TRST*

11

FAST_UART_TX

10

FAST_UART_RX

SYM 1 OF 2

BT_UART_RXD

BT_UART_TXD
BT_UART_CTS*
BT_UART_RTS*

BT_PCM_CLK

BT_PCM_SYNC

BT_PCM_OUT

BT_PCM_IN

41

UART_AP_TO_BT_TXD

42

UART_BT_TO_AP_RXD

44

UART_AP_TO_BT_RTS_L

43

UART_BT_TO_AP_CTS_L

38

I2S_AP_TO_BT_BCLK

37

I2S_AP_TO_BT_LRCLK

40

I2S_BT_TO_AP_DIN

39

I2S_AP_TO_BT_DOUT

IN

OUT

IN

OUT

IN
IN

OUT

IN

2 1

2 1

2 1

2 1

1

1

1

1

53
57
58
60
65
67
68
69
70
71
72
73

74
75

THRM_PAD

76

1

1

UART_WLAN_TO_AP_CTS_L

OUT

UART_AP_TO_WLAN_RTS_L

IN

AP_TO_WLAN_DEVICE_WAKE

IN

9

FAST_UART_RTS_OUT

12

FAST_UART_CTS_IN
WL_DEV_WAKE

WL_HOST_WAKE

1413

WLAN_TO_PMU_HOST_WAKE

OUT

2 1

77
78
79
80
81
82
83

1

BT_TO_PMU_HOST_WAKE

OUT

56

BT_HOST_WAKE

PCIE_CLKREQ*

PCIE_PERST*

17

PCIE_WLAN_BI_AP_CLKREQ_L

16

PCIE_AP_TO_WLAN_RESET_L

1

BI

2 1

IN

84
85
86

BI

1

IO

BI

1

IO

50_WLAN_G_0
50_WLAN_G_1

50_WLAN_A_0

50_WLAN_A_1

3

3

52

2G_ANT_CORE0

5

2G_ANT_CORE1

59

5G_ANT_CORE0

66

5G_ANT_CORE1

PCIE_RDP

PCIE_RDN

PCIE_TDP

PCIE_TDN

PCIE_REFCLK_P

PCIE_REFCLK_N

CXT_A/JTAG_TDI

CXT_B/JTAG_TDO

SR_VLX

VIN_LDO

19

90_PCIE_AP_TO_WLAN_TXD_P

20

90_PCIE_AP_TO_WLAN_TXD_N

22

90_PCIE_WLAN_TO_AP_RXD_P

23

90_PCIE_WLAN_TO_AP_RXD_N

25

90_PCIE_AP_TO_WLAN_REFCLK_P

26

90_PCIE_AP_TO_WLAN_REFCLK_N

63

AOP_TO_WLAN_CONTEXT_A

3

AOP_TO_WLAN_CONTEXT_B

33

SR_LVX

35

VIN_LDO

1

C7603_RF

100PF

5%
16V

2

NP0-C0G
01005

WLAN

IN
IN

OUT
OUT

IN
IN

IN
IN

2 1

2 1

1

1

2 1

2 1

2

1

L7600_RF

2.2UH-20%-0.68A-0.25OHM

21

SR_LVX_1

C7604_RF

7.5UF

20%

4V
CERM
0402

1

3

0806

4

2

87
88
89
90
91
94
95
96
97
98

99
100
101
102
103
104
105

THRM_PAD

106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163

D

C

B

A

AOP_TO_WLAN_CONTEXT_A

2 1

TDI

AOP_TO_WLAN_CONTEXT_B

2 1

TDO

UART_WLAN_TO_AP_RXD

2 1

UART_AP_TO_WLAN_TXD

2 1

JTAG_WLAN_TCK

2

JTAG_WLAN_TMS

2

JTAG_WLAN_TRST_L

2

AP_TO_WLAN_DEVICE_WAKE

1 2

BT_TO_PMU_HOST_WAKE

2 1

PP7600_RF

P2MM-NSM

SM

1

PP

PP7601_RF

P2MM-NSM

SM

1

PP

PP7603_RF

P2MM-NSM

SM

1

PP

PP7604_RF

P2MM-NSM

SM

1

PP

PP7605_RF

P2MM-NSM

SM

1

PP

PP7606_RF

P2MM-NSM

SM

1

PP

PP7607_RF

P2MM-NSM

SM

1

PP

PP7608_RF

P2MM-NSM

SM

1

PP

PP7609_RF

P2MM-NSM

SM

1

PP

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

PP7610_RF

P2MM-NSM

SM

PMUGPIO_TO_WLAN_CLK32K

1 2

WLAN_TO_PMU_HOST_WAKE

1 2

90_PCIE_AP_TO_WLAN_REFCLK_P

1 2

90_PCIE_AP_TO_WLAN_REFCLK_N

2 1

90_PCIE_AP_TO_WLAN_TXD_P

1 2

90_PCIE_AP_TO_WLAN_TXD_N

1 2

PCIE_AP_TO_WLAN_RESET_L

1 2

JTAG_WLAN_SEL

2

PMU_TO_WLAN_REG_ON

2 1

PMU_TO_BT_REG_ON

2 1 2 1

1

PP

PP7611_RF

P2MM-NSM

SM

1

PP

PP7612_RF

P2MM-NSM

SM

1

PP

PP7613_RF

P2MM-NSM

SM

1

PP

PP7614_RF

P2MM-NSM

SM

1

PP

PP7615_RF

P2MM-NSM

SM

1

PP

PP7616_RF

P2MM-NSM

SM

1

PP

PP7617_RF

P2MM-NSM

SM

1

PP

PP7618_RF

P2MM-NSM

SM

1

PP

PP7619_RF

P2MM-NSM

SM

1

PP

OMIT

OMIT

OMIT

OMIT

OMIT

OMIT

2 1

OMIT

2 1

OMIT

2 1

OMIT

2 1

OMIT

UART_AP_TO_BT_TXD

UART_BT_TO_AP_RXD

UART_AP_TO_BT_RTS_L

UART_BT_TO_AP_CTS_L

AP_TO_BT_WAKE

PART NUMBER

339S00199339S00201 ALTERNATE ALT WIFI/BT MODULEWLAN_RF

PP7620_RF

P2MM-NSM

SM

1

PP

PP7621_RF

P2MM-NSM

SM

1

PP

PP7622_RF

P2MM-NSM

SM

1

PP

PP7623_RF

P2MM-NSM

SM

1

PP

PP7624_RF

P2MM-NSM

SM

1

PP

OMIT

OMIT

OMIT

OMIT

OMIT

TABLE_ALT_HEAD

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

TABLE_ALT_ITEM

SYNC_MASTER=WIFI

PAGE TITLE

SYNC_DATE=01/30/2014

A

PERENNIAL

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00482

REVISION

8.0.0

BRANCH

PAGE

76 OF 77

SHEET

60 OF 81

D

8 7 5 4 2 1

36

34567 8

2 1

D

WIFI UPPER ANTENNA FEEDS

OMIT_TABLE

R7704_RF

2.4NH+/-0.1NH-0.370A

21

2

50_WLAN_G_0

1

C7707_RF

0.2PF

+/-0.1PF
16V

2

NP0-C0G

01005
WLAN_UP_RFFE
NOSTUFF

01005

OMIT_TABLE

R7703_RF

2

50_WLAN_A_0

BI

1

C7705_RF

0.2PF

+/-0.1PF

16V

2

NP0-C0G

01005
WLAN_UP_RFFE
OMIT OMIT

0.00

0%

1/32W

MF

01005

50_UAT_WLAN_2G_EAST

1

C7708_RF

0.6PF

+/-0.05PF
16V

2

CERM

01005
WLAN_UP_RFFE
OMIT_TABLE

21

50_UAT_WLAN_5G_EAST

1

C7706_RF

0.2PF

+/-0.1PF

16V

2

NP0-C0G

01005
WLAN_UP_RFFE

2GHZ UAT

1

BIBI

1

BI

5GHZ UAT

D

C

C

JUAT2_RF

MM8830-2600B

OMIT_TABLE OMIT_TABLE

R7711_RF

1

BI

50_UAT_WLAN_5G_WEST

1

C7729_RF

+/-0.1PF
16V

2

NP0-C0G

01005
WLAN_UP_RFFE
OMIT

0.00

1/32W
01005

0%
MF

21

1

C7711_RF

0.2PF0.2PF

+/-0.1PF
16V

2

NP0-C0G

01005
WLAN_UP_RFFE
OMIT

5.15-5.85GHZ-1.2DB

LFB185G53CGZE200

31

2

R7702_RF

50_UAT2_BPF50_UAT_WLAN_5G_BPF 50_UAT2_TEST 50_UAT2_M

1

C7709_RF

0.2PF

+/-0.1PF
16V

2

NP0-C0G

01005
WLAN_UP_RFFE
OMIT

0.00

1/32W
01005

0%
MF

21

1

C7710_RF

0.2PF

+/-0.1PF
16V

2

NP0-C0G

01005
WLAN_UP_RFFE
OMIT

W5BPF_RF

F-RT-SM

C R

GND

3

UP_RFFE

21

1

B

B

A

PAGE TITLE

WIFI FRONT-END [77]

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

77 OF 77
61 OF 81

A

D

8

7

6 5 4 3

2 1

D

C

81

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

ICEFALL, SIM, DEBUG_CONN

MAV16 RADIO_MLB

LAST_MODIFICATION=Wed Jun 29 12:06:01 2016

DATESYNCCONTENTSCSAPAGE

62

page1

63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

page1
BOM_OMIT_TABLE
PMU: CONTROL AND CLOCKS

PMU: SWITCHERS AND LDOS
BASEBAND: POWER2

BASEBAND: CONTROL
BASEBAND GPIOS
TRANSCEIVER0/1: POWER
TRANSCEIVER0/1: TX PORTS
TRANSCEIVER0/1: PRX PORTS
RECEIVE MATCHING
LOWER ANTENNA & COUPLERS
DIVERSITY RECEIVE ASM'S
DIVERSITY RECEIVE LNA'S
UPPER ANTENNA FEEDS
PMU: ET MODULATOR
TEST POINTS & BOOT CONFIG
TDD TRANSMIT
FDD TRANSMIT

<SYNC_MASTER1>
<SYNC_MASTER2>
<SYNC_MASTER3>
<SYNC_MASTER4>
<SYNC_MASTER5>

<SYNC_DATE1>

<SYNC_DATE2>

<SYNC_DATE3>

<SYNC_DATE4>

<SYNC_DATE5>

ECNREV DESCRIPTION OF REVISION

AP CONNECTIONS

POWER

PP_VDD_MAIN

PP_VDD_BOOST

PP1V8_SDRAM

AMUX

BBPMU_TO_PMU_AMUX1
BBPMU_TO_PMU_AMUX2
BBPMU_TO_PMU_AMUX3

BB CONTROL

AP_TO_BBPMU_RADIO_ON_L

PMU_TO_BBPMU_RESET_L
AP_TO_BB_RESET_L
BB_TO_AP_RESET_DETECT_L
BB_TO_STROBE_DRIVER_GSM_BURST_IND
AP_TO_BB_IPC_GPIO1
AP_TO_BB_TIME_MARK
AP_TO_BB_COREDUMP
LCM_TO_MANY_BSYNC

AP_TO_BB_MESA_ON

PCIE

90_PCIE_AP_TO_BB_REFCLK_P

IN

90_PCIE_AP_TO_BB_REFCLK_N

IN

90_PCIE_AP_TO_BB_TXD_P

IN

90_PCIE_AP_TO_BB_TXD_N

IN

90_PCIE_BB_TO_AP_RXD_P

OUT

90_PCIE_BB_TO_AP_RXD_N
PCIE_AP_TO_BB_RESET_L

IN

PCIE_BB_BI_AP_CLKREQ_L

IO

BB_TO_PMU_PCIE_HOST_WAKE_L

OUT

15

6 20

3 17 20

14

12

12

14

IN

6 20

IO

IN

6 17 20

IO

6 17 20

IO

IO
IO
IO
IO
IO

PP_VDD_BOOST

MAKE_BASE=TRUE

DEBUG

SWD_AP_TO_MANY_SWCLK
SWD_AOP_BI_BB_SWDIO
PMU_TO_BB_USB_VBUS_DETECT
90_USB_BB_DATA_P
90_USB_BB_DATA_N

ANTENNA

50_UAT_WLAN_2G_WEST_PLEXER
50_UAT1_WEST
50_UAT_LB_MLB_SOUTH
50_UAT_MB_HB_SOUTH
50_UUAT_LB_MLB_NORTH

17

17

3 4 16 20

IN

IN

7 20

IN

4

OUT

4

OUT

4

OUT

3 20

IN

3 17

IN

3 20

IN

7 17

OUT

7 17

OUT

7

IN

7 17

IN

7

IN

3

IN

7

IN

6 17

6 17

6

6

6

6

3 7

7

7 17

CK
APPD

DATE

2016-07-0600065328798 ENGINEERING RELEASED

D

4 20

C

B

21

22

23

24

25

26

27

28

29

30 <SYNC_DATE30>

<SYNC_DATE27>

SCH: 951-00964

20

17 20

17 20

17 20

17 20

20

17 20

AOP

7

7 17

UART_AOP_TO_BB_TXD

IN

UART_BB_TO_AOP_RXD

OUT

AUDIO

7

7

7

7

I2S_BB_TO_AP_BCLK

IN

I2S_BB_TO_AP_LRCLK

IN

I2S_AP_TO_BB_DOUT

IN

I2S_BB_TO_AP_DIN

OUT

WLAN

7 17 20

7 17 20

UART_BB_TO_WLAN_COEX

IN

UART_WLAN_TO_BB_COEX

OUT

NFC

NFC_SWP

IN

NFC_SWP_MUX

IN

SE2_READY

OUT

AP_TO_ICEFALL_FW_DWLD_REQ

IN

SE2_PWR_REQ

IN

3 17

3 17

NFC_TO_BB_CLK_REQ

IN

BB_TO_NFC_CLK

OUT

SE2_PRESENT

OUT

ICEFALL_LDO_ENABLE

IN

B

A

BOM: 939-00826

ALTERNATES

PART NUMBER

197S0565 197S0593

197S0593 Y5501_RFALTERNATE197S0598

335S0894 IC EEPROM335S00013 EPROM_RFALTERNATE

353S00321 IC SWITCH SPDT353S00253 SWPMX_RFALTERNATE

Y5501_RFALTERNATE

UPPDI_RF155S00235 NOLMBRF155S00234 ALTERNATE

ALL:C5616_RF-C5618_RF,C5632_RF-C5634_RF

COMMENTS:REF DESBOM OPTIONPART NUMBER ALTERNATE FOR

19P2 MHZ XTAL

19P2 MHZ XTAL

TRANSITION CAP138S00095138S00101 ALLALTERNATE

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

15

TUNER

BB_TO_UAT_SCLK

OUT

BB_TO_UAT_DATA

IO

50_UAT1_TUNER

IO

7

7

BUFFER_GPO1

OUT

BUFFER_GPO2

OUT

BB_TO_LAT_ANT_SCLK

OUT

BB_TO_LAT_ANT_DATA

IO

7

OUT

7

OUT

7

OUT

BB_TO_LAT_GPO1

BB_TO_LAT_GPO2

BB_TO_LAT_GPO3

DRAWING TITLE

MAKE_BASE=TRUE

BB_TO_UAT_SCLK
BB_TO_UAT_DATA

MAKE_BASE=TRUE

DOCK

MAKE_BASE=TRUE

BB_TO_LAT_ANT_SCLK
BB_TO_LAT_ANT_DATA

MAKE_BASE=TRUE

page1

SCH,MLB,D11

14 7

14 7

17 7

17 7

A

3

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00482

REVISION

8.0.0

BRANCH

PAGE

1 OF 72

SHEET

62 OF 81

1245678

SIZEDRAWING NUMBER

D

8 7 6 5 4 3

BOM OPTIONS:

2 1

D

C

B

LMBRF:

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

MLB PAD

353S00723

117S0002

152S2042

353S00627 CRITICAL1

117S0002

155S00139

118S0643 1 CRITICAL

155S00193 1

155S00158 1

337S00284

138S0739 1

132S0316

138S00032 1

138S00032

131S0217 CRITICAL

152S2006 1 CRITICAL

152S2006 1

131S0630

152S2051

131S00001

131S0363

152S2002

131S0337

118S0724

118S0608 1 R5911_RF

1

MLB PAD LAT OUTPUT MATCH

1

MLB PAD UAT OUTPUT MATCH

MLB LNA

MLB LNA OUTPUT MATCH

PENTAPLEXER

1 CRITICAL

RES,MF,4.99K OHM,01005

FLTR,DIPLEXER,LB-MB-HB,DPX,SHIELD,0805

FLTR,DIPLEXER,LB-MB/HB,MIRROR,0805

IC,SECURE ELEMENT,BCM20211,WLBGA25

1 SE2_RF

CAP,1UF,0201

1

CAP,1UF,0201

1 C7501_RF

CAP,0.1UF,01005

CAP,1UF,0201

1138S0739

CAP,1UF,0201

CAP,2.2UF,0201

CAP,2.2UF,0201

CAP,100PF,01005

1

RES,10KOHM,01005

1118S0627

1353S00026 CRITICAL

LDO,BGA,2X2

CAP,CER,NPO/COG,27PF,2%,16V,01005

CAP,CER,COG,3.0PF,+/-0.05,25V,0201,HI-Q

IND,FILM,6.2NH,3%,400MA,UH-Q,0201

1131S0630 CRITICAL

CAP,CER,NPO/COG,27PF,2%,16V,01005

IND,FILM,6.2NH,3%,400MA,UH-Q,0201

CAP,CER,COG,3.0PF,+/-0.05PF,25V,0201,HI-Q

1131S0341

CAP,CER,NPO/COG,27PF,2%,16V,01005

1 CRITICAL

IND,1.3NH,1.1A,0201

1 CRITICAL

1

IND,2.0NH,600MA,0201

1 CRITICAL

CAP,CER,0.1PF,25V,0201

1118S0724

RES,MF,0OHM,1/20W,0201

RES,MF,0OHM,1/20W,0201

CAP,CER,C0G,HQ,0.6PF,+/-0.05PF,25V,0201

1

1 CRITICAL

IND,2.7NH,+/-0.1NH,600MA,0201,UH-Q

CAP,1.5PF,+/-0.05PF,25V,0201,HQ

1

RES,MF,0OHM,1/20W,0201

CAP,CER,C0G,0.3PF,+/-0.1PF,25V,0201,HQ

1131S0275

RES,MF,1K OHM,1%,1/32W,01005

IND,10NH,3%,250MA,HI-Q,0201

1152S1356

MLBPA_RF

R7105_RF

R7106_RF

MLBLN_RF

R6710_RF CRITICAL1

PPLXR_RF

R7506_RF

UATDI_RF

UPPDI_RF

C7201_RF138S0739

C7528_RF

C7523_RF1138S0739

C7524_RF

C7529_RF

C7530_RF

C7531_RF

R7512_RF

SE2LDO_RF

C6345_RF

C6348_RF

L6322_RF

C6315_RF

L6305_RF

C6306_RF

C6106_RF

R6404_RF

R7104_RF

C7119_RF

R6703_RF

R6708_RF

R6605_RF

C6610_RF

R6606_RF

C6416_RF

C6613_RF

CRITICAL

CRITICAL 152S2020 L6320_RF

CRITICAL1

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL

CRITICAL1

CRITICAL

CRITICAL1131S0630

CRITICAL1131S0341

CRITICAL

CRITICAL

CRITICAL152S2000

CRITICAL

CRITICAL1118S0724

CRITICALC7123_RF

CRITICAL

CRITICAL1

CRITICAL

CRITICAL

CRITICAL

BOM OPTIONCRITICAL

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

LMBRF

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

NOLMBRF:

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

1 R6301_RF131S0444 CRITICAL

DCS/PCS RX FILTER MATCH

DCS/PCS RX FILTER MATCH

1

155S00149 GSMRX_RF

131S0630 C6340_RF CRITICAL

152S2005 1 CRITICAL

155S00163 1

155S00199

152S2044

152S00157 1 R6703_RF

DCS/PCS RX FILTER

DCS/PCS RX MATCH (DCS)

1

DCS/PCS RX MATCH (DCS)

DCS/PCS RX MATCH (DCS)

1

DCS/PCS RX MATCH (DCS)

1131S0385

DCS/PCS RX MATCH (DCS)

DCS/PCS RX MATCH (DCS)

1

QUADPLEXER

FLTR,DPX,PASS THRU,LB-MB-HB,SHLD,0805

FLTR,DPX,PASS THRU,LB-MB-HB,UNSHLD,0805

1

1118S0724

RES,MF,0OHM,1/20W,0201

IND,2.2NH,+/-0.1NH,600MA,0201

1 R7104_RF CRITICAL

1.2NH,+/-0.05NH,1.1A,UH-Q,0201

18PF,0201,25V

1 CRITICAL131S0445

CAP,CER,12PF,5%,25V,0201,HI-Q

L6318_RF

C6332_RF CRITICAL131S0319

L6319_RF

C6333_RF CRITICAL

C6341_RF CRITICAL131S0630

PPLXR_RF

R6404_RF CRITICAL

R6606_RF

CRITICAL

CRITICAL1

CRITICAL152S2005 1

CRITICAL

CRITICALUATDI_RF1

CRITICALUPPDI_RF155S00234

CRITICAL

CRITICALR6708_RF131S0549 1

D10 SPECIFIC:

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

131S0278 1

CAP,CER,COG,1PF,+/-0.1PF,25V,0201,HI-Q

C7120_RF

CRITICAL

D11 SPECIFIC:

REFERENCE DESIGNATOR(S)QTY DESCRIPTIONPART#

131S0425

1

CAP,CER,COG,0.5PF,+/-0.05PF,25V,0201,HI-Q

C7120_RF

CRITICAL

BOM OPTIONCRITICAL

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

NOLMBRF

BOM OPTIONCRITICAL

D10

BOM OPTIONCRITICAL

D11

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_HEAD

TABLE_5_ITEM

D

C

B

A

3

A

1245678

PMU: CONTROL AND CLOCKS

345678

RESET AND CONTROL: PMU

2 1

D

HW_REV_ID

0.10V

0.20V

0.30V

0.40V

0.50V

0.60V

0.70V

0.80V

R5501R5505

887K

422K
255K
180K
124K
102K

51.1K

51.1K

51.1K

51.1K

51.1K

51.1K

82.5K 51.1K

63.4K

51.1K

REVISION
DEV1

DEV2
DEV 2.1
DEV 3
T181
PP/P1

DEV4
P2

20 1

BBPMU_RF

R5502_RF

AP_TO_BB_RESET_L

IN

R5504_RF

20.0K

MF

5%

1/32W

01005

RADIO_PMIC

IN

PS_HOLD

6

1.00K

1%

1/32W

01005

RADIO_PMIC

21

MF

21

17 1
20

17 1

17 6

17 6

17 6

IN

IN

OUT

BI
BI

AP_TO_BBPMU_RADIO_ON_L

PMU_TO_BBPMU_RESET_L
PMIC_RESOUT_L
PS_HOLD_PMIC
SPMI_CLK
SPMI_DATA

58

CBL_PWR*

75 42

PON_1

43

RESIN*

63

PON_RST*

82

PS_HOLD

25

SPMI_CLK

31

SPMI_DATA

PMD9645

WLNSP

SYM 1 OF 5

CONTROL

RADIO_PMIC

OPT_1
OPT_2

GND

BAT_ID_THERM

GND

52

NC

PP_VDD_MAIN

98
53

67

PCIE PERST OPTION

PP_VDD_MAIN

MAKE_BASE=TRUE

20 16 4 1

BBPMU_RF

PMD9645

WLNSP

GND

RADIO_PMIC

GND
GND
GND

SYM 5 OF 5

GND

36
46
57
62

D

MPPS AND GPIOS: PMU

PP_1V8_LDO7

5 4 3

C

0.90V

1.00V

1.10V

1.20V

51.1K

51.1K

51.1K EVT DOE

50.0K 100K

6.34K1.60V

51.1K DEV5

63.4K

EVT

82.5K

EVT ALT/CARBON

100K

51.1K14.7K1.40V
200K40.2K1.50V

51.1K

DEV639.0K1.30V
CARRIER
DVT
PVT

REV_ID

1

R5505_RF

6.34K

1%
1/32W
MF
01005

2

1

R5501_RF

51.1K

1%
1/32W
MF
01005

2

20 17 1

C

BBPMU_RF

PMD9645

WLNSP

26
15
21
37
32
38

NC

NC

NFC_TO_BB_CLK_REQ

PCIE_AP_TO_BB_PERST_PMU_L

SIM1_REMOVAL_ALARM

LCM_TO_MANY_BSYNC

17
1

IN

PCIE PERST OPTION

R5511_RF

0.00

21

PCIE_AP_TO_BB_RESET_L

17 7

IN

1

IN

1%

1/20W

MF

0201

7 1

IN

NC

NC

13

MPP_01

51

MPP_02

61

MPP_03

9

MPP_04

4

MPP_05

20

MPP_06

83

PA_THERM1

88

PA_THERM2

IN

5

OUT

6

OUT

PMU_TO_BB_USB_VBUS_DETECT

HW_REV1_ID

VDDPX_BIAS_UIM2

VREF_DAC_BIAS

SYM 3 OF 5

GPIO_MPP

RADIO_PMIC

GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06

B

5 4 3

PP_1V8_LDO7

1

C5501_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

RADIO_PMIC

1

R5503_RF

100K

1%
1/32W
MF
01005

2

RADIO_PMIC

1

C5502_RF

1000PF

10%

6.3V

2

X5R-CERM
01005

RADIO_PMIC

Y5501_RF

19.2MHZ-10PPM-7PF-80OHM

XTAL_19P2M_OUT

3 3

XO_THERM

3

2.0X1.6-SM

1
4

RADIO_PMIC

3
2

XTAL_19P2M_IN

17 6

XTAL AND CLOCK: PMU

B

BBPMU_RF

PMD9645

WLNSP

IN

XO_OUT_D0_EN

XO_THERM

3

XTAL_19P2M_IN

3

3

56

BB_CLK_EN

76

XO_THERM

41

GND_XOADC

55

XTAL_19M_IN

65

XTAL_19M_OUT

71

GND_XO_CLK

GND_XO_CLK: VIA DOWN TO GND PLANE

SYM 2 OF 5

CLOCK

RADIO_PMIC

LN_BB_CLK

BB_CLK

RF_CLK1
RF_CLK2

SLEEP_CLK

45

50_MDM_PCIE_CLK

35

SHIELD_MDM_19P2M_CLK

66

SHIELD_WTR_19P2M_CLK

77

BB_TO_NFC_CLK

72

SHIELD_SLEEP_CLK_32KXTAL_19P2M_OUT

OUT

OUT
OUT

OUT
OUT

17 6

17 6

6

9

17 1

A

PAGE TITLE

PAGE_TITLE=PMU: CONTROL AND CLOCKS

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

8 7 5 4 2 1

36

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=04/17/2015

051-00482

8.0.0

55 OF 72
64 OF 81

A

D

D

PMU: SWITCHERS AND LDOS

SWITCHERS BULK CAPS

MAKE_BASE=TRUE

20 16 4 3 1

IN

PP_VDD_MAIN

PP_VDD_MAIN

PP_VDD_MAIN

4

4

345678

2 1

D

C

B

1

C5621_RF

15UF

20%

6.3V

2

CERM
0402
RADIO_PMIC

MAKE_BASE=TRUE

PP_VDD_MAIN

RADIO_PMIC

1

C5622_RF

15UF

20%

6.3V

2

CERM
0402

4 3 1

20 16

1

C5620_RF

15UF

20%

6.3V

2

CERM
0402

RADIO_PMIC

IN

PP_VDD_MAIN

MAKE_BASE=TRUE

4 3 1

20 16

IN

PP_VDD_MAIN

PP_VDD_MAIN

1

C5623_RF

15UF

20%

6.3V

2

CERM
0402
RADIO_PMIC

MAKE_BASE=TRUE

20 16 4 3 1

IN

PP_VDD_MAIN

PP_VDD_MAIN

1

C5624_RF

15UF

20%

6.3V

2

CERM
0402

RADIO_PMIC

MAKE_BASE=TRUE

20 16 4 3 1

IN

PP_VDD_MAIN

PP_VDD_MAIN

1

C5625_RF

15UF

20%

6.3V

2

CERM
0402

RADIO_PMIC

DESENSE CAPS

20 16 4 3 1

IN

PP_VDD_MAIN

PLACE C5635 AND C5636 NEAR THE PMU

GND

GND

4

GND

4

GND

4

1

C5635_RF

100PF

5%
16V

2

NP0-C0G
01005

PP_VDD_MAIN

PP_VDD_MAIN

4

GND

PP_VDD_MAIN

PP_VDD_MAIN

1

2

MAKE_BASE=TRUE

4

4

MAKE_BASE=TRUE

4

4

MAKE_BASE=TRUE

4

4

MAKE_BASE=TRUE

4

4

MAKE_BASE=TRUE

C5636_RF

27PF

2%
16V
CERM
01005

8 4

20 16 4 3 1

PP_VDD_MAIN

4

GND

4

PP_VDD_MAIN

4

GND

4

PP_VDD_MAIN

4

GND

4

PP_VDD_MAIN

4

GND

4

PP_VDD_MAIN

4

GND

4

PP_1V225_SMPS2

4

BBPMU_TO_PMU_AMUX2

4

IN

IN
IN

6

OUT

1

2

AVDD_BYP_GND

BBPMU_TO_PMU_AMUX3

PP_VDD_BOOST
PP_VDD_MAIN

MDM_VREF_LPDDR2

AVDD_BYP

C5629_RF

0.47UF

10%

6.3V
CERM-X5R
0201

REF_BYP

1

C5601_RF

0.1UF

10%

6.3V

2

CER-X5R
01005

RADIO_PMIC

VDD_OTP

GND_REF

OMIT

2

XW5616_RF

SHORT-10L-0.1MM-SM

1

OMIT

2

XW5617_RF

SHORT-10L-0.1MM-SM

1

PLACE XW CLOSE TO PMU
VIA XW DOWN TO THE GND PLANE

1

R5601_RF

0.00

0%
1/32W
MF
01005

2

5

VDD_S1

16

VDD_S1

6

GND_S1

17

GND_S1

28

GND_S1

33

GND_S1

92

VDD_S2

103

VDD_S2

102

GND_S2

70

VDD_S3

49

GND_S3

54

GND_S3

8

VDD_S4

1

GND_S4

7

GND_S4

94

VDD_S5

93

GND_S5

86

VDD_L1_2_16

44

VDD_L3_4

14

VDD_L5_6_15

23

VDD_L7_8

89

VDD_L9

90

VIN_VPH1

47

VIN_VPH2

73

VDD_OTP

78

VREF_DDR

74

AVDD_BYP

79

REF_BYP

68

GND_REF

24

VDD_XO_RF

BBPMU_RF

PMD9645

WLNSP

SYM 4 OF 5

POWER

RADIO_PMIC

VREG_XO

1

C5602_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

VREG_XO_GND

OMIT

2

XW5614_RF

SHORT-10L-0.1MM-SM

4

VREG_S1

VSW_S1
VSW_S1
VSW_S1

VREG_S2

VSW_S2

VREG_S3

VSW_S3
VSW_S3

VREG_S4

VSW_S4

VREG_S5

VSW_S5

VREG_L1
VREG_L2
VREG_L3

VREG_L4_16

VREG_L5
VREG_L6
VREG_L7
VREG_L8

VREG_L9
VREG_L10
VREG_L11
VREG_L12
VREG_L13
VREG_L14
VREG_L15

VREG_XO

GND_XO

VREG_RF

GND_RF_CLK

VREG_RF_CLK

4

1

C5603_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

VREG_RF_CLK_GND

OMIT

2

XW5615_RF

SHORT-10L-0.1MM-SM

10
11
22
27

91
97

69
59
64

12
2

87
99

80
81
39
48
19
3
18
29
100
84
95
85
96
101
30

34

VREG_XO

40

VREG_XO_GND

60

VREG_RF_CLK

50

VREG_RF_CLK_GND

L5601_RF

1UH-20%-0.054OHM-3.4A

PP_VSW_S1

2520

RADIO_PMIC

L5602_RF

2.2UH-20%-0.14OHM-1.6A

PP_VSW_S2

0806

RADIO_PMIC

L5603_RF

1.0UH-20%-2.7A-0.056OHM

PP_VSW_S3

2 1

0806

RADIO_PMIC

L5604_RF

2.2UH-20%-0.14OHM-1.6A

PP_VSW_S4

0806

RADIO_PMIC

L5605_RF

1.0UH-20%-2.7A-0.056OHM

PP_VSW_S5

0806

RADIO_PMIC

4

4

4

1

C5626_RF

1UF

20%
10V

2

X5R

4

0201

RADIO_PMIC

1

C5604_RF

10UF

20%

6.3V

2

CERM-X5R
0402

RADIO_PMIC

1

C5627_RF

10UF

20%

6.3V

2

CERM-X5R
0402

RADIO_PMIC

1

C5605_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

1

2

1

C5607_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

21

1

C5614_RF

43UF

20%
4V

2

X5R
0603

GND

21

1

C5615_RF

20UF

20%

6.3V

2

CERM-X5R
0402

GND

1

C5616_RF

25UF

20%

6.3V

2

X5R
0402

GND

21

1

C5617_RF

25UF

20%

6.3V

2

X5R
0402

GND

21

1

C5618_RF

25UF

20%

6.3V

2

X5R
0402

GND

MDM LOW VOLTAGE ANALOG
MDM EBI1, DDR CORE
MDM CORE
MDM PCIE
MDM HIGH VOLTAGE ANALOG
MDM 1.8V I/O, DDR, SHARED 1.8V VOLTAGE RAIL
MDM PLL
MDM LOW VOLTAGE USB
MEMORY
MDM HIGH VOLTAGE USB
UIM1

FRONT END SUPPLY

UIM2
GPS LNA

RFFE VIO

1

C5609_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

1

C5630_RF

20UF

20%

6.3V

2

CERM-X5R
0402

C5608_RF

4.7UF

20%

6.3V
X5R-CERM1
402

RADIO_PMIC

1

C5610_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

MDM MODEM

XO SHUTDOWN: OFF

4

LOW VOLTAGE LDOS
XO SHUTDOWN: ON

1

C5631_RF

20UF

20%

6.3V

2

CERM-X5R
0402

4

MDM MEMORY, MDM USB
XO SHUTDOWN: ON

1

C5632_RF

25UF

20%

6.3V

2

X5R
0402

4

HIGH VOLTAGE LDOS
XO SHUTDOWN: ON

1

C5633_RF

25UF

20%

6.3V

2

X5R
0402

4

CORE
XO SHUTDOWN: ON

1

C5634_RF

25UF

20%

6.3V

2

X5R
0402

4

XO SHUTDOWN: OFF
XO SHUTDOWN: BYP
XO SHUTDOWN: OFF
XO SHUTDOWN: BYP
XO SHUTDOWN: ON
XO SHUTDOWN: BYP
XO SHUTDOWN: OFF
XO SHUTDOWN: OFF
XO SHUTDOWN: ON
XO SHUTDOWN: OFF
XO SHUTDOWN: ON
XO SHUTDOWN: OFF
XO SHUTDOWN: OFF
XO SHUTDOWN: OFF
XO SHUTDOWN: BYP

1

C5611_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

1

C5628_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

1

C5613_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

1

C5612_RF

1UF

20%
10V

2

X5R
0201

RADIO_PMIC

BBPMU_TO_PMU_AMUX1

PP_1V225_SMPS2

BBPMU_TO_PMU_AMUX2

BBPMU_TO_PMU_AMUX3

PP_1V0_SMPS5

PP_1V5_LDO1
PP_1V2_LDO2
PP_0V9_LDO3
PP_0V95_LDO4
PP_1V7_LDO5
PP_1V8_LDO6
PP_1V8_LDO7
PP_1V8_LDO8
PP_1V0_LDO9
PP_3V075_LDO10
VDD_SIM1
PP_2V7_LDO12
VDD_SIM2
PP_1V8_LDO14
PP_1V8_LDO15

4

4

OUT

OUT

OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT

5 4

0.90V/2685MA

1.25V/693MA

1.16V/1951MA

8 4

1.85V/1241MA

5

1.01V/1059MA

5

1.23V/124MA

5

1.20V/569MA

8

1.00V/610MA

5

1.00V/88MA

5

1.80V/52MA

1.80V/366MA

5 3

1.80V/15MA

5

1.80V/133MA

5

1.11V/1253MA

5

3.20V/15MA

20
5

1.80V/60MA

14
12

2.70V/62MA

13
5

1.80V/60MA

10

2.70V/5MA

7

1.80V/245MA

C

19 18 16 14 13 12

B

A

1

XO_GND

1

RF_CLK_GND

PLACE XW CLOSE TO PMU
VIA XW DOWN TO THE GND PLANE

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

BBPMU_TO_PMU_AMUX1

4 5

BBPMU_TO_PMU_AMUX2

4

BBPMU_TO_PMU_AMUX3

4 8

MAKE_BASE=TRUE

MAKE_BASE=TRUE

MAKE_BASE=TRUE

BBPMU_TO_PMU_AMUX1

BBPMU_TO_PMU_AMUX2

BBPMU_TO_PMU_AMUX3

OUT

OUT

OUT

1

SYNC_DATE=04/17/2015

PAGE TITLE

1

1

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

PAGE_TITLE=PMU: SWITCHERS AND LDOS

DRAWING NUMBER SIZE

Apple Inc.

R

051-00482

REVISION

8.0.0

BRANCH

PAGE

56 OF 72

SHEET

65 OF 81

A

D

8 7 5 4 2 1

36

BASEBAND: POWER

345678

2 1

D

C

B

PP_1V0_SMPS5

5 4

PP_1V0_LDO9

5 4

V16
V17
F12
F13

F9
G11
G12
G16
G17

G8

G9
H15
H16

J18
J19

K15

L15
M15
M16
M17

P15

P16
R15
R16
U16

U7
U8

E19

F18

F19
G18
H10
H13
H14

H8

H9
J12
J13
J14
J15

J7
J8

K18

L17
L18

M12
M13

N12

N7

P6

P7

T12
T18

T6

U11
U12
U13
U18

U6

V18

VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE
VDD_CORE

VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM
VDD_MEM

BB_RF

MDM9645

BGA

SYM 6 OF 8

PWR1

VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM
VDD_MODEM

BBPMU_TO_PMU_AMUX1

F7
F8
G7
J11
K10
K11
K14
K6
K7
L10
L13
L14
L6
L9
M8
M9
N11
N8
P10
P11
P14
R10
R13
R14
R8
R9
T13
T8
T9

5 4

4 5

1

C5755_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

20 17 7 6 5 4

20 17 7 6 5 4

20 4

20 17 7 6 5 4

5 4

PP_1V2_LDO2

1

C5729_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

PP_1V8_LDO6

PP_1V8_LDO6

1

C5730_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

VDD_SIM1

VDD_SIM2

4

PP_1V8_LDO6

PP_1V8_LDO8

4

PP_3V075_LDO10

4

PP_0V95_LDO4

(PP_UIM1_LDO11)

(PP_UIM2_LDO13)

1

C5731_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5733_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5734_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5732_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5736_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5737_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5735_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5739_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5740_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5738_RF

20%

6.3V

2

0201-1

RADIO_PMIC

1

C5742_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5704_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC
NOSTUFF

1

C5741_RF

0.1UF

20%
4V

2

X5R
01005

RADIO_PMIC
NOSTUFF

1

C5743_RF

2.2UF2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

C22
D22
G22
H22

L22

M22

T22

U22

W2

Y2

R23

AA23
AB16

E2
K2
P2

AA21
AA15
AB11

M19

V9

AA10

AB3

NC

W3

NC

AA3

NC

Y5
Y6
Y7

1

C5744_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

VDD_P1
VDD_P1
VDD_P1
VDD_P1
VDD_P1
VDD_P1
VDD_P1
VDD_P1
VDD_P1
VDD_P1

VDD_P2
VDD_P3

VDD_P3
VDD_P3
VDD_P3
VDD_P3

VDD_P4
VDD_P5
VDD_P7

VDD_P7

VDD_USB_HS_1P8
VDD_USB_HS_3P3

VDD_USB_SS_0P9
VDD_USB_SS_0P9
VDD_USB_SS_1P8

VDD_PCIE_0P9
VDD_PCIE_0P9
VDD_PCIE_1P8

BB_RF

MDM9645

BGA

SYM 7 OF 8

PWR2

VDD_DDR_CORE_1P8
VDD_DDR_CORE_1P8
VDD_DDR_CORE_1P8
VDD_DDR_CORE_1P8

VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2
VDD_DDR_CORE_1P2

VREF_SDC

VREF_UIM

VDD_A3
VDD_A3

VDD_A2
VDD_A1
VDD_A2
VDD_A1
VDD_A2
VDD_A1

VDD_A2
VDD_A2

VDD_A1
VDD_A1

VDD_A2
VDD_A2
VDD_A2
VDD_A2

VDD_USB_HS_MX

VDD_ALWAYS_ON

VDD_PLL
VDD_PLL

VDD_QFPROM_PRG

B23
E1
K23
U1

AA1
C23
D1
J23
W1

U21
Y20

E7
E17

B12
B3
B15
B7
B18
B8

C12
C15

B10
E10

C18
C6
C7
E3

V11
U14
E13

P19
F10

NC

1

C5745_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5746_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5747_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5748_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5749_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC
NOSTUFF

1

C5750_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

RADIO_PMIC

1

C5751_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

1

C5753_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

PP_1V8_LDO6

PP_1V2_LDO2

5 4

VDDPX_BIAS_UIM2

PP_1V0_LDO9

1

C5754_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

PP_1V7_LDO5

PP_1V5_LDO1

PP_0V95_LDO4

PP_1V8_LDO7

PP_1V8_LDO7

A1

GND

A11

GND

A12

GND

A15

GND

A17

GND

A2

GND

A22

GND

A23

GND

A4

GND

A6

GND

A7

20 17 7 6 5 4

AB10
AB15
AB21
AB23

3

5 4

1

C5752_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_PMIC

4

4

5 4

5 4 3

5 4 3

A9
AA5
AB1

AB5
AB7
AB9

B13
B19
B20
B21
B22

B5

C1
C11
C16

C2
C20
C21

C4

C9

D2
D21
D23

E14
E15
E16
E18
E21
E22
E23

E6
E8

E9
F11
F14
F15
F16
F17
F23

G10
G13
G14
G15
G19
G23

H11
H12
H17
H18
H19
H23

H6

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

BB_RF

MDM9645

BGA

SYM 8 OF 8

GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

H7
J10
J16
J17
J22
J6
J9
K1
K12
K13
K16
K17
K8
K9
L11
L12
L16
L23
L7
L8
M10
M11
M14
M18
M6
M7
N10
N13
N14
N15
N16
N17
N18
N6
N9
P1
P12
P13
P17
P18
P8
P9
R11
R12
R17
R18
R7
T10
T11
T14

T15
T16
T17
T23
T7
U10
U15
U17
U23
U9
V1
V6
Y4
Y8

D

C

B

A

PP_1V0_SMPS5

5 4

BBPMU_TO_PMU_AMUX1

4 5

PP_1V0_LDO9

5 4

(MSM CORE)

1

C5705_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5708_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

(MSM MODEM)

1

C5706_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5709_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

(MODEM SUB MEMORY)

1

C5707_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5710_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5711_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5712_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5713_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5714_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5715_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5716_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5717_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5718_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5719_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5720_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5721_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5722_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5723_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5724_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5725_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5726_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5727_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5728_RF

2.2UF

20%
4V

2

X5R-CERM
0201

RADIO_BB

1

C5701_RF

15UF

20%

6.3V

2

CERM
0402

RADIO_BB

1

C5702_RF

15UF

20%

6.3V

2

CERM
0402

RADIO_BB

1

C5703_RF

15UF

20%

6.3V

2

CERM
0402

RADIO_BB

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

PAGE TITLE

PAGE_TITLE=BASEBAND: POWER2

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=04/17/2015

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

57 OF 72

SHEET

66 OF 81

A

8 7 5 4 2 1

36

D

BASEBAND: CONTROL AND INTERFACES

BB_RF

MDM9645

BGA

SYM 1 OF 8

CONTROL

RESOUT*

PS_HOLD

SDC1_CLK

SDC1_CMD
SDC1_DATA_0
SDC1_DATA_1
SDC1_DATA_2
SDC1_DATA_3

SPMI_CLK

SPMI_DATA

V2

R21
V23
T21
T19
R19
R22

Y17
AB18

NC

PS_HOLD

NC
NC
NC
NC
NC
NC

SPMI_CLK
SPMI_DATA

OUT

BI
BI

3

17 3

17 3

17 7 6 5 4

PP_1V8_LDO6

20

1

R5807_RF

1.00K

5%
1/32W
MF
01005

2

17 6

1 20

17 3

17 3

20 17

17 3

IN

OUT

3

IN

IN
IN

SHIELD_SLEEP_CLK_32K
XO_OUT_D0_EN
SHIELD_MDM_19P2M_CLK

BB_JTAG_RST_L
PMIC_RESOUT_L

SWD_AP_TO_BB_CLK_BUFFER

SWD_AOP_BI_BB_SWDIO

T2

SLEEP_CLK

U3

CXO_EN

F2

CXO

V19

SRST*

V3 U2

RESIN*

R6

T3

W23

U19

W22

V22
V21

MODE_0
MODE_1

TCK
TRST*
TMS
TDI
TDO

NC
NC

NC

NC
NC

1

R5801_RF

240

1%
1/32W
MF
01005

2

RADIO_BB

1

R5802_RF

240

1%
1/32W
MF
01005

2

RADIO_BB

PLACE PLACE
CLOSE CLOSE
TO E1 TO T3

BDM_CAL
EBI1_CAL
MDM_VREF_LPDDR2

4

1

C5804_RF

0.1UF

10%
10V

2

X5R-CERM

0201

RADIO_BB

345678

D3

BDM_ZQ

V5

EBI1_CAL

K22

VREF_DQ_BDM

G21

EBI1_VREF

K21

EBI1_VREF

U5

EBI1_VREF

2 1

D

BB_RF

MDM9645

BGA

SYM 4 OF 8

MEMORY

C

B

3

IN

20 17 7 6 5 4

VREF_DAC_BIAS

PP_1V8_LDO6

SWD_AP_TO_MANY_SWCLK

1 20

1

C5801_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

10

10

10

10

10

10

10

10

10

10

10

10

NOSTUFF AT CARRIER

NOSTUFF

C

U5801_RF

74AUP1G34GX

5

SOT1226

2

NC

3

1

NC

IN

IN

IN
IN

IN
IN

SHIELD_XCVR0_PRX_CA2_I

SHIELD_XCVR0_PRX_CA2_Q

IN

SHIELD_XCVR0_DRX_CA2_I

IN

SHIELD_XCVR0_DRX_CA2_Q

IN

SHIELD_XCVR1_DRX_I

IN

SHIELD_XCVR1_DRX_Q

IN

IN

SHIELD_XCVR1_PRX_I

SHIELD_XCVR1_PRX_Q

SHIELD_XCVR0_PRX_CA1_I
SHIELD_XCVR0_PRX_CA1_Q

SHIELD_XCVR0_DRX_CA1_I
SHIELD_XCVR0_DRX_CA1_Q

SWD_AP_TO_BB_CLK_BUFFER

4

NC
NC
NC
NC

B9

BBRX_IP_CH0

A10

BBRX_QP_CH0

A8

BBRX_IP_CH1

C8

BBRX_QP_CH1

C5

BBRX_IP_CH2

B6

BBRX_QP_CH2

B4

BBRX_IP_CH3

A5

BBRX_QP_CH3

C13

TX_DAC_VREF

C19

TX_DAC_VREF

A3

BBRX_IP_CH5

C3

BBRX_QP_CH5

B2

BBRX_IP_CH6

B1

BBRX_QP_CH6

F21

NC

F22

NC

H21

NC

J21

NC

17 6

BB_RF

MDM9645

BGA

SYM 2 OF 8

ANALOG_RF

BBRX_IP_FB

BBRX_QP_FB

GNSS_BB_IP

GNSS_BB_QP

TX_DAC0_IP

TX_DAC0_IM

TX_DAC0_QP

TX_DAC0_QM

TX_DAC1_IP

TX_DAC1_IM

TX_DAC1_QP

TX_DAC1_QM

ET_DAC0_P

ET_DAC0_M

ET_DAC1_P

ET_DAC1_M

DNC
DNC
DNC
DNC
DNC

C10

B11

E11

E12

C17
B17
A16
B16

C14
B14
A13
A14

A20
A21
A18
A19

F1
F6
G1
G6
Y3

NC
NC
NC
NC

NC
NC

NC
NC
NC
NC
NC

SHIELD_XCVR0_TX_FB_RX_I

SHIELD_XCVR0_TX_FB_RX_Q

SHIELD_GPS_RX_I

SHIELD_GPS_RX_Q

SHIELD_XCVR0-1_TX_I_P
SHIELD_XCVR0-1_TX_I_N
SHIELD_XCVR0-1_TX_Q_P
SHIELD_XCVR0-1_TX_Q_N

SHIELD_ET_DAC_P
SHIELD_ET_DAC_N

OUT
OUT
OUT
OUT

OUT
OUT

10 9

IN

BB_RF

MDM9645

10 9

IN

10

IN

17 3

IN

50_MDM_PCIE_CLK
BB_USB_TRXTUNE

10

IN

20 17 1

9

9

9

9

20 17 1

1

R5806_RF

4.02K

1%
1/32W
MF
01005

2

BI

90_USB_BB_DATA_P
90_USB_BB_DATA_N

NC
NC

NC
NC

AA9

PCIE_USB_SYSCLK

Y9

USB_HS_REXT

V10

USB_HS_DP

Y10

USB_HS_DM

AB2

USB_SS_TX_P

AA2

USB_SS_TX_M

AA4

USB_SS_RX_P

AB4

USB_SS_RX_M

PLACE
CLOSE
TO U12

16

16

NC

Y1

USB_SS_REXT

BGA

SYM 5 OF 8

USB_PCIE

PCIE_REFCLK_P

PCIE_REFCLK_M

PCIE_TX_P

PCIE_TX_M
PCIE_RX_P

PCIE_RX_M

PCIE_REXT

V8
V7

AB6
AA6

AA8
AB8

AA7

90_PCIE_AP_TO_BB_REFCLK_P
90_PCIE_AP_TO_BB_REFCLK_N

PCIE_CAL_RES

1

R5803_RF

1.43K

1%
1/32W
MF
01005

2

RADIO_BB

PLACE
CLOSE

17 1

IN

17 1

IN

90_PCIE_BB_TO_AP_RXD_P
90_PCIE_BB_TO_AP_RXD_N

90_PCIE_AP_TO_BB_TXD_P
90_PCIE_AP_TO_BB_TXD_N

OUT
OUT

1

1

1

IN

1

IN

B

TO AA10

A

PAGE TITLE

PAGE_TITLE=BASEBAND: CONTROL

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

8 7 5 4 2 1

36

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=04/17/2015

051-00482

8.0.0

58 OF 72
67 OF 81

A

D

D

C

BASEBAND: GPIOS

PP_1V8_LDO6

4 5 6 7 17 20

R5912_RF

RADIO_BB

SKU

ROW

R5911_RF
NOSTUFF

JP 1.0 KOHM

R5912_RF
NOSTUFF

NOSTUFF

MAV13 = BB_LAT_0

NOSTUFF

RF_BB_LAT_1
RF_BB_LAT_2
RF_BB_LAT_3

1 17

1.00K

1/32W
01005

1

IN

1

IN

1

OUT

1

IN

1 17

OUT

1

IN

17 18

OUT

19

12 19

OUT

OUT

13 17

OUT

12 17

OUT

12 17

OUT

1%
MF

17

17 18 19

12 19

345678

2 1

BB_RF

R5911_RF

1

2

SKU_ID2

7

7

BB_EEPROM_I2C_SDA
BB_EEPROM_I2C_SCL
I2S_BB_TO_AP_LRCLK
I2S_AP_TO_BB_DOUT
I2S_BB_TO_AP_DIN
I2S_BB_TO_AP_BCLK
UART_BB_TO_AOP_RXD
UART_AOP_TO_BB_TXD

FAST_BOOT_SELECT0

75_RFFE6_SCLK
75_RFFE6_SDATA
75_RFFE7_SCLK

BB_TO_STROBE_DRIVER_GSM_BURST_IND
RX-DSPDT_CTL2
FBRX-DSPDT_CTL1
FBRX-DSPDT_CTL2

1.00K

1/32W
01005

RADIO_BB

OMIT_TABLE

1

1%
MF

2

SKU_ID

MAV13 = WDOG DIS

NC
NC
NC
NC

NC
NC
NC
NC

NC
NC
NC
NC
NC
NC

NC

NC
NC
NC
NC
NC
NC

V15
AA19
AB14

Y15

T1
R3
R2
R1
T5
P3
R5
P5

V13
AA12

Y13
AA13

V14
AA14

Y14
AB13
AB19

P21

P23

Y18

N19

P22

N3
N2
N1

N5
M3
M2
M1
M5

L5
L3
L2
L1

N22

F5

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
GPIO_9
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20
GPIO_21
GPIO_22
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
GPIO_28
GPIO_29
GPIO_30
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39

MDM9645

BGA

SYM 3 OF 8

GPIO

GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
GPIO_58
GPIO_59
GPIO_60
GPIO_61
GPIO_62
GPIO_63
GPIO_64
GPIO_65
GPIO_66
GPIO_67
GPIO_68
GPIO_69
GPIO_70
GPIO_71
GPIO_72
GPIO_73
GPIO_74
GPIO_75
GPIO_76
GPIO_77
GPIO_78
GPIO_79

F3
K3
K5
J3
J2
J1
J5
H3
H2
H1
Y16
N23
AA16
V12
K19
Y23
L19
AA22
M23
AB22
Y12
AB17
Y22
M21
Y11
AA11
L21
W21
AA17
AA18
N21
AB12
H5
G3
G2
G5
Y21
Y19
AB20
AA20

NC

SHIELD_GSM_TX_PHASE

NC
NC

75_RFFE3_SDATA
75_RFFE3_SCLK
75_RFFE4_SDATA
75_RFFE4_SCLK
BB_TO_LAT_ANT_DATA
BB_TO_LAT_ANT_SCLK

NC

AP_TO_BB_TIME_MARK
UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

NC

BB_TO_AP_RESET_DETECT_L
AP_TO_BB_COREDUMP
AP_TO_BB_IPC_GPIO1

RFCAL_QCN

NC
NC
NC

BB_TO_PMU_PCIE_HOST_WAKE_L

NC
NC

PCIE_BB_BI_AP_CLKREQ_L

AP_TO_BB_MESA_ON
FAST_BOOT_SELECT1

NC

SIM1_REMOVAL_ALARM75_RFFE7_SDATA

NC
NC

75_RFFE2_SDATA
75_RFFE2_SCLK
75_RFFE1_SDATA
75_RFFE1_SCLK
SIM1_IO
SIM1_DETECT
SIM1_RST
SIM1_CLK

17

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

BI

BI

IN

IN

BI

BI

BI

BI

BI

BI
BI
BI

IN

17 7 1

17 7 1

13 17

13 17

9 17

9 17

1 17

WDOG DIS CONFLICT

1 17
20

1 17 20

1

17

17

1

1

1 17

1 7

1

3 17

16 17

16 17

9 17

9 17

17 20

17 20

17 20

17 20

1

C5902_RF

22PF

2%
16V

2

CERM
01005

1

C5903_RF

100PF

5%
16V

2

NP0-C0G
01005

9

OUT

PLACE CAP CLOSE TO MDM
IMPROVES RXBN BY 4DB

17 7 1

PCIE_AP_TO_BB_RESET_L

1

C5906_RF

0.01UF

10%

6.3V

2

X5R
01005

BB_TO_LAT_ANT_SCLK

BB_TO_LAT_ANT_DATA

1 17 7

PP_1V8_LDO15

4 12 13 14 16 18 19

PP1V8_SDRAM

1 20

1

C5907_RF

33PF

5%
16V

2

NP0-C0G-CERM
01005

BUFFER ON RFFE5

SCLK/SDATA_A IS OUTPUT

D

RFBUF_RF

RF1352

4

VIO

SCLK
SDATA

17 7 1

1 3

IN

17 7 1

BB_TO_LAT_ANT_SCLK

BB_TO_LAT_ANT_DATA

WLCSP

GND

7

GPO1

GPO2

SCLK_A

SDATA_A

1
8

52
63

BB_TO_UAT_SCLK

BB_TO_UAT_DATA

USID=0XF

R5909_RF

0.00

0%

1/32W

MF

01005

RADIO_BB

NOSTUFF

R5910_RF

0.00

0%

1/32W

MF

01005

RADIO_BB

NOSTUFF

BUFFER_GPO1
BUFFER_GPO2

21

21

1

1

14 7 1

14 7 1

BB_TO_UAT_SCLK

BB_TO_UAT_DATA

14 7 1

14 7 1

C

B

RFFE USAGE TABLE

RFFE1 WTR3925
RFFE2 QFE3100

RFFE3 DIV MODULES
RFFE4 WTR4905
RFFE5 TUNERS + ELNAS
RFFE6 2G PA,MLB PA,MB/HB TDD PA,MB/HB FDD PA

17 7 1

17 7 1

BB_TO_LAT_ANT_SCLK

BB_TO_LAT_ANT_DATA

A3

A1
A2

VIO

SCLK
SDATA

GPIO_RF

QM18064

WLCSP

GND

B3

GPO1

GPO2

GPO3
GPO4

A4
B1
B2
B4

NC

USID=0X8

BB_TO_LAT_GPO1
BB_TO_LAT_GPO2
BB_TO_LAT_GPO3

1

1

1

B

A

PP_1V8_LDO6

4 5 6 7 17 20

100K

1%

1/32W

MF

01005

1

2

PCIE_BB_BI_AP_CLKREQ_L

7 1

R5906_RF

RADIO_BB

NOSTUFF

PCIE PULL-UPS TO BB RAIL

RFFE7 LB PA, COUPLERS

BB EEPROM

PP_1V8_LDO6

1

1

R5907_RF

10K

1%
1/32W
MF
01005

2

RADIO_BB

VCC

EPROM_RF

CAT24C08C4A

BB_EEPROM_I2C_SCL

7 7

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

WLCSP

RADIO_BB

VSS

A2 A1

C5901_RF

1UF

20%
10V

2

X5R
0201

RADIO_BB

SDASCL

1

R5908_RF

10K

1%
1/32W
MF
01005

2

RADIO_BB

B2B1

BB_EEPROM_I2C_SDA

4 5 6 7 17 20

PAGE TITLE

BASEBAND GPIOS

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=04/17/2015

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

59 OF 72

SHEET

68 OF 81

A

8 7 5 4 2 1

36

TRANSCEIVER: POWER

345678

2 1

D

C

8 4

STAR ROUTING

IN

PP_0V9_LDO3

DEFAULT_CAPACITOR_1e+06pF_2_1

1

C6001_RF

10UF

20%

6.3V

2

CERM-X5R
0402

RADIO_TRANSCEIVER

RADIO_TRANSCEIVER

DEFAULT_RESISTOR_0.001OHM_2_1

R6001_RF

0.00

0%

1/32W

MF

01005

21

PP_VDD_XCVR0_RF1_TX_VCO

DEFAULT_CAPACITOR_100000pF_2_1

1

C6018_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

R6005_RF

0.00

1/32W
01005

DEFAULT_RESISTOR_0.001OHM_2_1

21

0%
MF

PP_VDD_XCVR0_RF1_TX

DEFAULT_CAPACITOR_100000pF_2_1

1

C6019_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

R6006_RF

0.00

1/32W
01005

DEFAULT_RESISTOR_0.001OHM_2_1

21

0%
MF

PP_VDD_XCVR0_RF1_DIG

DEFAULT_CAPACITOR_100000pF_2_1

1

C6020_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

R6007_RF

0.00

1/32W
01005

DEFAULT_RESISTOR_0.001OHM_2_1

21

0%
MF

PP_VDD_XCVR0_RF1_RX1

DEFAULT_CAPACITOR_100000pF_2_1

1

C6021_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

R6008_RF

0.00

0%

1/32W

MF

01005

21

PP_VDD_XCVR0_RF1_RX2

DEFAULT_CAPACITOR_100000pF_2_1

1

C6022_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

35MA

DEFAULT_CAPACITOR_27.000000pF_2_1

1

C6010_RF

27PF

5%
16V

2

NP0-C0G
01005

RADIO_TRANSCEIVER

175MA

1

C6011_RF

27PF

5%
16V

2

NP0-C0G
01005

RADIO_TRANSCEIVER

25MA

DEFAULT_CAPACITOR_27.000000pF_2_1

1

C6012_RF

27PF

5%
16V

2

NP0-C0G
01005

RADIO_TRANSCEIVER

40MA

DEFAULT_CAPACITOR_27.000000pF_2_1

1

C6013_RF

27PF

5%
16V

2

NP0-C0G
01005

RADIO_TRANSCEIVER

250MA

DEFAULT_CAPACITOR_27.000000pF_2_1

1

C6014_RF

27PF

5%
16V

2

NP0-C0G
01005

RADIO_TRANSCEIVER

88

VDD_RF1_TVCO

67

VDD_RF1_TSIG

45

VDD_RF1_DIG

64

VDD_RF1_RX1

49

VDD_RF1_RX2

XCVR0_RF

WTR3925-2-TR-03-1

WLPSP

SYM 4 OF 5

PWR

RADIO_TRANSCEIVER

LDO_CAP
VDD_RF2

23
30

C6380_RF CAN BE 0201 (TBD)

VDD_XCVR0_RF2_LDO_BYPASS

1

C6024_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

250MA

DEFAULT_CAPACITOR_100000pF_2_1

1

C6003_RF

0.47UF

20%
4V

2

CERM-X5R-1
201

RADIO_TRANSCEIVER

BBPMU_TO_PMU_AMUX3

DEFAULT_CAPACITOR_4700pF_2_1

1

C6005_RF

4700PF

10%

6.3V

2

X5R
01005

RADIO_TRANSCEIVER

XCVR0_RF

WTR3925-2-TR-03-1

WLPSP

3

58

GND

56

GND

42

GND

72

GND

28

GND

84

GND

21

GND

91

GND

20

GND

90

GND

19

GND

89

GND

102

GND

55

GND

8 4

IN

SYM 5 OF 5

GND

RADIO_TRANSCEIVER

GNDGND
GND

GND
GND
GND
GND
GND
GND

GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND

94
87

81
17
52
37
36
61

53
54

57
82
83
26
27
71
63
41
48

38
25
31

C

D

B

A

8 4

XCVR1_RF

WTR4905

WLNSP

SYM 5 OF 5

9

GND

13

GND

16

GND

21

GND

24
25
26
27
29
30

GND
GND
GND
GND
GND
GND

STAR ROUTING

IN

PP_0V9_LDO3

1

C6006_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

RADIO_TRANSCEIVER

RADIO_TRANSCEIVER

RADIO_TRANSCEIVER

DEFAULT_RESISTOR_0.001OHM_2_1

R6002_RF

0.00

1/32W
01005

0%
MF

21

PP_VDD_XCVR1_RF1_DIG

1

C6007_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

RADIO_TRANSCEIVER

R6003_RF

0.00

1/32W
01005

0%
MF

21

PP_VDD_XCVR1_RF1_RX

1

C6008_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

RADIO_TRANSCEIVER

25MA

1

C6015_RF

27PF

5%
16V

2

NP0-C0G
01005

RADIO_TRANSCEIVER

40MA

DEFAULT_CAPACITOR_27.000000pF_2_1

1

C6016_RF

27PF

5%
16V

2

NP0-C0G
01005

50

VDD_RF1_DIG

33

VDD_RF1_RX

23

VDD_RF1_TX

XCVR1_RF

WTR4905

WLNSP

SRM 4 OF 5

PWR

VDD_RF2

VDD_RF2_LDO

250MA

44
34

VDD_XCVR1_RF2_LDO_BYPASS

1

C6002_RF

0.47UF

20%
4V

2

CERM-X5R-1
201

RADIO_TRANSCEIVER

1

C6023_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

BBPMU_TO_PMU_AMUX3

DEFAULT_CAPACITOR_4700pF_2_1

1

C6004_RF

4700PF

10%

6.3V

2

X5R
01005

RADIO_TRANSCEIVER

8 4

IN

GND

R6004_RF

0.00

0%

1/32W

MF

01005

21

PP_VDD_XCVR1_RF1_TX

1

C6009_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

RADIO_TRANSCEIVER

1

C6017_RF

27PF

5%
16V

2

NP0-C0G
01005

RADIO_TRANSCEIVER

175MA

PAGE TITLE

GND
GND
GND
GND
GND
GND
GND
GND
GND

32
35
37
39
40
42
45
48
52

SYNC_DATE=04/17/2015

B

A

PAGE_TITLE=TRANSCEIVER0/1: POWER

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

8 7 5 4 2 1

36

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

60 OF 72
69 OF 81

D

TRANSCEIVER: TX PORTS

50_XCVR0_TX_HMB1_B11_B21

9

345678

OMIT_TABLE

C6106_RF

RADIO_TRANSCEIVER

27PF

2%

16V

CERM

01005

2 1

21

50_XCVR0_TX_B11_B21_PA_IN

OUT

19

D

C

9 6

9 6

9 6

9 6

10 6

10 6

17 7

17 7

9 3

SHIELD_XCVR0-1_TX_I_P

IN

SHIELD_XCVR0-1_TX_I_N

IN

SHIELD_XCVR0-1_TX_Q_P

IN

SHIELD_XCVR0-1_TX_Q_N

IN

SHIELD_XCVR0_TX_FB_RX_I

OUT

SHIELD_XCVR0_TX_FB_RX_Q

OUT

75_RFFE1_SCLK

IN

75_RFFE1_SDATA

IN

SHIELD_WTR_19P2M_CLK

IN

DEFAULT_CAPACITOR_1000pF_2_1

C6110_RF

1000PF

21

SHIELD_XCVR0_19P2M_CLK_WTR_IN

10%

6.3V

X5R-CERM

01005

1

C6112_RF

1.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

NOSTUFF

76

TX_BB_IP

75

TX_BB_IM

68

TX_BB_QP

60

TX_BB_QM

9

TX_FBRX_BBI

1

TX_FBRX_BBQ

47

RFFE_CLK

62

RFFE_DATA

46

XO_IN

XCVR0_RF

WTR3925-2-TR-03-1

WLPSP

SYM 3 OF 5

TX

RADIO_TRANSCEIVER

TX_LB1
TX_LB2
TX_LB3
TX_LB4

TX_MHB1
TX_MHB2
TX_MHB3
TX_MHB4

TX_HMLB1
TX_HMLB2

TX_FBRX_P

TX_FBRX_M

66

NC

59

NC

51

NC

44

NC

50_XCVR0_TX_HMB1_B11_B21

101

50_XCVR0_TX_HMB2_B38_B40_B41

100

50_XCVR0_TX_HMB3_B1_B3_B4_B25

93

50_XCVR0_TX_HMB4_B7_B30

86
80

NC

50_XCVR0_TX_HMLB2_B34_B39

74
8

16

100_XCVR0_TX_FBRX_IN_WTR

NC

9

9

9

9

9

3.0NH+/-0.1NH-200MA

1

C6118_RF

1.5PF

+/-0.1PF
16V

2

NP0-C0G
01005-1

L6111_RF

01005

50_XCVR0_TX_HMB2_B38_B40_B41

9

DEFAULT_INDUCTOR_2.800000nH_2_1

L6110_RF

2.8NH-+/-0.1NH-0.36A

21

50_XCVR0_TX_HMB2_B38_B40_B41_MATCH

01005

DEFAULT_CAPACITOR_1.200000pF_2_1

1

C6113_RF

1.2PF

+/-0.05PF
16V

2

NP0-C0G-CERM
01005

DEFAULT_CAPACITOR_22.000000pF_2_1

C6116_RF

22PF

21

50_XCVR0_TX_B38_B40_B41_PA_IN

5%

16V

CERM

01005

OUT

D

18

C6107_RF

27PF

50_XCVR0_TX_HMB3_B1_B3_B4_B25

9

C6105_RF

27PF

21

50_XCVR0_TX_FBRX_IN_UNBAL

1

C6117_RF

1.5PF

+/-0.1PF
16V

2

NP0-C0G
01005-1

RADIO_TRANSCEIVER

2%

16V

CERM

01005

21

50_XCVR0_TX_FBRX_IN

50_XCVR0_TX_HMB4_B7_B30

9

12

IN

RADIO_TRANSCEIVER

L6109_RF

2.8NH-+/-0.1NH-0.36A

21

2%

16V

CERM

01005

DEFAULT_INDUCTOR_2.800000nH_2_1

21

50_XCVR0_TX_HMB4_B7_B30_MATCH

01005

1

L6102_RF

10NH-3%-140MA

01005
NOSTUFF
RADIO_TRANSCEIVER

2

C6115_RF

DEFAULT_CAPACITOR_1.200000pF_2_1

1

C6114_RF

1.2PF

+/-0.05PF
16V

2

NP0-C0G-CERM
01005

50_XCVR0_TX_B1_B3_B4_B25_PA_IN

DEFAULT_CAPACITOR_22.000000pF_2_1

22PF

50_XCVR0_TX_B7_B30_PA_IN

21

5%

16V

CERM

01005

OUT

OUT

19

19

C

B

50_XCVR1_TX_HMLB1_G1800_G1900

9

C6101_RF

27PF

21

2%

16V

CERM

RADIO_TRANSCEIVER

01005

50_XCVR0_TX_HMLB2_B34_B39

9

50_XCVR1_TX_G1800_G1900_PA_IN

1

L6101_RF

10NH-3%-140MA

01005
NOSTUFF
RADIO_TRANSCEIVER

2

C6108_RF

27PF

21

2%

16V

CERM

RADIO_TRANSCEIVER

01005

OUT

18

50_XCVR0_TX_B34_B39_PA_IN

OUT

18

B

A

9 3

9 6

9 6

9 6

9 6

7

17 7

17 7

SHIELD_XCVR0-1_TX_I_P

IN

SHIELD_XCVR0-1_TX_I_N

IN

SHIELD_XCVR0-1_TX_Q_P

IN

SHIELD_XCVR0-1_TX_Q_N

IN

SHIELD_GSM_TX_PHASE

IN

75_RFFE4_SDATA

IN

75_RFFE4_SCLK

DEFAULT_CAPACITOR_1000pF_2_1

C6109_RF

100PF

SHIELD_WTR_19P2M_CLK SHIELD_XCVR1_19P2M_CLK_WTR_IN

IN

5%

6.3V
CERM

01005

21

1

C6111_RF

68PF

5%
25V

2

NP0-C0G-CERM
01005

NOSTUFF

14

TX_BB_IP

19

TX_BB_IM

3

TX_BB_QP

8

TX_BB_QM

57

GP_DATA

56

RFFE_DATA

51

RFFE_CLK

55

XO_IN

XCVR1_RF

WTR4905

WLNSP

SYM 2 OF 5

TX

TX_DA1
TX_DA2
TX_DA3
TX_DA4
TX_DA5

TX_FBRX

1

50_XCVR1_TX_HMLB1_G1800_G1900

18

50_XCVR1_TX_HMLB2_B8_B20_B26_B27

12

NC

50_XCVR1_TX_HMLB4_B12_B13_B28

2

50_XCVR1_TX_HMLB5_G850_G900

7

50_XCVR1_TX_FBRX_IN

31

9

9

9

9

12

C6102_RF

27PF

50_XCVR1_TX_HMLB2_B8_B20_B26_B27

9

RADIO_TRANSCEIVER

2%

16V

CERM

01005

21

1

50_XCVR1_TX_B8_B20_B26_B27_PA_IN

L6103_RF

10NH-3%-140MA

01005
NOSTUFF
RADIO_TRANSCEIVER

2

C6103_RF

27PF

50_XCVR1_TX_HMLB4_B12_B13_B28

9

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

50_XCVR1_TX_B12_B13_B28_PA_IN

C6104_RF

27PF

50_XCVR1_TX_HMLB5_G850_G900

9

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

1

50_XCVR1_TX_G850_G900_PA_IN

L6104_RF

10NH-3%-140MA

01005
NOSTUFF
RADIO_TRANSCEIVER

2

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

OUT

OUT

OUT

19

19

18

OFFPAGE=TRUE

PAGE TITLE

TRANSCEIVER0/1: TX PORTS

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=04/17/2015

DRAWING NUMBER SIZE

051-00482

REVISION

D

8.0.0

BRANCH

PAGE

61 OF 72

SHEET

70 OF 81

A

8 7 5 4 2 1

36

TRANSCEIVER: PRX, DRX, & GPS PORTS

345678

2 1

D

50_XCVR0_PRX_PMB1_B4

11

50_XCVR0_PRX_PMB2_B1_B4

11

50_XCVR0_PRX_PMB3_B3

11

50_XCVR0_PRX_PMB4_B34_B39

11

50_XCVR0_PRX_PMB5_B25

11

50_XCVR0_PRX_PMLB6_B11_B21

11

50_XCVR0_PRX_PHB1_B7

11

50_XCVR0_PRX_PHB2_B40_EXT

11

50_XCVR0_PRX_PHB3_B38_B40_B41

11

50_XCVR0_PRX_PHB4_B30

11

NC
NC
NC
NC

104

96

103

95
99

92

106

98

105

97
73

65
85
79

XCVR0_RF

WTR3925-2-TR-03-1

WLPSP

PRX_LB1
PRX_LB2
PRX_LB3
PRX_LB4

PRX_MB1
PRX_MB2
PRX_MB3
PRX_MB4
PRX_MB5
PRX_MLB6

PRX_HB1
PRX_HB2
PRX_HB3
PRX_HB4

SYM 1 OF 5

PRX

RADIO_TRANSCEIVER

PRX_CA1_BBI

PRX_CA1_BBQ

PRX_CA2_BBI

PRX_CA2_BBQ

69
77

39
33

SHIELD_XCVR0_PRX_CA1_I

SHIELD_XCVR0_PRX_CA1_Q

SHIELD_XCVR0_PRX_CA2_I

SHIELD_XCVR0_PRX_CA2_Q

OUT

OUT

OUT

OUT

XCVR0_RF

D

WTR3925-2-TR-03-1

WLPSP

5

12

4

11
15

22

7

14

6

13
43

50
29
35

2

10

DRX_LB1
DRX_LB2
DRX_LB3
DRX_LB4

DRX_MB1
DRX_MB2
DRX_MB3
DRX_MB4
DRX_MB5
DRX_MLB6

DRX_HB1
DRX_HB2
DRX_HB3
DRX_HB4

DNC
GNSS_L1

6

6

6

6

11

11

11

11

11

11

11

IN
IN
IN
IN
IN

IN

IN

50_XCVR0_DRX_DMB2_B34
50_XCVR0_DRX_DMB3_B1_B4
50_XCVR0_DRX_DMB4_B39
50_XCVR0_DRX_DMB5_B3_B25
50_XCVR0_DRX_DMLB6_B11_B21

50_XCVR0_DRX_DHB2_B7_B38_B41

50_XCVR0_DRX_DHB4_B30_B40

50_GPS_RX

10

NC
NC
NC
NC

NC

NC

NC

NC

SYM 2 OF 5

DRX_GPS

RADIO_TRANSCEIVER

DRX_CA1_BBI

DRX_CA1_BBQ

DRX_CA2_BBI

DRX_CA2_BBQ

GNSS_BBI

GNSS_BBQ

GP_DATA

78
70

34
40

18
32

24

NC

SHIELD_XCVR0_DRX_CA1_I

SHIELD_XCVR0_DRX_CA1_Q

SHIELD_XCVR0_DRX_CA2_I

SHIELD_XCVR0_DRX_CA2_Q

SHIELD_GPS_RX_I

SHIELD_GPS_RX_Q

OUT

OUT

OUT

OUT

OUT

OUT

6

6

6

6

6

6

C

50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29

11

50_XCVR1_PRX_PLB2_B8_B26_B27

11

50_XCVR1_PRX_PMB1_G1800

11

50_XCVR1_PRX_PMB2_G1900

11

NC

NC

NC
NC

17
11

6

4

10

5

28
22

PRX_LB1
PRX_LB2
PRX_LB3

PRX_MB1
PRX_MB2
PRX_MB3

PRX_HB1
PRX_HB2

XCVR1_RF

WTR4905

WLNSP

SYM 3 OF 5

PRX

PRX_BBI

PRX_BBQ

15

20

SHIELD_XCVR1_PRX_I

SHIELD_XCVR1_PRX_Q

OUT

OUT

C

6

6

NC

NC

49
54
60

59
53

DRX_LB1
DRX_LB2
DRX_LB3

DRX_MB1
DRX_MB2

11

11

11

IN
IN

50_XCVR1_DRX_DLB1_B12_B13_B20_B28_B29
50_XCVR1_DRX_DLB2_B8_B26_B27

50_XCVR1_DRX_DMB2_B3

XCVR1_RF

WTR4905

WLNSP

SYM 1 OF 5

DRX_GPS

DRX_BBI

DRX_BBQ

47
36

SHIELD_XCVR1_DRX_I

SHIELD_XCVR1_DRX_Q

OUT

OUT

6

6

B

A

PP_1V8_LDO14

4

15

38
43

58

DRX_HB1
DRX_HB2

GNSS_IN

GNSS_BBI

GNSS_BBQ

46

SHIELD_XCVR0_TX_FB_RX_I

41

SHIELD_XCVR0_TX_FB_RX_Q

PAGE TITLE

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

OUT

OUT

9 6

9 6

SYNC_DATE=04/17/2015

PAGE_TITLE=TRANSCEIVER0/1: PRX PORTS

DRAWING NUMBER SIZE

Apple Inc.

R

051-00482

REVISION

8.0.0

BRANCH

PAGE

62 OF 72

SHEET

71 OF 81

B

A

D

NC
NC

NC

L6200_RF

120NH-5%-40MA

21

0201

GNSS

IN

50_GNSS

1

C6201_RF

0.1UF

20%

6.3V

2

X5R-CERM
01005

GNSS

RFIN

3

LNA_EN

7

VDD

GLNA_RF

SKY65766-13

LGA

GND

8

6

5

4

2

RFOUT

GNSS

91

50_DRX_GPS_LNA_OUT

1

C6204_RF

2.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

NOSTUFF

DEFAULT_RESISTOR_0.001OHM_2_1

R6201_RF

0.00

0%

1/32W

MF

01005

21

50_DRX_GPS_LNA_MATCH

1

C6205_RF

2.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

NOSTUFF

GPS FILTER

PLACE NEAR U_WTR

GFILT_RF

GPS-GNSS

SAFGB1G56XA0F57

LGA

UNBAL_PRT UNBAL_PRT

GND

6

5

3

2

41

50_GPS_FILTER_OUT

1

C6203_RF

1.6PF

+/-0.1PF
16V

2

NP0-C0G
01005

L6201_RF

10NH-3%-0.170A

01005

21

50_GPS_RX

10

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

8 7 5 4 2 1

36

345678

2 1

D

C

PRIMARY & DIVERSITY RECEIVE MATCHING

NOSTUFF

R6301_RF

27PF

NP0-C0G

L6312_RF

0201

L6313_RF

0201

19

19

19

DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF

19

50_LAT_MLB_G1800_G1900_PA_RX

IN

RADIO_TRANSCEIVER

20NH-3%-0.25A-0.8OHM

19

IN

C6314_RF

27PF

IN

50_XCVR0_B25_PA_PRX

RADIO_TRANSCEIVER

OMIT_TABLE

2%

16V

CERM

01005

21

50_XCVR0_PRX_PMB5_B25_MATCH

C6305_RF

3.1NH-+/-0.1NH-0.5A-0.17OHM

21

0201

RADIO_TRANSCEIVER

1.6NH-+/-0.1NH-1A-0.05OHM

L6305_RF

6.2NH-3%-0.4A

IN

50_XCVR0_B11_B21_PA_PRX

0201

C6316_RF

27PF

IN

50_XCVR0_B3_PRX-DSPDT_OUT

RADIO_TRANSCEIVER

2%

16V

CERM

01005

21

50_XCVR0_PRX_PMLB6_B11_B21_MATCH

21

C6306_RF

3.0PF

+/-0.05PF

25V

C0G-CERM

0201

RADIO_TRANSCEIVER

50_XCVR0_PRX_PMB3_B3_MATCH

OMIT_TABLE

21

C6307_RF

3.0NH+/-0.1NH-0.6A

21

0201

RADIO_TRANSCEIVER

1.9NH-+/-0.1NH-0.6A-0.12OHM

L6304_RF

0201

RADIO_TRANSCEIVER

OMIT_TABLE

C6315_RF

27PF

21

2%

16V

CERM

RADIO_TRANSCEIVER

01005

L6306_RF

0201

RADIO_TRANSCEIVER

21

21

50_XCVR0_PRX_PMB5_B25

10

50_XCVR0_PRX_PMLB6_B11_B21

10

50_XCVR0_PRX_PMB3_B3

10

19

IN

50_XCVR1_B12_B13_B20_B28_B29_PA_PRX

RADIO_TRANSCEIVER

15NH-3%-0.3A-0.7OHM

50_XCVR1_B8_B26_B27_PA_PRX

RADIO_TRANSCEIVER

5%

6.3V
0201

21

50_XCVR1_G1800_G1900_DIPLEX_OUT

1

OMIT_TABLE

L6320_RF

3.6NH+/-0.1NH-0.5A

0201

RADIO_TRANSCEIVER

2

21

50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29_MATCH

21

50_XCVR1_PRX_PLB2_B8_B26_B27_MATCH

1

COMMON

NOSTUFF

1

C6351_RF

27PF

2%
16V

2

CERM
01005

NOSTUFF

1

C6352_RF

27PF

2%
16V

2

CERM
01005

GSMRX_RF

GSM1800-1900

B8856

GND

6

LGA

5

OMIT_TABLE

2

C6328_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

C6329_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

L6318_RF

5.1NH-3%-0.4A

0201

RADIO_TRANSCEIVER

4

GSM1800

GSM1900

50_XCVR1_G1800_DIPLEX_IN

3

50_XCVR1_G1900_DIPLEX_IN

L6319_RF

5.1NH-3%-0.4A

0201

RADIO_TRANSCEIVER

OMIT_TABLE

50_XCVR1_PRX_PLB1_B12_B13_B20_B28_B29

50_XCVR1_PRX_PLB2_B8_B26_B27

OMIT_TABLE

21

50_XCVR0_PRX_PMB1_G1800_MATCH

C6332_RF

2.0PF

+/-0.1PF

25V

C0G-CERM

0201

RADIO_TRANSCEIVER

21

50_XCVR0_PRX_PMB2_G1900_MATCH

OMIT_TABLE

21

C6333_RF

10

10

2.0PF

+/-0.1PF

16V

NP0-C0G

01005

OMIT_TABLE

21

C6340_RF

27PF

2%

16V

CERM

01005

RADIO_TRANSCEIVER

OMIT_TABLE

21

C6341_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

OMIT_TABLE

50_XCVR1_PRX_PMB1_G1800

10

50_XCVR1_PRX_PMB2_G1900

10

D

C

B

A

L6307_RF

4.3NH+/-3%-0.5A

50_XCVR0_PRX_PMB1_B4_MATCH

21

C6308_RF

1.2PF

21

+/-0.1PF

25V

C0G-CERM

0201

50_XCVR0_PRX_PMB2_B1_B4_MATCH

21

C6309_RF

1.2PF

21

+/-0.1PF

25V

C0G-CERM

0201

50_XCVR0_PRX_PMB4_B34_B39_MATCH

21

C6301_RF

RADIO_TRANSCEIVER

19

19

18

IN

50_XCVR0_B4_PA_PRX

0201

RADIO_TRANSCEIVER

L6308_RF

4.3NH+/-3%-0.5A

IN

50_XCVR0_B1_B4_PA_PRX

0201

RADIO_TRANSCEIVER

L6309_RF

1.9NH-+/-0.1NH-0.6A-0.12OHM

IN

50_XCVR0_B34_B39_PA_PRX

0201

3.3NH+/-0.1NH-0.5A

21

0201

19

18

C6318_RF

27PF

IN

50_XCVR0_B7_PA_PRX

RADIO_TRANSCEIVER

2%

16V

CERM

01005

21

50_XCVR0_PRX_PHB1_B7_MATCH

C6310_RF

IN

50_XCVR0_B38_B40_B41_PA_PRX

0.00

1%

1/20W

MF

0201

21

50_XCVR0_PRX_PHB3_B38_B40_B41_MATCH

RADIO_TRANSCEIVER

C6302_RF

1.0PF

21

+/-0.1PF

25V
C0G
201

RADIO_TRANSCEIVER

L6301_RF

2.5NH+/-0.1NH-0.6A

21

0201

RADIO_TRANSCEIVER

3.9NH+/-0.1NH-0.5A

L6311_RF

19

50_XCVR0_B30_PA_PRX

RADIO_TRANSCEIVER

0.00

1%

1/20W

MF

0201

21

C6345_RF

27PF

19

IN

50_XCVR0_B11_B21_PA_DRX

2%

16V

CERM

01005

RADIO_TRANSCEIVER

OMIT_TABLE

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

50_XCVR0_DRX_DMLB6_B11_B21_MATCH

21

RADIO_TRANSCEIVER

50_XCVR_PRX_PHB4_B30_MATCH

C6311_RF

2.1NH-+/-0.1NH-0.6A-0.12OHM

21

0201

RADIO_TRANSCEIVER

L6322_RF

6.2NH-3%-0.4A

C6348_RF

3.0PF

+/-0.05PF

C0G-CERM

OMIT_TABLE

21

25V

0201

0201

OMIT_TABLE

RADIO_TRANSCEIVER

21

C6342_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

C6343_RF

27PF

21

2%

16V

CERM

01005

C6317_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

L6310_RF

21

0201

C6319_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

C6320_RF

27PF

21

2%

16V

CERM

01005

50_XCVR0_DRX_DMLB6_B11_B21

50_XCVR0_PRX_PMB1_B4

50_XCVR0_PRX_PMB2_B1_B4

50_XCVR0_PRX_PMB4_B34_B39

50_XCVR0_PRX_PHB1_B7

50_XCVR0_PRX_PHB3_B38_B40_B41

50_XCVR0_PRX_PHB4_B30

13

IN

10

19

IN

50_XCVR0_B40_PA_PRX_EXT_FIL

SHUNT COMPONENT WITH BAND 40 FILTER

10

10

DC BLOCKING CAP VALUES CANNOT BE MORE THAN 33PF

10

10

13

IN

50_XCVR0_B34_MBHB-DRX-ASM_OUT

C6323_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

C6324_RF

27PF

2%

16V

CERM

01005

21

10

13

IN

50_XCVR0_B1_B4_MBHB-DRX-ASM_OUT

RADIO_TRANSCEIVER

C6325_RF

27PF

50_XCVR0_B39_MBHB-DRX-ASM_OUT

L6323_RF

RADIO_TRANSCEIVER

10

13

IN

2.4NH+/-0.1NH-0.6A

50_XCVR0_B3_B25_DRX-DSPDT_OUT 50_XCVR0_DRX_DMB5_B3_B25_MATCH

0201

RADIO_TRANSCEIVER

L6321_RF

4.3NH+/-3%-0.5A

21

0201

RADIO_TRANSCEIVER

50_XCVR0_PRX_PHB2_B40_EXT_MATCH

21

3.2NH+/-0.1NH-0.5A

RADIO_TRANSCEIVER

21

2%

16V

CERM

01005

C6349_RF

0201

21

50_XCVR0_DRX_DMB2_B34

50_XCVR0_DRX_DMB3_B1_B4

50_XCVR0_DRX_DMB4_B39

C6344_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

C6346_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

13

IN

10

10

10

50_XCVR0_DRX_DMB5_B3_B25

50_XCVR0_B7_B41_B38_MBHB-DRX-ASM_OUT

50_XCVR0_PRX_PHB2_B40_EXT

13

IN

10

L6328_RF

3.0NH+/-0.1NH-0.6A

21

50_XCVR0_DRX_DHB2_B7_B38_B41_MATCH

C6350_RF

0201

2.2PF

25V

+/-0.1PF

21

C0G-CERM

0201

RADIO_TRANSCEIVER

C6335_RF

27PF

2%

16V

CERM

01005

21

13

IN

50_XCVR0_B30_B40_MBHB-DRX-ASM_OUT

RADIO_TRANSCEIVER

C6336_RF

27PF

13

IN

50_XCVR1_B12_B13_B20_B28_B29_LB-DRX-ASM_OUT

13

IN

50_XCVR1_B8_B26_B27_LB-DRX-ASM_OUT

RADIO_TRANSCEIVER

2%

16V

CERM

01005

21

RADIO_TRANSCEIVER

L6324_RF

2.4NH+/-0.1NH-0.6A

50_XCVR1_B3_DRX-DSPDT_OUT 50_XCVR1_DRX_DMB2_B3_MATCH

0201

RADIO_TRANSCEIVER

21

L6325_RF

3.2NH+/-0.1NH-0.5A

21

0201

RADIO_TRANSCEIVER

PAGE TITLE

RECEIVE MATCHING

Apple Inc.

10

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

R

C6334_RF

27PF

21

2%

16V

CERM

01005

RADIO_TRANSCEIVER

50_XCVR0_DRX_DHB4_B30_B40

50_XCVR1_DRX_DLB1_B12_B13_B20_B28_B29

C6337_RF

27PF

21

2%

16V

CERM

01005

C6338_RF

27PF

5%

6.3V

NP0-C0G

0201

50_XCVR0_DRX_DHB2_B7_B38_B41

10

50_XCVR1_DRX_DLB2_B8_B26_B27

21

50_XCVR1_DRX_DMB2_B3

SYNC_DATE=07/21/2015

DRAWING NUMBER SIZE

051-00482

REVISION

8.0.0

BRANCH

PAGE

63 OF 72

SHEET

72 OF 81

10

10

B

10

10

A

D

8 7 5 4 2 1

36

D

19

19

345678

2 1

LOWER ANTENNA AND COUPLER

JLAT1_RF

MM7829-2700

14 13 12 4

PP_2V7_LDO12

R6402_RF

1.3NH+/-0.1NH-1.1A

1

C6407_RF

18PF

2%
16V

2

CERM

2
14

4
16

01005

NCNC

50_XCVR0_LAT_CPLD

50_XCVR1_LAT_CPLD

9

LATDI_RF

LFD21829MMY1E339

BI
BI

50_LAT_LB_COMBINER_IN
50_LAT_MB_HB_COMBINER_IN

6
4

LB
MB-HB

0805-LGA

GND

5

3

1

ANT

2

50_LAT_LB_MB_HB_COMBINER_OUT 50_LAT_LB_MB_HB_CPL_ANT

1

2

R6401_RF

2NH+/-0.1NH-0.6A

21

0201

C6403_RF

18PF

2%
25V
C0H-CERM
0201

NOSTUFF

1

C6402_RF

18PF
2%
25V

2

C0H-CERM
0201

NOSTUFF

19 18 16 14 13 12 7 4

19 12 7

19 12 7

13

12

1

6
5

8

RFIN2
USID
VIO

SDATA
SCLK

50_LAT_LB_MB_HB_CPL_IN

FL6402_RF

10-OHM-1.1A

PP_1V8_LDO15

IN

BI

75_RFFE7_SDATA
75_RFFE7_SCLK

IN

01005

21

PP_1V8_LDO15_LATCP

VDD

LATCP_RF

SKY16705-21

LGA

RF_CPL1
RF_CPL2

RFOUT1RFIN1
RFOUT2

1

C6409_RF

0.1UF
20%

6.3V

2

X5R-CERM
01005

12

12

1

C6410_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

0201

21

1

C6411_RF

0.7PF

+/-0.05PF
25V

2

C0G-CERM
0201

NOSTUFF

50_LAT1_ANT

F-ST-SM

2

D

1

3

C

GND

1

C6419_RF

18PF

2%
16V

2

14 13 12 4

PP_2V7_LDO12

1

2

C6414_RF

18PF

2%
16V
CERM
01005

8

VDD

CERM
01005

SWLATCP_RF

CXA4439GC-E

9

OUT

9

OUT

50_XCVR0_TX_FBRX_IN
50_XCVR1_TX_FBRX_IN

FBRX-DSPDT_CTL1

17 7

FBRX-DSPDT_CTL2

17 7

RF1 RF1A

10 4

RF2 RF1B

7

VCTL1

9

VCTL2

LGA-1

RF2A
RF2B

GND

3

56

2

1

1

C6420_RF

18PF

2%
16V

2

CERM
01005

50_XCVR0_LAT_CPLD
50_XCVR0_UAT_CPLD

50_XCVR1_UAT_CPLD
50_XCVR1_LAT_CPLD

1

C6401_RF

0.033UF
20%
4V

2

X5R-CERM
01005

12

12

12

12

7

3

10

11

15

USID=0X6

C

B

19

19

UPPER ANTENNA COUPLER

14 13 12 4

UATDI_RF

LFD21829MMY1E339

50_UAT_LB_COMBINER_IN

BI

50_UAT_MLB_COMBINER_IN

6
4

LB
MB-HB

0805-LGA

OMIT_TABLE

GND

5

3

1

ANT

2

50_UAT_LB_MLB_COMBINE

1

C6405_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

R6400_RF

0.00

1%

1/20W

MF

0201

50_UAT_LB_MLB_CPL_IN

21

50_UAT_MB_HB_CPL_IN

19

FL6401_RF

1

C6404_RF

18PF
2%
25V

2

C0H-CERM
0201

NOSTUFF

16 14 13 12 7 4

19 18

19 12 7

19 12 7

IN

BI

IN

PP_1V8_LDO15
75_RFFE7_SDATA
75_RFFE7_SCLK

1

C6400_RF

0.033UF
20%
4V

2

X5R-CERM
01005

10-OHM-1.1A

01005

21

PP_1V8_LDO15_UATCP

PP_2V7_LDO12

1

13

6
5

12

8

RFIN2
USID
VIO

SDATA
SCLK

9

VDD

UATCP_RF

SKY16705-21

LGA

GND

7

3

10

RFOUT1RFIN1
RFOUT2

RF_CPL1
RF_CPL2

15

11

1

C6406_RF

18PF

2%
16V

2

CERM
01005

2
14

4
16

50_UAT_LB_MLB_CPL_OUT

50_UAT_MB_HB_CPL_ANT

50_XCVR0_UAT_CPLD
50_XCVR1_UAT_CPLD

1

C6408_RF

0.1UF
20%

6.3V

2

X5R-CERM
01005

12

12

1

C6417_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

1.3NH+/-0.1NH-1.1A

1

C6415_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

USID=0X7

R6405_RF

0.00

1%

1/20W

MF

0201

R6404_RF

0201

OMIT_TABLE

21

1

2

50_UAT_LB_MLB_SOUTH

C6418_RF

18PF

5%
16V
CERM
01005

NOSTUFF

OUT

1

B

21

1

2

50_UAT_MB_HB_SOUTH

C6416_RF

0.3PF

+/-0.1PF
25V
C0G-CERM
201

OMIT_TABLE

OUT

1

A

PAGE TITLE

PAGE_TITLE=LOWER ANTENNA & COUPLERS

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=04/17/2015

051-00482

8.0.0

64 OF 72
73 OF 81

A

D

DIVERSITY RECEIVE

LB DRX ASM

345678

2 1

D

14 13 12 4

PP_2V7_LDO12

11

11

1

C6501_RF

20%

6.3V

2

X5R-CERM
01005

50_XCVR1_B12_B13_B20_B28_B29_LB-DRX-ASM_OUT

50_XCVR1_B8_B26_B27_LB-DRX-ASM_OUT

19 18 16 14 13 12 7 4

17 13 7

17 13 7

BI

PP_1V8_LDO15

IN

75_RFFE3_SDATA
75_RFFE3_SCLK

IN

1

C6514_RF

18PF

2%
16V

2

CERM
01005

1

2

1

C6503_RF

0.033UF
20%
4V

2

X5R-CERM
01005

C6505_RF

18PF0.1UF
2%
16V
CERM
01005

2

12

NC

3

11

5
7
6

VLB_RX0
VLB_RX1
LB_RX0
LB_RX1

VIO
SDATA
SCLK

4

1

9

VDD

LBDSM_RF

HFQSWEWUA

LGA

8

10

13

14

15

16

ANT

EPADGND

21

20

19

18

17

USID=0X9

R6501_RF

3.9NH+/-0.1NH-0.5A

50_LAT-UAT_LB-DRX-ASM_ANT 50_LB_DRX

1

C6507_RF

2.0PF

+/-0.1PF
25V

2

C0G-CERM
0201

NOSTUFF

0201

21

1

C6510_RF

2.0PF

+/-0.1PF
25V

2

C0G-CERM
0201

NOSTUFF

D

19

IN

C

B

14 13 12 4

50_XCVR1_B3_DRX-DSPDT_OUT

11

50_XCVR0_B3_B25_DRX-DSPDT_OUT

11

PP_2V7_LDO12

1

2

C6504_RF

18PF

2%
16V
CERM
01005

SWDSM_RF

CXA4430GC-E

4

RF1

6

RF2

3

VDD

LGA

GND

5

RFIN

CTRL

C

MB HB DRX ASM

14 13 12 4

2

1

RX-DSPDT_CTL2

1

2

11

C6513_RF

18PF

2%
16V
CERM
01005

17 7

PP_2V7_LDO12

50_XCVR0_B7_B41_B38_MBHB-DRX-ASM_OUT

19 18 16 14 13 12 7 4

17 13 7

17 13 7

1

C6502_RF

0.1UF
20%

6.3V

2

X5R-CERM
01005

50_XCVR0-1_B3_B25_MBHB-DRX-ASM_OUT

50_XCVR0_B1_B4_MBHB-DRX-ASM_OUT

11

50_XCVR0_B30_B40_MBHB-DRX-ASM_OUT

11

50_XCVR0_B34_MBHB-DRX-ASM_OUT

11

11

IN

BI

IN

PP_1V8_LDO15
75_RFFE3_SDATA
75_RFFE3_SCLK

1

C6515_RF

18PF

2%
16V

2

CERM
01005

1

C6506_RF

18PF
2%
16V

2

CERM
01005

2

B3_B25_RX

3

B1_B4_RX

15

B30_B40_RX

16

B7_B38/B41B_B41_RX

13

B34_RX

14

B39_RX

22

MIPI_VIO

20

MIPI_SDATA

21

MIPI_SCLK

4

1

18

MIPI_VDD

MHBDSM_RF

D5315

LGA

R6502_RF

ANT1

ANT2

THRM_PADGND

9

7

6

5

11

12

17

19

23

24

25

26

10

8

USID=0XA

50_LAT_MB-HB-DRX-ASM_ANT150_XCVR0_B39_MBHB-DRX-ASM_OUT

1

2

50_UAT_MB-HB-DRX-ASM_ANT2

1

2

C6508_RF

2.0PF

+/-0.1PF
25V
C0G-CERM
0201

NOSTUFF

C6509_RF

2.0PF

+/-0.1PF
25V
C0G-CERM
0201

NOSTUFF

0

5%

1/20W

MF

201

R6503_RF

0

5%

1/20W

MF

201

21

21

50_UAT_MB-HB-DRX-LNA_OUT_RX

50_LAT_MB_HB_DRX

1

C6511_RF

2.0PF

+/-0.1PF
25V

2

C0G-CERM
0201

NOSTUFF

1

C6512_RF

2.0PF

+/-0.1PF
25V

2

C0G-CERM
0201

NOSTUFF

19

IN

B

14

IN

A

PAGE TITLE

PAGE_TITLE=DIVERSITY RECEIVE ASM'S

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=04/17/2015

051-00482

8.0.0

65 OF 72
74 OF 81

A

D

D

DIVERSITY RECEIVE LNAS

PP_MHBLN_RF

14

345678

LB DRX LNA

10

VDD

2 1

D

C

3

TX_RX

LBLN_RF

ANT

14

50_UAT_LB-DRX-LNA_ANT50_UAT_LB-DRX-LNA_TX_RX

15 14

SKY13702-17

LGA

1

C6620_RF

0.033UF
20%
4V

2

X5R-CERM
01005

9
7
8

VIO
SDATA
SCLK

1

GND

6

5

4

2

11

12

13

15

16

17

18

19

20

21

22

EPAD

23

24

25

13

4 7 12 14 16 18 19

7 14

1

BI

1 7 14

IN

PP_1V8_LDO15
BB_TO_UAT_DATA
BB_TO_UAT_SCLK

1

C6617_RF

18PF

2%
16V

2

CERM
01005

1

C6619_RF

18PF
2%
16V

2

CERM
01005

USID=0X2

MB/HB DRX LNA

R6606_RF

50_UAT_LB_SPLIT_OUT

UPPDI_RF

R6601_RF

0.00

1

BI

1

C6601_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

1/20W

0201

21

1%
MF

50_UAT_LB_MLB_SPLIT_IN50_UUAT_LB_MLB_NORTH

1

C6602_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

LFD21829MMP5E222

2

ANT

LGA

OMIT_TABLE

GND

5

3

1

LB

MB-HB

4
6

50_UAT_MLB_SPLIT_OUT

1

C6611_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

R6605_RF

2.7NH+/-0.1NH-0.6A

OMIT_TABLE

1

C6610_RF

1.5PF

+/-0.05PF
25V

2

C0G-CERM
0201

OMIT_TABLE

0.00

1/20W

0201

OMIT_TABLE

0201

1%
MF

21

21

50_UAT_LB-DRX-LNA_TX_RX

1

C6614_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

50_UAT_MLB-DRX-LNA_TX_RX

1

14

14

C6613_RF

10NH-3%-250MA

0201

OMIT_TABLE

2

PP_2V7_LDO12

4 12 13 14

150OHM-25%-200MA-0.7DCR

4 7 12 13 14 16 18 19

1 7 14

1 7 14

FL6602_RF

01005

50_UAT1_WEST

1

50_UAT_MB-HB-DRX-LNA_OUT_RX

13

IN
BI
IN

PP_1V8_LDO15
BB_TO_UAT_DATA
BB_TO_UAT_SCLK

C

21

1

C6629_RF

0.1UF
20%

6.3V

2

X5R-CERM
01005

1

C6625_RF

18PF

2%
16V

2

CERM
01005

4
2

21
23
22

IN_TX
OUT_RX

VIO
SDATA
SCLK

3

1

6

5

PP_MHBLN_RF

14

8

7

20

VDD

MHBLN_RF

SKY13703-21

LGA

25

EPAD

27

26

28

GND

9

10

11

12

13

14

15

17

18

19

24

ANT

16

50_UAT_MB-HB-DRX-LNA_ANT

15

B

PP_2V7_LDO12

4 12 13 14

MLB DRX LNA

FL6603_RF

150OHM-25%-200MA-0.7DCR

21

01005

50_UAT_MLB-DRX-LNA_TX_RX

1

2

C6627_RF

0.1UF
20%

6.3V
X5R-CERM
01005

1

C6622_RF

18PF

2%
16V

2

CERM
01005

6

OUT_RX

PP_MLBLN_RF

MLBLN_RF

LMRX2HJB-H68

OMIT_TABLE

USID=0X3

1

VDD

LGA

ANT

13

50_UUAT_MLB

B

15 14

A

4 7 12 13 14 16 18 19

1 7 14

BI

1 7 14

PP_1V8_LDO15

IN

BB_TO_UAT_DATA
BB_TO_UAT_SCLK

IN

2
4
3

VIO
SDATA
SCLK

5

GND

9

8

7

10

11

12

14

EPAD

16

15

USID=0X4

SYNC_DATE=04/17/2015

PAGE TITLE

A

DIVERSITY RECEIVE LNA'S

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

051-00482

REVISION

8.0.0

BRANCH

PAGE

66 OF 72

SHEET

75 OF 81

D

8 7 5 4 2 1

36

CDS_LIB=apple

UPPER ANTENNA FEEDS

345678

2 1

D

C

14

14

14

D

OMIT_TABLE

R6708_RF

BI

BI

BI

1

50_UAT_LB-DRX-LNA_ANT

50_UAT_MB-HB-DRX-LNA_ANT 50_UUAT_HB_PLEXER

BI

0.00

1/20W

0201

UP_RFFE

OMIT_TABLE

R6710_RF

OMIT_TABLE

R6703_RF

21

1%
MF

0.00

1%

1/20W

MF

0201

UP_RFFE

0.00

1%

1/20W

MF

0201

UP_RFFE

50_UUAT_LB_PLEXER

1

C6726_RF

18PF

2%
25V

2

C0H-CERM
0201

UP_RFFE
NOSTUFF

21

21

50_UUAT_MLB_PLEXER50_UUAT_MLB

1

C6728_RF

18PF

2%
25V

2

C0H-CERM
0201

UP_RFFE
NOSTUFF

1

C6711_RF

18PF

2%
25V

2

C0H-CERM
0201

UP_RFFE
NOSTUFF

50_UAT_WLAN_2G_WEST_PLEXER

10

14

17

8

1

LB
MLB
MB-HB
WIFI
GNSS

2

PPLXR_RF

ACFM-W312-AP1

LGA

OMIT_TABLE

GND

9

7

6

4

3

11

12

13

15

16

18

UAT1

5

ANT

EPAD

19

50_UAT1

R6705_RF

0.00

1%

1/20W

MF

0201

UP_RFFE

21

50_UAT1_MATCH

1

2

C6713_RF

18PF

2%
25V
C0H-CERM
0201

NOSTUFF

R6715_RF

0.00

1%

1/20W

MF

0201

UP_RFFE

21

50_UAT1_TEST

JUAT1_RF

MM8830-2600B

F-RT-SM

C R

1

L6700_RF

56NH-100MA-3.9OHM

0201

UP_RFFE
NOSTUFF

2

GND

UP_RFFE

3

50_UAT1_TUNER

TO ANTENNA TUNER

21

1

BI

C

B

10

50_GNSS

R6709_RF

0.00

1%

1/20W

MF

0201

UP_RFFE

21

50_GNSS_PLEXER

1

C6727_RF

18PF

2%
25V

2

C0H-CERM
0201

UP_RFFE
NOSTUFF

B

A

PAGE TITLE

PAGE_TITLE=UPPER ANTENNA FEEDS

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

8 7 5 4 2 1

36

REVISION

BRANCH

PAGE

SHEET

SYNC_DATE=04/17/2015

051-00482

8.0.0

67 OF 72
76 OF 81

A

D

PMU: ET MODULATOR

34567 8

2 1

D

D

C

PP_VPA_APT

18

PP_QPOET_VCC_PA

19 18

PP_PA_VBATT

19 18

24

21

20

10

5

PA_VBATT

VCC_PA_ET

6

6

SHIELD_ET_DAC_P

IN

SHIELD_ET_DAC_N

IN

75_RFFE2_SCLK

17 7

75_RFFE2_SDATA

17 7

2
3

17
16

AMP_IN+
AMP_IN-

SCLK
SDATA

4

11

18

27

28

7

6

VCC_PA_ET

VCC_PA_GSM

2103-601507-10

GND

30

29

15

8

VDD_1P8

VCC_PA_GSM

VDD_BUCK

VDD_BUCK

QPOET_RF

LGA

9

1

32

31

14

22

PP_1V8_LDO15

12

25

VDD_LDO

VDD_LDO

VDD_VBATT

13

VDD_VBATT

TRIM_14
TRIM_18

USID_LSB

IN

26
23

19

1

C6801_RF

2.2UF

20%

6.3V

2

X5R-CERM

NC

19 18 14 13 12 7 4

1

C6802_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-10201-1

1

C6803_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

1

C6804_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

PP_VDD_MAIN

1

C6805_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

C

20 16 4 3 1

B

DESENSE CAPS

20 16 4 3 1

IN

PP_VDD_MAIN

1

2

PLACE C6806 AND C6807 NEAR THE QPOET

C6806_RF

100PF

5%
16V
NP0-C0G
01005

1

C6807_RF

27PF

2%
16V

2

CERM
01005

B

A

PAGE TITLE

PMU: ET MODULATOR

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT

CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST

8 7 5 4 2 1

36

III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

68 OF 72
77 OF 81

A

D

MLB TEST POINTS

BBPMU

34567 8

2 1

BOOT CONFIG

DEFAULT FAST_BOOT[2:0]

D

C

B

BASEBAND

PP7000_RF

P2MM-NSM

SM

1

PP

OMIT

PP6952_RF

P2MM-NSM

SM

PP

OMIT

PP6943_RF

P2MM-NSM

SM

PP

OMIT

PP6944_RF

P2MM-NSM

SM

PP

OMIT

PP6939_RF

P2MM-NSM

SM

PP

OMIT

PP6940_RF

P2MM-NSM

SM

PP

OMIT

PP6941_RF

P2MM-NSM

SM

PP

OMIT

PP6942_RF

P2MM-NSM

SM

PP

OMIT

PP6903_RF

P2MM-NSM

SM

PP

OMIT

PP6904_RF

P2MM-NSM

SM

PP

OMIT

PP6935_RF

P2MM-NSM

SM

PP

OMIT

PP6936_RF

P2MM-NSM

SM

PP

OMIT

PP6915_RF

P2MM-NSM

SM

PP

OMIT

PP6916_RF

P2MM-NSM

SM

PP

OMIT

75_RFFE1_SDATA

1

75_RFFE1_SCLK

1

75_RFFE2_SDATA

1

75_RFFE2_SCLK

1

75_RFFE3_SDATA

1

75_RFFE3_SCLK

1

75_RFFE4_SDATA

1

75_RFFE4_SCLK

1

BB_TO_LAT_ANT_DATA

1

BB_TO_LAT_ANT_SCLK

1

75_RFFE6_SCLK

1

75_RFFE6_SDATA

PCIE

1

90_PCIE_AP_TO_BB_REFCLK_P

1

90_PCIE_AP_TO_BB_REFCLK_N

1 7

1 7

9 7

9 7

16 7

16 7

13 7

13 7

9 7

9 7

1 6

1 6

USB = 0X2

PP6945_RF

PP6919_RF

PP6906_RF

P2MM-NSM

SM

1

PP

OMIT

PP6907_RF

P2MM-NSM

SM

PP

OMIT

PP6908_RF

P2MM-NSM

SM

PP

OMIT

PP6909_RF

P2MM-NSM

SM

PP

OMIT

PP6911_RF

P2MM-NSM

SM

PP

OMIT

PP6912_RF

P2MM-NSM

SM

PP

OMIT

PP6913_RF

P2MM-NSM

SM

PP

OMIT

PP6914_RF

P2MM-NSM

SM

PP

OMIT

PP6933_RF

P2MM-NSM

SM

PP

OMIT

19 18 7

19 18 7

PP6917_RF

P2MM-NSM

SM

PP

OMIT

PP6918_RF

P2MM-NSM

SM

PP

OMIT

SWD_AP_TO_BB_CLK_BUFFER

1

PMU_TO_BB_USB_VBUS_DETECT

1

NFC_TO_BB_CLK_REQ

1

SIM1_REMOVAL_ALARM

1

50_MDM_PCIE_CLK

1

XO_OUT_D0_EN

1

BB_TO_NFC_CLK

1

SHIELD_SLEEP_CLK_32K

1

BB_TO_STROBE_DRIVER_GSM_BURST_IND

1

UART_BB_TO_WLAN_COEX

1

UART_WLAN_TO_BB_COEX

6

1 3 20

1 3

7 3

6 3

6 3

3 1

6 3

1 7

20 7 1

20 7 1

P2MM-NSM

SM

1

PP

OMIT

PP6920_RF

P2MM-NSM

SM

1

PP

OMIT

PP6921_RF

P2MM-NSM

SM

1

PP

OMIT

PP6923_RF

P2MM-NSM

SM

1

PP

OMIT

PP6924_RF

P2MM-NSM

SM

1

PP

OMIT

PP6925_RF

P2MM-NSM

SM

1

PP

OMIT

PP6926_RF

P2MM-NSM

SM

1

PP

OMIT

PP6929_RF

P2MM-NSM

SM

1

PP

OMIT

PP6930_RF

P2MM-NSM

PP6931_RF

P2MM-NSM

PP6938_RF

P2MM-NSM

AP_TO_BB_TIME_MARK

SM

1

PP

OMIT

SM

1

PP

OMIT

SM

1

PP

OMIT

BB_JTAG_RST_L

FBRX-DSPDT_CTL1

FBRX-DSPDT_CTL2

BB_TO_PMU_PCIE_HOST_WAKE_L

SPMI_CLK

SPMI_DATA

UART_BB_TO_AOP_RXD

BB_TO_AP_RESET_DETECT_L

AP_TO_BB_COREDUMP

RX-DSPDT_CTL2

20 6

12 7

12 7

1 7

6 3

6 3

7 1

7 1

7 1

1 7

13 7

P2MM-NSM

SM

1

PP

OMIT

PP6905_RF

P2MM-NSM

SM

PP

OMIT

PP6900_RF

P2MM-NSM

SM

PP

OMIT

PMIC_RESOUT_L

1

AP_TO_BBPMU_RADIO_ON_L

1

PMU_TO_BBPMU_RESET_L

SIM

PP6953_RF

P2MM-NSM

SM

1

PP

OMIT

PP6969_RF

P2MM-NSM

SM

1

PP

OMIT

PP6972_RF

P2MM-NSM

SM

1

PP

OMIT

PP6973_RF

P2MM-NSM

SM

1

PP

OMIT

PP6974_RF

P2MM-NSM

SM

1

PP

OMIT

PP6977_RF

P2MM-NSM

SM

1

PP

OMIT

SIM1_IO

SIM1_DETECT

SIM1_RST

SIM1_CLK

90_USB_BB_DATA_P

90_USB_BB_DATA_N

6 3

20 3 1

3 1

1 6 20

1 6 20

20 7 6 5 4

PP_1V8_LDO6

D

NOSTUFF

1

R6921_RF

10K

1%
1/32W

MF

01005

RADIO_DEBUG

2

FAST_BOOT_SELECT1

7

FAST_BOOT_SELECT0

7

20 7

1

R6922_RF

10K

1%
1/32W

MF

01005

RADIO_DEBUG

2

C

20 7

20 7

20 7

ICEFALL

PP6978_RF

P2MM-NSM

SM

1

PP

OMIT

PP6979_RF

P2MM-NSM

SM

PP

OMIT

PP6980_RF

P2MM-NSM

SM

PP

OMIT

PP6981_RF

P2MM-NSM

SM

PP

OMIT

AP_TO_ICEFALL_FW_DWLD_REQ

1

SIM1_SWP

1

SE2_SWP

1

ICEFALL_LDO_ENABLE

1 20

20

20

PP7500_RF

P2MM-NSM

OMIT

PP7501_RF

P2MM-NSM

OMIT

PP7502_RF

P2MM-NSM

SM

PP

OMIT

20 1

SM

1

PP

SM

1

PP

1

SE2_PWR_REQ

SE2_READY

NFC_SWP_MUX

20 1

B

20 1

20 1

A

PCIE GND

PP6970_RF

P2MM-NSM

SM

1

OMIT

8 7 5 4 2 1

PP6971_RF

P2MM-NSM

SM

1

PPPP

OMIT

PAGE TITLE

TEST POINTS & BOOT CONFIG

DRAWING NUMBER SIZE

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

36

REVISION

BRANCH

PAGE

SHEET

051-00482

8.0.0

69 OF 72
78 OF 81

A

D

TDD TRANSMIT

34567 8

2 1

D

C

2G PA

FL7001_RF

600-OHM-25%-0.1A

19 16 16

PP_PA_VBATT

0201-1

21

1

C7004_RF

1.0UF

20%

6.3V

2

X5R
0201-1

2GPA_VBATT

1

C7005_RF

27PF

5%
16V

2

NP0-C0G
01005

1

C7006_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

3

8

VCCVBATT

1

C7007_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

1

C7008_RF

18PF

2%
16V

2

CERM
01005

GSMPA_RF

50_TX_G850_G900_PA_OUT

17
612

50_TX_G1800_G1900_PA_OUT

1

2

1

2

C7009_RF

18PF

2%
25V
C0H-CERM
0201

NOSTUFF

C7010_RF

18PF

2%
25V
C0H-CERM
0201

NOSTUFF

16 14

19 18 13 12 7 4

19

18 17 7

18 17

19

SKY77363

2

LGA

GND

4

LBRFOUT

HBRFOUT

EPAD

5

13

9

IN

9

IN

IN

BI

7

IN

50_XCVR1_TX_G850_G900_PA_IN

50_XCVR1_TX_G1800_G1900_PA_IN

PP_1V8_LDO15
75_RFFE6_SDATA
75_RFFE6_SCLK

1

C7017_RF

27PF

5%
16V

2

NP0-C0G
01005

11

9

10

LBRFIN
HBRFIN

VIO
SDATA
SCLK

USID=0X5

PP_VPA_APT

1

C7001_RF

0.1UF
20%

6.3V

2

X5R-CERM
01005

C7011_RF

27PF

5%

6.3V

NP0-C0G

0201

C7012_RF

27PF

5%

6.3V

NP0-C0G

0201

21

21

50_TX_G850_G900_PA_OUT_M

1

C7013_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

50_TX_G1800_G1900_PA_OUT_M

1

C7014_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

OUT

OUT

19

19

MB HB TDD PA

PP_1V8_LDO15

75_RFFE6_SDATA

D

C

IN

BI

19 18 17 7

19 18 16 14 13 12 7 4

B

19 16

PP_QPOET_VCC_PA

MF0%

21

75_RFFE6_SCLK

1

C7016_RF

5.6PF

IN

19 18 17 7

+/-0.1PF
16V

2

NP0-C0G
01005

R7002_RF

MLB_PA_VBATT

19

11

VBATT

9

IN

9

IN

50_XCVR0_TX_B34_B39_PA_IN

50_XCVR0_TX_B38_B40_B41_PA_IN

3

RFIN_MB

5

RFIN_HB

01005

0.00

1/32W

TDD_PAD_VCC1

9

8

VCC1

VCC2

TDDPA_RF

AFEM-8065-AP1

LGA-1

14

VIO

12

SDATA

13

SCLK

ANT

1

C7015_RF

5.6PF

+/-0.1PF
16V

2

NP0-C0G
01005

16

50_TDD_PA_ANT_M

OUT

B

19

A

11

11

OUT

OUT

50_XCVR0_B38_B40_B41_PA_PRX

50_XCVR0_B34_B39_PA_PRX

27

RX_B38_B40_B41

25

RX_B34_B39

2

1

GND

7

6

4

10

15

17

19

21

22

24

26

28

23

20

18

29

30

31

32

33

THRM_PAD

35

34

36

37

38

39

40

41

42

43

USID=0XF

A

D

PAGE TITLE

PAGE_TITLE=TDD TRANSMIT

Apple Inc.

R

NOTICE OF PROPRIETARY PROPERTY:

THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED

SYNC_DATE=04/17/2015

DRAWING NUMBER SIZE

051-00482

REVISION

8.0.0

BRANCH

PAGE

70 OF 72

SHEET

79 OF 81

8 7 5 4 2 1

36

8 7 6 5 4 3

2 1

D

C

FDD TRANSMIT

18

13

11

11

9

9

19 18 16

19 18 16

IN

IN

IN

OUT

OUT

OUT

PP_QPOET_VCC_PA

PP_PA_VBATT

50_XCVR1_TX_B8_B20_B26_B27_PA_IN

50_XCVR1_TX_B12_B13_B28_PA_IN

50_TX_G850_G900_PA_OUT_M

50_LB_DRX

50_XCVR1_B8_B26_B27_PA_PRX

50_XCVR1_B12_B13_B20_B28_B29_PA_PRX

DEFAULT_RESISTOR_0.001OHM_2_1

R7107_RF

0.00

1/32W
01005

0%
MF

21

LB_PA_VBATT

DEFAULT_CAPACITOR_1e+06pF_2_1

1

C7103_RF

1.0UF

20%

6.3V

2

X5R
0201-1

18
12

26
25

NC

24
23

NC

2

RFIN0

3

RFIN1

2G_TX
LB_DIV

LB_RX0
LB_RX1
VLB_RX0
VLB_RX1

1

2

4

1

C7104_RF

18PF

2%
16V
CERM
01005

6

5

11

LB_PAD_VCC1

7

VBATT

17

15

13

DEFAULT_RESISTOR_0.001OHM_2_1

1

1

R7108_RF

0.00

0%
1/32W
MF
01005

2

40

41

VCC1

VCC2

C7105_RF

18PF

2%
16V

2

CERM
01005

LBPA_RF

SKY78100-14

LB PA

GND

32

31

30

29

28

27

22

21

20

19

33

LGA1

35

34

NOSTUFF

1

R7130_RF

1.00

1%
1/32W
MF
01005

2

LB_SNUBBER

1

C7130_RF

68PF

2%

6.3V

2

NP0-C0G
01005

NOSTUFF

44

43

42

39

38

37

36

USID=0XD

10

VIO

45

46

8

SDATA

47

PP_1V8_LDO15_PA
75_RFFE7_SDATA_PA
75_RFFE7_SCLK_PA

9

SCLK

THRM_PAD

53

52

51

50

49

48

54

55

56

ANT1

ANT2

57

19 18 16

19 18 16

1

C7126_RF

33PF

5%
16V

2

NP0-C0G-CERM
01005

NOSTUFF

50_LAT_LB_PA_ANT

16

14

50_UAT_LB_PA_ANT

PP_QPOET_VCC_PA

PP_PA_VBATT

1

C7127_RF

0.033UF
20%
4V

2

X5R-CERM
01005

1

C7101_RF

180PF

10%
10V

2

CERM
01005

NOSTUFF

1

C7111_RF

22NH-3%-0.25A

0201

2

1

C7112_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

DEFAULT_RESISTOR_0.001OHM_2_1

R7113_RF

0.00

1/32W
01005

0%
MF

21

1

C7113_RF

1.0UF

20%

6.3V

2

X5R
0201-1

R7111_RF

0.00

0%

1/32W

MF

01005

R7101_RF

18PF

21

2%

25V

C0H-CERM

0201

R7102_RF

0.00

21

1%

1/20W

MF

0201

MLB_PA_VBATT

18

1

C7114_RF

18PF

2%
16V

2

CERM
01005

21

1/32W

MF

01005

1

2

R7114_RF

10-OHM-1.1A

R7112_RF

0.00

0%

1

C7120_RF

1.0PF

+/-0.1PF
25V

2

C0G
201

OMIT_TABLE

C7121_RF

18PF

2%
25V
C0H-CERM
0201

NOSTUFF

01005

21

1

C7128_RF

33PF

5%
16V

2

NP0-C0G-CERM
01005

NOSTUFF NOSTUFF

50_LAT_LB_COMBINER_IN

50_UAT_LB_COMBINER_IN

21

1

2

C7129_RF

0.033UF
20%
4V
X5R-CERM
01005

1

C7117_RF

18PF

2%
16V

2

CERM
01005

1

C7133_RF

0.033UF
20%
4V

2

X5R-CERM
01005

12

BI

824-915

824-915

12

BI

NOSTUFF

1

R7131_RF

1.00

1%
1/32W
MF
01005

2

MLB_TDD_SNUBBER

1

C7131_RF

68PF

2%

6.3V

2

NP0-C0G
01005

NOSTUFF

PP_1V8_LDO15

75_RFFE7_SDATA

75_RFFE7_SCLK

PP_1V8_LDO15
75_RFFE6_SDATA
75_RFFE6_SCLK

IN

BI

IN

12 7

12 7

19 18 16 14 13 12 7 4

D

C

IN

BI

IN

19 18 17 7

19 18 17 7

19 18 16 14 13 12 7 4

B

RXFIL_RF

BAW-B40F-RX

QM21140

LGA

50_XCVR0_B40B_PA_PRX 50_XCVR0_B40_PA_PRX_EXT_FIL

19

1

L7122_RF

4.7NH-3%-0.270A

01005

2

1 4

B40RXOUT

GND

6

5

3

2

B40ANT

19 18 16

19 18 16

1

L7123_RF

1.0PF

+/-0.1PF
16V

2

NP0-C0G
01005

PP_QPOET_VCC_PA

PP_PA_VBATT

DEFAULT_RESISTOR_0.001OHM_2_1

R7109_RF

0.00

1/32W
01005

0%
MF

25

VBATT

28

VCC1

27

VCC2

22

VIO

24

SDATA

23

SCLK

MLBPA_RF

50_XCVR0_TX_B11_B21_PA_IN

IN

50_XCVR0_B11_B21_PA_PRX

OUT

50_XCVR0_B11_B21_PA_DRX

OUT

OUT

9

11

11

11

NOSTUFF

1

R7132_RF

1.00

1%
1/32W
MF
01005

2

MBHB_SNUBBER

1

21

MBHB_FDD_PA_VBATT

DEFAULT_CAPACITOR_1e+06pF_2_1

1

C7106_RF

1.0UF

20%

6.3V

2

X5R
0201-1

1

C7108_RF

18PF

2%
16V

2

CERM
01005

29

1

R7110_RF

0.00

0%
1/32W
MF
01005

2

MBHB_FDD_PAD_VCC1

38

37

C7110_RF

18PF

2%
16V

2

CERM
01005

1

C7132_RF

68PF

2%

6.3V

2

NP0-C0G
01005

NOSTUFF

26

28

2

RFIN_MLB

20

PRX

18

DRX

3

1

PP_1V8_LDO15
75_RFFE6_SDATA
75_RFFE6_SCLK

27

HRPDAF025

LGA

OMIT_TABLE

MLB PA

ANT1

ANT2

14

12

50_LAT_MLB_PA_ANT

50_UAT_MLB_PA_ANT

1

C7122_RF

18PF
2%
25V

2

C0H-CERM
0201

NOSTUFF

R7105_RF

0.00

21

1%

1/20W

MF

0201

OMIT_TABLE

R7106_RF

50_LAT_MLB_G1800_G1900_PA_RX

1428-1463

11

BI

19

1428-1463

1.8NH+/-0.1NH-0.8A

21

0201

OMIT_TABLE

GND

9

8

7

6

5

4

10

11

13

15

16

17

19

21

26

29

30

31

32

33

THRM_PAD

35

34

36

37

38

39

40

41

42

43

1

C7123_RF

0.6PF

+/-0.05PF
25V

2

CERM
0201

OMIT_TABLE

50_UAT_MLB_COMBINER_IN

12

BI

B

USID=0XB

IN

BI

IN

19 18 17 7

19 18 17 7

19 18 16 14 13 12 7 4

A

19 11

11

18

18

13

11

11

11

11

11

50_TX_G1800_G1900_PA_OUT_M

IN

9

9

50_XCVR0_TX_B1_B3_B4_B25_PA_IN

IN

50_XCVR0_TX_B7_B30_PA_IN

IN

34

RFIN_GSM

31

RFIN_MB

32

RFIN_HB

VBATT

VCC1

VCC2

MBHBPA_RF

VIO

AFEM-8055-AP1

36

39

LGA

40

41

42

9

6

43

44

50_TDD_PA_ANT_M

IN

OUT

OUT

OUT

50_LAT_MLB_G1800_G1900_PA_RX

50_LAT_MB_HB_DRX
50_XCVR0_B40B_PA_PRX

19

50_XCVR0_B1_B4_PA_PRX

50_XCVR0_B3_PRX-DSPDT_OUT

50_XCVR0_B7_PA_PRX

OUT
OUT

50_XCVR0_B4_PA_PRX
50_XCVR0_B25_PA_PRX
50_XCVR0_B30_PA_PRX

7

TRX2

8

TRX3

10

MB_HB_DRX

11

DCS_PCS_RX

1

RX_B1

3

RX_B3

5

RX_B7

17

RX_B4

19

RX_B25

21

RX_B30

2

MB/HB PA

GND

4

12

15

16

18

20

22

23

24

25

30

33

35

SDATA

46

45

SCLK

48

47

EPAD

49

50

51

52

53

54

55

56

57

ANT1

ANT2

14

13

50_LAT_MB_HB_PA_ANT

50_UAT_MB_HB_PA_ANT

R7103_RF

1.8NH+/-0.1NH-0.8A

0201

NOSTUFF

1

C7118_RF

18PF

2%
25V

2

C0H-CERM
0201

2NH+/-0.1NH-0.6A

1

C7119_RF

0.1PF

+/-0.05PF
25V

2

C0G
0201

OMIT_TABLE

R7104_RF

0201

OMIT_TABLE

21

50_LAT_MB_HB_COMBINER_IN

1

C7124_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

21

50_UAT_MB_HB_CPL_IN

1

C7125_RF

18PF

2%
25V

2

C0H-CERM
0201

NOSTUFF

1710-2690

1710-2690

12

BI

SYNC_DATE=04/17/2015

12

BI

A

USID=0XE

3

1245678

876543

SWP MUX

ICEFALL

2 1

D

C

D

20

1

20 7 1

C7528_RF

1UF

20%
10V

2

X5R
0201

SE2

SE2_READY

1

R7512_RF

10K

1%
1/32W
MF
01005

2

1

C7201_RF

1UF

20%
10V

2

X5R
0201

SE2

NOSTUFF

PP1V8_SDRAM

1

R7506_RF

4.99K
1%
1/32W
MF
01005

2

NFC
OMIT_TABLE

1

OUT

SE2_PRESENT

OMIT_TABLE

17 1

OMIT_TABLE

R7511_RF

20 7 1

0.00

IN

1/20W

0201

NOSTUFF

21

1%
MF

PP1V8_ICEFALL_LDO

1

C7501_RF

0.1UF
20%

6.3V

2

X5R-CERM
01005

SE2

OMIT_TABLE

NC
NC
NC
NC
NC

NC

PP1V8_ICEFALL_LDOPP1V8_SDRAM

B3
A3
B1
A1
A2

E4

D4
C1

C2

VDD1P2

SPI_CLK
SPI_CS
SPI_INT
SPI_MISO
SPI_MOSI

GPIO_0
GPIO_1

NC

20

E5

C5

D2

C3

VDD1P8

VDDC

VDD1P8_BYP

SE2_RF

BCM20211CP

WLBGA

VSS

VSS

VSS

B5

C4

D5

E1

A5

VDDC

VDDO_NFC

VDDO_HOST_2

REG_PU

TCAL_CLK

VSS

D1

VDD_SE2_1V8

VOLTAGE=1.80V

VDD_SE2_1V2

VOLTAGE=1.20V

DB_RX

DB_TX

DWP
SWP

B4
A4

E2
E3

D3
B2

SE2
OMIT_TABLE

1

1

C7523_RF

1UF

20%
10V

2

X5R
0201

SE2

C7524_RF

1UF

20%
10V

2

X5R
0201

SE2

OMIT_TABLE

OMIT_TABLE

AP_TO_ICEFALL_FW_DWLD_REQ

NC
NC

SE2_SWP

SE2_PWR_REQ

NC

20 7 1

1

17 1

IN

20 17

17 1

IN

PP1V8_SDRAM

1

C7525_RF

0.1UF
20%

6.3V

2

X5R-CERM
01005

SE2

NFC_SWP

IN

17 1

R7510_RF

0.00

0%

1/32W

MF

01005

NFC

IN

21

NFC_SWP_MUX

NFC_SWP_R

SWPMX_RF

NLAS3257CMX2TCG

6

5

S

VCC

DFN

VER 1

B1

GND

B0A

1

2

34

SE2_SWP

SIM1_SWP

ICEFALL LDO

20 17

20 17

OMIT_TABLE

SE2LDO_RF

LP5907UVX-1.825-S

20 16 4 3 1

1

C7530_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

SE2

OMIT_TABLE

ICEFALL_LDO_ENABLE

17 1

1

C7529_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

SE2

OMIT_TABLE

PP_VDD_MAIN

1

C7531_RF

100PF

5%

6.3V

2

CERM
01005

OMIT_TABLE

B1

VIN

VEN

DSBGA

GND

B2

VOUT

A2A1

PP1V8_ICEFALL_LDO

20

C

B

20 5 4

VDD_SIM1

20 17 7

20 17 7

VDD_SIM1

20 5 4

1

R6900_RF

15.00K

1%
1/32W
MF
01005

2

SIM

SIM CARD CONNECTOR

IN

IN

1

C6900_RF

2.2UF

20%

6.3V

2

X5R-CERM
0201-1

SIM

SIM1_CLK

SIM1_RST

17 7 6 5 4

1

DZ6901_RF

12V-33PF

2

01005-1

SIM

9 8

3

CLK

J_SIM_RF

RCPT-WIDE-HSG-THICK-PIVOT

2

RESET

1

VCC

PP_1V8_LDO6

5

10

F-RT-SM

SIM

GND

12

11

13

SIM_DETECTSIM_DETECT_GND

14

15

16

IO

SWP

DEBUG CONNECTOR

20 17 20 17 7

1

DZ6905_RF

SG-WLL-2-2

SIM1_DETECT

7

6

2

SIM1_IO

SIM1_SWP

BI

20 17 7

20 17

OUT

DZ6900_RF

20 17 7

20 17 7

SIM1_RST

ESD202-B1-CSP01005

SIM

2

20 17 7

5.5V-6.2PF

0201

1

SIM

1

C6901_RF

100PF

5%
16V

2

NP0-C0G
01005

SIM

1

DZ6903_RF

SG-WLL-2-2

SIM

2

SIM1_SWPSIM1_IO

SIM1_CLK

1

DZ6902_RF

SG-WLL-2-2

ESD202-B1-CSP01005

SIM

2

1

DZ6904_RF

SG-WLL-2-2

ESD202-B1-CSP01005ESD202-B1-CSP01005

SIM

2

20 16 4 3 1

17 6 1

17 6 1

17 3 1

3 1

6 1

6 1

1 3 17

BI
BI

OUT

OUT
OUT
OUT

PP_VDD_BOOST

4 1

20-5857-036-001-829

PP_VDD_MAIN

PMU_TO_BB_USB_VBUS_DETECT
90_USB_BB_DATA_P
90_USB_BB_DATA_N
AP_TO_BBPMU_RADIO_ON_L

AP_TO_BB_RESET_L
SWD_AP_TO_MANY_SWCLK
SWD_AOP_BI_BB_SWDIO

J_DEBUG

41

F-ST-SM

3837

21
43
65
87
109
1211
1413
1615
1817
2019
2221
2423
2625
2827
3029
3231
3433
3635

VDD_SIM1
SIM1_RST
SIM1_CLK

SIM1_IO

SIM1_SWP
SIM1_DETECT

BB_JTAG_RST_L
UART_BB_TO_WLAN_COEX
UART_WLAN_TO_BB_COEX

IN

BI

OUT

OUT

IN

20 5 4

20 17 7

IN

20 17

20 17 7

20 17 7

20 17 7

B

17 6

IN

17 7 1

17 7 1

A

20 17 7

SIM1_IO

R6904_RF

100K

1%

1/32W

MF

01005

SIM

4039

42

NOSTUFF

1

2

SIM1_DETECT

20 17 7

A

3

1245678