Apple iPad 1 Schematics
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
8
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
3
B
7
ECNREV
BRANCH
DRAWING NUMBER
REVISION
SIZE
D
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
DRAWING TITLE
THE POSESSOR AGREES TO THE FOLLOWING:
Apple Inc.
SHEET
R
DATE
D
A
C
THE INFORMATION CONTAINED HEREIN IS THE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
C
3456
D
B
87 6 5 4 21
12
APPD
CK
DESCRIPTION OF REVISION
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
DRAWING
TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
2/4/2010 PVT
K48-DRI
VICE MLB
1 OF 119
2010-02-04
PRODUCTION RELEASED
1 OF 53
B.0.0
051-8245
B
0000854735
LAST_MODIFIED=Thu Feb 4 00:41:44 2010
AP TVOUT
AP RGB/CLCD,CAMERA
12/04/2009
CONFIGURATION OPTIONS
ALEX
AUDIO: AUDIENCE
AUDIO: HP CONN
PHYSICAL/SPACING RULES
Cross Reference Page
Cross Reference Page
Cross Reference Page
16
AP NAND & GPIO, NOR
AP PWR,AP BB&WIFI
FUNC/ICT TEST/BRACKETS
45
TABLE OF CONTENTS
1
1
VICE MLB
SYNC MASTER
DATE
CONTENTS
CSAPDF
40
AUDIO
32
PDF CSA
DATE
SYNC MASTER
CONTENTS
TITLE=U230
ABBREV=DRAWING
12/04/2009
42
AUDIO
33
AUDIO: DETECT/MIC BIAS
12/04/2009
43
AUDIO
34
09/16/2009MIAMI
35
ALS CONNECTOR
12/21/2009
48
JAMES
36
I/O EXPANDER
12/21/2009
49
JAMES
37
DISPLAY PORT SWITCH
12/21/2009
50
JAMES
38
44-PIN LANDSCAPE DOCK CONN
12/21/2009
51
JAMES
39
60-PIN PORTRAIT DOCK CONN
09/16/2009
54
MIAMI
40
BUTTONS CONNECTOR
09/16/2009
55
MIAMI
41
3G CONNECTOR
10/14/2009
57
MARKSIN
42
PROX SENSOR
09/16/2009
67
MIAMI
43 FLASH
09/16/2009
100
MIAMI
44
CONSTRAINTS
09/16/2009
101
MIAMI
45
MORE CONSTRAINTS
09/16/2009
106
MIAMI
46
113
47
114
48
Cross Reference Page
115
49
Cross Reference Page
116
50
117
51
118
52
Cross Reference Page
119
53
Cross Reference Page
SYSTEM BLOCK DIAGRAM
2
2
05/02/2009
POWER BLOCK DIAGRAM
3
3
12/04/2009
MARK
4
4
08/06/2009MIAMI
5
5
09/16/2009MIAMI
AP MAIN
6
6
12/21/2009JAMES
7
7
12/21/2009JAMES
8
8
12/21/2009JAMES
9
9
12/21/2009JAMES
10
10
12/21/2009JAMES
3G AND DEBUG MUXES
11
11
12/21/2009JAMES
AP MISC & ALIASES
12
12
12/21/2009JAMES
MLC
14
13
09/16/2009MIAMI
MLC ALIASES
15
14
09/16/2009MIAMI
Power Conn / Alias
17
15
12/04/2009
MARK
DCIN POWER PATH
18
12/04/2009
MARK
CHARGER
19
17
12/04/2009
MARK
PMU
20
18
12/04/2009
MARK
PMU
21
19
12/04/2009
MARK
3.3V SUPPLY
24
20
12/04/2009
MARK
LED BACKLIGHT CONTROLLER
26
21
12/04/2009
MARK
DEBUG RESET ACCESS
29
22
09/16/2009MIAMI
GRAPE 1 OF 2
30
23
12/21/2009JAMES
GRAPE 2 OF 2
31
24
12/21/2009JAMES
LVDS CONNECTOR
32
25
09/16/2009MIAMI
MOTION,GYRO,COMPASS/THERM
34
26
09/16/2009MIAMI
USB MUX/BRK DET
35
27
09/16/2009MIAMI
L61 AUDIO INTERFACE
36
28
12/04/2009AUDIO
AUDIO: SPEAKER AMP
37
29
12/04/2009AUDIO
AUDIO:HEADPHONE OUT
38
30
12/04/2009AUDIO
AUDIO: LINE OUT DOCK ESD CIRCUIT
39
31
12/04/2009AUDIO
J3700
J0500
no_refdes+7
J5400
D0562
C5081
C5020
C5050
DZ5070
C5080
C5090
C5053
C5000
R5030
DZ5050
R5002
R5080
C5083
R5090
DZ3901
L3901
L3900
DZ3900
L3905
R3900
DZ3905
820-2740-05 TOP 絲印圖
R1821
R5054
R4932
R5135
U4900
L4507
C4506
C0807
C5153
C0812
C0825
R0651
C0854
C0822
C0828
C0871
C0870
C4903
C4902
C0813
C4907
C4906
C0808
C0803
C0780
C0811
C0814
R5190
C5152
L5150 L5151
R5055
R4920
R4901
R4923
R3512
R3516
R4931
R3520
C0815
C0816
R0920
R0652
DZ0600
C6710
C6713
R0677
R0834
R0836
R0831
R0832
C0804
R2104
C2108
L4513
no_refdes+4
C3232
C3206
L3201
R1941
J0501
J3201
no_refdes+8
L3202 L3212L3222L3232
C3233
R1498
R1404
C3601
R1408
R3822
R1402
R1405
R0633
C1400
C1411
C3602
C3612
C3622
PP1412 PP1411
R4001
R4002
R4000
R3603
R3600
C3620
C3605
C3604
R3605
C3623
XW3602
C3621
U3800
C3220
R1403
R4003
XW3600
XW3800
C3820
C3823
L3200
C2621
R1410
C1413
U1400
U3810
R3823
L3820
R0622
R0700
R0701
C4237
C4236
R4234
R4233
C3811
C3814
C3810
C3821
J5500
C5500
C2613
C2614
C2615
R2634
C2616
R5500
R5501
C1417
U5500
R3604
C4218
C4217
L3601
R4214
R4213
C5400
C5401
DZ5401
L5401
L5400
DZ5400
L5402
DZ5402
C5402
L5403
C5403
C3627
C3626
C3628
C3625
DZ5403
R3602
L5500
R2633
U1403
R1499
U1402
U2601
R1497
R1406
Q1490
U1401
R1407
XW3601
R3820
R3606
C3603
C3609
C3608
C3600
U3600
C3606
C3624
C3630
C3611
C3610
C3607
R3607
C3822
C1922
J0510
C1911
R0631
C0827
C0873
C0817
C0872
C0818
C0823
C0809
C0720
R0636
C0850
C0862
C0721
C0861
C0829
C0824
C0860
C0852
C0819
C0810
C0832
R0721
C0769
R1203
C0771
XW3801
C3812C3813
C1923
TP1900
FL1900
L5152
R5141
R5140
R1050
U4901
XW1000
C4950
C1014
R0670
R0655
R0639
C0826
C0821
C0853
C0772
J5700
Y0602
C0607
C0806
C0613
R0640
C0801
C5703
R1053
R1046
R1047
R0645
R1012
C0767
U0652
FL0902
C0802
C0922
R0705
L4510
C4510
C5702
U5700
R5701
R5130
R1051
R1005
C5701
C5704
L4514
U1010
R0952
R0953
C5155 C5156
C5130
R5131R5132
C5120
C5154
J5100
R1052
R4905
R4900
C1030
R4903
R4904
R4902
R0646
R0663
R0662
C0830
R0647
C0805
C0851
C4904
C4905
C0950
C4507
R5700
U0901
R0950
C4505
C0951
C5700
C4514
J4501
no_refdes+9
C5140
U5100
R1201
XW1810
R3540
R3501
C4513
C2103
R2107
C2101
U3502
C3505
C3503
R0635
R3541
R3514
R3515
R3502
LED2900
U3501
C3507
R3522
R3521
L4512
C4512
L4511
C4511
R3542
Q3500
C6711
R2112
R0827
R0828
U3504
C2104
C3504
R0825
C3506
R0833
R3543
R2100
C2107
R2108
R2902
R2901
R2109
C2112
R2031
Q1810
R6700
R0855
R0851
R6701
R0857
U6710
R6702
R0854
R0850
R0856
R0853
R0852
C1810
R0870
U1810
R1810
Q1811
R0860
R0877
D1810
R1811
R1800
U6700
R0871
R0861
R0876
R0867
R0866
R0863
R0862
C6702
C6700
C3701
C3702
R3703
R3713
C3711
C3712
J0504
Q1821
Q1954
R1966
C4233
C3112
C3191
C1912
C3110
C4234
TP6700
R4232
R1823
C6703
C6701
DZ1950
C1820
R2110
R2111
C6712
C3031
R3032
R3033
U3007
C3030
R3031
C3021
R3025 R3021
U3005
C3020
C3105
U3101
C3109
R3171
C3111
C3108
C3106
R3190
R3601
C3629
R4230
C4232
R4231
L4231
C4235
R3030
R3050
L4230
Q1820
Q2000
R2003
D3000
C3000
R3066
C3053
C3006
C3041
R3020
R3120
C3107
R3101
U3009
R3099
C3103
R3155
C3101
R3173
R3160
R3107
C3104
C3852
R3854
C3850
C3851
R3850
R3852
R4321
R4212
C4215
U4210
C4210
R4211
R4210
XW1820
J0502
U3000
L3000
C3009
XW4300
R4312
R3012
C3008
R3009
L4306
L4304
C4300
L4305
L4301
L4302
L4303
C3001
C3007
U3003
C3005
C3102
C3050
U3010
U3100
C3853
R3855
R3851
R3853
R4322
XW4301
R4320
R4323
C4212
C4310
C4211
C4213
R4311
C4216
Q4200
C4214
R1820
U1820
D1820
R1822
XW1800
R0875
R0874
R0873
R0872
R0865
R0864
C4230
C4231
PP1950
R2101
C2111
PP1900
no_refdes+5
J4300
J0503
XW3000
DZ4306
DZ4304
DZ4305
DZ4301
DZ4302
DZ4303
DZ4231
DZ4230
XW5000
L3906
DZ3906
U5000
FL5011
FL5007
C5055
L5009
L5013
C5054
J3010 J3011
FL5008
U5050
C5052
R5031
R5000
no_refdes+6
J5001
R5095
L5060
R4921
L0562
R4922
U5070
C5070
D0560
L0560
L5016
D5000
L0561
D0561
C5082
C5051
DZ5090
DZ4901
L5014
R5032
R4911
R4952
R5096
R4953
D5001
DZ5095
C3753
C3752
C3751
C3750
XW3711
XW3710
XW3701
XW3700
C3714
no_refdes+1
C3705
C3704
C3703
U3700
C3713
U3710
C3715
R3700
820-2740-05 BOTTOM 絲印圖
no_refdes+3
J0520
R1202
C0718
FL0606
C0701
C0731 C0733
C1028
C0904
FL1000
C0786
C0784
C0907
C0902
C0726 C0728
C0789
C0643
C0749
J1900
no_refdes+2
R2617
R2603
R2604
R2605
R2606
R2601
R3200
R3201
R2635
C3231
R2609
C3200
R2625
R2623
C2610
C2611
R2624
R2622
C2606
C2609
R2629
R2627 R2628
C2620
C2605
Q3200
C3204
C3240
R3203
R2900
R0637
C0765
C0800
FL0605
R0630
C0644
R0638
R0671
C0753
C0709
C0757
C0702
C0704
C0724
C0751
C0746
C0706
C0747
C0743
C0748
C0744
C0736
C0792
C0719
C0700
C0785
C0705
C0787
C0820
C0729
C0740
R0625
R0628
C0770
R0629
R0627
C0775
C0777
C0776
C0774
C3202
C3241
R3210
R3204
Q3201
C2109
R2103
R0750
R0720
C2453
R3211
C0773
R0665
C0722
C0707
C0756
R0826
U0808
R1130
R1101
R0702
R0703
R1131
C2623
C3230
C3203
C2622
D2600
R3205
Q2451
R2450
C2452
R1106
U1105
U1101
Q2450
C1105
R1100
C1101C1100
C1416
C1401
FL1400
R2452
C1414
C2451
R2451
R2453
C1104
U1104
R1104
R1103
R1154
R1105
R1155
U1100
R3422
R3423
Q2603
R2632
R2626
R2636
Q2602
C1415
FL1402
R1401
C1412
C1410
C1404
C1403
C1402
FL1401
C3422
R2616
U3420
R2608
R2610
R2611
XW2600
U2600
C2600
XW2601
R2631
R2630
Q2601
R2618
C2603
R2614
C2607
R3421
C3421
C3420
R3420
R3401
R3400
C2601
C3402
R2602
R2600
R2621
C2612
R2620
R2613
R2615
L2600
R2607
C2602
Q2600
C2608
C3400
L3400
C3401
U3400
R1907
R1950
R1953
R1961
R1965
C1952
U1950
R1955
R1964
Q1953
R1963
R1954
R1951
R1962
Q1952
C1951
C1950
C1956
R1960
Q1951
C1953
C1957
R1906
R1956
Q1900
C1954
C1955
Q1904
R1916
DZ1900
L1950
F1900
C1913
C1910
C2410
C2461
C2460
C2411
C1904
C1905
R2402
R1914
Q1903
C1908
C1909
R1901
C1907
Q1901
C1903
R1910
L1900
R2409
C2409
R2410
C2400
U2400
C2401
C2405
R2405
C2402
R2404
R2403
R2406
Q2400
R1913
C2408
R1902
R1930
R1905
R1904
U1900
C1901
C1906
C1900
C2056 C2403
R2401
R2400
R2408
R1912
Q1902
R1900
R1915
R1911
R1903
C2110
R2102
C1902
C2006
C2001
R2113
DZ2100
C2026
C2004
C2023
C2010
C2020
C2027
C2036
C2018
C2019
C2003
C2009
C2021
C2024
C2022
C2007
C2002
C2000
C2017
L2400
XW2000
R2042
C2028
C2008
R2020
DZ1800
Q2005
D2000
C2044
R2019
R2021
C2005
L2003
C2043
C2030
C2106
L2001
C2105
C2102
C2015
C2038
L2002
C2016
XW0740
U2000
C2011
XW2001
R1940
XW2002
R1920
C1925
C1924
R1921
XW1920
R5102
DZ4900
R4822R4821
C2037
XW1900
C5157
R5103
R5100
R5157
C5100
R5133
R5134
C5150
C5151
R5110
R4910
R4801
R1003
R1004
R0664
R4802
C4800
C4801
C0723
C0921
R1043
R1200
R1008
C1026
U1009
R4800
R0786
R0689
R0617
R0632
C0618
R0688
R0624
R0661
C1015
FL0604
FL0904
C1071
C1020
C0606
C0608
C0713
C0646
C0645
C0714
C0742
C0725
C0735C0727
C0734
C0708
C0732
C0755
C0737
C0738
C0641
C0750
C0739
C0730
C0791
C0703
C0627
C0741
C0745
C0790
C0793
C0798
C0754
C0711
C0712
C0903
C0908
C0900
C0715
FL0900
C0901
R0704
C0905
D5100
C4900
R4806
R4807
R4805
C4810
U4801
R4820
R4951
C2050
R2043
C2035
C0923
C0752
C2039
U4800
R4808
R4809
C2051
U2001
C0909
FL0903
C0642
R4803
C4901
C2054
FL0907
C0831
C0924
C0927
C0913
C0910
C0925
C0926
C0911
FL0905
C0912
FL0906
R0760
FL0607
R0602
C0647
R0642
C0648
C0630
R0680
R0650
C0779
R0681
C0640
C0766
C0760
C0906
R0691
FL0901
C0758
C0710
R2044
C1938
R5151
R5150
C2045
R2000
C2046
C2047
R4950
Y2100
C2025
C2029
C2041
C2040
C2055
U3410
C3410
C3411
C3430
U3430
C3431
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
PAGE 30-31
GRAPE/GROUNDHOG
VICE BLOCK DIAGRAM
PG 7
I2S0
DISPLAYPORT
PAGE 10
VIDEO AMP
AMANDA PMU
PAGE 20
PORTRAIT 4099
PAGE 19
PG 9
P39
PG 7
PAGE 49
DP MUX
COMPOSITE
MICROPHONE
P39
STERO SPEAKERS
MIKEY L.
P42
AMP
P37
AMP
P37
IO EXPANDER
PAGE 20
PAGE 34
COMPASS
PG 10
I2C2
MOTION SENSOR
PAGE 34
MIPI->LVDS
PAGE 14-15
MLC
MIPI
COMP/SVIDEO
COMPOSITE
PAGE 34
GYRO SENSOR
ALS SENSOR
PAGE 45
CAMERA SENSOR FLEX
H3P
PAGE 50
L. DOCK
PG 36
PAGE 19
I2S AUDIO
SPI1
LVDS
LCD PANEL
PAGE 51
I2C0
PG 8
USB2.0
P. DOCK
PAGE 50
L. DOCK
P. DOCK
PAGE 51
I2S2
PG 7
MDDR
FMI0-1
SPI0
FLASH 8MBIT
SERIAL BOOT
VIDEO AMP
PG 67
NAND FLASH
ON STATE
256MB
LAND. 4099
P32
POWER PLANE
Voltage Rails
8/16/32/64
PG 8
COMP/SVIDEO
UART4
UART1
SPI2
PAGE 55
X15 MODULE
HIGHWAY BOARD
I2S1
PAGE 51
HIGHWAY BOARD
X7 AIRPORT +BT
UART3
SDIO
USB2.0
PG 6
CIRRUS L61
PG 35
USB DOCK MUX
USB2.0
PG 11
SERIAL BUFF/MUX
UART0
HEADSET L
UART
JTAG/UART
PAGE 10
PAGE 57
PROX SENS.
SYSTEM BLOCK DIAGRAM
SYNC_MASTER=ALEX
SYNC_DATE=05/02/2009
2 OF 119
B.0.0
051-8245
2 OF 53
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
DC INPUT PATH
LTC3442
BUCK/BOOST
3V3 POWER
EN
EN
POWER BLOCK DIAGRAM
EN
EN
B9 ADAPTER (5V)
PAGE 19
LTC4099
PAGE 19
BUCK / CHARGER
3.0-4.2V
BATTERY PACK
VCC_MAIN/3.0-4.7V
PAGE 24
LED DRIVER
APP001
BOOST
PAGE 26
LED/0.12A
GRAPE POWER
BOOST
18V/1MA
LDOS
USB (5V)
USB(5V)
3V3/1.2A
BUCK / CHARGER
LTC4099
TPS61045
PAGE 30
1.2V POWER
RP200Z121D
LDO
PAGE 20
1.2V/0.3A
BUCKS
1V8/1.5A MAX
CORE/2.0A MAX
ASHLEY
PAGE 20-21
3V3_LAND_ACC/0.15A MAX
1V2_H3/0.30A MAX
3V0_IO/0.10A MAX
3V1_AUDIO/0.25A MAX
3V0_VIDEO/0.10A MAX
3V0_OPTICAL/0.05A MAX
3V3_PORT_ACC/0.15A MAX
3V0_LCD/0.01A MAX
3V0_GRAPE/0.15A MAX
3V0_HP_BIAS/0.20A MAX
1V8_ALWAYS/0.002A MAX
1V1_H3_PHY/0.10A MAX
1V7_VA_VCP/0.10A MAX
SYNC_DATE=12/04/2009
SYNC_MASTER=MARK
POWER BLOCK DIAGRAM
3 OF 119
B.0.0
051-8245
3 OF 53
TABLE_5_ITEM
BOM OPTIONS
BOM GROUP
TABLE_BOMGROUP_HEAD
TABLE_BOMGROUP_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_BOMGROUP_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
Page Notes
BOM OPTIONS
PRODUCTION
JTAG_5_WIRE
JTAG_2_WIRE
DPMUX
SCH AND BOARD P/N
ADD DEVELOPMENT AND OTHER BOMS ONCE YOU GET BOM NUMBERS
16GB_FLASH_TOSH
16GB_FLASH
8GB_FLASH
8GB_FLASH_SAM
BKLT_PLL
CAMERA
DEVELOPMENT
AUD10
32GB_FLASH_SAM
MIKEY
LINE_OUT_2
LINE_OUT_1
PORTRAIT_DOCK
(NONE)
BOM options provided by this page:
COMMON
INTERNAL_MIC
LANDSCAPE_DOCK
LEFT_HS
SPEAKER
USE SCHUTIL BOMCONFIG TO GENERATE CONFIG FILE.
PUT CONFIG FILE AT SAME LEVEL AS .CPM FILE
USE "READ BOM-CONFIG" BUTTON ON DMS TO READ IN BOMS
BOM
OPTIONS
ALTERNATE
(NONE)
ALL AVAIL BOM OPTIONS
PROGRAMMABLE PARTS
Signal aliases required by this page:
32GB_FLASH
USE 825-6447
NEED MORE LINE ITEMS FOR OTHER CONFIGURATIONS
Power aliases required by this page:
VICE
BARCODE LABEL/EEE CODES
CRITICAL
EEE_32G_M
EEE FOR 639-0599 (32G)M
1
825-7456
EEE_D62
CRITICAL1EEE_16G_M
EEE FOR 639-0602 (16G)M
825-7456
EEE_D67
CRITICAL
EEE FOR 639-0601 (32G)
EEE_32G
1
825-7456
EEE_D66
CRITICAL
EEE_64G
EEE FOR 639-0598 (64G)
1
825-7456
EEE_D61
CRITICAL
EEE_16G
EEE FOR 639-0455 (16G)
1
825-7456
EEE_BWY
SYNC_DATE=08/06/2009
SYNC_MASTER=MIAMI
CONFIGURATION OPTIONS
1
DEV,VICE,MLB,K48M
DEV1 K48M_DEV085-1133
1
DEV,VICE,MLB,K48
DEV1
K48_DEV
085-1028
BASIC
COMMON,ALTERNATE
1
PCB1
PCBA,VICE,MLB,K48
820-2740
SCHEM,VICE,MLB,K48
051-8245 SCH1
1
AUDIO
LEFT_HS,SPEAKER,INTERNAL_MIC
CRITICAL
EEE_64G_M
EEE FOR 639-0600 (64G)M
825-7456
1
EEE_D63
4 OF 119
B.0.0
051-8245
4 OF 53
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
CRITICAL
MLB-MNT-TAB-K48
SM
CRITICAL
TOP-SM
SHLD-K48-FENCE-MLB-TOP
CRITICAL
BOT-SM
SHLD-K48-FENCE-MLB-BOT
TH
SL-1.2X0.40-1.95X1.15
NOSTUFF
NOSTUFF
TH
SL-1.2X0.40-1.95X1.15
TH
SL-1.2X0.40-1.95X1.15
NOSTUFF
TH
SL-1.2X0.40-1.95X1.15
NOSTUFF
SYNC_MASTER=MIAMI
SYNC_DATE=09/16/2009
FUNC/ICT TEST/BRACKETS
J0501
1
J0502
1
J0503
1
J0504
1
J0500
1
2
3
4
J0510
1
J0520
1
5 OF 119
B.0.0
051-8245
5 OF 53
HSIC_VDD121
HSIC_VDD122
PLL0_AVDD11
USB_BRICKID
USB_VBUS
USB_DM
USB_DP
USB_ANALOGTEST
USB_REXT
HSIC_DVDD
FUSE1_FSRC
CFSB
DDR1_CKEIN
HSIC_DVSS
HSIC_VSS121
HSIC_VSS122
PLL0_AVSS11
PLL1_AVSS11
PLL2_AVSS11
PLL3_AVSS11
USB_DVSS
USB_VSSAC
USB_VSSA0
USB_ID
EHCI_PORT_PWR2
EHCI_PORT_PWR1
EHCI_PORT_PWR0
USB11_D-
HSIC2_STB
HSIC1_DATA
RESETN
TESTMODE
JTAG_TRSTN
JTAG_SEL
JTAG_TMS
JTAG_TCK
JTAG_TRTCK
JTAG_TDO
JTAG_TDI
TST_CLKOUT
TST_STPCLK
WDOG
XI0
XO0
USB_VDD330
USB_DVDD
PLL2_AVDD11
PLL3_AVDD11
PLL1_AVDD11
USB11_D+
HSIC2_DATA
HSIC1_STB
SYMBOL 1 OF 9
GPIO6
GPIO2
SMII_SRDY
SMII_RRDY
SMII_SYNC
SMII_TXD
GPIO3
GPIO1
GPIO17
GPIO16
SENSOR_RST
SENSOR_CLK
GPIO_3V1
GPIO38
GPIO_3V0
GPIO36
GPIO37
GPIO35
GPIO34
GPIO33
GPIO31
GPIO32
GPIO30
GPIO28
GPIO29
GPIO26
GPIO27
GPIO25
GPIO24
GPIO23
GPIO21
GPIO22
GPIO20
GPIO19
GPIO18
GPIO15
GPIO14
GPIO13
GPIO11
GPIO12
GPIO10
GPIO8
GPIO9
GPIO7
GPIO5
GPIO4
GPIO0
SMII_CLK
SMII_RXD
SMII_PWR
SMII_WAKE
SMII_CLKSEL1
SMII_CLKSEL0
TMR32_PWM2
TMR32_PWM1
TMR32_PWM0
SPDIF
SYMBOL 6 OF 9
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
(NOSTUFF FOR SCAN DUMP CONFIG)
3.0V
(INT PD)
(INT PD)
(INT PD)
(INT PD)
(INT PD)
(INT PD)
(INT PD)
3.0V
(INT PD)
PER MICHAEL FRANK (EMAIL 2/25/09)
EHCI_PORT_PWR[0-2] NOT USED
(INT PD)
(INT PU)
(INT PU)
(INT PU)
1.2V
0 - PARALLEL
JTAGSEL
PER RADAR #6755237
1 - DAISY-CHAIN (FOR USE WITH 5-WIRE JTAG)
(INT PD)
22
MF
5%
1/20W
201
0201-1
80-OHM-0.2A-0.4-OHM
10%
10V
201
X5R
0.01UF
0.01UF
10%
10V
X5R
201
1%
201
MF
10K
1/20W
18PF
NP0-C0G
201
25V
5% 5%
18PF
201
NP0-C0G
25V
1/20W
1%
MF
201
1M
CRITICAL
SM-2
24.000MHZ-16PF-60PPM
MF
201
1%
100K
1/20W
16V
X7R
1000PF
10%
201
MF
220K
1/20W
201
1%
220K
1/20W
201
1%
MF
201
MF
1%
1/20W
42.2K
0
FBGA
H3P
256MB-DDR-FC
CRITICAL
5%
0
201
1/20W
MF
MF
1/20W
201
1%
100K
44.2
1%
1/20W
MF
201
0.01UF
X5R
10%
201
10V
10%
1UF
402
CERM
6.3V
100K
JTAG_TAP
H3P
256MB-DDR-FC
FBGA
CRITICAL
201
MF
1%
100K
1/20W
MF
1/20W
201
100K
1%
100K
1%
201
1/20W
MF
1%
201
MF
100K
1/20W
X5R
10%
201
10V
0.01UF
0.01UF
X5R
10V
10%
201
0
0
JTAG_TAP_NOT
MF
1/20W
5%
0
201
NOSTUFF
0
201
0
201
1/20W
1%
MF
201
84.5K
6.3V
CERM
402
1UF
10%
10V
201
10%
X5R
0.01UF
6.3V
CERM
402
1UF
10%
80-OHM-0.2A-0.4-OHM
0201-1
X5R
10%
201
10V
0.01UF
10%
1UF
402
CERM
6.3V
0201-1
80-OHM-0.2A-0.4-OHM
0.01UF
X5R
201
10V
10%
CERM
10%
1UF
402
6.3V
0201-1
80-OHM-0.2A-0.4-OHM
100K
100K
100K
MF
1/20W
201
100K
1% 1%
100K
201
1/20W
MF
1%
100K
201
1/20W
MF MF
1/20W
201
100K
1%
MF
1/20W
201
100K
1%
0
0
3.92K
NOSTUFF
201
1%
1/20W
MF
100K
GDZ-0201
GDZT2R5.1B
AP MAIN
SYNC_DATE=12/21/2009
SYNC_MASTER=JAMES
U0652
HYNIX DDR
339S0100 339S0084
PP1V1_PLL3_F
0.6MM
0.2MM
PP1V1_PLL1_F
0.6MM
0.2MM
0.6MM
0.2MM
PP1V1_PLL0_F
=PP1V1_HSIC
=PP1V2_HSIC
GRAPE_RESET_N
AP_GPIO29_BOARD_ID_3
FORCE_DFU
AP_GPIO25_BOARD_ID_1
COMPASS_RST_L
AUD_MIKEY_ENA
GPS_STANDBY_L
AP_GRAPE_HOST_INT_N
PP1V1_PLL2_F
0.6MM
0.2MM
GYRO_INT_L
USB_VBUS
VBUS_P
USB_BRICKID
AP_USB_BRICKID
L61_6MHZ_REFCLK
AP_6MHZ_REFCLK
0.2MM
0.6MM
PPVDD330_USB_AP
=PP1V1_PLL
=PP1V1_USB
KEEPACT
TP_AUDIENCE_RESET_L
RESET_L61_N
PMU_IRQ_L
IPC_SRDY
RESET_DET_N
BB_RST
RADIO_ON
AP_DDR1_CKEIN_1V2
RESET_L
AP_DDR1_CKEIN
AP_CFSB
MLC_RESET_L
=PP3V3_H3_USB
24M_O
XTAL_24M_I
XTAL_24M_O
NC_HSIC1_STB
NC_HSIC2_DATA
NC_USB11_DP
AP_TST_STPCLK
TP_TST_CLKOUT
AP_TDI
NC_AP_TDO
NC_AP_RTCK
AP_TCK
AP_TMS
AP_TESTMODE
NC_HSIC1_DATA
NC_HSIC2_STB
NC_USB11_DM
TP_USB_ID
USB_REXT
TP_USB_ANALOGTEST
USB_DP
USB_DM
=PP3V3_H3_USB
=PP3V0_IO_USB
PORT_USB_CHINA_DET
AUD_VOL_UP_L
AUD_VOL_DOWN_L
ONOFF_L
IO_XPNDR_INT_L
TP_CAM_SHUTDOWN_L
TP_CAM_CLK
TP_CAM_EN
ACCEL_INT2_L
PORT_DOCK_VIDEO_AMP_EN
ACCEL_INT1_L
ALS_INT_L
COMPASS_INT_L
LO_LS_REF_SEL
AP_GPIO32_4_DIAG
GPS_SYNC
DFU_STATUS
CODEC_IRQ_N
GRAPE_FW_DNLD_EN_L
LAND_USB_CHINA_DET
BT_WAKE
AUD_SPKRAMP_MUTE_N
RINGER_A
HOME_L
BACKLIGHT_EN
PROX_INT_L
IO_XPNDR_RST_L
GPS_RESET_L
HOME_L
=PP1V8_SDRAM_H3
=PP1V8_ALWAYS
AP_TCK
AP_TMS
AP_TDI
=PP1V8_H3
AP_GPIO28_BOARD_ID_2
PORT_DK_DDIS_CHG
LAND_DK_DDIS_CHG
DP_SW_SEL
DP_SW_SHUTDOWN_L
USB_MUX_OE_L
USB_MUX_SEL
AP_JTAG_SEL
RESET_1V8_N
AP_WDOG
PMU_RESET_IN
AP_GPIO39_BRD_REV0
AP_GPIO40_BRD_REV1
AP_GPIO41_BRD_REV2
AP_PT_DK_ADPTR
AP_LD_DK_ADPTR
FORCE_DFU
DFU_STATUS
COMPASS_RST_L
KEEPACT
RADIO_ON
AP_TRSTN
=PP1V8_H3
=PP1V8_SDRAM_H3
ONOFF_L
=PP1V8_SDRAM_H3
RINGER_A
JTAG_TRSTN_CTRL
R0640
1
2
FL0604
12
C0627
1
2
C0630
1
2
R0617
1
2
C0607
1
2
C0613
1
2
R0655
12
Y0602
24
13
R0632
12
C0618
1
2
R0670
12
R0671
12
R0688
1
2
R0691
12
U0652
V26
N7
Y10
Y9
AA9
F19
P25
R25
M27
M26
L27
L26
N17
N18
N16
N19
C18
B15
A19
C19
D18
B18
D19
E14
E15
D13
E13
F15
F14
N23
N24
B19
F23
K20
J20
R27
R26
N20
R23
P27
P26
R20
R21
R22
N21
N25
P22
R24
N22
F22
B12
A12
R0650
12
R0651
12
R0642
1
2
C0608
1
2
C0606
1
2
R0662
12
U0652
F6
B6
C5
C9
C6
D6
F5
E5
F9
F3
F4
C10
B7
F10
E10
A4
B4
E4
E2
D10
E9
L2
G1
D9
G2
E3
B3
A3
B2
H2
L1
H1
E1
D5
A6
A7
B9
E6
A9
W24
W25
W20
V21
K23
K18
K19
H19
K21
J18
K22
G19
G18
J19
R18
AB25
AB27
AB26
R0665
12
R0630
1
2
R0631
1
2
R0633
1
2
C0642
1
2
C0641
1
2
R0664
12
R0602
12
R0652
12
R0681
12
R0680
12
R0689
1
2
C0640
1
2
C0644
1
2
C0643
1
2
FL0605
12
C0646
1
2
C0645
1
2
FL0606
12
C0648
1
2
C0647
1
2
FL0607
12
R0647
12
R0646
12
R0645
12
R0635
1
2
R0636
1
2
R0637
1
2
R0638
1
2
R0639
1
2
R0677
12
R0786
12
R0624
12
R0721
1
2
DZ0600
1
2
6 OF 119
B.0.0
051-8245
6 OF 53
15
15
23
12
6
22
12
6
26 35
33
41
23
26
16
19 27
28 15
15
6
19
28
19
41
41
12
6
41
19 39
13
6
15
6
12 44
12
6
39 44
6
39 44
27 44
27 44
6
15
15
27
40
40
6
19 40
19 36
26
10
26
35
26 35
30
41
6
28
23
27
39
29
6
19 40
6
19 39
21
42
36
41
6
19 39
6 8
15
15 19
6
39 44
6
39 44
6
12 44
6 7 9
12 15 37
12
17
17
37
37
27
27
12
12
19
12
12
12
12
12
6
22
6
6
26 35
6
19
6
41
12
6 7 9
12 15 37
6 8
15
6
19 40
6 8
15
6
19 40
12
SDIO0_DATA0
SDIO0_DATA1
SDIO0_DATA2
I2S0_BCLK
I2S0_DIN
I2S0_DOUT
I2S0_LRCK
I2S0_MCK
SDIO0_CLK
SDIO0_CMD
SDIO0_DATA3
SPI0_SCLK
SPI0_MOSI
SPI0_MISO
SPI0_SSIN
SPI1_SCLK
SPI1_MOSI
SPI1_SSIN
SPI1_MISO
SPI2_SCLK
SPI2_MOSI
SPI2_MISO
SPI2_SSIN
I2S1_DIN
I2S1_DOUT
I2S1_BCLK
I2S1_LRCK
I2S1_MCK
I2S2_DIN
I2S2_DOUT
I2S2_BCLK
I2S2_LRCK
I2S2_MCK
I2C0_SDA
I2C0_SCL
I2C1_SDA
I2C1_SCL
I2C2_SDA
I2C2_SCL
SYMBOL 5 OF 9
UART6_CTSN
UART6_RTSN
UART6_RXD
UART6_TXD
UART5_RTXD
UART4_CTSN
UART4_RXD
UART4_TXD
UART3_CTSN
UART2_RTSN
UART1_RTSN
UART1_RXD
UART1_TXD
UART0_TXD
UART0_RXD
UART1_CTSN
UART3_RTSN
UART4_RTSN
UART3_RXD
UART3_TXD
UART2_CTSN
UART2_RXD
UART2_TXD
SYMBOL 7 OF 9
DDR0VDDQ
DDR1VDDQ
VDDIO30
VDDIOD5
VDDIOD4
VDDIOD3
VDDIOD2
VDDIOD1
VDDIOD0
VDDIO18
VDDIOD
VSS
VDD
SYMBOL 8 OF 9
SI
VCC
GND
SCK
CS*
HOLD*
NC
WP*
SO
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
(3.0V - FMI0_CEN[4-5],ENET)
I/O
(GPIO_3VX,UART0,CFSB,USB11)
BASE PKG
1.8V SERIAL FLASH
(PU IN H3)
(3.3V - FMI1)
(3.3V - FMI0)
(INT PU)
RETENTION
MDDR CKE
PLACE THE 27PF IN PAIRS AROUND THE IC
I/O
BOTTOM PKG
(1.2V)
MDDR I/O
(3.0V - I2C2)
(3.0V - SMII)
(3.0V - UART4)
PLACE THE 27PF IN PAIRS AROUND THE IC
40 PINS
1.2V - 1GHZ
1.1V - 800MHZ
CORE
3.0V
3.0V
PLACE NEAR U0652
20%
201
4V
CERM-X5R-1
0.47UF
201
4V
CERM-X5R-1
20%
0.47UF
201
4V
CERM-X5R-1
20%
0.47UF
201
4V
CERM-X5R-1
20%
0.47UF
201
4V
CERM-X5R-1
20%
0.47UF
6.3V
20%
603
X5R
10UF
20%
6.3V
X5R
603
10UF
27PF
NP0-C0G
25V
201
5%
25V
5%
27PF
NP0-C0G
201
25V
5%
27PF
NP0-C0G
201
5%
25V
201
NP0-C0G
27PF
X5R
0.1UF
6.3V
201
10%
0.1UF
201
10%
6.3V
X5R
20%
X5R
6.3V
201
0.22UF
20%
6.3V
201
X5R
0.22UF
6.3V
20%
X5R
201
0.22UF
X5R
20%
6.3V
201
0.22UF
201
20%
6.3V
X5R
0.22UF
6.3V
201
20%
X5R
0.22UF
6.3V
603
X5R
20%
10UF
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
20%
4V
CERM-X5R-1
0.47UF
6.3V
20%
X5R
201
0.22UF
6.3V
20%
X5R
201
0.22UF
6.3V
20%
X5R
201
0.22UF
X5R
201
20%
6.3V
0.22UF
201
20%
X5R
6.3V
0.22UF
20%
6.3V
X5R
201
0.22UF
20%
X5R
6.3V
201
0.22UF
6.3V
X5R
20%
201
0.22UF
X5R
20%
6.3V
201
0.22UF
20%
X5R
6.3V
201
0.22UF
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
SM
NOSTUFF
CERM
6.3V
10%
1UF
402
1UF
CERM
402
6.3V
10%
402
6.3V
10%
CERM
1UF
CERM
402
1UF
10%
6.3V
402
6.3V
10%
1UF
CERM
1UF
CERM
402
10%
6.3V
1UF
CERM
402
6.3V
10%
1UF
CERM
402
10%
6.3V
603
6.3V
20%
X5R
10UF
10UF
603
6.3V
X5R
20% 20%
X5R
6.3V
603
10UF
20%
X5R
6.3V
201
0.22UF 0.22UF
201
6.3V
X5R
20%
0.22UF
201
20%
6.3V
X5R
5%
25V
NP0-C0G
201
27PF
201
NP0-C0G
25V
5%
27PF
201
NP0-C0G
5%
25V
27PF
201
NP0-C0G
5%
25V
27PF
NP0-C0G
201
25V
5%
27PF
5%
201
NP0-C0G
25V
27PF
NP0-C0G
5%
25V
201
27PF
201
5%
25V
NP0-C0G
27PF
CRITICAL
H3P
FBGA
256MB-DDR-FC
1%
1K
1/20W
MF
201
1%
1K
1/20W
MF
201
1/20W
1K
201
1%
MF
1/20W
1%
1K
MF
201
1%
1K
1/20W
MF
201
1%
1/20W
1K
MF
201
CRITICAL
FBGA
H3P
256MB-DDR-FC
CRITICAL
256MB-DDR-FC
H3P
FBGA
201
6.3V
X5R
20%
0.22UF
201
6.3V
X5R
20%
0.22UF
X5R
6.3V
201
20%
0.22UF
X5R
6.3V
201
20%
0.22UF
33
201
MF
1/20W
1%
10%
201
0.1UF
6.3V
X5R
CRITICAL
SERIAL-SPI-8MB-1.8V
WLCSP11
AT25DF081UUN
20%
0.22UF
201
X5R
6.3V
20%
0.22UF
201
X5R
6.3V
100K
201
MF
1/20W
1%
201
20%
6.3V
X5R
0.22UF0.22UF
201
6.3V
X5R
20%
10UF
603
6.3V
X5R
20%
4.7UF
20%
6.3V
402
X5R
402
6.3V
20%
4.7UF
X5R-CERM
201
6.3V
X5R
20%
0.22UF0.22UF
20%
X5R
6.3V
201
MF
1/20W
100K
1%
201
MF
1/20W
201
0
5%
5%
82PF
0201
CERM
25V
AP PWR,AP BB&WIFI
SYNC_MASTER=JAMES
SYNC_DATE=12/21/2009
=PP1V8_H3
I2C2_SCL_3V0
=PP3V0_IO_H3
I2C2_SCL_3V0
WLAN_SDIO_CLK
H3_SDIO_CLK
H3_SDIO_CLK
FLASH_DOUT
IPC_SCLK
=PP1V8_H3
I2C0_SCL_1V8
I2C1_SDA_1V8
I2C1_SCL_1V8
I2C2_SDA_3V0
WLAN_SDIO_CMD
WLAN_SDIO_DATA<3>
WLAN_SDIO_DATA<2>
WLAN_SDIO_DATA<1>
FLASH_CLK
FLASH_DIN
I2C1_SCL_1V8
I2C2_SDA_3V0
I2C0_SCL_1V8
I2S1_MCK
AP_UART6_CTS_L
AP_UART6_RTS_L
AP_UART6_RXD
AP_UART6_TXD
AP_UART2_TXD
AP_UART3_CTS_L
FLASH_CS_N
AP_UART4_RXD
BB_USART0_RXD_CTRL
AP_UART2_RXD
AP_UART1_CTS_L
AP_UART1_TXD
AP_UART0_RXD
SFLASH_DOUT
AP_UART3_TXD
=PP1V8_NOR_FLASH
I2S1_DOUT
I2S0_DOUT
I2S0_DIN
=PP1V2_SDRAM_MDDR
=PP1V2_VDDIOD_H3
TP_I2S0_MCK
BB_I2S2_WA0
MAKE_BASE=TRUE
BB_I2S2_CLK
MAKE_BASE=TRUE
BB_I2S2_RX
MAKE_BASE=TRUE
BB_I2S2_TX
MAKE_BASE=TRUE
=PP3V0_IO_H3
PPVCORE_FB
=PPVCORE_H3
IPC_MISO
IPC_MOSI
AP_GRAPE_CS_N
AP_GRAPE_MISO
AP_GRAPE_MOSI
AP_GRAPE_SCLK
WLAN_SDIO_DATA<0>
=PP3V0_IO_H3
IPC_MRDY
BATTERY_SWI
AP_UART4_TXD
AP_UART1_RTS_L
AP_UART1_RXD
AP_UART0_TXD
AP_UART3_RTS_L
AP_UART3_RXD
UMTS_RXD_CTRL
FLASH_CS_N
FLASH_DOUT
FLASH_DIN
FLASH_CLK
MLC_WC_L
PROX_GPIO
I2S1_LRCLK
I2S0_LRCLK
I2S0_BCLK
I2C0_SDA_1V8
TP_I2S2_MCK
I2S2_LRCK
I2S2_DOUT
I2S2_DIN
I2C1_SDA_1V8
I2S1_DIN
I2S2_BCLK
I2C0_SDA_1V8
I2S1_BCLK
=PP3V3_NAND
C0704
1
2
C0703
1
2
C0702
1
2
C0701
1
2
C0700
1
2
C0753
1
2
C0754
1
2
C0737
1
2
C0738
1
2
C0739
1
2
C0740
1
2
C0780
1
2
C0779
1
2
C0731
1
2
C0732
1
2
C0733
1
2
C0734
1
2
C0735
1
2
C0736
1
2
C0752
1
2
C0745
1
2
C0746
1
2
C0747
1
2
C0748
1
2
C0749
1
2
C0750
1
2
C0751
1
2
C0728
1
2
C0727
1
2
C0726
1
2
C0725
1
2
C0724
1
2
C0729
1
2
C0730
1
2
C0787
1
2
C0786
1
2
C0785
1
2
C0784
1
2
C0757
1
2
C0755
1
2
C0798
1
2
C0789
1
2
C0790
1
2
C0791
1
2
C0792
1
2
C0793
1
2
XW0740
12
C0705
1
2
C0706
1
2
C0707
1
2
C0708
1
2
C0709
1
2
C0769
1
2
C0770
1
2
C0771
1
2
C0756
1
2
C0772
1
2
C0773
1
2
C0765
1
2
C0766
1
2
C0767
1
2
C0744
1
2
C0743
1
2
C0742
1
2
C0741
1
2
C0774
1
2
C0777
1
2
C0776
1
2
C0775
1
2
U0652
AB5
AB6
AB3
AB4
AC15
AD15
V23
W21
W22
V18
V20
V25
V24
W19
V15
AB22
Y26
R17
R16
AB23
W23
J21
K25
J24
J25
J26
J27
V6
W7
V4
W3
U2
W8
V3
V2
V7
AA1
AA2
W6
R0700
1
2
R0701
1
2
R0702
1
2
R0703
1
2
R0705
1
2
R0704
1
2
U0652
V27
Y27
Y1
V1
Y2
U1
V9
V10
W5
V5
AD5
R1
P3
R3
AD1
W4
AD6
AD2
V8
AC4
AC3
AC6
AC5
U0652
F13
N6
J10
J12
J13
J14
J15
J16
J17
J9
K10
K12
K9
L10
L12
L13
L14
L15
L16
L17
L9
M10
M12
M9
N10
N12
N13
N14
N15
P10
P12
R10
R12
R14
T10
U12
T12
T13
T14
T15
T16
T17
A10
A16
F1
N1
V22
W10
AB10
AC10
AD10
AE10
T21
U27
AB15
W18
AD22
V19
F18
H18
G13
H10
H9
J6
J7
J8
K8
N8
R8
A1
A18
AF10
AB13
AE9
AF1
AF11
AF23
AF16
AF17
AF2
AG1
C15
AG12
AB14
AF24
AF27
AF4
AF7
AG2
B10
B11
B16
A2
B17
AG23
AG26
AG27
B1
B20
B21
B5
B24
B26
A23
B27
C2
B8
C11
C17
D26
D11
D17
D2
E11
AD26
F26
E17
F11
F17
F2
G10
G11
G15
H17
H26
AE22
G17
G9
H11
H13
H15
J1
J11
J2
J3
J4
AD9
K13
J5
K11
A26
A27
AA17
AA10
AA11
AA15
AA26
AE17
AB2
AB11
AB17
AC11
AB9
AC13
AC17
AC2
AC9
AD11
AE2
AD17
C0715
1
2
C0714
1
2
C0713
1
2
C0712
1
2
R0826
12
C0820
1
2
U0808
B3
E3
C2
A4
F1
F4
D2
E2
C3
B2
D3
C0718
1
2
C0719
1
2
R0720
1
2
C0721
1
2
C0720
1
2
C0722
1
2
C0723
1
2
C0758
1
2
C0711
1
2
C0710
1
2
R0750
1
2
R0760
12
C0760
1
2
7 OF 119
B.0.0
051-8245
7 OF 53
6 7 9
12 15 37
7
12 13 17 26 35
7
11 13 15 37
7
12 13 17 26 35
39 45
7
7
7
41
6 7 9
12 15 37
7
17 19 26 28 33 36 44
7
44
7
44
7
12 13 17 26 35 44
39 45
39 45
39 45
39 45
7
7
12
7
44
7
12 13 17 26 35 44
7
17 19 26 28 33 36 44
12
12
12
12
12
11
12
7
12
11
11
11
11
12
12
15
12 44
12
12
8
15
15
41
41
41
41
7
11 13 15 37
18
15
41
41
23
23
23
23
39 45
7
11 13 15 37
41
17 19
12
11
11
12
12
12
11
7
7
7
12
7
14
42
12 44
12
12
7
17 19 26 28 33 36 44
7
44
12 44
7
17 19 26 28 33 36 44
12 44
8
15 43
VSS
VDD_MEM
VDDQ
SYMBOL 9 OF 9
FMI0_CEN3
FMI0_CEN2
FMI0_IO7
FMI0_IO2
FMI0_IO0
FMI0_IO1
FMI0_IO4
FMI0_IO5
FMI0_IO6
FMI0_CEN1
FMI0_CEN0
FMI0_IO3
FMI0_CEN5
FMI0_CEN4
FMI0_CLE
FMI0_ALE
FMI0_WEN
FMI0_REN
FMI1_CEN0
FMI1_CEN1
FMI1_CEN2
FMI1_CEN3
FMI1_CEN4
FMI1_CEN5
FMI1_CEN6
FMI1_CEN7
FMI1_CLE
FMI1_REN
FMI1_ALE
FMI1_WEN
FMI1_IO0
FMI1_IO1
FMI1_IO2
FMI1_IO3
FMI1_IO4
FMI1_IO5
FMI1_IO6
FMI1_IO7
ENET_MDC
ENET_MDIO
SYMBOL 4 OF 9
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
(3.0V FOR ALL I/O’S)
PLACE THE 27PF IN PAIRS AROUND THE IC
PLACE THE 27PF IN PAIRS AROUND THE IC
(1.8V)
TOP PKG
MDDR CORE
TOP PKG
MDDR I/O
(1.2V)
100K
MF
201
1/20W
1%
MF
100K
1%
1/20W
201
1/20W
201
MF
1%
100K
201
1%
MF
1/20W
100K
201
1/20W
MF
1%
100K
201
100K
1%
MF
1/20W
100K
MF
1/20W
1%
201 201
100K
MF
1/20W
1%
CRITICAL
FBGA
256MB-DDR-FC
H3P
5%
25V
NP0-C0G
201
27PF
201
NP0-C0G
25V
5%
27PF27PF
201
5%
NP0-C0G
25V
201
NP0-C0G
25V
5%
27PF
5%
25V
NP0-C0G
201
27PF27PF
201
NP0-C0G
5%
25V
27PF
201
25V
NP0-C0G
5%
27PF
201
5%
25V
NP0-C0G
1UF
6.3V
10%
402
CERM
0.22UF
6.3V
20%
X5R
201
0.22UF
6.3V
20%
X5R
201
0.22UF
X5R
20%
6.3V
201
0.22UF
20%
X5R
6.3V
201
0.22UF
20%
X5R
6.3V
201
0.22UF
201
X5R
20%
6.3V
CERM
402
10%
6.3V
1UF
CERM
402
10%
6.3V
1UF
CERM
402
10%
6.3V
1UF
CERM
402
10%
6.3V
1UF 1UF
6.3V
10%
402
CERM
1UF
6.3V
10%
402
CERM
CRITICAL
256MB-DDR-FC
H3P
FBGA
6.3V
402
X5R
4.7UF
20%
CERM
402
10%
6.3V
1UF1UF
6.3V
10%
402
CERM
1UF
6.3V
10%
402
CERM
1UF
6.3V
10%
402
CERM
201
X5R
20%
6.3V
0.22UF0.22UF
6.3V
20%
X5R
201201
20%
4V
CERM-X5R-1
0.47UF
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
201
4V
CERM-X5R-1
0.47UF
20%
CERM
402
10%
6.3V
1UF
CERM
402
10%
6.3V
1UF
CERM
402
10%
6.3V
1UF
201
X5R
20%
6.3V
0.22UF0.22UF
6.3V
20%
X5R
201
CERM
402
10%
6.3V
1UF
201
X5R
20%
6.3V
0.22UF0.22UF
6.3V
20%
X5R
201
27PF
201
NP0-C0G
25V
5%
27PF
5%
25V
NP0-C0G
201
25V
NP0-C0G
5%
201
27PF
27PF
5%
25V
NP0-C0G
201
100K
1/20W
MF
1%
201
1%
1/20W
201
MF
100K
100K
1%
MF
1/20W
201
MF
1%
1/20W
100K
201
1/20W
201
MF
1%
100K
1/20W
MF
1%
100K
201
100K
1%
MF
1/20W
201
100K
MF
1/20W
1%
201
201
1%
MF
1/20W
100K
1%
1/20W
201
MF
100K
201
1/20W
MF
1%
100K
1%
1/20W
MF
100K
201
1/20W
201
MF
1%
100K
201
100K
1%
MF
1/20W
100K
1%
MF
1/20W
201201
1%
1/20W
MF
100K
201
1%
MF
1/20W
100K
1%
1/20W
201
MF
100K
201
1/20W
MF
1%
100K
1%
1/20W
MF
100K
201
1/20W
201
MF
1%
100K
201
100K
1%
MF
1/20W
100K
1%
MF
1/20W
201201
1%
1/20W
MF
100K
SYNC_MASTER=JAMES
SYNC_DATE=12/21/2009
AP NAND & GPIO, NOR
F0CLE
F1CLE
F0ALE
F1ALE
F0WE_N
F1RE_N
F1WE_N
F0RE_N
=PP1V8_SDRAM_H3
=PP1V2_SDRAM_MDDR
F0CE0_N
F0CE1_N
F0CE3_N
F0CE2_N
F1CE0_N
F1CE1_N
F1CE2_N
=PP3V3_NAND
F0AD<7>
F0AD<2>
F0AD<0>
F0AD<1>
F0AD<4>
F0AD<5>
F0AD<6>
F0AD<3>
LAND_DK_HI_I
PORT_DK_HI_I
F0CLE
F0ALE
F0WE_N
F0RE_N
LAND_BRICK_ID_P
LAND_BRICK_ID_N
PORT_BRICK_ID_P
PORT_BRICK_ID_N
F1CLE
F1RE_N
F1ALE
F1WE_N
F1AD<0>
F1AD<1>
F1AD<2>
F1AD<3>
F1AD<4>
F1AD<5>
F1AD<6>
F1AD<7>
MLC_PWR_EN
LAND_DOCK_VIDEO_AMP_EN
F1AD<7>
F1AD<6>
F1AD<5>
F1AD<4>
F1AD<3>
F1AD<2>
F1AD<1>
F1AD<0>
F0AD<7>
F0AD<6>
F0AD<5>
F0AD<4>
F0AD<3>
F0AD<2>
F0AD<1>
F0AD<0>
F1CE3_N
=PP3V3_NAND
R0825
1
2
R0836
1
2
R0828
1
2
R0827
1
2
R0834
1
2
R0833
1
2
R0832
1
2
R0831
1
2
U0652
A11
A21
P1
T27
W27
AG10
F27
AB1
AE1
AG11
AG16
AG24
D1
D27
H27
M1
A17
A24
W1
N27
T1
A20
A8
AA27
A5
AC1
AD27
AG4
AG7
C1
K1
K27
K6
K7
L11
M11
M13
M14
M15
M16
M17
M2
N11
N2
N26
N3
N4
N5
N9
P11
P13
P14
P15
P16
P17
P2
P23
P24
P4
P5
P6
P9
R11
R13
R15
R2
R4
R5
R6
R7
R9
T11
T2
T26
U11
U13
U14
U15
U16
U17
U19
U22
U26
W17
W2
W26
W9
K14
K15
K16
K17
K2
K26
K3
K4
K5
C0832
1
2
C0819
1
2
C0818
1
2
C0817
1
2
C0816
1
2
C0815
1
2
C0814
1
2
C0813
1
2
C0806
1
2
C0804
1
2
C0803
1
2
C0802
1
2
C0801
1
2
C0800
1
2
C0805
1
2
C0807
1
2
C0808
1
2
C0809
1
2
C0810
1
2
C0811
1
2
C0812
1
2
U0652
K24
J22
AG19
AC18
AG17
AD18
AB19
J23
F25
AF18
AC19
AF15
AE18
AG15
AD19
AE19
AB18
AE15
AF19
AF22
AE23
AE27
AF20
AG20
AG18
AG25
AF25
AB24
AD23
AE26
AF26
AC22
AC23
AC27
AC25
AC26
AC24
AG22
AF21
AG21
C0831
1
2
C0830
1
2
C0829
1
2
C0828
1
2
C0827
1
2
C0826
1
2
C0825
1
2
C0824
1
2
C0823
1
2
C0822
1
2
C0821
1
2
C0854
1
2
C0853
1
2
C0852
1
2
C0851
1
2
C0850
1
2
C0862
1
2
C0861
1
2
C0860
1
2
C0873
1
2
C0872
1
2
C0871
1
2
C0870
1
2
R0857
1
2
R0856
1
2
R0855
1
2
R0854
1
2
R0853
1
2
R0852
1
2
R0851
1
2
R0850
1
2
R0867
1
2
R0866
1
2
R0865
1
2
R0864
1
2
R0863
1
2
R0862
1
2
R0861
1
2
R0860
1
2
R0877
1
2
R0876
1
2
R0875
1
2
R0874
1
2
R0873
1
2
R0872
1
2
R0871
1
2
R0870
1
2
8 OF 119
B.0.0
051-8245
8 OF 53
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
6
15
7
15
43 44
43 44
43 44
43 44
43 44
43 44
43 44
7 8
15 43
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
17
17
8
43 44
8
43 44
8
43 44
8
43 44
27
27
27
27
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
20
10
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
8
43 44
43 44
7 8
15 43
DP_PAD_TX0-
DP_PAD_TX1-
SMIA_RX_DATA+
SMIA_RX_DATA-
SMIA_RX_CLK+
MIPID_VDD11_PLL
DP_PAD_AVDD0
DP_PAD_AVDD1
DP_PAD_AVDDP0
DP_PAD_AVDDX
DP_PAD_DVDD
SMIA_VDD18
SMIA_VDD11
DP_PAD_DC_TP
SMIA_VSS18
DP_PAD_DVSS
DP_PAD_AVSSX
DP_PAD_AVSSP0
DP_PAD_AVSS1
MIPID_DPDATA2
MIPID_DNDATA2
MIPID_DNDATA0
MIPID_DPDATA1
MIPID_DNDATA1
MIPID_DNDATA3
MIPID_DPCLK
MIPID_DNCLK
MIPIC_DPDATA0
MIPI_VDD11
MIPID_VDD18
DP_HPD
SWI_DATA
MIPID_VREG_0P4V
DP_PAD_AVDD_AUX
DP_PAD_AUXN
DP_PAD_AUXP
MIPIC_DNCLK
MIPIC_DPCLK
MIPI_VSS
DP_PAD_AVSS_AUX
MIPID_DPDATA3
MIPIC_DNDATA0
MIPIC_DPDATA1
MIPIC_DNDATA1
DP_PAD_AVSS0
MIPID_DPDATA0
MIPI_VSYNC
SMIA_RX_CLK-
DP_PAD_TX1+
DP_PAD_TX0+
DP_PAD_R_BIAS
SYMBOL 2 OF 9
DIR
AB
VCCBVCCA
GND
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
NOTE: 0.6V ANALOG REF
(ANALOG DC TEST PORT)
P/N 311S0487
SAME PART AS APN:353S2652 BUT CE PREFERRED PART NUMBER
CRITICAL
H3P
256MB-DDR-FC
FBGA
201
6.3V
X5R
0.1UF
10%
10%
0.1UF
X5R
6.3V
201
10%
X5R
2.2NF
10V
201
201
0.01UF
10%
X5R
10V
5%
27PF
25V
201
NP0-C0G
80-OHM-0.2A-0.4-OHM
0201-1
201
6.3V
10%
0.1UF
X5R
27PF
NP0-C0G
201
5%
25V
0.01UF
10%
X5R
10V
201
201
4V
CERM-X5R-1
0.47UF
20%
201
6.3V
X5R
0.1UF
10%
6.3V
X5R
0.1UF
10%
201
6.3V
X5R
0.1UF
10%
201
6.3V
X5R
0.1UF
10%
201
201
10%
0.1UF
X5R
6.3V
10%
0.1UF
X5R
6.3V
201
10%
0.1UF
X5R
6.3V
201
5%
10K
201
1/20W
MF
0
MF
1/20W
5%
201
0
5%
1/20W
MF
201
1%
4.99K
1/20W
MF
201
0201-1
80-OHM-0.2A-0.4-OHM
0201-1
80-OHM-0.2A-0.4-OHM
0201-1
80-OHM-0.2A-0.4-OHM
0201-1
80-OHM-0.2A-0.4-OHM
0201-1
80-OHM-0.2A-0.4-OHM
80-OHM-0.2A-0.4-OHM
0201-1
80-OHM-0.2A-0.4-OHM
0201-1
6.3V
CERM
402
1UF
10%
10%
1UF
402
CERM
6.3V
10%
1UF
402
CERM
6.3V
10%
1UF
402
CERM
6.3V
10%
1UF
402
CERM
6.3V
10%
1UF
402
CERM
6.3V
CERM
10%
1UF
402
6.3V
BGA1
CRITICAL
SN74AVCH1T45
SYNC_MASTER=JAMES
SYNC_DATE=12/21/2009
AP RGB/CLCD,CAMERA
AP_SWI_R
MLC_SWI
=PP3V3_MLC
=PP1V8_H3
H3_DP_AUX_P
H3_DP_HPD
H3_DP_AUX_N
0.4MM
0.2MM
PP1V1_MIPI_PHY
=PP1V8_MIPI
H3_MIPID_0P4V
TP_H3_MIPIC_CLK_N
TP_H3_MIPIC_CLK_P
TP_H3_MIPIC_DATA_N<1>
TP_H3_MIPIC_DATA_P<1>
TP_H3_MIPIC_DATA_N<0>
TP_H3_MIPIC_DATA_P<0>
H3_MIPID_CLK_N
H3_MIPID_CLK_P
H3_MIPID_DATA_N<3>
H3_MIPID_DATA_P<3>
H3_MIPID_DATA_N<2>
H3_MIPID_DATA_P<2>
H3_MIPID_DATA_N<1>
H3_MIPID_DATA_P<1>
H3_MIPID_DATA_N<0>
H3_MIPID_DATA_P<0>
=PP1V1_MIPI_PLL
H3_DP_TX_P<0>
H3_DP_TX_N<0>
H3_DP_TX_P<1>
H3_DP_TX_N<1>
TP_CAM_SMIA_DATA_N
TP_CAM_SMIA_DATA_P
TP_CAM_SMIA_CLK_P
TP_CAM_SMIA_CLK_N
=PP1V1_MIPI
TP_DP_ANALOG_TEST
H3_DP_R_BIAS
SWI_BLCTRL
AP_SWI
=PP1V1_SMIA
=PP1V8_SMIA
=PP1V1_DPORT
=PP1V8_H3
=PP1V8_H3
=PP1V8_H3
=PP1V8_H3
0.2MM
0.4MM
H3_DP_AVDD
0.2MM
0.4MM
H3_DP_AVDDP0
0.2MM
0.4MM
H3_DP_AVDDX
0.2MM
0.4MM
H3_DP_DVDD
H3_SMIA_VDD18
0.2MM
0.4MM
0.2MM
0.4MM
H3_DP_AVDD_AUX
0.2MM
0.4MM
H3_SMIA_VDD11
DIFF_MIC_SEL
U0652
R19
E26
E27
E22
F24
C23
E23
C22
D22
E24
B23
D23
B22
A22
G27
G26
E25
C26
C27
B25
A25
Y18
Y15
W15
AA13
AG13
AE14
AF9
AF12
AE13
AG9
AF13
AG5
AF3
AE5
AF6
AG8
AF5
AG3
AE6
AG6
AF8
Y13
V13
W13
AG14
AF14
AD13
AD14
AA18
AC14
Y19
AA19
C0900
1
2
C0901
1
2
C0902
1
2
C0903
1
2
C0904
1
2
FL0900
12
C0905
1
2
C0906
1
2
C0907
1
2
C0908
1
2
C0909
1
2
C0910
1
2
C0911
1
2
C0912
1
2
C0913
1
2
C0951
1
2
C0950
1
2
R0950
1
2
R0952
12
R0953
12
R0920
1
2
FL0907
12
FL0906
12
FL0905
12
FL0904
12
FL0903
12
FL0902
12
FL0901
12
C0927
1
2
C0926
1
2
C0925
1
2
C0924
1
2
C0923
1
2
C0922
1
2
C0921
1
2
U0901
C1 C2
B2
B1
A1
A2
9 OF 119
B.0.0
051-8245
9 OF 53
13
13 14 15 25
6 7 9
12 15 37
37 45
37
37 45
15
14 45
14 45
14 45
14 45
14 45
14 45
14 45
14 45
14 45
14 45
15
37 45
37 45
37 45
37 45
15
19
15
15
15
6 7 9
12 15 37
6 7 9
12 15 37
6 7 9
12 15 37
6 7 9
12 15 37
34
DAC_AVDD30D
DAC_VREF
DAC_OUT2 DAC_IREF
DAC_COMP
DAC_AVSS30D
DAC_AVSS30A2
DAC_AVSS30A1
DAC_OUT1
DAC_OUT3
DAC_AVDD30A
SYMBOL 3 OF 9
CH.2OUT
EN
CH.3IN
CH.2IN
VS+
CH.1IN
CH.1OUT
CH.3OUT
GND
CH.2OUT
EN
CH.3IN
CH.2IN
VS+
CH.1IN
CH.1OUT
CH.3OUT
GND
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
CIN
YIN
CVBSIN
(YIN)
(CIN)
(CVBSIN)
NOTE: PLACE R1005,R1046-47 NEAR U0652
201
MF
75
1/20W
1%
JTAG_DAP
1%
1/20W
MF
201
200
200
1%
MF
1/20W
201
6.3V
0.1UF
201
X5R
10%
PORTRAIT_DOCK
1/20W
201
MF
1%
6.34K
6.3V
X5R
10%
201
0.1UF
75
1/20W
MF
1%
201
JTAG_DAP
1/20W
MF
201
1%
75
JTAG_DAP
MF
1/20W
200
1%
201
201
10%
X5R
6.3V
0.1UF
6.3V
0.1UF
201
X5R
10%
LANDSCAPE_DOCK
LANDSCAPE_DOCK
1/20W
MF
201
1%
75
75
LANDSCAPE_DOCK
1%
1/20W
201
MF
1/20W
100K
MF
201
5%
LANDSCAPE_DOCK
LANDSCAPE_DOCK
201
1%
MF
1/20W
75
CRITICAL
FBGA
256MB-DDR-FC
H3P
6.3V
X5R
10%
201
0.1UF
240-OHM-0.2A-0.8-OHM
0201
6.3V
CERM
1UF
10%
402
0.1UF
10%
X5R
6.3V
201
THS7319
PORTRAIT_DOCK
5%
201
MF
100K
NOSTUFF
SM
CRITICAL
LANDSCAPE_DOCK
THS7319
BGA
SYNC_DATE=12/21/2009
AP TVOUT
SYNC_MASTER=JAMES
353S2493
U1009,U1010
353S2684 INTERSIL
VIDEO_AGND
0.3MM
0.175MM
VIDEO_AGND
LAND_COUT
LAND_DOCK_VIDEO_AMP_EN
DAC_OUT1
DAC_OUT2
DAC_OUT3
=PP3V0_VIDEO_BUFFER
DAC_OUT2
PORT_DOCK_VIDEO_AMP_EN
DAC_OUT3
DAC_OUT1
VIDEO_AGND
=PP3V0_VIDEO_H3
PP3V0_DAC_AVDD_A
0.4MM
0.2MM
DAC_VREF
DOCK1_CVBS_PB
DOCK2_Y_PR
MAKE_BASE=TRUE
PORT_DOCK_Y_PR
DOCK2_CVBS_PB
MAKE_BASE=TRUE
PORT_DOCK_COMP_PB
DOCK2_C_Y
PORT_DOCK_C_Y
MAKE_BASE=TRUE
DAC_IREF
DAC_COMP
PORT_COUT
PORT_CVBS_OUT
PORT_YOUT
LAND_YOUT
MAKE_BASE=TRUE
LAND_DOCK_Y_PR
DOCK1_Y_PR
DOCK1_C_Y
=PP3V0_VIDEO_BUFFER
LAND_CVBS_OUT
MAKE_BASE=TRUE
LAND_DOCK_C_Y
LAND_DOCK_COMP_PB
MAKE_BASE=TRUE
BGA
CRITICAL
1/20W
R1004
12
R1046
1
2
R1047
1
2
C1026
1
2
R1012
1
2
C1015
1
2
R1003
12
R1043
12
R1005
1
2
C1014
1
2
C1030
1
2
R1050
12
R1051
12
R1053
1
2
R1052
12
U0652
C13
D14
B14
C14
D15
E18
A13
A15
A14
B13
E19
C1020
1
2
FL1000
12
C1028
1
2
C1071
1
2
U1009
A1A3
B1B3
C1C3
B2
A2 C2
R1008
1
2
XW1000
12
U1010
A1A3
B1B3
C1C3
B2
A2 C2
10 OF 119
B.0.0
051-8245
10 OF 53
10
10
45
8
10 45
10 45
10 45
10 15
10 45
6
10 45
10 45
10
15
38 45
12 39 45
12 39 45
12 39 45
45
45
45
45
38 45
38 45
10 15
45
GND
Y1
Y2
2OE*
A2
1OE*
A1
VCC
VCC
GND
A1 Y1
Y2
1OE
A2
2OE
S
GND
OUTPUT
MUX
SELECTOR
I1
I0
Y
VCC
S
GND
OUTPUT
MUX
SELECTOR
I1
I0
Y
VCC
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
201
X5R
6.3V
10%
0.1UF
100K
MF
201
1/20W
1%
X5R
201
6.3V
0.1UF
10%
K48M
CRITICAL
74LVC2G125
SOT833
K48M
CRITICAL
74LVC2G126GT/S500
SOT833
K48M_DEVELOPMENT
6.3V
201
X5R
10%
0.1UF
K48M_PRODUCTION
1/20W
0
5%
201
MF
K48M_DEVELOPMENT
74LVC1G157
SOT891
K48M_DEVELOPMENT
10%
201
6.3V
X5R
0.1UF
K48M_DEVELOPMENT
100K
1/20W
1%
MF
201
K48M_PRODUCTION
1/20W
MF
201
5%
0
K48M_DEVELOPMENT
201
MF
1%
1/20W
100K
K48M_DEVELOPMENT
SOT891
74LVC1G157
K48M_DEVELOPMENT
MF
100K
1%
1/20W
201
K48M_DEVELOPMENT
MF
100K
1%
1/20W
201
K48
201
MF
1/20W
0
5%
K48
201
MF
1/20W
0
5%
1M
1%
1/20W
MF
201
3G AND DEBUG MUXES
SYNC_DATE=12/21/2009
SYNC_MASTER=JAMES
LAND_DOCK_ACC_TO_POD
DOCK_UART_CTRL
LAND_DOCK_POD_TO_ACC
AP_UART4_TXD_MUX
LAND_DOCK_P17
BB_USART0_RXD_CTRL
AP_UART1_TXD
AP_UART1_CTS_L
BB_USART0_RTS_L
AP_UART1_RTS_L
BB_USART0_CTS_L
AP_UART1_RXD
BB_USART0_TXD
AP_UART4_RXD_MUX
LAND_DOCK_ACC_TO_POD
AP_UART4_RXD_MUX
AP_UART4_TXD_MUX
LAND_DOCK_POD_TO_ACC
=PP1V8_SDRAM_MISC
AP_UART2_RXD
BB_USART0_TXD
UMTS_TXD
=PP3V0_HP_DET_BIAS
=PP3V0_IO_H3
BB_USART0_RXD
=PP1V8_SDRAM_MISC
UMTS_RXD
=PP1V8_SDRAM_MISC
UMTS_RXD_CTRL
AP_UART2_TXD
LAND_DOCK_P14
C1100
1
2
R1100
1
2
C1101
1
2
U1100
2
5
4
1
7
8
6
3
U1101
2
5
4
1
7
8
6
3
C1104
1
2
R1103
12
U1104
2
3
1
6
5
4
C1105
1
2
R1104
1
2
R1105
12
R1154
1
2
U1105
2
3
1
6
5
4
R1106
1
2
R1155
1
2
R1130
12
R1131
12
R1101
1
2
11 OF 119
B.0.0
051-8245
11 OF 53
11 38
19
11 38
11 12
38
7
7
7
12
7
12
7
11 12
11 12
11 38 11 12
11 12 11 38
11 15 36
7
11 12
12
15 27 33 34 36 39
7
13 15 37
12
11 15 36
12
11 15 36
7
7
38
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
SPI0 (DVT AND BEYOND)
0000
DVT011
EVT 2
010
SPI0 WITH TEST MODE
0010
EVT 1
001
PROTO 3
000
000 PROTO3
011 K48 DEV
010 K48AP
BOARD_REV[2:0]
BOARD_ID[2:0]
FOR REFERENCE
CURRENT SETTING ->
1110 FMI0/1 4/4 CS W/TEST
1111 RESERVED
1101 FMI0/1 4/4 CS
1100 FMI0/1 2/2 CS
1010 FMI1 4CS W/TEST
0110 FMI0 4CS W/TEST
0010 SPI0 W/TEST
BOOT_CONFIG[3:0]
1001 FMI1 4 CS
1000 FMI1 2 CS
0111 RESERVED
0101 FMI0 4CS
0100 FMI0 2CS
0001 SPI1
0000 SPI0
0011 SPI1 W/TEST
BOARD ID <6> = BOARD_ID[2]
BOARD ID <4> = BOARD_ID[0]
BRD_REV[2-0]
BOARD REVISION
BOARD ID <0> = BOOT_CONFIG[0]
BOARD ID <1> = BOOT_CONFIG[1]
BOARD ID <2> = BOOT_CONFIG[2]
BOARD ID <3> = BOOT_CONFIG[3]
BOOT CONFIG ID
BOOT_CONFIG[3-0]
CODEC_IRQ_N (GPIO18)
ALIASES FROM PAGE 50
ALIASES FROM PAGE 11
ALIASES FROM PAGE 7
FLASH_DOUT
FLASH_CLK
BOARD ID <5> = BOARD_ID[1]
BOARD ID
010
011
BOARD_ID[2-0]
K48 AP
K48 DEV
ALIASES FROM PAGE 51
ALIASES FOR PAGE 57
NOTE: JTAG SCAN DUMP
3.92K
1/20W
MF
201
1%
3.92K
1%
201
MF
1/20W
NOSTUFF
JTAG_DAP
0
NOSTUFF
0
201
MF
1/20W
0
5%
JTAG_TAP
201
MF
1/20W
5%
JTAG_TAP
0
0
H3_A0_DAP
0
5%
1/20W
MF
201
JTAG_TAP
201
MF
1/20W
1%
3.92K
NOSTUFF
201
MF
1/20W
1%
3.92K
NOSTUFF
201
MF
1/20W
1%
3.92K
AP MISC & ALIASES
SYNC_DATE=12/21/2009
SYNC_MASTER=JAMES
DOCK2_CVBS_PB
AP_TRSTN
NC_AP_TDO
AP_TDO
TRUE
DOCK2_Y_PR
AP_TDI
DOCK2_C_Y
RESET_1V8_N
AP_LD_DK_ADPTR
LAND_DK_ADPTR
AP_PT_DK_ADPTR
PORT_DK_ADPTR
I2C2_SDA_3V0
I2C2_SCL_3V0
PROX_ACSHIELD
PROX_ACSHIELD_CONN
PROX_SCL_3V0
PROX_SDA_3V0
AP_UART3_RXD
MAKE_BASE=TRUE
FLASH_DIN
=PP1V8_H3
AUD_I2S_LRC_L61
MAKE_BASE=TRUE
I2S0_LRCLK
AUD_I2S_BITCLK_L61
MAKE_BASE=TRUE
I2S0_BCLK
AUD_I2S_SDIN_L61
MAKE_BASE=TRUE
I2S0_DOUT
AUD_I2S_SDOUT_L61
MAKE_BASE=TRUE
I2S0_DIN
BB_I2S1_WA0
MAKE_BASE=TRUE
I2S1_LRCLK
I2S1_DIN
BB_I2S1_CLK
MAKE_BASE=TRUE
I2S1_BCLK
BB_I2S1_TX
MAKE_BASE=TRUE
I2S1_DOUT
L61_I2S_MCLK
MAKE_BASE=TRUE
I2S1_MCK
PORT_DOCK_ACC_TO_POD
MAKE_BASE=TRUE
AP_UART0_RXD
BB_USART0_TXD_CONN
MAKE_BASE=TRUE
BB_USART0_TXD
BB_USART0_RXD_CONN
MAKE_BASE=TRUE
BB_USART0_RXD
BB_USART0_RTS_L_CONN
MAKE_BASE=TRUE
BB_USART0_RTS_L
BB_USART0_CTS_L_CONN
MAKE_BASE=TRUE
BB_USART0_CTS_L
UMTS_RXD_CONN
MAKE_BASE=TRUE
UMTS_RXD
UMTS_TXD_CONN
MAKE_BASE=TRUE
UMTS_TXD
AP_UART4_TXD_MUX
AP_UART4_TXD
MAKE_BASE=TRUE
AP_UART4_RXD_MUX
AP_UART4_RXD
MAKE_BASE=TRUE
LAND_USB_PWR
USB_PWR_A
MAKE_BASE=TRUE
MAKE_BASE=TRUE
AP_UART3_TXD
MAKE_BASE=TRUE
AP_UART3_CTS_L
MAKE_BASE=TRUE
AP_UART3_RTS_L
CONN_AP_UART3_RXD
CONN_AP_UART3_TXD
CONN_AP_UART3_CTS_L
CONN_AP_UART3_RTS_L
=PP1V8_H3
AP_GPIO25_BOARD_ID_1
NC_BOARD_ID_3
MAKE_BASE=TRUE
NC_BOARD_ID_2
MAKE_BASE=TRUE
AP_JTAG_SEL
JTAG_TRSTN_CTRL
AP_TRSTN
AP_GPIO29_BOARD_ID_3
AP_GPIO41_BRD_REV2
MAKE_BASE=TRUE
BB_I2S1_RX
BB_FLASH_ACTIVE
MAKE_BASE=TRUE
AP_GPIO39_BRD_REV0
AP_GPIO40_BRD_REV1
AP_GPIO41_BRD_REV2
GPS_UART_RX
MAKE_BASE=TRUE
AP_UART6_TXD
GPS_UART_TX
MAKE_BASE=TRUE
AP_UART6_RXD
AP_UART6_CTS_L
AP_UART6_RTS_L
GPS_UARTS_CTS_L
MAKE_BASE=TRUE
MAKE_BASE=TRUE
GPS_UARTS_RTS_L
AP_GPIO28_BOARD_ID_2
AP_UART0_TXD
MAKE_BASE=TRUE
PORT_DOCK_POD_TO_ACC
BB_RST_RADIO
MAKE_BASE=TRUE
BB_RST
R0625
1
2
R0622
1
2
R0663
12
R0661
12
R1200
12
R1202
12
R1203
12
R1201
12
R0627
1
2
R0628
1
2
R0629
1
2
12 OF 119
B.0.0
051-8245
12 OF 53
10 39 45
6
12
6
44
10 39 45
6
44
10 39 45
6
6
16
6
16
7
13 17 26 35 44
7
13 17 26 35
42
42
42
42
7
7
6 7 9
12 15 37
28
7
28
7
28
7
28
7
32 41
7
44
7
44
32 41
7
44
32 41
7
44
28
7
39
7
41
11
41
11
41
11
41
11
41
11
41
11
11
7
11
7
38
16
7
7
7
39
39
39
39
6 7 9
12 15 37
6
6
6
6
12
6
6
12
32 41
41
6
6
6
12
41
7
41
7
7
7
41
41
6
7
39
41
6
MONITOR5
VDD33A_OSC
VSYNC
PPC
MONITOR6
MONITOR4
TCLKN
TEST
MONITOR1
S_DNDATA2
S_DPDATA2
S_DNDATA1
S_DPDATA1
S_DPDATA0
S_DNDATA0
VDD33A_18LDO
VDD33A_12LDO_1
VDD33A_12LDO_0
VDD33A_12LDO_2
VDD33P_LVDS
VDD33A_LVDS
VDD33D_LVDS
TCLKP
TCN
TCP
TBN
TBP
TAN
TAP
PWM
VSS33A_18LDO
VSS33A_12LDO_0
VSS33A_12LDO_1
VSS33A_LVDS
MONITOR3
MONITOR2
MONITOR0
M_DPDATA0
S_DPCLK
S_DNCLK
M_DNDATA0
TDP
TDN
ROUT_LVDS
SWI
RESET*
VSS33D_LVDS
VSS12D_PLL
VSS33P_LVDS
MLC_SCL
MLC_SDA
EDID_SCL
EDID_SDA
M_DPCLK
M_VREG_0P4V
M_DNCLK
CAP_12LDO_5
CAP_12LDO_3
CAP_12LDO_1
CAP_12LDO_0
CAP_18LDO
BIST
S_DNDATA3
S_DPDATA3
WC*
E2
E0
SDASCL
E1
VSS
VCC
EEPROM
THM_P
D
GS
PP
PP
PP
PP
PP
PP
PP
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
MLC EEPROM:RAW APN 335S0661
MLC
SELECTED I2C
MLC CAN READ
H3P CAN WRITE
WC_L
USB MUX TABLE
1
0
STUFF R1499/R1498 TO BYPASS I2C SWITCHES
PLACE ON TOP OF PADS FOR U1402/U1403
I2C MUXING CIRCUITRY
WHEN WC_L IS LOW, CAN WRITE TO EEPROM
WHEN WC_L IS HIGH, CANNOT WRITE TO EEPROM
8.45K
1%
1/20W
MF
201
201
10V
2.2NF
X5R
10%
FBGA1
S6T2MLC
OMIT
MLP
M24C64
0201-1
80-OHM-0.2A-0.4-OHM
0201-1
80-OHM-0.2A-0.4-OHM
80-OHM-0.2A-0.4-OHM
0201-1
4.7UF
402
20%
6.3V
X5R-CERM
4.7UF
20%
6.3V
402
X5R-CERM
4.7UF
6.3V
402
X5R-CERM
20%
CERM
10V
20%
0.1UF
402
20%
0.1UF
402
CERM
10V
0.1UF
CERM
10V
402
20%
4.7UF
20%
6.3V
X5R-CERM
402
201
MF
1/20W
1%
100K
201
100K
1/20W
MF
1%
201
1%
1/20W
MF
10K
402
20%
4.7UF
X5R-CERM
6.3V
MLC_DEV
BGA
SN74LVC2G66YZPR
MLC_DEV
BGA
SN74LVC2G66YZPR
MLC_DEV
BGA
SN74LVC2G66YZPR
MLC_DEV
BGA
SN74LVC2G66YZPR
201
MF
1/20W
5%
4.7K
201
MF
5%
1/20W
4.7K
MLC_PROD
1/20W
5%
0
201
MF
MLC_PROD
5%
0
201
1/20W
MF
MLC_DEV
SOD-VESM-HF
SSM3K15FV
MLC_DEV
100K
1%
201
MF
1/20W
201
NOSTUFF
100K
1/20W
1%
MF
110K
1%
1/20W
MF
201
1%
MF
1/20W
100K
201
P4MM
SM
NOSTUFF
NOSTUFF
P4MM
SM
6.3V
20%
4.7UF
402
X5R-CERM
SM
P4MM
NOSTUFF
SM
P4MM
NOSTUFF
NOSTUFF
P4MM
SM
SM
P4MM
NOSTUFF
NOSTUFF
P4MM
SM
402
0.1UF
20%
10V
CERM
25V
CERM
0201
82PF
5%
20%
402
4.7UF
X5R-CERM
6.3V
1
U1401
CRITICAL
54MHZ_PANEL
341S2604
MLC EEPROM 54MHZ LVDS,2MHZ SWI
MLC EEPROM 100MHZ LVDS,2MHZ SWI
1
U1401
CRITICAL
100MHZ_PANEL
341S2606
SYNC_DATE=09/16/2009
SYNC_MASTER=MIAMI
MLC
=PP3V3_MLC
MIN_LINE_WIDTH=0.4 MM
MAX_NECK_LENGTH=3 MM
VOLTAGE=3.3V
PP3V3_MLC_18LDO_12LDO
MIN_NECK_WIDTH=0.2 MM
NET_SPACING_TYPE=PWR
MLC_MIPID_DATA_P<2>
=PP3V3_MLC_EEPROM
MLC_SDA_3V3
NC_MASTER_MIPI_CLK_N
=PP3V3_MLC
MLC_VREG_0V4
MLC_MUX_SCL_3V3
MLC_MIPID_DATA_P<0>
MLC_MIPID_CLK_N
MLC_MIPID_CLK_P
NC_MASTER_MIPI_DAT_N
NC_MASTER_MIPI_DAT_P
NC_MASTER_MIPI_CLK_P
MLC_MONITOR0_PD
ROUT_LVDS
NC_MONITOR3
NC_MONITOR2
NC_MONITOR1
MLC_MIPID_DATA_N<0>
=PP3V0_IO_H3
MIN_LINE_WIDTH=0.4 MM
VOLTAGE=1.2V
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MIN_NECK_WIDTH=0.2 MM
MLC_CAP_1V2LDO_0
MLC_CAP_1V2LDO_1_3
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
VOLTAGE=1.2V
MIN_NECK_WIDTH=0.2 MM
MIN_LINE_WIDTH=0.4 MM
MLC_CAP_1V2_LDO_5
MAX_NECK_LENGTH=3 MM
VOLTAGE=1.2V
NET_SPACING_TYPE=PWR
MLC_SCL_3V3
=PP3V3_MLC
MLC_2MUX_SDA_3V3
MLC_2WC_L
MLC_WC
I2C2_SCL_3V0
MLC_2WC_L
MLC_WC
I2C2_SDA_3V0
MLC_2MUX_SCL_3V3
=PP3V0_IO_H3
=PP3V0_IO_H3
=PP3V3_MLC
=PP3V0_IO_H3
MLC_CAP_1V8LDO
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
LVDS_DDC_DATA
LVDS_DDC_CLK
MLC_MIPID_DATA_P<3>
MLC_MIPID_DATA_N<3>
MLC_SDA_3V3
MLC_SCL_3V3
MLC_RESET_L
MLC_SWI
NC_LVDS_DATA_N<3>
NC_LVDS_DATA_P<3>
LCD_BKLT_PWM
LVDS_DATA_P<0>
LVDS_DATA_N<0>
LVDS_DATA_P<1>
LVDS_DATA_N<1>
LVDS_DATA_P<2>
LVDS_DATA_N<2>
LVDS_CLK_P
MLC_MIPID_DATA_P<1>
MLC_MIPID_DATA_N<1>
MLC_MIPID_DATA_N<2>
LVDS_CLK_N
NC_MONITOR4
NC_MONITOR6
MLC_PPC_OUT
TP_MLC_VSYNC
NC_MONITOR5
MLC_MIPID_CLK_P
MLC_MIPID_CLK_N
MLC_TEST
MLC_BIST
MLC_SWI
MLC_MUX_SDA_3V3
MLC_2WC_L
MIN_LINE_WIDTH=0.4 MM
VOLTAGE=3.3V
PP3V3_MLC_DIG_12LDO
MIN_NECK_WIDTH=0.2 MM
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MLC_MIPID_DATA_P<3>
MLC_MIPID_DATA_N<3>
MLC_MIPID_DATA_N<0>
MLC_MIPID_DATA_P<0>
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.2 MM
PP3V3_MLC_LVDS
MIN_LINE_WIDTH=0.4 MM
MLC_WC
C1400
1
2
C1403
1
2
C1401
1
2
C1402
1
2
R1401
1
2
C1404
1
2
U1400
B7
E3
H7
A7
A4
C3
A8
B6
C2
B2
C1
B1
B3
A6
A5
H5
G3
G4
G5
F4
E4
D3
G6
D4
B5
C5
F2
D2
E2
G2
H2
F1
D1
E1
G1
H1
H6
G7
G8
F7
F8
C7
C8
E7
E8
D7
D8
B8
F3H8B4A2C6H4E5
D5
A3
H3C4A1
D6F6E6
F5
U1401
1
2
3
65
984
7
FL1400
12
FL1401
12
FL1402
12
C1410
1
2
C1411
1
2
C1412
1
2
C1413
1
2
C1414
1
2
C1415
1
2
R1402
1
2
R1403
1
2
R1406
1
2
U1403
D2 C2
C1
D1
A2
U1403
A1 B1
B2
D1
A2
U1402
A1 B1
B2
D1
A2
U1402
D2 C2
C1
D1
A2
R1404
1
2
R1405
1
2
R1499
12
R1498
12
Q1490
3
1
2
R1497
1
2
R1408
1
2
R1407
1
2
R1410
1
2
PP1400
1
PP1408
1
PP1401
1
PP1409
1
PP1410
1
PP1411
1
PP1412
1
C1417
1
2
C1416
1
2
14 OF 119
B.0.0
051-8245
13 OF 53
9
13 14 15
25
14
14
13
9
13 14 15 25
14
13 14
13 14
13 14
13 14
7
11 13 15 37
13
9
13 14 15 25
14
13 14
13
7
12 17 26 35
13 14
13
7
12 17 26 35 44
14
7
11 13 15 37
7
11 13 15 37
9
13 14 15 25
7
11 13 15 37
25
25
13 14
13 14
13
13
6
9
13
21
25 45
25 45
25 45
25 45
25 45
25 45
25 45
14
14
14
25 45
25
13 14
13 14
9
13
14
13 14
13 14
13 14
13 14
13 14
13
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
MLC ALIASES
SYNC_DATE=09/16/2009
MLC ALIASES
SYNC_MASTER=MIAMI
H3_MIPID_DATA_P<3>
MAKE_BASE=TRUE
H3_MIPID_DATA_P<2>
MAKE_BASE=TRUE
MLC_MIPID_DATA_P<2>
=PP3V3_MLC
MLC_WC_L
MLC_MIPID_CLK_P
MLC_MIPID_CLK_N
MLC_MIPID_DATA_P<1>
MLC_MIPID_DATA_P<0>
MLC_MIPID_DATA_N<3>
MLC_MIPID_DATA_P<3>
MLC_MIPID_DATA_N<0>
MLC_MIPID_DATA_N<1>
MLC_MIPID_DATA_N<2>
MLC_2MUX_SDA_3V3
MLC_2MUX_SCL_3V3
H3_MIPID_DATA_P<1>
MAKE_BASE=TRUE
H3_MIPID_DATA_N<1>
MAKE_BASE=TRUE
H3_MIPID_DATA_N<2>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
H3_MIPID_DATA_N<3>
H3_MIPID_CLK_P
MAKE_BASE=TRUE
H3_MIPID_CLK_N
MAKE_BASE=TRUE
H3_MIPID_DATA_P<0>
MAKE_BASE=TRUE
H3_MIPID_DATA_N<0>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MLC_MUX_SDA_3V3
MLC_MUX_SCL_3V3
MAKE_BASE=TRUE
MLC_2WC_L
MAKE_BASE=TRUE
=PP3V3_MLC_EEPROM
15 OF 119
B.0.0
051-8245
14 OF 53
9
45
9
45 13
9
13 15 25
7
13
13
13
13
13
13
13
13
13
13
13
9
45
9
45
9
45
9
45
9
45
9
45
9
45
9
45
13
13
13
13
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
THE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER
SIZE
D
R
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
21
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
87 54 21
POWER CONN / ALIAS
(REPLACE WITH 155S0243 IF NEED FILTER)
LDO RAILS
PROGRAMMABLE ON/OFF
BUCK RAILS
CHARGER MAIN
BATTERY
5%
0
1/4W
FF-LF
1206
SYNC_DATE=12/04/2009
SYNC_MASTER=MARK
Power Conn / Alias
MAKE_BASE=TRUE
VOLTAGE=3.3V
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
PP3V3_OUT
=PP3V3_AUDIO
=PP3V3_H3_USB
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
MAKE_BASE=TRUE
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
PP1V8_SDRAM
=PP1V8_SDRAM_GPS
=PP1V8_SDRAM_1V2
MIN_NECK_WIDTH=0.2 MM
MIN_LINE_WIDTH=0.4 MM
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
VOLTAGE=3.3V
PP3V3_MLC_OUT
=PP3V3_MLC
=PP3V3_NAND
=PP3V3_LCD
VOLTAGE=5.1V
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
MAX_NECK_LENGTH=3 MM
MIN_NECK_WIDTH=0.2 mm
MIN_LINE_WIDTH=0.4 MM
PP5V1_OUT
=PP5V1_LED
MIN_LINE_WIDTH=0.6 MM
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=20.4V
PPLED_OUT
=PPLED_REG
=PP1V8_MIPI
=PP1V8_SMIA
=PP1V8_NOR_FLASH
=PP1V8_H3
=PP1V8_AUDIO
=PP1V8_CHGR
=PP1V8_SMS
=PP1V8_CAM
MIN_LINE_WIDTH=0.3 MM
VOLTAGE=1.8V
MIN_NECK_WIDTH=0.2 mm
MAKE_BASE=TRUE
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
PP1V8_GRAPE
=PP1V8_GRAPE
MIN_NECK_WIDTH=0.2 mm
MIN_LINE_WIDTH=0.6 mm
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
PP1V8
VOLTAGE=1.8V
=PP1V2_HSIC
PP1V2_H3
VOLTAGE=1.2V
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2 mm
MIN_LINE_WIDTH=0.6 MM
=PP1V2_VDDIOD_H3
PP1V2_SDRAM
VOLTAGE=1.2V
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2 MM
MIN_LINE_WIDTH=0.6 MM
=PP1V2_SDRAM_MDDR
VOLTAGE=1.8V
MIN_NECK_WIDTH=0.1 MM
MIN_LINE_WIDTH=0.2 MM
PP1V8_ALWAYS
MAKE_BASE=TRUE
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
=PP1V8_ALWAYS
=PP1V1_USB
=PP1V1_HSIC
=PP1V1_MIPI
=PP1V1_MIPI_PLL
=PP1V1_DPORT
=PP1V1_SMIA
=PP1V1_PLL
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
MAKE_BASE=TRUE
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
PP1V7_VA_VCP
VOLTAGE=1.7V
=PP1V7_VA_VCP
=PP3V0_HP_DET_BIAS
MIN_LINE_WIDTH=0.5 MM
VOLTAGE=1.2V
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
PP1V2_AUDIENCE
MIN_NECK_WIDTH=0.2 mm
=PP1V2_AUDIO
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2 mm
PP3V0_LCD
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.3 MM
=PP3V0_LCD
=PP3V0_IO_USB
=PP3V0_IO_CHGR
=PP3V0_IO_3V3
=PP3V0_IO_H3
=PP3V0_IO_SMS
PP3V3_PORT_ACC
VOLTAGE=3.3V
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
=PP3V3_PORT_ACC
MIN_LINE_WIDTH=0.2MM
VOLTAGE=3.3V
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
PP3V3_LAND_ACC
MIN_NECK_WIDTH=0.1MM
=PP3V3_LAND_ACC
=PP3V0_OPTICAL
=PP3V0_VIDEO_H3
=PP3V0_DPMUX
=PP3V0_VIDEO_BUFFER
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 mm
MAKE_BASE=TRUE
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
PP1V1_H3_PHY
VOLTAGE=1.1V
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2 mm
PP3V0_VIDEO
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.6 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
MAKE_BASE=TRUE
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
MIN_NECK_WIDTH=0.2 MM
MIN_LINE_WIDTH=0.6 MM
VOLTAGE=3.0V
PP3V0_IO
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MIN_NECK_WIDTH=0.25 MM
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6 MM
VOLTAGE=4.2V
BATT_POS_F
=BATT_POS_F_3G
=PP1V8_SDRAM_MISC
=PP1V8_SDRAM_WL
=VCC_MAIN_3V3
=PP1V8_SDRAM_H3
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2 mm
MIN_LINE_WIDTH=0.6 mm
PP3V0_GRAPE
VOLTAGE=3.0V
VOLTAGE=3.1V
PP3V1_AUDIO
MIN_NECK_WIDTH=0.2 mm
MAKE_BASE=TRUE
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
MIN_LINE_WIDTH=0.6 mm
=PP3V1_AUDIO
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.6 MM
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
PPVCORE_H3
=PPVCORE_H3
=VCC_MAIN_LED
=VCC_MAIN_AUDIO
=VCC_MAIN_WL
=PP3V0_GRAPE
=PP3V0_GRAPE_Z2
=PP3V0_GRAPE_Z1
=PP3V0_GRAPE_MARIO2
=PP3V0_GRAPE_MARIO1
=PP3V0_GRAPE_MARIO3
=VCC_MAIN_DOCK
=VCC_MAIN_ASH
VOLTAGE=4.7V
PPVCC_MAIN
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
BATT_POS
BATT_POS_F
MIN_LINE_WIDTH=0.4MM
PP3V0_HP_DET_BIAS
MAX_NECK_LENGTH=3 MM
MIN_NECK_WIDTH=0.2MM
MAKE_BASE=TRUE
VOLTAGE=3.0V
NET_SPACING_TYPE=PWR
MAKE_BASE=TRUE
PP3V0_OPTICAL
VOLTAGE=3.0V
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
MIN_NECK_WIDTH=0.20MM
NET_SPACING_TYPE=GND
MAX_NECK_LENGTH=5 MM
GND
MAKE_BASE=TRUE
VOLTAGE=0V
MIN_LINE_WIDTH=0.6 MM
R1940
12
17 OF 119
B.0.0
051-8245
15 OF 53
20
28
6
18
41
18
20
9
13 14 25
7 8
43
25
18 21
21 25
9
9
7
6 7 9
12 37
28
17
26 42
18 23
18 19
6
18
7
18
7 8
18
6
19
6
6
9
9
9
9
6
18 28
11 27 33 34 36 39
18
18 21
6
17
20
7
11 13 37
26 42
18 39
18 38
35
10
37
10
18
18
18
15 17 41
11 36
39
20
6 8
18
18 28 30
18
7
21
22 29
39
23 24
24
24
23
38 39
18
17
17 15 17
18
18
Loading...