Analog Devices SSM2017 Datasheet

Self-Contained

REFERENCE

1
2
3
4

8

7
6

5

TOP VIEW

(Not to Scale)

–IN

+IN

V–

V+

OUT

RG

2

RG

1

SSM2017

a

FEATURES
Excellent Noise Performance: 950 pV/√

Noise Figure

Ultralow THD: < 0.01% @ G = 100 Over the Full Audio

Band
Wide Bandwidth: 1 MHz @ G = 100
High Slew Rate: 17 V/ms typ
Unity Gain Stable
True Differential Inputs
Subaudio 1/f Noise Corner
8-Pin Mini-DIP with Only One External Component

Required
Very Low Cost
Extended Temperature Range: –408C to +858C

APPLICATIONS
Audio Mix Consoles
Intercom/Paging Systems
Two-Way Radio
Sonar
Digital Audio Systems

Hz or 1.5 dB

Audio Preamplifier

SSM2017

FUNCTIONAL BLOCK DIAGRAM

V–

+IN

RG

RG

2

–IN

1

5kΩ

5kΩ

X1

PIN CONNECTIONS

Epoxy Mini-DIP (P Suffix)

X1

5kΩ

5kΩ

SSM2017

5kΩ

5kΩ

REFERENCE

V+

OUT

V–

GENERAL DESCRIPTION

The SSM2017 is a latest generation audio preamplifier, combin­ing SSM preamplifier design expertise with advanced process­ing. The result is excellent audio performance from a self­contained 8-pin mini-DIP device, requiring only one external
gain set resistor or potentiometer. The SSM2017 is further en­hanced by its unity gain stability.

Key specifications include ultralow noise (1.5 dB noise figure)
and THD (<0.01% at G = 100), complemented by wide band­width and high slew rate.

Applications for this low cost device include microphone pream­plifiers and bus summing amplifiers in professional and con­sumer audio equipment, sonar, and other applications requiring
a low noise instrumentation amplifier with high gain capability.

16-Pin Wide Body SOL (S Suffix)

16

NC

15

RG

14

NC

13

V+

NC

12

OUT

11

REFERENCE

10

NC

9

2

RG

NC

1

NC

–IN

+IN

NC

V–

NC

1

2

3

SSM2017

4

TOP VIEW

TOP VIEW

(Not to Scale)

5

(Not to Scale)

6

7

8

NC = NO CONNECT

REV. C

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1997

(VS = 615 V and –408C ≤ TA ≤ +858C, unless otherwise noted. Typical speci-

SSM2017–SPECIFICA TIONS

Parameter Symbol Conditions Min Typ Max Units

DISTORTION PERFORMANCE T

Total Harmonic Distortion Plus Noise THD+N G = 1000, f = 1 kHz 0.012 %

NOISE PERFORMANCE

Input Referred Voltage Noise Density e

Input Current Noise Density i

DYNAMIC RESPONSE

Slew Rate SR G = 10 10 17 V/µs

Small Signal Bandwidth BW

INPUT

Input Offset Voltage V
Input Bias Current I
Input Offset Current Ios V
Common-Mode Rejection CMR V

Power Supply Rejection PSR V

Input Voltage Range IVR ±8V
Input Resistance R

OUTPUT

Output Voltage Swing V
Output Offset Voltage V
Minimum Resistive Load Drive T

Maximum Capacitive Load Drive 50 pF
Short Circuit Current Limit I
Output Short Circuit Duration 10 sec

GAIN

Gain Accuracy

Maximum Gain G 70 dB

REFERENCE INPUT

Input Resistance 10 kΩ
Voltage Range ±8V
Gain to Output 1 V/V

POWER SUPPLY

Supply Voltage Range V
Supply Current I

Specifications subject to change without notice.

n

n

–3 dB

IOS

B

IN

O
OOS

SC

10 kΩ T

R

=

G

G – 1 RG = 10 Ω, G = 1000 0.25 1 dB

S

SY

fications apply at TA = +258C.)

= +25°C

A

V

= 7 V rms

O

R

= 5 kΩ

L

G = 100, f = 1 kHz 0.005 %
G = 10, f = 1 kHz 0.004 %
G = 1, f = 1 kHz 0.008 %

f = 1 kHz, G = 1000 0.95 nV/√Hz
f = 1 kHz; G = 100 1.95 nV/√
f = 1 kHz; G = 10 11.83 nV/√
f = 1 kHz; G = 1 107.14 nV/√
f = 1 kHz, G = 1000 2 pA/√Hz

R

= 4.7 kΩ

L

C

= 50 pF

L

T

= +25°C

A

G = 1000 200 kHz
G = 100 1000 kHz
G = 10 2000 kHz
G = 1 4000 kHz

0.1 1.2 mV

VCM = 0 V 6 25 µA

= 0 V ±0.002 ±2.5 µA

CM

= ±8 V

CM

G = 1000 80 112 dB
G = 100 60 92 dB
G = 10 40 74 dB
G = 1, T
G = 1, T

= ±6 V to ±18 V

S

= +25°C2654dB

A

= – 40°C to +85°C2054 dB

A

G = 1000 80 124 dB
G = 100 60 118 dB
G = 10 40 101 dB
G = 1 26 82 dB

Differential, G = 1000 1 MΩ

G = 1 30 MΩ

Common Mode, G = 1000 5.3 MΩ

G = 1 7.1 MΩ

RL = 2 kΩ; TA = +25°C ±11.0 ±12.3 V

–40 500 mV

= +25°C2kΩ

A

T

= –40°C to +85°C 4.7 kΩ

A

Output-to-Ground Short ±50 mA

= +25°C

A

R

= 101 Ω, G = 100 0.20 1 dB

G

R

= 1.1 kΩ, G = 10 0.20 1 dB

G

R

= `, G = 1 0.05 0.5 dB

G

±6 ± 22 V

VCM = 0 V, RL = ` ±10.6 ±14.0 mA

Hz
Hz
Hz

–2–

REV. C

WARNING!

ESD SENSITIVE DEVICE

Typical Performance Characteristics

SSM2017

Figure 1. Typical THD+Noise* at G = 1, 10, 100, 1000;

= 7 V rms, VS = ±15 V, RL = 5 kΩ; TA = +25°C

V

O

*80 kHz low-pass filter used for Figures 1-2.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage

Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . 10 sec

Storage Temperature Range (P, Z Packages) –65°C to +150°C
Junction Temperature (T

) . . . . . . . . . . . . . –65°C to +150°C

J

Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C

Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C

Thermal Resistance*

8-Pin Hermetic DIP (Z): θ
8-Pin Plastic DIP (P): θ
16-Pin SOIC (S): θ

*θJA is specified for worst case mounting conditions, i.e., θJA is specified for device

in socket for cerdip and plastic DIP; θJA is specified for device soldered to printed
circuit board for SOL package.

JA

= 134; θJC = 12 . . . . . . °C/W

JA

= 96; θJC = 37 . . . . . . . . . . °C/W

JA

= 92; θJC = 27 . . . . . . . . . . . . . °C/W

Figure 2. Typical THD+ Noise * at G = 2, 10, 100, 1000;

= 10 V rms, VS = ±18 V, RL = 5 kΩ; TA = +25°C

V

O

ORDERING GUIDE

Model Range* Description Option

SSM2017P –40°C to +85°C 8-Pin Plastic DIP N-8
SSM2017S –40°C to +85°C 16-Lead SOL R-16

SSM2017S-REEL –40°C to +85°C 16-Lead SOL R-16

*XIND = –40°C to +85°C.

Temperature Package Package

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the SSM2017 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

REV. C

–3–

SSM2017

Figure 3. Voltage Noise Density vs.
Frequency

Figure 6. Maximum Output Swing
vs. Frequency

Figure 4. RTI Voltage Noise Density
vs. Gain

Figure 7. Maximum Output Voltage
vs. Load Resistance

Figure 5. Output Impedance vs.
Frequency

Figure 8. Input Voltage Range vs.
Supply Voltage

Figure 9. Output Voltage Range vs.
Supply Voltage

Figure 10. CMRR vs. Frequency

–4–

Figure 11. +PSRR vs. Frequency

REV. C

SSM2017

Figure 12. –PSRR vs. Frequency

Figure 15. V

vs. Temperature

OOS

Figure 13. V

Figure 16. V

vs. Temperature

IOS

vs. Supply Voltage

OOS

Figure 14. V

vs. Supply Voltage

IOS

Figure 17. IB vs. Temperature

Figure 18. IB vs. Supply Voltage

REV. C

Figure 19. ISY vs. Temperature

–5–

Figure 20. ISY vs. Supply Voltage

SSM2017

G =

(+In) – (In)

V

OUT

=



10kV







+1



R



G

Basic Circuit Connections

GAIN

The SSM2017 only requires a single external resistor to set the
voltage gain. The voltage gain, G, is:

10kΩ

G =

+1

R

G

and

10kΩ

RG =

G–1

For convenience, Table I lists various values of RG for common
gain levels.

Table I. Values of RG for Various Gain Levels

A

V

dB R

G

10NC

3.2 10 4.7k
10 20 1.1k

31.3 30 330
100 40 100
314 50 32
1000 60 10

The voltage gain can range from 1 to 3500. A gain set resistor is
not required for unity gain applications. Metal-film or wire­wound resistors are recommended for best results.

The total gain accuracy of the SSM2017 is determined by the
tolerance of the external gain set resistor, R

, combined with the

G

gain equation accuracy of the SSM2017. Total gain drift com­bines the mismatch of the external gain set resistor drift with
that of the internal resistors (20 ppm/°C typ).

Bandwidth of the SSM2017 is relatively independent of gain as
shown in Figure 21. For a voltage gain of 1000, the SSM2017
has a small-signal bandwidth of 200 kHz. At unity gain, the
bandwidth of the SSM2017 exceeds 4 MHz.

Figure 21. Bandwidth of the SSM2017 for Various Values
of Gain

NOISE PERFORMANCE

The SSM2017 is a very low noise audio preamplifier exhibiting
a typical voltage noise density of only 1 nV/√

Hz at 1 kHz. The
exceptionally low noise characteristics of the SSM2017 are in
part achieved by operating the input transistors at high collector
currents since the voltage noise is inversely proportional to the
square root of the collector current. Current noise, however, is
directly proportional to the square root of the collector current.
As a result, the outstanding voltage noise performance of the
SSM2017 is obtained at the expense of current noise perfor­mance. At low preamplifier gains, the effect of the SSM2017’s
voltage and current noise is insignificant.

The total noise of an audio preamplifier channel can be calcu­late by:

En =

2

e

n

+(inRS)2+e

2

t

where:

= total input referred noise

E

n

= amplifier voltage noise

e

n

= amplifier current noise

i

n

= source resistance

R

S

= source resistance thermal noise.

e

t

For a microphone preamplifier, using a typical microphone im­pedance of 150 Ω the total input referred noise is:

e

= 1 nV/√Hz @ 1 kHz, SSM2017 e

n

in = 2 pA/√Hz @ 1 kHz, SSM2017 i

n

n

RS = 150 Ω, microphone source impedance

= 1.6 nV/√Hz @ 1 kHz, microphone thermal noise

e

t

=

√

(1 nV√Hz)2 + 2 (pA/√Hz × 150 Ω)2 + (1.6 nV/√Hz)

E

n

2

= 1.93 nV/√Hz @ 1 kHz.

This total noise is extremely low and makes the SSM2017
virtually transparent to the user.

–6–

REV. C

SSM2017

INPUTS

The SSM2017 has protection diodes across the base emitter
junctions of the input transistors. These prevent accidental ava­lanche breakdown, which could seriously degrade noise perfor­mance. Additional clamp diodes are also provided to prevent the
inputs from being forced too far beyond the supplies.

a. Single Ended

b. Pseudo Differential

Although the SSM2017’s inputs are fully floating, care must be
exercised to ensure that both inputs have a dc bias connection
capable of maintaining them within the input common-mode
range. The usual method of achieving this is to ground one side
of the transducer as in Figure 22a, but an alternative way is to
float the transducer and use two resistors to set the bias point as
in Figure 22b. The value of these resistors can be up to 10 kΩ,
but they should be kept as small as possible to limit common­mode pickup. Noise contribution by resistors themselves is neg­ligible since it is attenuated by the transducer’s impedance. Bal­anced transducers give the best noise immunity and interface
directly as in Figure 22c.

REFERENCE TERMINAL

The output signal is specified with respect to the reference ter­minal, which is normally connected to analog ground. The ref­erence may also be used for offset correction or level shifting. A
reference source resistance will reduce the common-mode rejec­tion by the ratio of 5 kΩ/R

. If the reference source resis-

REF

tance is 1 Ω, then the CMR will be reduced to 74 dB (5 kΩ/1 Ω
= 74 dB).

COMMON-MODE REJECTION

Ideally, a microphone preamplifier responds only to the differ­ence between the two input signals and rejects common-mode
voltages and noise. In practice, there is a small change in output
voltage when both inputs experience the same common-mode
voltage change; the ratio of these voltages is called the common­mode gain. Common-mode rejection (CMR) is the logarithm of
the ratio of differential-mode gain to common-mode gain,
expressed in dB.

c. True Differential

Figure 22. Three Ways of Interfacing Transducers for High
Noise Immunity

Figure 23. SSM2017 in Phantom Powered Microphone Circuit

PHANTOM POWERING

A typical phantom microphone powering circuit is shown in
Figure 23. Z

through Z4 provide transient overvoltage protec-

1

tion for the SSM2017 whenever microphones are plugged in or
unplugged.

REV. C

–7–

SSM2017

BUS SUMMING AMPLIFIER

In addition to is use as a microphone preamplifier, the SSM2017
can be used as a very low noise summing amplifier. Such a cir­cuit is particularly useful when many medium impedance out­puts are summed together to produce a high effective noise gain.

The principle of the summing amplifier is to ground the SSM2017
inputs. Under these conditions, Pins 1 and 8 are ac virtual
grounds sitting about 0.55 V below ground.

To remove the 0.55 V offset, the circuit of Figure 24 is
recommended.

A

forms a “servo” amplifier feeding the SSM2017’s inputs.

2

This places Pins l and 8 at a true dc virtual ground. R4 in con­junction with C2 remove the voltage noise of A
about any operational amplifier will work well here since it is re­moved from the signal path. If the dc offset at Pins l and 8 is not
too critical, then the servo loop can be replaced by the diode bi­asing scheme of Figure 24. If ac coupling is used throughout,
then Pins 2 and 3 may be directly grounded.

, and in fact just

2

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

C1534–24–4/91

Figure 24. Bus Summing Amplifier

8-Pin Plastic DIP (P) Package

8-Pin Hermetic DIP (Z) Package

16-Pin SOIC (S) Package

–8–

PRINTED IN U.S.A.

REV. C