Circuit Note
Circuit Designs Using Analog Devices Products
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Devices Connected/Referenced
ADSP-BF527
ADMP441
Low Power Blackfin Processor with
Advanced Peripherals
Omnidirectional Microphone with
Bottom Port and I
2
CN-0266
S Digital Output
High Performance Digital MEMS Microphone Standard Digital Audio Interface to
Blackfin DSP
EVALUATION AND DESIGN SUPPORT
Circuit Evaluation Boards
ADMP441 Evaluation Board (EVAL-ADMP441Z)
ADMP441 Flex Evaluation Board (EVAL-ADMP441Z-FLEX)
System Demonstration Platform (SDP) (EVAL-SDP-CB1Z)
Design and Integration Files
Schematics, Layout Files, Bill of Materials
CIRCUIT FUNCTION AND BENEFITS
The circuit shown in Figure 1 allows up to two digital MEMS
microphones to be interfaced to a DSP on a single data line. The
ADMP441 consists of a MEMS microphone element and an I
output. This allows stereo microphones to be used in an audio
system without the need for a codec between the microphones
and the processor. Analog Devices, Inc., MEMS microphones
have a high signal-to-noise ratio (SNR) and a flat wideband
frequency response, making them an excellent choice for high
performance, low power applications.
SD
ADSP-BF527
VDDEXT
SPORT_RSCL K
SPORT_RFS
SPORT_DR0
100kΩ
SCK
WS
SD
GND GND
3.3V
0.1µF
VDD
RIGHT
ADMP441
CHIPEN
GND
3.3V
CHIPEN
L/R
FROM VOLTAGE
REGULATOR (3.3V)
3.3V
0.1µF
VDD
SCK
WS
LEFT
ADMP441
GND GND
Figure 1. MEMS Microphone Connection to Blackfin DSP
GND
(Simplified Schematic: All Connections Not Shown)
L/R
3.3V
2
S
10529-001
Up to two ADMP441 microphones can be input to a single data
line on the ADSP-BF527 Blackfin® processor. The ADSP-BF527
can be set up with up to four serial data inputs; therefore, up to
eight ADMP441s can connect to a single DSP.
CIRCUIT DESCRIPTION
The ADMP441 microphones are connected to the SPORT data
input pins of the ADSP-BF527. The only necessary passive
components in this circuit are a single 0.1 μF bypass capacitor
for each ADMP441 and a large pull-down resistor (100 kΩ) on
the SD line to discharge it while the ADMP441 output drivers are
tristated. Place the bypass capacitors as close to the ADMP441
V
pin (Pin 7) as possible.
DD
Supply the microphones' V
3.3 V V
of the ADSP-BF527. Even though the ADMP441
DDEXT
can operate with VDD between 1.8 V and 3.3 V, V
ADSP-BF527 must be a minimum of 2.25 V.
There are three signals that must be connected between the
ADMP441 and ADSP-BF527 for the I
clock, bit clock, and data. The ADSP-BF527 is the system
clock master and generates the two I
This circuit demonstrates the microphones connected to a
single data input on the SPORT0 of the Blackfin. Each of the
two SPORTs of the ADSP-BF527 has two sets of data receive
pins that enable up to eight channels of I
shows the connections when using the serial SPORT0 of the
ADSP-BF527.
Table 1. Hardware Signal Connections
Signal ADMP441 ADSP-BF527
Frame Clock WS (Pin 3) PF1/PPI_D1/RFS0 (Pin PF1)
Bit Clock SCK (Pin 1) PF2/PPI_D2/RSCLK0 (Pin PF2)
Serial Data SD (Pin 2) PF0/PPI_D0/DR0PRI (Pin PF0)
from the same source as the 2.25 V to
DD
DDEXT
2
S data stream: frame
2
S clocks.
2
S audio in. Table 1
on the
Rev. 0
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CN-0266 Circuit Note
Set the L/R pin on the two ADMP441s to opposite levels—one
pulled to V
microphone outputs its data on the left channel of the I
and when pulled to V
and the other to GND. When pulled to GND, the
DD
, it outputs its data on the right channel.
DD
2
S stream,
The ADMP441 is enabled by pulling the CHIPEN pin high.
This pin can be tied either directly to the V
of the microphone,
DD
which keeps it always enabled while it is powered, or it can be
connected to a GPIO on the ADSP-BF527, allowing the Blackfin
to enable and disable the microphone.
The ADMP441 has a sensitivity of −26 dBFS. In most applications,
the microphone outputs require some gain added in the signal
path of the Blackfin. If gain is added to the signal in the DSP,
the output of the processor must still be limited to 0 dBFS.
ADSP-BF527 Register Settings
The SPORT register settings to set the ADSP-BF527 into I2S
master mode follow. A more detailed description of these
register settings can be found in the ADSP-BF52x Blackfin
Processor Hardware Reference.
Configure SPORT_RCR1, the primary receive configuration
register, with the following nondefault settings:
• RCKFE: Drive internal frame sync on falling edge of
RSCLK
• RFSR: Require RFS for every data-word
• IRFS: Internal RFS used
• IRSCLK: Internal receive clock select
Configure SPORT_RCR2, the secondary receive configuration
register, with the following nondefault settings:
• RSFSE: Receive stereo frame sync enable
• SLEN: 32-bit word length
Set SPORT_RCLKDIV, the SPORT receive serial clock divider
register, to 17 (0x0011) and set SPORT_RFSDIV to 31 (0x001F).
This sets the proper clock frequencies for a 48 kHz frame clock
and 3.072 MHz bit clock with a 120 MHz Blackfin system clock
(SCLK).
The registers settings described can be applied to either SPORT0 or
SPORT1 on the ADSP-BF527, depending on which is being used.
COMMON VARIATIONS
DSPs
This circuit can also be set up with other parts from the Blackfin
family instead of an ADSP-BF527. See the appropriate data
sheets for details on the differences in number of SPORT
channels and other variations. Consult the Blackfin family
product page at: http://www.analog.com/blackfin.
Microphones
By removing one of the ADMP441 microphones, a mono
microphone circuit using a single ADMP441 can be set up. The
other connections remain the same in this mono configuration.
Additional ADMP441 microphones can be connected to the
SPORT inputs of the ADSP-BF527 in the same way as the first
stereo pair.
CIRCUIT EVALUATION AND TEST
The easiest way to evaluate a system with the ADMP441 MEMS
microphone connected via I
is to use the EVAL-ADMP441Z evaluation board and the
Blackfin SDP. These boards are designed to work together and
include code to enable the digital audio connection. When
connected to the USB port of a PC, the system is identified as a
standard USB audio interface and enables streaming of stereo
audio from the microphones to the PC.
Equipment Needed
The two evaluation kits needed include the following:
• EVAL-ADMP441Z: includes one EVAL-ADMP441Z-FLEX
board and an interface PCB.
• EVAL-SDP-CB1Z: includes SDP-B controller board
For correct operation of the SDP board, the PC must have the
following minimum configuration:
• Windows XP Service Pack 2, Windows Vista (32-bit), or
Windows 7 (32-bit).
• USB 2.0 port
A second EVAL-ADMP441Z-FLEX can be connected to the
interface board to enable stereo audio capture.
Getting Started
The microphone FLEX PCBs connect to the interface board
with ZIF headers, J1 and J2, and the EVAL-ADMP441Z
connects to the SDP-B with 120-pin header, J3.
The documentation for the SDP-B controller board and EVAL-
ADMP441Z describes the system setup and gives complete
schematics of the boards. The only external connections
required are the USB connection to the PC and system power to
the ADMP441 evaluation board.
Complete documentation for the EVAL-ADMP441Z evaluation
board can be found in the UG-362 user guide.
Complete documentation for the SDP-B controller board can be
found in the SDP-B User Guide, UG-277.
2
S to the ADSP-BF527 Blackfin DSP
Rev. 0 | Page 2 of 3