Analog Devices AD9051BRS-2V, AD9051BRS, AD9051-PCB, AD9051-2V-PCB Datasheet

10-Bit, 60 MSPS

a

FEATURES
60 MSPS Sampling Rate

9.3 Effective Number of Bits at f
250 mW Total Power at 60 MSPS
Selectable Input Bandwidth of 50 MHz or 130 MHz
On-Chip T/H and Voltage Reference
Single 5 V Supply Voltage
5 V or 3 V Logic I/O Compatible
Input Range and Output Coding Options Available

APPLICATIONS
Medical Imaging
Digital Communications
Professional Video
Instrumentation
Set-Top Box

GENERAL DESCRIPTION

The AD9051 is a complete 10-bit monolithic sampling analog­to-digital converter (ADC) with an onboard track-and-hold and
reference. The unit is designed for low cost, high performance
applications and requires only 5 V and an encode clock to
achieve 60 MSPS sample rates with 10-bit resolution.

The encode clock is TTL compatible and the digital outputs are
CMOS; both can operate with 5 V/3 V logic. The two-step
architecture used in the AD9051 is optimized to provide the
best dynamic performance available while maintaining low
power consumption.

= 10.3 MHz

IN

A/D Converter

AD9051

FUNCTIONAL BLOCK DIAGRAM

BWSEL

5V

AINB

AIN

ENCODE

TIMING

A 2.5 V reference is included onboard, or the user can provide
an external reference voltage for gain control or matching of
multiple devices. Fabricated on a state-of-the-art BiCMOS
process, the AD9051 is packaged in a space saving surface
mount package (SSOP) and is specified over the industrial tem­perature range (–40°C to +85°C).

5V GND

AD9051

T/H

SUM
AMP

IN OUT

REFERENCE

CIRCUITS

ADC

DAC

ADC

DECODE

LOGIC

10

REV. B

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2001

(VD = 5 V, VDD = 3 V; external reference = 2.50 V; ENCODE = 60 MSPS unless other-

AD9051–SPECIFICATIONS

Parameter Temp Level Min Typ Max Min Typ Max Unit

RESOLUTION 10 10 Bits

DC ACCURACY

Differential Nonlinearity 25°C I 0.75 1.50 0.75 1.50 LSB

Integral Nonlinearity 25°C I 0.75 1.50 0.75 1.50 LSB

No Missing Codes 25°C I GUARANTEED GUARANTEED
Gain Error

Gain Tempco

ANALOG INPUT

Input Voltage Range
Input Offset Voltage 25°C I –14 +5.0 +26 –14 +5.0 +26 LSB
Input Resistance 25°C I 4.0 6.0 4.0 6.0 kΩ
Input Capacitance 25°CV 5 5 pF
Analog Bandwidth (BW SEL +VD/NC)

BANDGAP REFERENCE

Output Voltage (IO @ 200 µA) Full VI 2.4 2.5 2.6 2.4 2.5 2.6 V
Temperature Coefficient Full V ± 33 ± 33 ppm/°C
Power Supply Sensitivity Full V 6.2 6.2 mV/V
Reference Input Current (VIN = 2.50 V) Full VI 2.0 25 2.0 25 µA

SWITCHING PERFORMANCE

Maximum Conversion Rate Full VI 60 60 MSPS
Minimum Conversion Rate
Aperture Delay (t
Aperture Uncertainty (Jitter) 25°C V 5 5 ps, rms
Output Valid Time (tV)
Output Propagation Delay (tPD)

DYNAMIC PERFORMANCE

Transient Response 25°C V 10 10 ns
Overvoltage Recovery Time 25°C V 10 10 ns
ENOBS

f
f
f

Signal-to-Noise Ratio (SINAD)

f
f
f

Signal-to-Noise Ratio (Without Harmonics)

fIN = 1.20 MHz 25°C V 59 59 dB
f
f

2nd Harmonic Distortion

f
f
f

3rd Harmonic Distortion

f
f
f

Two-Tone Intermodulation

Distortion (IMD) 25°C V –65 –65 dBc
Differential Phase 25°C V 0.1 0.1 Degrees
Differential Gain 25°C V 0.5 0.5 %

1

1

2

3

4

)25°C V 2.5 2.5 ns

A

5

5

6

= 1.20 MHz 25°C V 9.6 9.6 ENOB

IN

= 10.3 MHz 25°C I 8.93 9.3 8.93 9.3 ENOB

IN

= 29.0 MHz 25°C V 9.1 9.1 ENOB

IN

= 1.20 MHz 25°C V 58.5 57.5 dB

IN

= 10.3 MHz 25°C I 55 57 54 56 dB

IN

= 29.0 MHz 25°C V 55 54 dB

IN

= 10.3 MHz 25°C I 56 58 56 58 dB

IN

= 29.0 MHz 25°C V 56.5 56.5 dB

IN

= 1.20 MHz 25°C V –74 –68 dBc

IN

= 10.3 MHz 25°C I –73 –60 –64 –58 dBc

IN

= 29.0 MHz 25°C V –67 –60 dBc

IN

= 1.20 MHz 25°C V –74 –69 dBc

IN

= 10.3 MHz 25°C I –70 –60 –65 –60 dBc

IN

= 29.0 MHz 25°C V –65 –60 dBc

IN

wise noted)

Test AD9051BRS AD9051BRS-2V

Full V 0.90 0.90 LSB

Full V 0.90 0.90 LSB

25°CI ± 0.3 ±2.5 ± 0.3 ±3.0 % FS
Full VI ± 5.0 ± 5.5 % FS
Full V ± 10 ± 10 ppm/°C

25°C V 1.25 2.0 V p-p

25°C V 50/130 50/130 MHz

Full IV 2.0 5.0 2.0 5.0 MSPS

Full VI 4.0 4.0 ns
Full VI 5.5 10 5.5 10 ns

–2–

REV. B

AD9051

Test AD9051BRS AD9051BRS-2V

Parameter Temp Level Min Typ Max Min Typ Max Unit

ENCODE INPUT

Logic “1” Voltage Full VI 2.0 2.0 V
Logic “0” Voltage Full VI 0.8 0.8 V
Logic “1” Current Full VI 1 1 µA
Logic “0” Current Full VI 1 1 µA
Input Capacitance 25°C V 7.5 7.5 pF
Encode Pulsewidth High (t
Encode Pulsewidth Low (tEL)25°C IV 7.5 7.5 ns

DIGITAL OUTPUTS

Logic “1” Voltage (5.0 V
Logic “0” Voltage (5.0 V
Logic “1” Voltage (3.0 V
Logic “0” Voltage (3.0 V
Output Coding

7

POWER SUPPLY

, VDD Supply Current Full VI 50 63 50 63 mA

V

D

Power Dissipation
Power Supply Rejection Ratio

(PSRR)

NOTES

1

Gain error and gain temperature coefficient are based on the ADC only (with a fixed 2.5 V external reference).

2

Contact factory or authorized sales agent for information concerning the availability of expanded input voltage range devices.

33

dB bandwidth with full-power input signal.

4

Minimum conversion rate at which all data sheet specifications remain stable.

5

tV and tPD are measured from the threshold crossing of the ENCODE input to valid TTL levels 0.5 V and 2.4 V of the digital outputs with VDD = 3.0 V. The output
ac load during test is 5 pF.

6

SNR/harmonics tested with an analog input voltage of –0.5 dBFS. All tests performed at 60 MSPS.

7

Contact factory or authorized sales agent for information concerning the availability of alternative output coding and input range devices.

8

Power dissipation is measured under the following conditions: analog input = –FS at 60 MSPS ENCODE.

9

A change in input offset voltage with respect to a change in VD.

Specifications subject to change without notice.

8

9

)25°C IV 7.5 7.5 ns

EH

) Full VI 4.95 4.95 V

DD

) Full VI 0.05 0.05 V

DD

) Full VI 2.95 2.95 V

DD

) Full VI 0.05 0.05 V

DD

Offset Binary Offset Binary

Full VI 250 315 250 315 mW

25°CI ± 2 ± 10 ± 7 ± 15 mV/V

REV. B

–3–

AD9051

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS*

VD, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

Analog Inputs . . . . . . . . . . . . . . . . . . . . –0.5 V to V

+ 0.5 V

D

Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V

VREF Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V

Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . 20 mA

Operating Temperature . . . . . . . . . . . . . . . . –55°C to +125°C

Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C

Maximum Junction Temperature . . . . . . . . . . . . . . . . . 150°C

Maximum Case Temperature . . . . . . . . . . . . . . . . . . . . 150°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may effect device reliability.

ORDERING GUIDE

Model Temperature Range Package Description Package Options

AD9051BRS –40°C to +85°C 28-Lead Shrink Small Outline Package (SSOP) RS-28
AD9051BRS-2V –40°C to +85°C 28-Lead Shrink Small Outline Package (SSOP) RS-28
AD9051/PCB 25°C Evaluation Board
AD9051-2V/PCB 25°C Evaluation Board

Table I. Digital Coding (Single-Ended Input with AIN, AINB Bypassed to GND)

EXPLANATION OF TEST LEVELS
Test Level

I. 100% production tested.

D

II. 100% production tested at 25°C and sample tested at

D

specified temperatures.

III. Sample tested only.

IV. Parameter is guaranteed by design and characterization

testing.

V. Parameter is a typical value only.

VI. 100% production tested at 25°C; guaranteed by design and

characterization testing for industrial temperature range.

OR Digital Output

Analog Input Voltage Level (Out of Range) MSB... LSB

3.126 (3.50)* Positive Full Scale + 1 LSB 1 1111111111

2.5 Midscale 0 0111111111

1.874 (1.50)* Negative Full Scale – 1 LSB 1 0000000000

*(BRS-2V Version)

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9051 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

–4–

REV. B

AD9051

PIN FUNCTION DESCRIPTIONS

Pin No. Mnemonic Description

1, 6, 7, 12, 21, 23 GND Ground
2, 8, 11 V

D

3 VREFOUT Internal Bandgap Voltage Reference (Nominally 2.5 V)
4 VREFIN Input to Reference Amplifier. Voltage reference for ADC is connected here.
5 BWSEL Bandwidth Select. NC = 130 MHz nominal. +V
9 AINB Complementary Analog Input Pin (Analog Input Bar)
10 AIN Analog Input Pin
13 ENCODE Encode Clock Input to ADC. Internal T/H is placed in hold mode (ADC is encoding)

14 OR Out of Range Signal. Logic “0” when analog input is in nominal range. Logic “1” when

15 D9 (MSB) Most Significant Bit of ADC Output
16–19 D8–D5 Digital Output Bits of ADC
20, 22 V

DD

24–27 D4–D1 Digital Output Bits of ADC
28 D0 (LSB) Least Significant Bit of ADC Output

Analog 5 V Power Supply

= 50 MHz nominal.

D

on rising edge of encode signal.

analog input is out of nominal range.

Digital Output Power Supply (Only Used by Digital Outputs)

PIN CONFIGURATION

GND

VREFOUT

VREFIN

BWSEL

GND

GND

AINB

AIN

GND

ENCODE

OR

V

D

V

D

V

D

1

2

3

4

5

6

AD9051

7

TOP VIEW

8

(Not to Scale)

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

D0 (LSB)

D1

D2

D3

D4

GND

V

DD

GND

V

DD

D5

D6

D7

D8

D9 (MSB)

AIN

ENCODE

DIGITAL

OUTPUTS

AINB (PIN 9)

AIN (PIN 10)

N N + 1 N + 2 N + 3 N + 4 N + 5

t

A

tEHt

EL

t

PD

N – 5 N – 4 N – 3 N – 2 N – 1 N

Figure 1. Timing Diagram

V

D

12k⍀

12k⍀

INPUT

12k⍀

BUFFER

12k⍀

ENCODE

(PIN 13)

Analog Input Encode

VDD (PINS 20, 22)

+3V TO +5V

V

D

V

D

REV. B

–5–

D0–D9, OR

Output Stage VREF

Figure 2. Equivalent Circuits

VREF
(PIN 3)

OUT