FEATURES
Low Power: 315 mW @ 40 MSPS, 345 mW @ 60 MSPS
On-Chip T/H, Reference
Single +5 V Power Supply Operation
Selectable 5 V or 3 V Logic I/O
SNR: 53 dB Minimum at 10 MHz w/40 MSPS
APPLICATIONS
Medical Imaging
Instrumentation
Digital Communications
Professional Video
PRODUCT DESCRIPTION
The AD9050 is a complete 10-bit monolithic sampling analogto-digital converter (ADC) with an onboard track-and-hold and
reference. The unit is designed for low cost, high performance
applications and requires only +5 V and an encode clock to
achieve 40 MSPS or 60 MSPS sample rates with 10-bit resolution.
The encode clock is TTL compatible and the digital outputs
are CMOS; both can operate with 5 V/3 V logic, selected by the
user. The two-step architecture used in the AD9050 is optimized to provide the best dynamic performance available while
maintaining low power consumption.
A 2.5 V reference is included onboard, or the user can provide
an external reference voltage for gain control or matching of
multiple devices. Fabricated on an advanced BiCMOS process, the AD9050 is packaged in space saving surface mount
packages (SOIC, SSOP) and is specified over the industrial
(–40°C to +85°C) temperature range. The 60 MSPS version
(AD9050BRS-60) is only available in the SSOP package.
AINB
AIN
ENCODE
A/D Converter
AD9050
FUNCTIONAL BLOCK DIAGRAM
GND
+5V
+5V
AD9050
T/H
TIMING
Figure 1. Typical Connections
SUM
AMP
REFERENCE CKTS
ADC
DAC
ADC
DECODE
LOGIC
10
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Logic “1” VoltageFullIV4.954.95V
Logic “0” VoltageFullIV0.050.05V
Logic “1” Voltage (3.0 V
Logic “0” Voltage (3.0 V
Output CodingOffsetBinaryCodeOffsetBinaryCode
)+25°CIV101666.7166ns
EH
)FullIV2.952.95V
DD
)FullIV0.050.05V
DD
POWER SUPPLY
V
, VDD Supply Current
D
Power Dissipation
Power Supply Rejection Ratio
(PSRR)
NOTES
1
“Gain Tempco” is for converter only; “Temperature Coefficient” is for bandgap reference only.
2
Output propagation delay (tPD) is measured from the 50% point of the rising edge of the encode command to the midpoint of the digital outputs with 10 pF maximum
loads.
3
RMS signal to rms noise with analog input signal 0.5 dB below full scale at specified frequency for BR/BRS, 1.0 dB below full scale for BRS-60.
4
Intermodulation measured relative to either tone with analog input frequencies of 9.5 MHz and 9.9 MHz at 7 dB below full scale.
5
Power dissipation is measured at full update rate with AIN of 10.3 MHz and digital outputs loaded with 10 pF maximum. See Figure 4 for power dissipation at other
conditions.
6
Measured as the ratio of the change in offset voltage for 5% change in +VD.
Specifications subject to change without notice.
6
EXPLANATION OF TEST LEVELS
Test Level
I–100% Production Tested.
IV–Parameter is guaranteed by design and characteriza-
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may effect device reliability.
REV. B
ORDERING GUIDE
ModelTemperature RangePackage Option*
AD9050BR–40°C to +85°CR-28
AD9050BRS–40°C to +85°CRS-28
AD9050BRS-60– 40°C to +85°CRS-28
*R = Small Outline (SO); RS = Shrink Small Outline (SSOP).
–3–
AD9050
WARNING!
ESD SENSITIVE DEVICE
Table I. AD9050 Digital Coding (Single Ended Input AIN, AINB Bypassed to GND)
ORDigital Output
Analog InputVoltage Level(Out of Range)MSB . . . LSB
3.813Positive Full Scale + 1 LSB11111111111
3.300Midscale00111111111
2.787Negative Full Scale – 1 LSB10000000000
PIN FUNCTION DESCRIPTIONS
Pin NoNameFunction
1, 7, 12, 21, 23GNDGround.
2, 8, 11V
3VREF
4VREF
D
OUT
IN
5COMPInternal compensation pin, 0.1 µF bypass connected here to V
6REF
BP
9AINBComplementary analog input pin (Analog input bar).
10AINAnalog input pin.
13ENCODEEncode clock input to ADC. Internal T/H is placed in hold mode (ADC is encoding)
14OROut of range signal. Logic “0” when analog input is in nominal range. Logic “1” when
15D9 (MSB)Most significant bit of ADC output.
16–19D8–D5Digital output bits of ADC.
20, 22V
DD
24–27D4–D1Digital output bits of ADC.
28D0 (LSB)Least significant bit of ADC output.
Analog +5 V ± 5% power supply.
Internal bandgap voltage reference (nominally +2.5 V).
Input to reference amplifier. Voltage reference for ADC is connected here.
(+5 V).
D
External connection for (0.1 µF) reference bypass capacitor.
on rising edge of encode signal.
analog input is out of nominal range.
Digital output power supply (only used by digital outputs).
PIN CONFIGURATION
GND
1
V
2
D
VREF
3
OUT
VREF
4
IN
5
6
REF
BP
GND
AINB
GND
ENCODE
AD9050
7
TOP VIEW
8
V
(Not to Scale)
D
9
AIND5
10
11
V
D
12
13
OR
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
D0 (LSB)
D1
D2
D3
D4COMP
GND
V
DD
GND
V
DD
D6
D7
D8
D9 (MSB)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9050 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
–4–
REV. B
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