Analog Devices AD7823 Datasheet

2.7 V to 5.5 V, 4.5 ␮s, 8-Bit

a

FEATURES
8-Bit ADC with 4 ␮s Conversion Time
Small Footprint 8-Lead microSOIC Package
Specified Over a –40ⴗC to +125ⴗC Temperature Range
Inherent Track-and-Hold Functionality
Operating Supply Range: 2.7 V to 5.5 V
Specifications at 2.7 V to 5.5 V and 5 V ⴞ 10%
Microcontroller Compatible Serial Interface
Optional Automatic Power-Down
Low Power Operation:

570 ␮W at 10 kSPS Throughput Rate

2.9 mW at 50 kSPS Throughput Rate
Analog Input Range: 0 V to V
Reference Input Range: 0 V to V
“Drop In” Upgrade to 10 Bits Available (AD7810)

APPLICATIONS
Low Power, Hand-Held Portable Applications

Requiring Analog-to-Digital Conversion
with 8-Bit Accuracy, e.g.,

Battery Powered Test Equipment
Battery Powered Communications Systems

REF

DD

ADC in 8-Lead microSOIC/DIP

AD7823

FUNCTIONAL BLOCK DIAGRAM

V

AGND

DD

AD7823

V

IN+

V

IN–

VDD/3

V

REF

CHARGE

REDISTRIBUTION

DAC

CLOCK

OSC

COMP

SERIAL

PORT

CONTROL

LOGIC

CONVST

D

OUT

SCLK

GENERAL DESCRIPTION

The AD7823 is a high speed, low power, 8-bit A/D converter
that operates from a single 2.7 V to 5.5 V supply. The part con­tains a 4 µs typ successive approximation A/D converter, inherent
track-and-hold functionality (with a pseudo differential input)
and a high speed serial interface that interfaces to most microcon­trollers. The AD7823 is fully specified over a temperature range
of –40°C to +125°C.

By using a technique that samples the state of the CONVST
(convert start) signal at the end of a conversion, the AD7823
may be used in an automatic power-down mode. When used in
this mode, the AD7823 powers down automatically at the end
of a conversion and “wakes up” at the start of a new conversion.
This feature significantly reduces the power consumption of the
part at lower throughput rates. The AD7823 can also operate in
a high speed mode where the part is not powered down between
conversions. In this high speed mode of operation, the conver­sion time of the AD7823 is 4 µs typ. The maximum throughput
rate is dependent on the speed of the serial interface of the
microcontroller.

The part is available in a small, 8-lead 0.3" wide, plastic dual­in-line package (mini-DIP); in an 8-lead, small outline IC
(SOIC); and in an 8-lead microSOIC package.

PRODUCT HIGHLIGHTS

1. Complete, 8-Bit ADC in 8-Lead Package
The AD7823 is an 8-bit 4 µs ADC with inherent track-and-
hold functionality and a high speed serial interface—all in an
8-lead microSOIC package. V

may be connected to V

REF

DD

to eliminate the need for an external reference. The result is
a high speed, low power, space saving ADC solution.

2. Low Power, Single Supply Operation
The AD7823 operates from a single +2.7 V to +5.5 V supply
and typically consumes only 9 mW of power. The power
dissipation can be significantly reduced at lower throughput
rates by using the automatic power-down mode, e.g., at a
throughput rate of 10 kSPS the power consumption is only
570 µW.

3. Automatic Power-Down
The automatic power-down mode, whereby the AD7823
“powers down” at the end of a conversion and “wakes up”
before the next conversion, means the AD7823 is ideal for
battery powered applications. See Power vs. Throughput
Rate section.

4. Serial Interface
An easy to use, fast serial interface allows connection to most
popular microprocessors with no external circuitry.

REV. B

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 2000

AD7823–SPECIFICATIONS

(GND = 0 V, V

= +VDD. All specifications –40ⴗC to +125ⴗC unless otherwise noted.)

REF

Parameter Y Version Unit Test Conditions/Comments

DYNAMIC PERFORMANCE f

Signal to (Noise + Distortion) Ratio
Total Harmonic Distortion
Peak Harmonic or Spurious Noise
Intermodulation Distortion

1

2

1, 2

48 dB min

1

–70 dB typ
–70 dB typ

2nd Order Terms –77 dB typ
3rd Order Terms –77 dB typ

DC ACCURACY

Resolution 8 Bits
Relative Accuracy
Differential Nonlinearity (DNL)
Gain Error
Offset Error
Total Unadjusted Error

1

1

1

1

1

± 0.5 LSB max
± 0.5 LSB max
± 1LSB max
± 1LSB max
± 1LSB max

Minimum Resolution for Which

No Missing Codes Are Guaranteed 8 Bits

ANALOG INPUT

Input Voltage Range 0 V min

V max

V max

Input Leakage Current
Input Capacitance

2

REFERENCE INPUTS

V

Input Voltage Range 1.2 V min

REF

V

2

REF

± 1 µA max
15 pF max

2

V

DD

Input Leakage Current ± 1 µA max
Input Capacitance 20 pF max

LOGIC INPUTS

V

Input High Voltage 2.0 V min

INH,

Input Low Voltage 0.4 V max

V

INL,

Input Current, I
Input Capacitance, C

2

IN

IN

± 1 µA max Typically 10 nA, VIN = 0 V to V
8 pF max

LOGIC OUTPUTS

Output High Voltage, V
Output Low Voltage, V

OL

OH

2.4 V min I

0.4 V max I
High Impedance Leakage Current ± 1 µA max
High Impedance Capacitance 15 pF max

= 30 kHz, f

IN

SAMPLE

= 133 kHz

fa = 48 kHz, fb = 48.5 kHz

= 200 µA

SOURCE

= 200 µA

SINK

DD

CONVERSION RATE

Conversion Time 4 µs typ
Track/Hold Acquisition Time

1

100 ns max See DC Acquisition Section

POWER SUPPLY

V

DD

I

DD

2.7–5.5 Volts For Specified Performance

3.5 mA max Sampling at 133 kSPS and Logic

Inputs @ V

DD

Power Dissipation 17.5 mW max Nominal Supplies
Power-Down Mode

I

DD

1 µA max

Power Dissipation 5 µW max Nominal Supplies

Automatic Power Down V

DD

= 3 V
1 kSPS Throughput 54 µW max
10 kSPS Throughput 540 µW max
50 kSPS Throughput 2.7 mW max

NOTES

1

See Terminology.

2

Sample tested during initial release and after any redesign or process change that may affect this parameter.

Specifications subject to change without notice.

–2–

or 0 V. VDD = 5 V

REV. B

1, 2

TIMING CHARACTERISTICS

(–40ⴗC to +125ⴗC, unless otherwise noted)

Parameter VDD = 5 V ⴞ 10% VDD = 3 V ⴞ 10% Unit Conditions/Comments

AD7823

t

1

t

2

t

3

t

4

3

t

5

3

t

6

3

t

7

3, 4

t

8

55µs (max) Conversion Time Mode 1 Operation (High Speed Mode)
20 20 ns (min) CONVST Pulsewidth
25 25 ns (min) SCLK High Pulsewidth
25 25 ns (min) SCLK Low Pulsewidth
5 5 ns (min) CONVST Rising Edge to SCLK Rising Edge Set-Up Time
10 10 ns (max) SCLK Rising Edge to D

Data Valid Delay

OUT

5 5 ns (max) Data Hold Time after Rising Edge SCLK
20 20 ns (max) Bus Relinquish Time After Falling Edge of SCLK
10 10 ns (min)

t

POWERUP

NOTES

1

Sample tested to ensure compliance.

2

See Figures 14, 15 and 16.

3

These numbers are measured with the load circuit of Figure 1. They are defined as the time required for the o/p to cross 0.8 V or 2.4 V for VDD = 5 V ± 10% and

0.4 V or 2 V for VDD = 3 V ± 10%.

4

Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time quoted in the Timing Characteristics, t8, is the true bus relinquish time
of the part and as such is independent of external bus loading capacitances.

Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS*

(TA = +25°C unless otherwise noted)

V

to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V

DD

Digital Input Voltage to GND

(CONVST, SCLK) . . . . . . . . . . . . . . –0.3 V, V

Digital Output Voltage to GND

) . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V

(D

OUT

V

to GND . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V

REF

Analog Inputs

, V

(V

IN +

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . .+150°C

Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW

Thermal Impedance . . . . . . . . . . . . . . . . . . . +125°C/W

θ

JA

θ

Thermal Impedance . . . . . . . . . . . . . . . . . . . . +50°C/W

JC

Lead Temperature, Soldering (10 sec) . . . . . . . . . . +260°C

11µs (max) Power-Up Time

SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW

θ

Thermal Impedance . . . . . . . . . . . . . . . . . . . . 160°C/W

JA

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 56°C/W

θ

JC

Lead Temperature, Soldering

+ 0.3 V

DD

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . .+215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C

MicroSOIC Package, Power Dissipation . . . . . . . . . . 450 mW

+ 0.3 V

DD

) . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V

IN –

Thermal Impedance . . . . . . . . . . . . . . . . . . . . 206°C/W

θ

JA

Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 44°C/W

θ

JC

Lead Temperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . .+215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi­tions for extended periods may affect device reliability.

REV. B

ORDERING GUIDE

Linearity Temperature Branding Package

Model Error Range Information Option*

AD7823YN ± 1 LSB –40°C to +125°C N-8
AD7823YR ± 1 LSB –40°C to +125°C SO-8
AD7823YRM ± 1 LSB –40°C to +125°C C2Y RM-8

*N = plastic DIP; RM = microSOIC; SO = small outline IC (SOIC).

I

OL

200mA

TO

OUTPUT

PIN

50pF

C

L

I

OH

200␮A

1.6V

Figure 1. Load Circuit for Digital Output Timing Specifications

–3–

AD7823

PIN FUNCTION DESCRIPTIONS

Pin No. Mnemonic Description

1 CONVST Convert Start. Falling edge puts the track-and-hold into hold mode and initiates a conversion.

A rising edge on the CONVST pin enables the serial port of the AD7823. This is useful in
multipackage applications where a number of devices share the same serial bus. The state of
this pin at the end of conversion also determines whether the part is powered down or not.

See Operating Modes section of this data sheet.
2V
3V

IN+

IN–

4 GND Ground reference for analog and digital circuitry.
5V
6D

REF

OUT

7 SCLK Serial Clock. An external serial clock is applied here.
8VDDPositive Supply Voltage 2.7 V to 5.5 V.

Positive input of the pseudo differential analog input.

Negative input of the pseudo differential analog input.

External reference is connected here.

Serial data is shifted out on this pin.

PIN CONFIGURATION

DIP/SOIC/microSOIC

CONVST

V

V

GND

IN+

IN–

1

2

AD7823

TOP VIEW

3

(Not to Scale)

4

8

7

6

5

V

DD

SCLK

D

OUT

V

REF

–4–

REV. B