ANALOG DEVICES AD602 Service Manual

Dual, Low Noise, Wideband

A

FEATURES

2 channels with independent gain control

Linear in dB gain response

2 gain ranges

AD600: 0 dB to 40 dB

AD602: –10 dB to +30 dB
Accurate absolute gain: ±0.3 dB
Low input noise: 1.4 nV/√Hz
Low distortion: −60 dBc THD at ±1 V output
High bandwidth: dc to 35 MHz (−3 dB)
Stable group delay: ±2 ns
Low power: 125 mW (maximum) per amplifier
Signal gating function for each amplifier
Drive high speed ADCs
MIL-STD-883-compliant and DESC versions available

APPLICATIONS

Ultrasound and sonar time-gain controls
High performance audio and RF AGC systems
Signal measurement

GENERAL DESCRIPTION

The AD600/AD6021 dual-channel, low noise, variable gain
amplifiers are optimized for use in ultrasound imaging systems
but are applicable to any application requiring precise gain, low
noise and distortion, and wide bandwidth. Each independent
channel provides a gain of 0 dB to +40 dB in the AD600 and

−10 dB to +30 dB in the AD602. The lower gain of the AD602
results in an improved signal-to-noise ratio (SNR) at the output.
However, both products have the same 1.4 nV/√Hz input noise
spectral density. The decibel gain is directly proportional to the
control voltage, accurately calibrated, and supply and temper­ature stable.

To achieve the difficult performance objectives, a proprietary
circuit form, the X-AMP®, was developed. Each channel of the
X-AMP comprises a variable attenuator of 0 dB to −42.14 dB
followed by a high speed fixed gain amplifier. In this way, the
amplifier never has to cope with large inputs and can benefit
from the use of negative feedback to precisely define the gain
and dynamics. The attenuator is realized as a 7-stage R-2R
ladder network having an input resistance of 100 , laser
trimmed to ±2%. The attenuation between tap points is 6.02 dB;
the gain-control circuit provides continuous interpolation between
these taps. The resulting control function is linear in dB.

1

Patented.

Variable Gain Amplifiers

AD600/AD602

FUNCTIONAL BLOCK DIAGRAM

G

T1

SCALING

REFERENCE

C1HI

V

G

C1LO

GAIN CONTROL

INTERFACE

0dB

A1HI

A1LO

500Ω

Figure 1. Functional Block Diagram of a Single Channel of the AD600/AD602

–12.04dB

–6.02dB

R-2R LADDER NETWORK

The gain-control interfaces are fully differential, providing an
input resistance of ~15 M and a scale factor of 32 dB/V (that
is, 31.25 mV/dB) defined by an internal voltage reference. The
response time of this interface is less than 1 µs. Each channel
also has an independent gating facility that optionally blocks
signal transmission and sets the dc output level to within a few
millivolts of the output ground. The gating control input is
TTL- and CMOS-compatible.

The maximum gain of the AD600 is 41.07 dB, and the maximum
gain of the AD602 is 31.07 dB; the −3 dB bandwidth of both
models is nominally 35 MHz, essentially independent of the
gain. The SNR for a 1 V rms output and a 1 MHz noise
bandwidth is typically 76 dB for the AD600 and 86 dB for the
AD602. The amplitude response is flat within ±0.5 dB from
100 kHz to 10 MHz; over this frequency range, the group delay
varies by less than ±2 ns at all gain settings.

Each amplifier channel can drive 100  load impedances with
low distortion. For example, the peak specified output is ±2.5 V
minimum into a 500  load or ±1 V into a 100  load. For a
200  load in shunt with 5 pF, the total harmonic distortion for
a ±1 V sinusoidal output at 10 MHz is typically −60 dBc.

The AD600J/AD602J are specified for operation from 0°C to 70°C
and are available in 16-lead PDIP (N) and 16-lead SOIC packages.
The AD600A/AD602A are specified for operation from −40°C to
+85°C and are available in 16-lead CERDIP (Q) and 16-lead SOIC
packages. The AD600S/AD602S are specified for operation from

−55°C to +125°C, are available in a 16-lead CERDIP (Q) package,
and are MIL-STD-883-compliant. The AD600S/AD602S are also
available under DESC SMD 5962-94572.

PRECISION PASSIVE
INPUT ATTENUATOR

–18.06dB

–22.08dB

–30.1dB

–36.12dB

–42.14dB

62.5Ω

GATING

INTERFACE

RF2

2.24kΩ (AD600)
694Ω (AD602)

RF1
20Ω

FIXED-GAIN

AMPLIFIER

41.07dB (AD600)

31.07dB (AD602)

A1OP

A1CM

00538-001

Rev. F

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2008 Analog Devices, Inc. All rights reserved.

AD600/AD602

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1 

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Absolute Maximum Ratings ............................................................ 5

ESD Caution .................................................................................. 5

Pin Configuration and Function Descriptions ............................. 6

Typical Performance Characteristics ............................................. 7

Theory of Operation ...................................................................... 10

Noise Performance ..................................................................... 10

Gain-Control Interface .............................................................. 11

Signal-Gating Inputs .................................................................. 11

Common-Mode Rejection ........................................................ 11

Achieving 80 dB Gain Range .................................................... 11

Sequential Mode (Maximum SNR) ......................................... 12

Parallel Mode (Simplest Gain-Control Interface) .................. 13

Low Ripple Mode (Minimum Gain Error) ............................. 13

Applications Information .............................................................. 15

Time-Gain Control (TGC) and Time-Variable

Gain (TVG) ................................................................................. 15

Increasing Output Drive ............................................................ 15

Driving Capacitive Loads .......................................................... 15

Realizing Other Gain Ranges ................................................... 16

Ultralow Noise VCA .................................................................. 16

Low Noise, 6 dB Preamplifier ................................................... 16

Low Noise AGC Amplifier with 80 dB Gain Range .............. 17

Wide Range, RMS-Linear dB Measurement System

(2 MHz AGC Amplifier with RMS Detector) ........................ 19

100 dB to 120 dB RMS Responding Constant Bandwidth

AGC Systems with High Accuracy Decibel Outputs ............ 21

100 dB RMS/AGC System with Minimal Gain Error

(Parallel Gain with Offset) ........................................................ 22

120 dB RMS/AGC System with Optimal SNR

(Sequential Gain) ....................................................................... 23

Outline Dimensions ....................................................................... 27

Ordering Guide .......................................................................... 29











REVISION HISTORY

10/08—Rev. E to Rev. F

Changes to Power Supply Parameter, Table 1 ............................... 3

Changes to Figure 41 ...................................................................... 20

Changes to Figure 45 ...................................................................... 21

Changes to Figure 47 ...................................................................... 22

Changes to Figure 51 ...................................................................... 24

Updated Outline Dimensions ....................................................... 27

Changes to Ordering Guide .......................................................... 29

1/06—Rev. D to Rev. E

Updated Format .................................................................. Universal

Changes to Table 2 ............................................................................ 5

Changes to The Gain-Control Interface Section ........................ 11

Updated Outline Dimensions ....................................................... 27

Changes to Ordering Guide .......................................................... 28

3/04—Rev. C to Rev. D

Changes to Specifications ................................................................ 2

Changes to Ordering Guide ............................................................ 3

Changes to Figure 3 .......................................................................... 8

Changes to Figure 29 ...................................................................... 18

Updated Outline Dimensions ....................................................... 20

5/02—Rev. B to Rev. C

Changes to Specifications ................................................................. 2

Renumber Tables and TPCs ................................................... Global

8/01—Rev. A to Rev. B

Changes to Accuracy Section of AD600A/AD602A column ...... 2

Rev. F | Page 2 of 32

AD600/AD602

SPECIFICATIONS

Each amplifier section at TA = 25°C, VS = ±5 V, −625 mV ≤ VG ≤ +625 mV, RL = 500 Ω, and CL = 5 pF, unless otherwise noted.
Specifications for the AD600/AD602 are identical, unless otherwise noted.

Table 1.

1

AD600J/AD602J

AD600A/AD602A1

Parameter Conditions Min Typ Max Min Typ Max Unit

INPUT CHARACTERISTICS

Input Resistance Pin 2 to Pin 3; Pin 6 to Pin 7

98

100

102 95

100

105

Ω
Input Capacitance 2 2 pF
Input Noise Spectral Density

2

1.4 1.4 nV/√Hz

Noise Figure RS = 50 Ω, maximum gain 5.3 5.3 dB
R

= 200 Ω, maximum gain 2 2 dB

S

Common-Mode Rejection Ratio f = 100 kHz 30 30 dB

OUTPUT CHARACTERISTICS

−3 dB Bandwidth V

= 100 mV rms 35 35 MHz

OUT

Slew Rate 275 275 V/µs
Peak Output

3

R

≥ 500 Ω ±2.5 ±3 ±2.5 ±3 V

L

Output Impedance f ≤ 10 MHz 2 2 Ω
Output Short-Circuit Current 50 50 mA
Group Delay Change vs. Gain f = 3 MHz; full gain range ±2 ±2 ns
Group Delay Change vs. Frequency VG = 0 V, f = 1 MHz to 10 MHz ±2 ±2 ns
Total Harmonic Distortion RL= 200 Ω, V

= ±1 V peak, RPD = 1 kΩ −60 −60 dBc

OUT

ACCURACY

AD600

Gain Error 0 dB to 3 dB gain
3 dB to 37 dB gain
37 dB to 40 dB gain

Maximum Output Offset Voltage

4

V

= –625 mV to +625 mV 10

G

0

−0.5

−1

Output Offset Variation VG = –625 mV to +625 mV 10

+0.5

+1 −0.5

±0.2

+0.5 −1.0

−0.5

0 −1.5
50
50

+0.5

+1.5

±0.2

+1.0

−0.5

+0.5

10
10

65
65

dB
dB
dB
mV
mV

AD602

Gain Error –10 dB to –7 dB gain

–7 dB to +27 dB gain

27 dB to 30 dB gain

Maximum Output Offset Voltage

4

V

= −625 mV to +625 mV 5

G

0

−0.5

−1

Output Offset Variation VG = −625 mV to +625 mV 5

+0.5

+1 –0.5

±0.2

+0.5 −1.0

−0.5

0 −1.5
30
30

+0.5

+1.5

±0.2

+1.0

−0.5

+0.5

10
10

45
45

dB
dB
dB
mV
mV

GAIN CONTROL INTERFACE

Gain Scaling Factor

+3 dB to +37 dB (AD600);

31.7

32

32.3 30.5

32

33.5

dB/V

−7 dB to +27 dB (AD602)
Common-Mode Range −0.75 +2.5 −0.75 +2.5 V
Input Bias Current 0.35 1 0.35 1 A
Input Offset Current 10 50 10 50 nA
Differential Input Resistance Pin 1 to Pin 16; Pin 8 to Pin 9 15 15 MΩ
Response Rate Full 40 dB gain change 40 40 dB/s

Rev. F | Page 3 of 32

AD600/AD602

AD600J/AD602J

1

AD600A/AD602A1

Parameter Conditions Min Typ Max Min Typ Max Unit

SIGNAL GATING INTERFACE

Logic Input Low (Output On) 0.8 0.8 V
Logic Input High (Output Off) 2.4 2.4 V
Response Time On to off, off to on 0.3 0.3 µs
Input Resistance Pin 4 to Pin 3; Pin 5 to Pin 6 30 30 kΩ
Output Gated Off

Output Offset Voltage ±10

±100

±10

±400

mV
Output Noise Spectral Density 65 65 nV/√Hz
Signal Feedthrough @ 1 MHz

AD600 −80 −80 dB
AD602 −70 −70 dB

POWER SUPPLY

Specified Operating Range ±4.75 ±5.25 ±4.75 ±5.25 V
Quiescent Current Each channel 11

1

Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All

minimum and maximum specifications are guaranteed, although only those shown in boldface are tested on all production units.

2

Typical open- or short-circuited input; noise is lower when the system is set to maximum gain and the input is short-circuited. This figure includes the effects of both

voltage and current noise sources.

3

With an additional 1 kΩ pull-down resistor, if RL < 500 Ω.

4

The dc gain of the main amplifier in the AD600 is ×113; therefore, an input offset of only 100 V becomes an 11.3 mV output offset. In the AD602, the amplifier gain is

×35.7; therefore, an input offset of 100 V becomes a 3.57 mV output offset.

12.5

11

14

mA

Rev. F | Page 4 of 32

AD600/AD602

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

Supply Voltage ± VS ±7.5 V
Input Voltages

Pin 1, Pin 8, Pin 9, Pin 16 ±VS
Pin 2, Pin 3, Pin 6, Pin 7 ±2 V continuous
±VS for 10 ms

Pin 4, Pin 5 ±VS
Internal Power Dissipation 600 mW
Operating Temperature Range

J Grade 0°C to 70°C

A Grade −40°C to +85°C

S Grade −55°C to +125°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 sec) 300°C
θJA

16-Lead PDIP 85°C/W

16-Lead SOIC 100°C/W

16-Lead CERDIP 120°C/W

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

Rev. F | Page 5 of 32

AD600/AD602

A

A

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

C1LO

A1HI

1LO

GAT1

GAT2

2LO

A2HI

C2LO

1

2

3

4

5

6

7

8

+
–

–

+

AD600/
AD602

A1

REF

A2

C1HI

16

A1CM

15

A1OP

14

VPOS

13

VNEG

12

11

A2OP

10

A2CM

9

C2HI

00538-002

Figure 2. Pin Configuration

Table 3. Pin Function Descriptions

Pin No. Mnemonic Description

1 C1LO CH1 Gain-Control Input Low. Positive voltage reduces CH1 gain.
2 A1HI CH1 Signal Input High. Positive voltage increases CH1 output.
3 A1LO CH1 Signal Input Low. Usually connected to CH1 input ground.
4 GAT1 CH1 Gating Input. A logic high shuts off the CH1 signal path.
5 GAT2 CH2 Gating Input. A logic high shuts off the CH2 signal path.
6 A2LO CH2 Signal Input Low. Usually connected to CH2 input ground.
7 A2HI CH2 Signal Input High. Positive voltage increases CH2 output.
8 C2LO CH2 Gain-Control Input Low. Positive voltage reduces CH2 gain.
9 C2HI CH2 Gain-Control Input High. Positive voltage increases CH2 gain.
10 A2CM CH2 Common. Usually connected to CH2 output ground.
11 A2OP CH2 Output.
12 VNEG Negative Supply for Both Amplifiers.
13 VPOS Positive Supply for Both Amplifiers.
14 A1OP CH1 Output.
15 A1CM CH1 Common. Usually connected to CH1 output ground.
16 C1HI CH1 Gain-Control Input High. Positive voltage increases CH1 gain.

Rev. F | Page 6 of 32

AD600/AD602

–

TYPICAL PERFORMANCE CHARACTERISTICS

10.0

9.8

9.6

9.4

9.2

9.0

8.8

GROUP DELAY (ns)

8.6

8.4

8.2

8.0
–0.7 0.5

GAIN CONTROL VOLTAGE (V)

Figure 6. AD600 and AD602 Typical Group Delay vs. V

VG=0V
10dB/DIV
CENTER
FREQ 1MHz
10kHz/DIV

00538-006

0.7–0.5 0.30.1–0.1–0.3

C

–0.05

–0.15

GAIN ERROR (dB)

–0.25

–0.35

–0.45

20dB

17dB

0.45

0.35

0.25

0.15

0.05

GAIN CONTROL VOLTAGE (V)

Figure 3. Gain Error vs. Gain Control Voltage

00538-003

0.7–0.5–0.7 0.50.30.1–0.1–0.3

0°
–45°
–90°

FREQUENCY (Hz)

Figure 4. AD600 Frequency and Phase Response vs. Gain

10dB

7dB

0°

–45°

–90°

100k 1M 10M 100M

FREQUENCY (Hz)

Figure 5. AD602 Frequency and Phase Response vs. Gain

00538-004

100M1M100k 10M

Figure 7. Third-Order Intermodulation Distortion, V

= 2 V p-p, RL = 500 Ω

OUT

0538-007

1.0
–1.2
–1.4
–1.6
–1.8
–2.0
–2.2
–2.4
–2.6
–2.8
–3.0

NEGATIVE OUTPUT VOLTAGE LIMIT (V)

538-005
00

–3.2
–3.4

50

0

LOAD RESISTANCE (Ω)

20001000500200100

00538-008

Figure 8. Typical Output Voltage vs. Load Resistance

(Negative Output Swing Limits First)

Rev. F | Page 7 of 32

AD600/AD602

102

101

100

99
98
97

96

95

INPUT IMPEDANCE (Ω)

94

93

92

100k 1M 10M 100M

Figure 9. Input Impedance vs. Frequency

6

5
4

3

2

1

0

–1

–2

OUTPUT OFFSETVOLTAGE (mV)

–3

–4

–0.5–0.7 0.5

Figure 10. Output Offset Voltage vs. Gain Control Voltage

(Control Channel Feedthrough)

GAIN = 40dB

GAIN = 20dB

GAIN = 0dB

FREQUENCY (Hz)

AD600

AD602

–0.3 –0.1 0.1 0.3

GAIN CONTROL VOLTAGE (V)

0.7

50mV

100

90

OUTPUTINPUT

10

0%

5V 100ns

00538-012

00538-009

Figure 12. Gating Feedthrough to Output, Gating Off to On

50mV

100

90

OUTPUTINPUT

10

0%

5V 100ns

00538-013

00538-010

Figure 13. Gating Feedthrough to Output, Gating On to Off

1V VOUT

100

90

OUTPUT

UTINP

10

0%

1V VC

1µs

0538-011

Figure 11. Gain Control Channel Response Time. Top: Output Voltage, 2 V

Maximum, Bottom: Gain Control Voltage V

= ±625 mV

C

Rev. F | Page 8 of 32

1V

100

90

OUTPUTINPUT

10

0%

100mV

500ns

Figure 14. Transient Response, Medium and High Gain

538-01400

AD600/AD602

T

R

T

10

500mV

100

90

OUTPUTINPU

10

0%

1V 200ns

Figure 15. Input Stage Overload Recovery Time

100

90

OUTPUT

10

0%

INPUT

200mV 500ns

Figure 16. Output Stage Overload Recovery Time

100

90

OUTPUT

10
0%

INPUT

1V 500ns

Figure 17. Transient Response Minimum Gain

1V

500mV

00538-015

00538-016

00538-017

AD600: G = 20dB

5

AD602: G = 10dB
BOTH: V

0

–5

–10

–15

CMRR (dB)

–20

–25
–30

–35

–40

1k 10k 100k 1M 10M 100M

= 100mV rms

CM

V

=±5V

S

R

= 500Ω

L

T

= 25°C

A

AD600

AD602

FREQUENCY (Hz)

Figure 18. CMRR vs. Frequency

20
10

0

–10

–20

–30

PSRR (dB)

–40
–50

–60

–70
–80

100k 1M 10M 100M

AD600

AD602

FREQUENCY (Hz)

AD600: G = 40dB
AD602: G = 30dB
BOTH: R

= 500Ω

L

VIN=0V
R

=50Ω

S

Figure 19. PSRR vs. Frequency

10

AD600: CH1 G = 40dB, VIN = 0

0

–10
–20

–30

ALK (dB)

–40

OSS

–50

C

–60

–70
–80
–90

100k 1M 10M 100M

CH2 G = 20dB, V

AD602: CH1 G = 30d B, V

CH2 G = 0dB, V

BOTH: V

CROSSTALK = 20 log

= 1V rms1, RS = 50Ω

OUT

= 500Ω

R

L

= 100mV

IN

= 0

IN

= 316mV

IN

CH1 V

OUT

CH2 V

IN

AD600

FREQUENCY (Hz)

AD602

Figure 20. Crosstalk Between A1 and A2 vs. Frequency

00538-018

00538-019

00538-020

Rev. F | Page 9 of 32

AD600/AD602

THEORY OF OPERATION

The AD600/AD602 have the same general design and features.
They comprise two fixed gain amplifiers, each preceded by a
voltage-controlled attenuator of 0 dB to 42.14 dB with independent
control interfaces, each having a scaling factor of 32 dB per volt.
The AD600 amplifiers are laser trimmed to a gain of 41.07 dB
(×113), providing a control range of −1.07 dB to +41.07 dB
(0 dB to +40 dB with overlap). The AD602 amplifiers have a gain
of 31.07 dB (×35.8) and provide an overall gain of −11.07 dB to
+31.07 dB (−10 dB to +30 dB with overlap).

The advantage of this topology is that the amplifier can use
negative feedback to increase the accuracy of its gain. In
addition, because the amplifier does not have to handle large
signals at its input, the distortion can be very low. Another
feature of this approach is that the small-signal gain and phase
response, and thus the pulse response, are essentially
independent of gain.

Figure 21 is a simplified schematic of one channel. The input
attenuator is a 7-stage R-2R ladder network, using untrimmed
resistors of nominally R = 62.5 , which results in a characteristic
resistance of 125  ± 20%. A shunt resistor is included at the
input and laser trimmed to establish a more exact input
resistance of 100  ± 2%, which ensures accurate operation
(gain and HP corner frequency) when used in conjunction with
external resistors or capacitors.

GAT1

SCALING

REFERENCE

C1HI

V

G

C1LO

GAIN CONTROL

INTERFACE

0dB

–12.04dB

A1HI

A1LO

Figure 21. Simplified Block Diagram of a Single Channel of the AD600/AD602

–6.02dB

500Ω

R-2R LADDER NETWORK

The nominal maximum signal at input A1HI is 1 V rms (±1.4 V
peak) when using the recommended ±5 V supplies, although
operation to ±2 V peak is permissible with some increase in HF
distortion and feedthrough. Each attenuator is provided with a
separate signal LO connection for use in rejecting common
mode, the voltage between input and output grounds. Circuitry
is included to provide rejection of up to ±100 mV.

PRECISION PASSIVE

INPUT ATTENUATOR

–18.06dB

–22.08dB

–30.1dB

–36.12dB

–42.14dB

62.5Ω

GATING

INTERFACE

RF2

2.24kΩ (AD600)
694Ω (AD602)

RF1
20Ω

FIXED-GAIN

AMPLIFIER

41.07dB (AD600)

31.07dB (AD602)

A1OP

A1CM

The signal applied at the input of the ladder network is
attenuated by 6.02 dB by each section; thus, the attenuation to
each of the taps is progressively 0 dB, 6.02 dB, 12.04 dB, 18.06 dB,

24.08 dB, 30.1 dB, 36.12 dB, and 42.14 dB. A unique circuit
technique is employed to interpolate between these tap points,
indicated by the slider in Figure 21, providing continuous
attenuation from 0 dB to 42.14 dB.

To understand the AD600/AD602, it helps to think in terms of
a mechanical means for moving this slider from left to right; in
fact, it is voltage controlled. The details of the control interface
are discussed later. Note that the gain is exactly determined at
all times and a linear decibel relationship is guaranteed auto­matically between the gain and the control parameter that
determines the position of the slider. In practice, the gain
deviates from the ideal law by about ±0.2 dB peak (see Figure 28).

Note that the signal inputs are not fully differential. A1LO, A1CM
(for CH1), A2LO, and A2CM (for CH2) provide separate access
to the input and output grounds. This recognizes that, even when
using a ground plane, small differences arise in the voltages at
these nodes. It is important that A1LO and A2LO be connected
directly to the input ground(s). Significant impedance in these
connections reduces the gain accuracy. A1CM and A2CM
should be connected to the load ground(s).

NOISE PERFORMANCE

An important reason for using this approach is the superior
noise performance that can be achieved. The nominal resistance
seen at the inner tap points of the attenuator is 41.7  (one third of
125 ), which, at 27°C, exhibits a Johnson noise spectral density
(NSD) of 0.84 nV/√Hz (that is, √4kTR), a large fraction of the
total input noise. The first stage of the amplifier contributes
another 1.12 nV/√Hz, for a total input noise of 1.4 nV/√Hz.

The noise at the 0 dB tap depends on whether the input is
short-circuited or open-circuited. When shorted, the minimum
NSD of 1.12 nV/√Hz is achieved. When open, the resistance of

00538-021

100  at the first tap generates 1.29 nV/√Hz, so the noise
increases to 1.71 nV/√Hz. This last calculation would be important
if the AD600 were preceded, for example, by a 900  resistor to
allow operation from inputs up to ±10 V rms. However, in most
cases, the low impedance of the source limits the maximum
noise resistance.

Rev. F | Page 10 of 32