Analog Devices AD534TH, AD534TD, AD534T, AD534SH, AD534SE Datasheet
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PIN CONFIGURATIONS
a
AD534
Internally Trimmed
Precision IC Multiplier
FEATURES
Pretrimmed to ⴞ0.25% max 4-Quadrant Error (AD534L)
All Inputs (X, Y and Z) Differential, High Impedance for
[(X
1 – X2
) (Y1 – Y2)/10 V] + Z2 Transfer Function
Scale-Factor Adjustable to Provide up to X100 Gain
Low Noise Design: 90 V rms, 10 Hz–10 kHz
Low Cost, Monolithic Construction
Excellent Long Term Stability
APPLICATIONS
High Quality Analog Signal Processing
Differential Ratio and Percentage Computations
Algebraic and Trigonometric Function Synthesis
Wideband, High-Crest rms-to-dc Conversion
Accurate Voltage Controlled Oscillators and Filters
Available in Chip Form
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
TO-116 (D-14)
Package
TOP VIEW
(Not to Scale)
14
13
12
11
10
9
8
1
2
3
4
5
6
7
NC = NO CONNECT
X1
+V
S
NC
AD534
OUT
Z1
Z2
NC
–V
S
X2
NC
SF
NC
Y1
Y2
TO-100 (H-10A)
Package
–V
S
+V
S
OUT
Z1
Z2
Y2
Y1
SF
X2
X1
AD534
TOP VIEW
(Not To Scale)
LCC (E-20A)
Package
+V
S
3
21
20 19
NC
X1
X2
NC
–V
S
NC
Y2
Y1
NC
91011
12 13
4
5
6
7
8
NC
NC
SF
NC
NC
18
17
16
15
14
OUT
NC
Z1
NC
Z2
AD534
TOP VIEW
(Not To Scale)
NC = NO CONNECT
PRODUCT DESCRIPTION
The AD534 is a monolithic laser trimmed four-quadrant multiplier divider having accuracy specifications previously found
only in expensive hybrid or modular products. A maximum
multiplication error of ±0.25% is guaranteed for the AD534L
without any external trimming. Excellent supply rejection, low
temperature coefficients and long term stability of the on-chip
thin film resistors and buried Zener reference preserve accuracy
even under adverse conditions of use. It is the first multiplier to
offer fully differential, high impedance operation on all inputs,
including the Z-input, a feature which greatly increases its flexibility and ease of use. The scale factor is pretrimmed to the
standard value of 10.00 V; by means of an external resistor, this
can be reduced to values as low as 3 V.
The wide spectrum of applications and the availability of several
grades commend this multiplier as the first choice for all new
designs. The AD534J (±1% max error), AD534K (±0.5% max)
and AD534L (±0.25% max) are specified for operation over the
0°C to +70°C temperature range. The AD534S (±1% max) and
AD534T (±0.5% max) are specified over the extended temperature range, –55°C to +125°C. All grades are available in her-
metically sealed TO-100 metal cans and TO-116 ceramic DIP
packages. AD534J, K, S and T chips are also available.
PROVIDES GAIN WITH LOW NOISE
The AD534 is the first general purpose multiplier capable of
providing gains up to X100, frequently eliminating the need for
separate instrumentation amplifiers to precondition the inputs.
The AD534 can be very effectively employed as a variable gain
differential input amplifier with high common-mode rejection.
The gain option is available in all modes, and will be found to
simplify the implementation of many function-fitting algorithms
such as those used to generate sine and tangent. The utility of
this feature is enhanced by the inherent low noise of the AD534:
90 µV, rms (depending on the gain), a factor of 10 lower than
previous monolithic multipliers. Drift and feedthrough are also
substantially reduced over earlier designs.
UNPRECEDENTED FLEXIBILITY
The precise calibration and differential Z-input provide a degree
of flexibility found in no other currently available multiplier.
Standard MDSSR functions (multiplication, division, squaring,
square-rooting) are easily implemented while the restriction to
particular input/output polarities imposed by earlier designs has
been eliminated. Signals may be summed into the output, with
or without gain and with either a positive or negative sense.
Many new modes based on implicit-function synthesis have
been made possible, usually requiring only external passive
components. The output can be in the form of a current, if
desired, facilitating such operations as integration.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1999
AD534–SPECIFICATIONS
Model AD534J AD534K AD534L
Min Typ Max Min Typ Max Min Typ Max Units
MULTIPLIER PERFORMANCE
Transfer Function
( X
1
– X2)( Y1– Y2)
10 V
+ Z
2
( X
1
– X2)( Y1– Y2)
10 V
+ Z
2
( X
1
– X2)( Y1– Y2)
10 V
+ Z
2
Total Error
1
(–10 V ≤ X, Y ≤ +10 V) ⴞ1.0 ⴞ0.5 ⴞ0.25 %
T
A
= min to max ±1.5 ±1.0 ±0.5 %
Total Error vs. Temperature ±0.022 ±0.015 ±0.008 %/°C
Scale Factor Error
(SF = 10.000 V Nominal)
2
±0.25 ±0.1 ±0.1 %
Temperature-Coefficient of
Scaling Voltage ±0.02 ±0.01 ±0.005 %/°C
Supply Rejection (±15 V ± 1V) ±0.01 ±0.01 ±0.01 %
Nonlinearity, X (X = 20 V p-p, Y = 10 V) ±0.4 ±0.2 ⴞ0.3 ±0.10 ⴞ0.12 %
Nonlinearity, Y (Y = 20 V p-p, X = 10 V) ±0.2 ± 0.1 ⴞ0.1 ±0.005 ⴞ0.1 %
Feedthrough
3
, X (Y Nulled,
X = 20 V p-p 50 Hz) ±0.3 ±0.15 ⴞ0.3 ±0.05 ⴞ0.12 %
Feedthrough
3
, Y (X Nulled,
Y = 20 V p-p 50 Hz) ±0.01 ±0.01 ⴞ0.1 ±0.003 ⴞ0.1 %
Output Offset Voltage ±5 ⴞ30 ±2 ⴞ15 ±2 ⴞ10 mV
Output Offset Voltage Drift 200 100 100 µV/°C
DYNAMICS
Small Signal BW (V
OUT
= 0.1 rms) 1 1 1 MHz
1% Amplitude Error (C
LOAD
= 1000 pF) 50 50 50 kHz
Slew Rate (V
OUT
20 p-p) 20 20 20 V/µs
Settling Time (to 1%, ∆V
OUT
= 20 V) 2 2 2 µs
NOISE
Noise Spectral-Density SF = 10 V 0.8 0.8 0.8 µV/√Hz
SF = 3 V
4
0.4 0.4 0.4 µV/√Hz
Wideband Noise f = 10 Hz to 5 MHz 1 1 1 mV/rms
Wideband Noise f = 10 Hz to 10 kHz 90 90 90 µV/rms
OUTPUT
Output Voltage Swing ⴞ11 ⴞ11 ⴞ 11 V
Output Impedance (f ≤1 kHz) 0.1 0.1 0.1 Ω
Output Short Circuit Current
(R
L
= 0, TA = min to max) 30 30 30 mA
Amplifier Open Loop Gain (f = 50 Hz) 70 70 70 dB
INPUT AMPLIFIERS (X, Y and Z)
5
Signal Voltage Range (Diff. or CM ±10 ±10 ±10 V
Operating Diff.) ±12 ± 12 ± 12 V
Offset Voltage X, Y ±5 ⴞ20 ±2 ⴞ10 ±2 ⴞ10 mV
Offset Voltage Drift X, Y 100 50 50 µV/°C
Offset Voltage Z ±5 ⴞ30 ±2 ⴞ15 ±2
±
10 mV
Offset Voltage Drift Z 200 100 100 µV/°C
CMRR 60 80 70 90 70 90 dB
Bias Current 0.8 2.0 0.8 2.0 0.8 2.0 µA
Offset Current 0.1 0.1 0.05 0.2 µA
Differential Resistance 10 10 10 MΩ
DIVIDER PERFORMANCE
Transfer Function (X
1
> X2)
10 V
( Z
2
− Z
1
)
( X
1
− X
2
)
+Y
1
10 V
( Z
2
− Z
1
)
( X
1
− X
2
)
+Y
1
10 V
( Z
2
− Z
1
)
( X
1
− X
2
)
+Y
1
Total Error
1
(X = 10 V, –10 V ≤ Z ≤+10 V) ±0.75 ±0.35 ±0.2 %
(X = 1 V, –1 V ≤Z ≤+1 V) ±2.0 ± 1.0 ± 0.8 %
(0.1 V ≤ X ≤ 10 V, –10 V ≤ Z ≤ 10 V) ±2.5 ±1.0 ±0.8 %
SQUARE PERFORMANCE
Transfer Function
( X
1
− X
2
)
2
10 V
+ Z
2
( X
1
− X
2
)
2
10 V
+ Z
2
( X
1
− X
2
)
2
10 V
+ Z
2
Total Error (–10 V ≤ X ≤ 10 V) ±0.6 ±0.3 ±0.2 %
SQUARE-ROOTER PERFORMANCE
Transfer Function (Z
1
≤ Z
2
)
10 V ( Z
2
− Z1) + X
2
10 V ( Z
2
− Z1) + X
2
10 V ( Z
2
− Z1) + X
2
Total Error
1
(1 V ≤ Z ≤ 10 V) ±1.0 ± 0.5 ± 0.25 %
POWER SUPPLY SPECIFICATIONS
Supply Voltage
Rated Performance ±15 ± 15 ±15 V
Operating ±8 ⴞ18 ± 8 ⴞ18 ± 8 ⴞ18 V
Supply Current
Quiescent 4 6 4 6 4 6 mA
PACKAGE OPTIONS
TO-100 (H-10A) AD534JH AD534KH AD534LH
TO-116 (D-14) AD534JD AD534KD AD534LD
Chips AD534K Chips
(@ TA = + 25ⴗC, ⴞV
S
= 15 V, R ≥ 2k
⍀
)
N
OTES
1
Figures given are percent of full scale, ±10 V (i.e., 0.01% = 1 mV).
2
May be reduced down to 3 V using external resistor between –VS and SF.
3
Irreducible component due to nonlinearity: excludes effect of offsets.
4
Using external resistor adjusted to give SF = 3 V.
5
See Functional Block Diagram for definition of sections.
Specifications subject to change without notic
e.
Specifications shown in boldface are tested on all production units at final electrical
test. Results from those tests are used to calculate outgoing quality levels. All min and
max specifications are guaranteed, although only those shown in boldface are tested
on all production units.
REV. B–2–
Model AD534S AD534T
Min Typ Max Min Typ Max Units
MULTIPLIER PERFORMANCE
Transfer Function
( X
1
– X2)( Y1– Y2)
10 V
+ Z
2
( X
1
– X2)( Y1– Y2)
10 V
+ Z
2
Total Error
1
(–10 V ≤ X, Y ≤ +10 V) ⴞ1.0 ⴞ0.5 %
T
A
= min to max ⴞ2.0 ±1.0 %
Total Error vs. Temperature ⴞ0.02 ⴞ0.01 %/°C
Scale Factor Error
(SF = 10.000 V Nominal)
2
±0.25 ±0.1 %
Temperature-Coefficient of
Scaling Voltage ±0.02 ⴞ0.005 %/°C
Supply Rejection (±15 V ± 1V) ±0.01 ±0.01 %
Nonlinearity, X (X = 20 V p-p, Y = 10 V) ±0.4 ±0.2 ⴞ0.3 %
Nonlinearity, Y (Y = 20 V p-p, X = 10 V) ±0.2 ±0.1 ⴞ0.1 %
Feedthrough
3
, X (Y Nulled,
X = 20 V p-p 50 Hz) ±0.3 ±0.15 ⴞ0.3 %
Feedthrough
3
, Y (X Nulled,
Y = 20 V p-p 50 Hz) ±0.01 ±0.01 ⴞ0.1 %
Output Offset Voltage ±5
±
30 ±2 ⴞ15 mV
Output Offset Voltage Drift 500 300 µV/°C
DYNAMICS
Small Signal BW (V
OUT
= 0.1 rms) 1 1 MHz
1% Amplitude Error (C
LOAD
= 1000 pF) 50 50 kHz
Slew Rate (V
OUT
20 p-p) 20 20 V/µs
Settling Time (to 1%, ∆V
OUT
= 20 V) 2 2 µs
NOISE
Noise Spectral-Density SF = 10 V 0.8 0.8 µV/√Hz
SF = 3 V
4
0.4 0.4 µV/√Hz
Wideband Noise f = 10 Hz to 5 MHz 1.0 1.0 mV/rms
Wideband Noise f = 10 Hz to 10 kHz 90 90 µV/rms
OUTPUT
Output Voltage Swing
±
11
±
11 V
Output Impedance (f ≤ 1 kHz) 0.1 0.1 Ω
Output Short Circuit Current
(R
L
= 0, TA = min to max) 30 30 mA
Amplifier Open Loop Gain (f = 50 Hz) 70 70 dB
INPUT AMPLIFIERS (X, Y and Z)
5
Signal Voltage Range (Diff. or CM ±10 ±10 V
Operating Diff.) ±12 ±12 V
Offset Voltage X, Y ±5 ⴞ20 ±2 ⴞ10 mV
Offset Voltage Drift X, Y 100 150 µV/°C
Offset Voltage Z ±5 ⴞ30 ±2 ⴞ15 mV
Offset Voltage Drift Z 500 300 µV/°C
CMRR 60 80 70 90 dB
Bias Current 0.8 2.0 0.8 2.0 µA
Offset Current 0.1 0.1 µA
Differential Resistance 10 10 MΩ
DIVIDER PERFORMANCE
Transfer Function (X1 > X2)
10 V
( Z
2
− Z
1
)
( X
1
− X
2
)
+Y
1
10 V
( Z
2
− Z
1
)
( X
1
− X
2
)
+Y
1
Total Error
1
(X = 10 V, –10 V ≤Z ≤+10 V) ±0.75 ±0.35 %
(X = 1 V, –1 V ≤ Z ≤ +1 V) ±2.0 ±1.0 %
(0.1 V ≤ X ≤ 10 V, –10 V ≤Z ≤ 10 V) ±2.5 ±1.0 %
SQUARE PERFORMANCE
Transfer Function
( X
1
− X
2
)
2
10 V
+ Z
2
( X
1
− X
2
)
2
10 V
+ Z
2
Total Error (–10 V ≤ X ≤ 10 V) ±0.6 ±0.3 %
SQUARE-ROOTER PERFORMANCE
Transfer Function (Z
1
≤ Z
2
)
10 V ( Z
2
− Z1) + X
2
10 V ( Z
2
− Z1) + X
2
Total Error
1
(1 V ≤ Z ≤ 10 V) ±1.0 ±0.5 %
POWER SUPPLY SPECIFICATIONS
Supply Voltage
Rated Performance ±15 ±15 V
Operating ±8 ⴞ22 ±8 ⴞ22 V
Supply Current
Quiescent 4 6 4 6 mA
PACKAGE OPTIONS
TO-100 (H-10A) AD534SH AD534TH
TO-116 (D-14) AD534SD AD534TD
E-20A AD534SE
Chips AD534S Chips AD534T Chips
AD534
N
OTES
1
Figures given are percent of full scale, ±10 V (i.e., 0.01% = 1 mV).
2
May be reduced down to 3 V using external resistor between –VS and SF.
3
Irreducible component due to nonlinearity: excludes effect of offsets.
4
Using external resistor adjusted to give SF = 3 V.
5
See Functional Block Diagram for definition of sections.
Specifications subject to change without notice.
REV. B –3–
S
pecifications shown in boldface are tested on all production units at final electrical
test. Results from those tests are used to calculate outgoing quality levels. All min and
max specifications are guaranteed, although only those shown in boldface are tested
on all production units.
AD534
–4– REV. B
ABSOLUTE MAXIMUM RATINGS
AD534J, K, L AD534S, T
Supply Voltage ±18 V ±22 V
Internal Power Dissipation 500 mW *
Output Short-Circuit to Ground Indefinite *
Input Voltages, X1 X2 Y1 Y2 Z1 Z
2
±V
S
*
Rated Operating Temperature Range 0°C to +70°C –55°C to
+125°C
Storage Temperature Range –65°C to +150°C*
Lead Temperature Range, 60 s Soldering +300°C*
*Same as AD534J Specs.
ORDERING GUIDE
Model Temperature Range Package Description Package Option
AD534JD 0°C to +70°C Side Brazed DIP D-14
AD534KD 0°C to +70°C Side Brazed DIP D-14
AD534LD 0°C to +70°C Side Brazed DIP D-14
AD534JH 0°C to +70°C Header H-10A
AD534JH/+ 0°C to +70°C Header H-10A
AD534KH 0°C to +70°C Header H-10A
AD534KH/+ 0°C to +70°C Header H-10A
AD534LH 0°C to +70°C Header H-10A
AD534K Chip 0°C to +70°C Chip
AD534SD –55°C to +125°C Side Brazed DIP D-14
AD534SD/883B –55°C to +125°C Side Brazed DIP D-14
AD534TD –55°C to +125°C Side Brazed DIP D-14
AD534TD/883B –55°C to +125°C Side Brazed DIP D-14
JM38510/13902BCA –55°C to +125°C Side Brazed DIP D-14
JM38510/13901BCA –55°C to +125°C Side Brazed DIP D-14
AD534SE –55°C to +125°C LCC E-20A
AD534SE/883B –55°C to +125°C LCC E-20A
AD534TE/883B –55°C to +125°C LCC E-20A
AD534SH –55°C to +125°C Header H-10A
AD534SH/883B –55°C to +125°C Header H-10A
AD534TH –55°C to +125°C Header H-10A
AD534TH/883B –55°C to +125°C Header H-10A
JM38510/13902BIA –55°C to +125°C Header H-10A
JM38510/13901BIA –55°C to +125°C Header H-10A
AD534S Chip –55°C to +125°C Chip
AD534T Chip –55°C to +125°C Chip
The
rmal C
haracteristics
Thermal Resistance θJC = 25°C/W for H-10A
θ
JA
= 150°C/W for H-10A
θ
JC
= 25°C/W for D-14 or E-20A
θ
JA
= 95°C/W for D-14 or E-20A
X
1
+V
S
OUT
Y
2
–V
S
Z
2
Y
1
SF
X
2
Z
1
THE AD534 IS AVAILABLE IN LASER - TRIMMED CHIP FORM
0.076
(1.93)
0.100 (2.54)
CHIP DIMENSIONS AND BONDING DIAGRAM
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
470kV
50kV
1kV
TO APPROPRIATE
INPUT TERMINAL
+V
S
–V
S
Figure 1. Optional Trimming Configuration
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD534 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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