Analog Devices AD5172 3 b Datasheet

256-Position One-Time Programmable

G

G

Dual-Channel I

FEATURES

2-channel, 256-position devices
OTP (one-time programmable) set-and-forget

resistance setting, low cost alternative to EEMEM
Unlimited adjustments prior to OTP activation
OTP overwrite allows dynamic adjustments with

user-defined preset
End-to-end resistance: 2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ
Compact MSOP-10 (3 mm × 4.9 mm) package
Fast settling time: t
Full read/write of wiper register
Power-on preset to midscale
Extra package address decode pins AD0 and AD1 (AD5173)
Single supply: 2.7 V to 5.5 V
Low temperature coefficient: 35 ppm/°C
Low power: I
Wide operating temperature: –40°C to +125°C
Evaluation board and software are available
Software replaces µC in factory programming applications

APPLICATIONS

Systems calibration
Electronics level setting
Mechanical Trimmers® replacement in new designs
Permanent factory PCB setting
Transducer adjustment of pressure, temperature, position,

chemical, and optical sensors
RF amplifier biasing
Automotive electronics adjustment
Gain control and offset adjustment

GENERAL OVERVIEW

The AD5172/AD5173 are dual-channel, 256-position, one-time
programmable (OTP) digital potentiometers
link technology to achieve memory retention of resistance setting.
OTP is a cost-effective alternative to EEMEM for users who do
not need to program the digital potentiometer setting in memory
more than once. This device performs the same electronic
adjustment function as mechanical potentiometers or variable
resistors with enhanced resolution, solid-state reliability, and
superior low temperature coefficient performance.

The AD5172/AD5173 are programmed using a 2-wire, I
compatible digital interface. Unlimited adjustments are allowed
before permanently setting the resistance value. During OTP
activation, a permanent blow-fuse command freezes the wiper
position (analogous to placing epoxy on a mechanical trimmer).

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

= 5 µs typ in power-up

S

= 6 µA max

DD

1

that employ fuse

2

C-

2

C Digital Potentiometers

AD5172/AD5173

FUNCTIONAL BLOCK DIAGRAMS

W1

A1

V

ND

SDA

SCL

V

AD0

AD1

SDA

SCL

DD

DD

ND

12

REGISTER 1

12

REGISTER 1

ADDRESS

DECODE

Unlike traditional OTP digital potentiometers, the AD5172/
AD5173 have a unique temporary OTP overwrite feature that
allows for new adjustments even after a fuse has been blown.
However, the OTP setting is restored during subsequent power­up conditions. This feature allows users to treat these digital
potentiometers as volatile potentiometers with a programmable
preset.

For applications that program the AD5172/AD5173 at the
factory, Analog Devices offers device programming software
running on Windows® NT®, 2000, and XP® operating systems.
This software effectively replaces any external I
thus enhancing the time-to-market of the user’s systems.

1

The terms digital potentiometer, VR, and RDAC are used interchangeably.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]
Fax: [phone] © 2004 Analog Devices, Inc. All rights reserved.

www.analog.com

B1 A2 W2

FUSE
LINKS

RDAC

/

8

SERIAL INPUT

REGISTER

Figure 1. AD5172

W1

B1 W2

FUSE

LINKS

RDAC

/

8

SERIAL INPUT

REGISTER

Figure 2. AD5173

RDAC

REGISTER 2

RDAC

REGISTER 2

B2

B2

2

C controllers,

04103-0-001

04103-0-002

AD5172/AD5173

TABLE OF CONTENTS

Electrical Characteristics—2.5 kΩ Version................................... 3

ESD Protection ........................................................................... 15

Electrical Characteristics—10 kΩ, 50 kΩ, 100 kΩ Versions....... 4

Timing Characteristics—2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ Versions

............................................................................................................. 5

Absolute Maximum Ratings............................................................ 6

Pin Configuration and Function Descriptions............................. 7

Typical Performance Characteristics ............................................. 8

Test C ir c ui t s .....................................................................................12

Theory of Operation ...................................................................... 13

One-Time Programming (OTP) .............................................. 13

Programming the Variable Resistor and Voltage ................... 13

Programming the Potentiometer Divider............................... 14

REVISION HISTORY

11/04—Changed from Rev. A to Rev. B

Updated Format.................................................................. Universal

Changes to Specifications.................................................................3

Changes to One-Time Programming (OTP) Section.................13

Changes to Power Supply Considerations Section......................15

Changes to Figure 44 and Figure 45..............................................15

Changes to Figure 46 and Figure 47..............................................16

Changes to Ordering Guide...........................................................24

Terminal Voltage Operating Range ......................................... 15

Power-Up Sequence ................................................................... 15

Power Supply Considerations................................................... 15

Layout Considerations............................................................... 16

Evaluation Software/Hardware..................................................... 17

Software Programming ............................................................. 17

2

I

C Interface .................................................................................... 19

2

I

C-Compatible 2-Wire Serial Bus........................................... 21

Outline Dimensions ....................................................................... 23

Ordering Guide............................................................................... 24

11/03—Changed from Rev. 0 to Rev. A

Changes to Electrical Characteristics—2.5 kΩ................................3

Rev. B | Page 2 of 24

AD5172/AD5173

ELECTRICAL CHARACTERISTICS—2.5 kΩ VERSION

VDD = 5 V ± 10% or 3 V ± 10%; VA = +VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.

Table 1.

Parameter Symbol Conditions Min Typ1Max Unit

DC CHARACTERISTICS—RHEOSTAT MODE

Resistor Differential Nonlinearity
Resistor Integral Nonlinearity
Nominal Resistor Tolerance
Resistance Temperature Coefficient (RAB/RAB)/T VAB = VDD, Wiper = No Connect 35 ppm/°C
RWB (Wiper Resistance) R

DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications Apply to all VRs)

Differential Nonlinearity
Integral Nonlinearity

4

4

Voltage Divider Temperature
Coefficient

Full-Scale Error V
Zero-Scale Error V

RESISTOR TERMINALS

Voltage Range

5

Capacitance6 A, B CA, C

Capacitance W C

Shutdown Supply Current
Common-Mode Leakage I

DIGITAL INPUTS AND OUTPUTS

Input Logic High V
Input Logic Low V
Input Logic High V
Input Logic Low V
Input Current I
Input Capacitance

6

POWER SUPPLIES

Power Supply Range V
OTP Supply Voltage V
Supply Current I
OTP Supply Current I
Power Dissipation

8

Power Supply Sensitivity PSS VDD = 5 V ± 10%, Code = Midscale ±0.02 ±0.08 %/%

DYNAMIC CHARACTERISTICS

Bandwidth –3 dB BW_2.5K Code = 0x80 4.8 MHz
Total Harmonic Distortion THD
VW Settling Time t
Resistor Noise Voltage Density e

1

Typical specifications represent average readings at 25°C and VDD = 5 V.

2

Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

3

VAB = VDD, Wiper (VW) = no connect.

4

INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V. DNL

specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

5

Resistor terminals A, B, W have no limitations on polarity with respect to each other.

6

Guaranteed by design and not subject to production test.

7

Measured at the A terminal. The A terminal is open circuited in shutdown mode.

8

P

is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

DISS

9

All dynamic characteristics use VDD = 5 V.

2

2

3

R-DNL RWB, VA = No Connect –2 ±0.1 +2 LSB
R-INL RWB, VA = No Connect –6 ±0.75 +6 LSB
R

AB

WB

TA = 25°C –20 +55 %

Code = 0x00, VDD = 5 V 160 200 Ω

DNL –1.5 ±0.1 +1.5 LSB
INL –2 ±0.6 +2 LSB
(∆V

VA, VB, V

)/∆T Code = 0x80 15 ppm/°C

W/VW

WFSE

WZSE

W

B

Code = 0xFF –10 –2.5 0 LSB
Code = 0x00 0 2 10 LSB

GND V
f = 1 MHz, Measured to GND,

45 pF

V

DD

Code = 0x80

W

f = 1 MHz, Measured to GND,

60 pF

Code = 0x80

7

9

I

A_SD

CM

IH

IL

IH

IL

IL

C

IL

DD RANGE

DD_OTP

DD

DD_OTP

P

DISS

VDD = 5.5 V 0.01 1 µA
VA = VB = VDD/2 1 nA

VDD = 5 V 2.4 V
VDD = 5 V 0.8 V
VDD = 3 V 2.1 V
VDD = 3 V 0.6 V
VIN = 0 V or 5 V ±1 µA
5 pF

2.7 5.5 V
TA = 25°C 5.25 5.5 V
VIH = 5 V or VIL = 0 V 3.5 6 µA
V

= 5.5 V, TA = 25°C 100 mA

DD_OTP

VIH = 5 V or VIL = 0 V, VDD = 5 V 30 µW

W

S

N_WB

VA = 1 V rms, VB = 0 V, f = 1 kHz 0.1 %
VA = 5 V, VB = 0 V, ±1 LSB Error Band 1 µs
RWB = 1.25 kΩ, RS = 0 3.2 nV/√Hz

Rev. B | Page 3 of 24

AD5172/AD5173

ELECTRICAL CHARACTERISTICS—10 kΩ, 50 kΩ, 100 kΩ VERSIONS

VDD = 5 V ± 10% or 3 V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.

Table 2.

Parameter Symbol Conditions Min Typ1Max Unit

DC CHARACTERISTICS—RHEOSTAT MODE

Resistor Differential Nonlinearity
Resistor Integral Nonlinearity
Nominal Resistor Tolerance
Resistance Temperature Coefficient (∆RAB/RAB)/∆T VAB = VDD, Wiper = No Connect 35 ppm/°C
RWB (Wiper Resistance) R

DC CHARACTERISTICS—POTENTIOMETER DIVIDER MODE (Specifications Apply to all VRs)

Differential Nonlinearity
Integral Nonlinearity

4

Voltage Divider Temperature Coefficient (∆VW/VW)/∆T Code = 0x80 15 ppm/°C
Full-Scale Error V
Zero-Scale Error V

RESISTOR TERMINALS

Voltage Range

5

Capacitance6 A, B CA, C
Capacitance6 W C
Shutdown Supply Current
Common-Mode Leakage I

DIGITAL INPUTS AND OUTPUTS

Input Logic High V
Input Logic Low V
Input Logic High V
Input Logic Low V
Input Current I
Input Capacitance

6

POWER SUPPLIES

Power Supply Range V
OTP Supply Voltage

8

Supply Current I
OTP Supply Current
Power Dissipation

9

10

Power Supply Sensitivity PSS VDD = +5 V ± 10%, Code = Midscale ±0.02 ±0.08 %/%

DYNAMIC CHARACTERISTICS

Bandwidth –3 dB BW RAB = 10 kΩ, Code = 0x80 600 kHz
R
R
Total Harmonic Distortion THD
VW Settling Time (10 kΩ/50 kΩ/100 kΩ) t
Resistor Noise Voltage Density e

1

Typical specifications represent average readings at 25°C and VDD = 5 V.

2

Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper

positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.

3

VAB = VDD, Wiper (VW) = no connect.

4

INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. VA = VDD and VB = 0 V.

DNL specification limits of ±1 LSB maximum are guaranteed monotonic operating conditions.

5

Resistor terminals A, B, W have no limitations on polarity with respect to each other.

6

Guaranteed by design and not subject to production test.

7

Measured at the A terminal. The A terminal is open circuited in shutdown mode.

8

Different from operating power supply, power supply OTP is used one time only.

9

Different from operating current, supply current for OTP lasts approximately 400 ms for one time only.

10

P

is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.

DISS

11

All dynamic characteristics use VDD = 5 V.

2

2

3

4

R-DNL RWB, VA = No Connect –1 ±0.1 +1 LSB
R-INL RWB, VA = No Connect –2.5 ±0.25 +2.5 LSB
∆R

AB

WB

TA = 25°C –20 +20 %

Code = 0x00, VDD = 5 V 160 200 Ω

DNL –1 ±0.1 +1 LSB
INL –1 ±0.3 +1 LSB

WFSE

WZSE

VA, VB, V

B

7

11

W

I

A_SD

CM

IH

IL

IH

IL

IL

C

IL

DD RANGE

V

DD_OTP

DD

I

DD_OTP

P

DISS

W

S

N_WB

Code = 0xFF –2.5 –1 0 LSB
Code = 0x00 0 1 2.5 LSB

GND V

W

V

DD

f = 1 MHz, Measured to GND, Code = 0x80 45 pF
f = 1 MHz, Measured to GND, Code = 0x80 60 pF
VDD = 5.5 V 0.01 1 µA
VA = VB = VDD/2 1 nA

VDD = 5 V 2.4 V
VDD = 5 V 0.8 V
VDD = 3 V 2.1 V
VDD = 3 V 0.6 V
VIN = 0 V or 5 V ±1 µA
5 pF

2.7 5.5 V

5.25 5.5 V
VIH = 5 V or VIL = 0 V 3.5 6 µA

V

= 5.5 V, TA = 25°C

DD_OTP

100 mA

VIH = 5 V or VIL = 0 V, VDD = 5 V 30 µW

= 50 kΩ, Code = 0x80 100 kHz

AB

= 100 kΩ, Code = 0x80 40 kHz

AB

VA =1 V rms, VB = 0 V, f = 1 kHz, RAB = 10 kΩ 0.1 %
VA = 5 V, VB = 0 V, ±1 LSB Error Band 2 µs
RWB = 5 kΩ, RS = 0 9 nV/√Hz

Rev. B | Page 4 of 24

AD5172/AD5173

TIMING CHARACTERISTICS—2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS

VDD = 5 V ± 10% or 3 V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted.

Table 3.

Parameter Symbol Conditions Min Typ Max Unit

I2C INTERFACE TIMING CHARACTERISTICS1 (Specifications Apply to All Parts)

SCL Clock Frequency f
t

Bus Free Time between Stop and Start t

BUF

t

Hold Time (Repeated Start) t

HD;STA

t

Low Period of SCL Clock t

LOW

t

High Period of SCL Clock t

HIGH

t

Setup Time for Repeated Start Condition t

SU;STA

t

Data Hold Time

HD;DAT

t

Data Setup Time t

SU;DAT

2

tF Fall Time of Both SDA and SCL Signals t
tR Rise Time of Both SDA and SCL Signals t
t

Setup Time for Stop Condition t

SU;STO

1

See the timing diagrams (Figure 51 to Figure 55) for locations of measured values.

2

The maximum t

has only to be met if the device does not stretch the low period (t

HD;DAT

SCL

1

2

3

4

5

t

6

7

8

9

10

400 kHz

1.3 µs
After this period, the first clock pulse is

0.6 µs

generated.

1.3 µs

0.6 µs

0.6 µs

0.9 µs
100 ns
300 ns
300 ns

0.6 µs

) of the SCL signal.

LOW

Rev. B | Page 5 of 24

AD5172/AD5173

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 4.

Parameter Rating

VDD to GND –0.3 V to +7 V
VA, VB, VW to GND V
Terminal Current, Ax–Bx, Ax–Wx, Bx–Wx

1

DD

Pulsed ±20 mA

Continuous ±5 mA
Digital Inputs and Output Voltage to GND 0 V to 7 V
Operating Temperature Range –40°C to +125°C
Maximum Junction Temperature (T

) 150°C

JMAX

Storage Temperature –65°C to +150°C
Lead Temperature (Soldering, 10 s) 300°C
Thermal Resistance2 θJA: MSOP-10 230°C/W

1

Maximum terminal current is bound by the maximum current handling of

the switches, maximum power dissipation of the package, and maximum
applied voltage across any two of the A, B, and W terminals at a given
resistance.

2

Package power dissipation = (TJ max – TA)/θJA.

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. B | Page 6 of 24

AD5172/AD5173

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

W2

1

B1

2

A1

3

AD5172

TOP VIEW

4

5

DD

10

W1

9

B2

8

A2

7

SDAGND

6

SCLV

04103-0-045

Figure 3. AD5172 Pin Configuration

Table 5. AD5172 Pin Function Descriptions

Pin Mnemonic Description

1 B1 B1 Terminal.
2 A1 A1 Terminal.
3 W2 W2 Terminal.
4 GND Digital Ground.
5 V

DD

Positive Power Supply.
6 SCL Serial Clock Input. Positive-edge triggered.
7 SDA Serial Data Input/Output.
8 A2 A2 Terminal.
9 B2 B2 Terminal.
10 W1 W1 Terminal.

AD0

W2

1

B1

2

3

AD5173

TOP VIEW

4

5

DD

10

W1

9

B2

8

AD1

7

SDAGND

6

SCLV

04103-0-046

Figure 4. AD5173 Pin Configuration

Table 6. AD5173 Pin Function Descriptions

Pin Mnemonic Description

1 B1 B1 Terminal.
2 AD0

Programmable Address Bit 0 for Multiple

Package Decoding.
3 W2 W2 Terminal.
4 GND Digital Ground.
5 V

DD

Positive Power Supply.
6 SCL Serial Clock Input. Positive-edge triggered.
7 SDA Serial Data Input/Output.
8 AD1

Programmable Address Bit 1 for Multiple

Package Decoding.
9 B2 B2 Terminal.
10 W1 W1 Terminal.

Rev. B | Page 7 of 24

AD5172/AD5173

TYPICAL PERFORMANCE CHARACTERISTICS

2.0

1.5

1.0

0.5

0

–0.5

–1.0

RHEOSTAT MODE INL (LSB)

–1.5

–2.0

VDD = 2.7V

Figure 5. R-INL vs. Code vs. Supply Voltages

0.5

0.4

0.3

0.2

0.1

0

–0.1

–0.2

RHEOSTAT MODE DNL (LSB)

–0.3

–0.4

–0.5

Figure 6. R-DNL vs. Code vs. Supply Voltages

0.5

0.4

0.3

0.2

0.1

0

–0.1

–0.2

–0.3

POTENTIOMETER MODE INL (LSB)

–0.4

–0.5

Figure 7. INL vs. Code vs. Temperature

VDD = 5.5V

1289632 640 160 192 224 256

CODE (DECIMAL)

VDD = 2.7V

VDD = 5.5V

1289632 640 160 192 224 256

CODE (DECIMAL)

VDD = 5.5V
T

= –40°C, +25°C, +85°C, +125°C

A

VDD = 2.7V

= –40°C, +25°C, +85°C, +125°C

T

A

1289632 640 160 192 224 256

CODE (DECIMAL)

TA = 25°C
R

= 10kΩ

AB

TA = 25°C
R

= 10kΩ

AB

RAB = 10kΩ

04103-0-003

04103-0-004

04103-0-005

0.5

0.4

0.3

0.2

0.1

0

–0.1

–0.2

–0.3

POTENTIOMETER MODE DNL (LSB)

–0.4

–0.5

VDD = 2.7V; TA = –40°C, +25°C, +85°C, +125°C

1289632 640 160 192 224 256

CODE (DECIMAL)

RAB = 10kΩ

04103-0-006

Figure 8. DNL vs. Code vs. Temperature

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

–0.6

POTENTIOMETER MODE INL (LSB)

–0.8

–1.0

VDD = 2.7V

1289632 640 160 192 224 256

CODE (DECIMAL)

VDD = 5.5V

TA = 25°C
R

= 10kΩ

AB

04103-0-007

Figure 9. INL vs. Code vs. Supply Voltages

0.5

0.4

0.3

0.2

0.1

0

–0.1

–0.2

–0.3

POTENTIOMETER MODE DNL (LSB)

–0.4

–0.5

VDD = 2.7V

VDD = 5.5V

1289632 640 160 192 224 256

CODE (DECIMAL)

TA = 25°C
R

= 10kΩ

AB

04103-0-008

Figure 10. DNL vs. Code vs. Supply Voltages

Rev. B | Page 8 of 24