Analog Devices AD5171 b Datasheet

64-
Position
OTP Digital Potentiometer

FEATURES

64-position One-time programmable (OTP)
setting—low cost alternative over EEMEM Unlimited adjustments prior to OTP activation 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ end-to-end resistance
o
Low tempco 5 ppm/
C in potentiometer mode Low tempco 35 ppm/°C in rheostat mode Compact standard SOT-23-8 package Low power, I Fast settling time, t
2
C®-compatible digital interface
I
= 10 µA max
DD
= 5 µs typ in power-up
s
Computer software replaces µC in
factory programming applications
Full read/write of wiper register
2
C device address pin
Extra I Low operating voltage, 2.7 V to 5.5 V OTP validation check function Automotive temperature range −40°C to +125°C

APPLICATIONS

System calibrations Electronics level settings Mechanical Trimmers® and potentiometer replacements Automotive electronics adjustments Gain control and offset adjustments Transducer circuit adjustments Programmable filters up to 1.5 MHz BW

GENERAL DESCRIPTION

The AD5171 is a 64-position, one-time programmable (OTP) digital potentiometer the memory retention of the resistance setting function. OTP is a cost-effective alternative over the EEMEM approach for users who do not need to reprogram new memory settings in the digital potentiometer. This device performs the same electronic adjustment function as most mechanical trimmers and variable resistors. The AD5171 is programmed using a 2-wire I compatible digital control. It allows unlimited adjustments before permanently setting the resistance value. During the OTP activation, a permanent fuse blown command is sent after the final value is determined, freezing the wiper position at a given setting (analogous to placing epoxy on a mechanical trimmer). When this permanent setting is achieved, the value does not change regardless of supply variations or environmental
Rev. B
2
that uses fuse link technology to achieve
1
set-and-forget resistance
3
2
C-
AD5171
stresses under normal operating conditions. To verify the success of permanent programming, Analog Devices patterned the OTP validation such that the fuse status can be discerned from two validation bits in read mode.
For applications that program the AD5171 in factories, Analog Devices offers device programming software that operates across Windows® 95 to XP platforms, including Windows NT. This software application effectively replaces the need for exter-
2
C controllers or host processors and therefore significantly
nal I reduces users’ development time.
An AD5171 evaluation kit includes the software, connector, and cable that can be converted for factory programming applications.
The AD5171 is available in a compact SOT-23-8 package. All parts are guaranteed to operate over the automotive tempera­ture range of −40°C to +125°C. Besides its unique OTP feature, the AD5171 lends itself well to other general-purpose digital potentiometer applications due to its temperature performance, small form factor, and low cost.
SCL
SDA
AD0
V
DD
GND
1
OTP allows unlimited adjustments before permanent setting.
2
The terms digital potentiometer and RDAC are used interchangeably.
3
Applies to 5 kΩ parts only.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703 © 2005 Analog Devices, Inc. All rights reserved.
I2C INTERFACE
AND
CONTROL LOGIC
WIPER
REGISTER
FUSE
LINK
Figure 1.
Functional Block Diagram
1
W
2
AD5171
V
DD
TOP VIEW
3
GND
(Not to Scale)
4
SCL
Figure 2. Pin Configuration
www.analog.com
8
7
6
5
AD5171
A B AD0 SDA
03437-0-002
A
W
B
03437-0-001
AD5171
TABLE OF CONTENTS
Electrical Characteristics ................................................................. 3
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Typical Performance Characteristics .............................................8
Theory of Operation ...................................................................... 12
One-Time Programming (OTP).............................................. 12
Power Supply Considerations................................................... 12
ESD Protection ...........................................................................13
Terminal Voltage Operating Range.......................................... 13
Power-Up/Power-Down Sequences......................................... 14
Variable Resistance and Voltage for Rheostat Mode .............14
Variable Resistance and Voltage for Potentiometer Mode.... 15
Controlling the AD5171................................................................ 16
Software Programming.............................................................. 16
2
I
C Controller Programming.................................................... 17
2
I
C-Compatible 2-Wire Serial Bus ........................................... 18
Controlling Two Devices on One Bus..................................... 18
Applications..................................................................................... 19
DAC.............................................................................................. 19
Gain Control Compensation.................................................... 19
Programmable Voltage Source with Boosted Output ........... 19
Level Shifting for Different Voltage Operation...................... 19
Resistance Scaling ...................................................................... 19
Resolution Enhancement.......................................................... 20
RDAC Circuit Simulation Model............................................. 20
Evaluation Board............................................................................ 21
Outline Dimensions....................................................................... 22
Ordering Guide .......................................................................... 22
REVISION HISTORY
1/05—Rev. A to Rev. B
Change to Features........................................................................... 1
Changes to Electrical Characteristics ............................................ 3
Change to Table 3 ............................................................................. 6
Changes to Power Supply Considerations Section..................... 13
Changes to Level Shifting for Different Voltage Operation
Section....................................................................................... 19
Added Note to Ordering Guide.................................................... 22
11/04—Rev. 0 to Rev. A
Changes to Specifications................................................................ 3
Changes to Table 3............................................................................ 7
Changes to One-Time Programming Section ............................ 11
Changes to Power Supply Consideration Section ...................... 11
Changes to Figure 26 and Figure 27............................................. 12
1/04—Revision 0: Initial Version
Rev. B | Page 2 of 24
AD5171

ELECTRICAL CHARACTERISTICS

5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ versions; VDD = 3 V to 5 V ± 10%, VA = VDD, VB = 0 V, −40°C < TA < +125°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ1 Max Unit
DC CHARACTERISTICS RHEOSTAT MODE
Resistor Differential Nonlinearity2 R-DNL
R Resistor Integral Nonlinearity2 R-INL
R
, VA = no connect,
R
WB
= 10 kΩ, 50 kΩ, and 100 kΩ
R
AB
, VA = no connect, RAB = 5 kΩ –1 ±0.25 +1 LSB
WB
, VA = no connect,
R
WB
= 10 kΩ, 50 kΩ, and 100 kΩ
R
AB
, VA = no connect, RAB = 5 kΩ –1.5 ±0.5 +1.5 LSB
WB
Nominal Resistor Tolerance3 ∆RAB/RAB –30 +30 % Resistance Temperature Coefficient (∆RAB/RAB)/∆T 35 ppm/°C Wiper Resistance RW V
DC CHARACTERISTICS POTENTIOMETER DIVIDER
= 5 V 60 115
DD
MODE (Specifications apply to all RDACs)
Resolution N 6 Bits Differential Nonlinearity4 DNL –0.5 ±0.1 +0.5 LSB Integral Nonlinearity4 INL –1 ±0.2 +1 LSB Voltage Divider Temperature Coefficient (∆VW/VW)/∆T Code = 0x20 5 ppm/°C Full-Scale Error V
WFSE
Code = 0x3F, R
= 10 kΩ,
AB
50 kΩ, and 100 kΩ Full-Scale Error V Zero-Scale Error V
Code = 0x3F, RAB = 5 kΩ –1.5 0 LSB
WFSE
WZSE
Code = 0x00, R
=10 kΩ,
AB
50 kΩ, and 100 kΩ
Code = 0x00, RAB = 5 kΩ 0 2 LSB RESISTOR TERMINALS
Voltage Range5 V Capacitance7 A, B C
With respect to GND VDD V
A, B, W
A, B
f = 1 MHz, measured to GND,
Code = 0x20 Capacitance7 W CW
f = 1 MHz, measured to GND,
Code = 0x20 Common-Mode Leakage ICM V
= VB = VDD/2 1 nA
A
DIGITAL INPUTS
Input Logic High (SDA and SCL)6 VIH 0.7 VDD Input Logic Low (SDA and SCL)6 VIL –0.5 0.3 VDD V Input Logic High (AD0) VIH V Input Logic Low (AD0) VIL V Input Current IIL V Input Capacitance7 C
3 pF
IL
= 3 V 3.0 VDD V
DD
= 3 V 0 1.0 V
DD
= 0 V or 5 V ±1 µA
IN
DIGITAL OUTPUTS
Output Logic Low (SDA) VOL I Three-State Leakage Current (SDA) IOZ V Output Capacitance7 C
3 pF
OZ
= 6 mA 0.4 V
OL
= 0 V or 5 V ±1 µA
IN
POWER SUPPLIES
Power Supply Range VDD 2.7 5.5 V OTP Power Supply Supply Current IDD V OTP Supply Current Power Dissipation10 P
6, 8
V
6, 9
I
DD_OTP
V
DD_OTP
V
DISS
TA = 25°C 5.25 5.5 V
= 5 V or VIL = 0 V 4 10 µA
IH
= 5.5 V, TA = 25°C 100 mA
DD_OTP
= 5 V or VIL = 0 V, VDD = 5 V 0.02 0.04 mW
IH
Power Supply Sensitivity PSSR −0.025 +0.001 +0.025 %/%
–0.5 ±0.1 +0.5 LSB
–1.5 ±0.35 +1.5 LSB
–1 −0.5 0 LSB
0 0.5 1 LSB
25 pF
55 pF
VDD + 0.5
V
Rev. B | Page 3 of 24
AD5171
Parameter Symbol Conditions Min Typ1 Max Unit
DYNAMIC CHARACTERISTICS
Bandwidth –3 dB BW_5k RAB = 5 kΩ, Code = 0x20 1500 kHz BW_10k RAB = 10 kΩ, Code = 0x20 600 kHz BW_50k RAB = 50 kΩ, Code = 0x20 110 kHz BW_100k RAB = 100 kΩ, Code = 0x20 60 kHz
Total Harmonic Distortion THD
Adjustment Settling Time tS1
OTP Settling Time13 t
Power-Up Settling Time—After Fuses Blown tS2
Resistor Noise Voltage e
INTERFACE TIMING CHARACTERISTICS (Apply to all parts
7, 12
) SCL Clock Frequency f t
Bus Free Time between Start and Stop t1 1.3 µs
BUF
t
Hold Time (Repeated Start) t2
HD;STA
t
Low Period of SCL Clock t3 1.3 µs
LOW
t
High Period of SCL Clock t4 0.6 50 µs
HIGH
t
Setup Time for Start Condition t5 0.6 µs
SU;STA
t
Data Hold Time t6 0.9 µs
HD;DAT
t
Data Setup Time t7 0.1 µs
SU;DAT
tF Fall Time of Both SDA and SCL Signals t8 0.3 µs tR Rise Time of Both SDA and SCL Signals t9 0.3 µs t
Setup Time for Stop Condition t10 0.6 µs
SU;STO
1
Typical specifications represent average readings at 25°C and VDD = 5 V.
2
Resistor position nonlinearity error, R-INL, is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic.
3
VAB = VDD, Wiper (VW) = no connect.
4
INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
5
Resistor Terminals A, B, W have no limitations on polarity with respect to each other.
6
The minimum voltage requirement on the VIH is 0.7 V × VDD. For example, VIH min = 3.5 V when VDD = 5 V. It is typical for the SCL and SDA resistors to be pulled up to
V
. However, care must be taken to ensure that the minimum VIH is met when the SCL and SDA are driven directly from a low voltage logic controller without pull-up
DD
resistors.
7
Guaranteed by design; not subject to production test.
8
Different from operating power supply; power supply for OTP is used one time only.
9
Different from operating current; supply current for OTP lasts approximately 400 ms for one-time need only.
10
P
is calculated from (IDD × VDD). CMOS logic level inputs result in minimum power dissipation.
DISS
11
Bandwidth, noise, and settling time depend on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest
bandwidth. The highest R value results in the minimum overall power consumption.
12
All dynamic characteristics use VDD = 5 V.
13
Different from the settling time after the fuse is blown. The OTP settling time occurs only once.
7, 11, 12
0.05 %
5 µs
400 ms
5 µs
8 nV/√Hz
S_OTP
N_WB
= 1 V rms, RAB = 10 kΩ,
V
A
= 0 V DC, f = 1 kHz
V
B
= 5 V ± 1 LSB error band,
V
A
V
= 0 V, measured at VW
B
= 5 V ± 1 LSB error band,
V
A
= 0 V, measured at VW
V
B
= 5 V ±1 LSB error band,
V
A
= 0 V, measured at VW
V
B
= 5 kΩ, f = 1 kHz,
R
AB
Code = 0x20
= 10 kΩ, f = 1 kHz,
R
AB
12 nV/√Hz
Code = 0x20
400 kHz
SCL
After this period, the first clock
0.6 µs
pulse is generated.
Rev. B | Page 4 of 24
AD5171
S
t
6
5
t
7
t
10
03437-0-024
PPS
SCL
t
8
t
2
t
3
t
8
DA
t
1
t
t
9
t
t
4
9
Figure 3. Interface Timing Diagram
Rev. B | Page 5 of 24
AD5171

ABSOLUTE MAXIMUM RATINGS

Table 2.
Parameter Rating
VDD to GND –0.3, +7 V VA, VB, VW to GND GND, VDD Maximum Current IWB, IWA Pulsed ±20 mA IWB Continuous (RWB ≤ 1 kΩ, A open) IWA Continuous (R
≤ 1 kΩ, B open)1 ±5 mA
WA
1
±5 mA
Digital Inputs and Output Voltage to GND 0 V, VDD
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Operating Temperature Range –40°C to +125°C Maximum Junction Temperature (TJ max) 150°C Storage Temperature –65°C to +150°C Lead Temperature (Soldering, 10 sec) 300°C Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C Thermal Resistance2 θJA 230°C/W
1
Maximum terminal current is bounded by the maximum applied voltage
across any two of the A, B, and W terminals at a given resistance; the maximum current handling of the switches, and the maximum power dissipation of the package. V
2
Package power dissipation = (TJ max – TA)/θJA.
DD
= 5 V.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. B | Page 6 of 24
AD5171

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

8
A
7
B
6
AD0
5
SDA
03437-0-003
V
DD
GND
SCL
W
1
2
AD5171
TOP VIEW
3
(Not to Scale)
4
Figure 4. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 W Wiper Terminal W. GND ≤ VW ≤ VDD. 2 VDD
Positive Power Supply. Specified for operation from 2.7 V to 5.5 V. For OTP programming, V
minimum of 5.25 V and have a100 mA driving capability. 3 GND Common Ground. 4 SCL
5 SDA
Serial Clock Input. Requires a pull-up resistor. If it is driven direct from a logic controller without the pull-up
resistor, ensure that V
min is 0.7 V × VDD.
IH
Serial Data Input/Output. Requires a pull-up resistor. If it is driven direct from a logic controller without a pull-up
resistor, ensure that V
min is 0.7 V × VDD.
IH
6 AD0 I2C Device Address Bit. Allows a maximum of two AD5171s to be addressed. 7 B Resistor Terminal B. GND ≤ VB ≤ VDD. 8 A Resistor Terminal A. GND ≤ VA ≤ VDD.
needs to be a
DD
Rev. B | Page 7 of 24
AD5171

TYPICAL PERFORMANCE CHARACTERISTICS

0.10 VDD = 5V
0.08
0.06
0.04
0.02
0
–0.02
–0.04
RHEOSTAT MODE INL (LSB)
–0.06
–0.08
–0.10
–40°C
+25°C
32248160 40485664
CODE (DECIMAL)
Figure 5. R-INL vs. Code vs. Temperature
+125°C
03437-0-004
–0.02
–0.04
–0.06
POTENTIOMETER MODE DNL (LSB)
–0.08
–0.10
0.10
0.08
0.06
0.04
0.02
0
VDD = 5V
–40°C
32248160 40485664
CODE (DECIMAL)
Figure 8. DNL vs. Code vs. Temperature
+25°C
+125°C
03437-0-007
–0.02
–0.04
RHEOSTAT MODE DNL (LSB)
–0.06
–0.08
–0.10
–0.02
–0.04
–0.06
POTENTIOMETER MODE INL (LSB)
–0.08
–0.10
0.10
0.08
0.06
0.04
0.02
0.10
0.08
0.06
0.04
0.02
0
0
VDD = 5V
+25°C
–40°C
32248160 40485664
CODE (DECIMAL)
Figure 6. R-DNL vs. Code vs. Temperature
VDD = 5V
+25°C
–40°C
32248160 40485664
CODE (DECIMAL)
Figure 7. INL vs. Code vs. Temperature
+125°C
+125°C
03437-0-005
03437-0-006
0
–0.1
–0.2
–0.3
–0.4
FSE (LSB)
–0.5
–0.6
–0.7
–40 –20 0 20 40 60 80 100 120 140
VDD = 5V
VDD = 3V
TEMPERATURE (°C)
Figure 9. Full-Scale Error
0.6
0.5
0.4
0.3
ZSE (LSB)
0.2
0.1
0
–40 –20 0 20 40 60 80 100 120 140
VDD = 3V
VDD = 5V
TEMPERATURE (°C)
Figure 10. Zero-Scale Error
03437-0-008
03437-0-009
Rev. B | Page 8 of 24
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