ANALOG DEVICES AD1986A Service Manual

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AC ’97 and HD Audio
FEATURES
Supports both AC ’97 and HD audio interfaces 6 DAC channels for 5.1 surround S/PDIF output Integrated headphone amplifiers Variable rate audio Double rate audio (F Greater than 90 dB dynamic range 20-bit resolution on all DACs 20-bit resolution on all ADCs Line-level mono phone input High quality differential CD input Selectable MIC input with preamp AUX and line-in stereo inputs External amplifier power down (EAPD) Power management modes Jack sensing and device identification 48-lead LQFP package
= 96 kHz)
s
SoundMAX Codec
AD1986A
ENHANCED FEATURES
Integrated parametric speaker equalizer Stereo microphone with up to 30 dB gain boost Integrated PLL for system clocking Variable sample rate: 7 kHz to 96 kHz
7 kHz to 48 kHz in 1 Hz increments
96 kHz for double rate audio Jack sense with autotopology switching Jack presence detection on up to 8 jacks Three software-controlled microphone bias signals Software-enabled outputs for jack sharing Auto-down mix and channel spreading Microphone-to-mono output for speakerphone Stereo microphone pass-through to mixer Built-in microphone/center/LFE/line-in sharing Built-in SURROUND/LINE_IN sharing Center/LFE swapping supporting all vendor speakers Microphone left/right swapping Reduced support component count General-purpose digital output pin (GPO) LINE_OUT and HP_OUT, headphone drive on both
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
AD1986A
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TABLE OF CONTENTS
Functional Block Diagram .............................................................. 4
Specifications..................................................................................... 5
Absolute Maximum Ratings............................................................ 9
Environmental Conditions.......................................................... 9
ESD Caution.................................................................................. 9
Pin Configuration And Function Description ........................... 10
AC’97 Registers............................................................................... 12
HD Audio Widgets ......................................................................... 14
AC ’97 Register Details .................................................................. 21
Reset (Register 0x00).................................................................. 21
Master Volume (Register 0x02) ................................................ 21
Headphone Volume (Register 0x04)........................................ 22
Mono Volume (Register 0x06).................................................. 22
PC Beep (Register 0x0A) ........................................................... 23
Phone Volume (Register 0x0C) ................................................ 23
Surround DAC PCM Rate (Register 0x2E)............................. 34
C/LFE DAC PCM Rate (Register 0x30).................................. 34
ADC PCM Rate (Register 0x32) .............................................. 34
C/LFE DAC Volume (Register 0x36)....................................... 35
Surround DAC Volume (Register 0x38).................................. 35
SPDIF Control (Register 0x3A)................................................ 36
EQ Control Register (Register 0x60)....................................... 37
EQ Data Register (Register 0x62) ............................................ 38
Misc Control Bits 2 (Register 0x70)......................................... 38
Jack Sense (Register 0x72)......................................................... 39
Serial Configuration (Register 0x74)....................................... 41
Misc Control Bits 1 (Register 0x76)......................................... 43
Advanced Jack Sense (Register 0x78)...................................... 45
Misc Control Bits 3 (Register 0x7A)........................................ 45
Vendor ID Registers (Register 0x7C to 0x7E) ........................ 47
Microphone Volume (Register 0x0E) ...................................... 24
Line_In Volume (Register 0x10)............................................... 25
CD Volume (Register 0x12) ......................................................25
AUX Volume (Register 0x16).................................................... 26
Front DAC Volume (Register 0x18) ......................................... 26
ADC Select (Register 0x1A)...................................................... 27
ADC Volume (Register 0x1C) .................................................. 28
General-Purpose (Register 0x20)............................................. 29
Audio Int and Paging (Register 0x24) .....................................29
Power-Down Ctrl/Stat (Register 0x26).................................... 30
Extended Audio ID (Register 0x28)......................................... 31
Ext’d Audio Stat/Ctrl (Register 0x2A)...................................... 32
Front DAC PCM Rate (Register 0x2C) ................................... 33
REVISION HISTORY
Codec Class/Revision Register (Register 0x60) ..................... 47
PCI Subsystem Vendor ID Register
(Register 0x62, Page 01)............................................................. 48
PCI Subsystem Device ID Register (Register 0x64, Page 01)48
Function Select Register (Register 0x66, Page 01) ................. 49
Information and I/O Register (Register 0x68, Page 01) ........ 50
Sense Register (Register 0x6A, Page 01).................................. 51
Jack Presence Detection................................................................. 53
Audio Jack Styles (NC/NO) ...................................................... 53
Microphone Selection/Mixing...................................................... 54
Outline Dimensions....................................................................... 55
Ordering Guide .......................................................................... 55
4/05—Revision 0: Initial Version
Rev. 0 | Page 2 of 56
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NOTES
REDUCED SUPPORT COMPONENTS
The AD1986A includes many improvements that reduce external support components for particular applications.
Multiple Microphone Sourcing: The MIC_1/2, LINE_IN
and C/LFE pins can all be selected as sources for microphone input (boost amplifier).
Multiple VREF_OUT Pins: Each microphone-capable pin
group (MIC_1/2, LINE_IN and C/LFE) has separate, software controllable VREF_OUT pins, reducing the need for external biasing components.
Internal Microphone Mixing: Any combination of the
MIC_1/2, LINE_IN and C/LFE pins can be summed to produce the microphone input. This removes the need for external mixing components in applications that externally mix microphone sources.
Advanced Jack Presence Detection: Using two codec pins,
eight resistors and isolated switch jacks, the AD1986A can detect jack insertion on eight separate jacks.
Internal Microphone/Line In/C/LFE Sharing: On
systems that share the microphone with the C/LFE jack no external components are required. The microphone selector can select the LINE_IN pins when the microphone and line input devices are swapped.
Internal Line In/Microphone/Surround Sharing: On
systems that share the line in with the surround jack no external components are required.
Dual Headphone Amplifiers: The AD1986A can drive
headphones out of the HP_OUT or LINE_OUT pins.
Rev. 0 | Page 3 of 56
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FUNCTIONAL BLOCK DIAGRAM
MIC_1 MIC_2
PHONE_IN
CD_L
CD_GND
CD_R AUX_L AUX_R
LINE_IN_L LINE_IN_R
PCBEEP_IN
LFE_OUT
MICROPHONE
SELECTOR/
MIXING AND
GAIN BLOCK
SELECT
MZ
CD
DIFF AMP
LINE
IN
A
SPRD
AD1986A
RECORD
AC97CKSPDIF_OUT
SPDIF TX
CODEC CORE
GA
M
M
20-BIT
Σ- ADC
20-BIT
Σ- ADC
24-BIT
Σ- DAC
ADC
SLOT
LOGIC
DAC
SLOT
LOGIC
G
SELECTOR
G
M
PLL
AC '97/HD AUDIO INTERFACE
RESET
SYNC
BITCLK
SDATA_OUT
SDATA_IN
CENTER_OUT
MONO_OUT
SURR_OUT_L
LINE_OUT_L
LINE_OUT_R
HP_OUT_L
HP_OUT_R
MZ
A
SPRD
M
A
MIX
MZ
A
SOSEL
MZ
ASURR_OUT_R
SOSEL
A
M
HP
M
HP
M
HP
M
HP
LOSELLOSEL
A
A
HPSELHPSEL
A
MMM
Σ
G = GAIN A = ATTENUATION M = MUTE Z = HI-Z
GA
GA
GA
GA
M
M
M
GA
GAMGA
M
GA
GA
M
M
M
M
Σ
Σ
M
M
M
M
A
M
M
M
M
M
GA
GA
GA
GA
GA
24-BIT
Σ- DAC
PC BEEP
GENERATOR
24-BIT
Σ- DAC
24-BIT
Σ- DAC
24-BIT
Σ- DAC
24-BIT
Σ- DAC
VOLTAGE
REFERENCE
EQ
EQ
VREF_FILT
Figure 1.
AC '97
CONTROL
REGISTERS
EQ COEF STORAGE
EAPD
Z
G
Z
G
Z
G
ANALOG MIXING CONTROL
GPIO
JACK_SENSE_A
JACK SENSE
JACK_SENSE_B
EAPD GPO
VREF_OUT (MIC1/2)
VREF_OUT (C/LFE)
VREF_OUT (LINE_IN)
04785-001
Rev. 0 | Page 4 of 56
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SPECIFICATIONS
Test conditions, unless otherwise noted.
Table 1.
Parameter Typ Unit
Temperature 25 °C Digital Supply (DVDD) 3.3 ± 10% V Analog Supply (AVDD) 5.0 ± 10% V Sample Rate (FS) 48 kHz Input Signal 1.0 kHz Analog Output Pass Band 20 Hz–20 kHz VIH 2.0 V VIL 0.8 V VIH 2.4 V VIL 0.6 V
DAC Test Conditi ons
Calibrated Output −3 dB Relative to Full Scale 10 kΩ Output Load: Line (Surround), Mono
ADC Test Conditions
Calibrated 0 dB PGA Gain
Input −3.0 dB Relative to Full Scale 32 Ω Output Load: Headphone 2 kΩ Output Load: Center, LFE
Table 2. Analog Input
Input Voltage Min Typ Max Unit
MIC_1/2, LINE_IN, CD, AUX, PHONE_IN (No Preamp) 1 Vrms1 C/LFE and SURROUND (When Used as Inputs) 2.83 V p-p MIC_1/2, LINE_IN, C/LFE With 30 dB Preamp 0.032 Vrms
0.089 V p-p MIC_1/2, LINE_IN, C/LFE With 20 dB Preamp 0.1 Vrms
0.283 V p-p MIC_1/2, LINE_IN, C/LFE With 10 dB Preamp 0.316 Vrms
0.894 V p-p Input Impedance2 20 kΩ Input Capacitance2 5 7.5 pF
1
RMS values assume sine wave input.
2
Guaranteed by design, not production tested.
Table 3. Master Volume
Parameter Min Typ Max Unit
Step Size (LINE_OUT, HP Out, Mono Out, SURROUND, CENTER, LFE) −1.5 dB Output Attenuation Range (0 dB to –46.5 dB) −46.5 dB Mute Attenuation of 0 dB Fundamental2 −80 dB
Table 4. Programmable Gain Amplifier—ADC
Parameter Min Typ Max Unit
Step Size 1.5 dB PGA Gain Range Span (0 dB to 22.5 dB) 22.5 dB
Rev. 0 | Page 5 of 56
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Table 5. Analog Mixer—Input Gain/Amplifiers/Attenuators
Parameter Min Typ Max Unit
Signal-to-Noise Ratio (SNR) CD to LINE_OUT 90 dB LINE, AUX, PHONE to LINE_OUT1 88 dB MIC_1 or MIC_2 to LINE_OUT1 80 dB Step Size: All Mixer Inputs (Except PC Beep) −1.5 dB Step Size: PC Beep −3.0 dB Input Gain/Attenuation Range: All Mixer Inputs (+12 dB to −34.5 dB) −46.5 dB
1
Guaranteed by design, not production tested.
1
Table 6. Digital Decimation and Interpolation Filters
Parameter Min Typ Max Unit
Pass Band 0 0.4 × FS Hz Pass-Band Ripple ±0.09 dB Transition Band 0.4 × FS 0.6 × FS Hz Stop Band 0.6 × FS Hz Stop-Band Rejection −74 dB Group Delay 16/FS S Group Delay Variation Over Pass Band 0 µs
Table 7. Analog-to-Digital Converters
Parameter Min Typ Max Unit
Resolution 20 Bits Total Harmonic Distortion (THD) −95 dB Dynamic Range (−60 dB Input, THD + N Referenced to Full Scale, A-Weighted) −85 dB Crosstalk: Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L) −80 dB Crosstalk: LINE_IN to Other Inputs −100 −80 dB Gain Error (Full-Scale Span Relative to Nominal Input Voltage) ±10 % Interchannel Gain Mismatch (Difference of Gain Errors) ±0.5 dB ADC Offset Error ±5 mV
Rev. 0 | Page 6 of 56
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Table 8. Digital-to-Analog Converters
Parameter Min Typ Max Unit
Resolution 20/24 Bits Total Harmonic Distortion (LINE_OUT Drive) −92 dB Total Harmonic Distortion (HP_OUT) −75 dB Dynamic Range (−60 dB Input, THD + N Referenced to Full-Scale, A-Weighted) 91 dB Gain Error (Full-Scale Span Relative to Nominal Input Voltage) ±10 % Interchannel Gain Mismatch (Difference of Gain Errors) ±0.7 dB DAC Crosstalk1 (Input L, Zero R, Read R_OUT; Input R, Zero L, Read L_OUT) −80 dB
1
Guaranteed by design, not production tested.
Table 9. Analog Output
Parameter Min Typ Max Unit
FULL-SCALE OUTPUT VOLTAGE: SURROUND, CENTER/LFE, MONO_OUT 1 VRMS
2.83 V p-p
Output Impedance1 300 Ω External Load Impedance1 10 kΩ Output Capacitance1 15 pF External Load Capacitance 1,000 pF
FULL-SCALE OUTPUT VOLTAGE: HP_OUT, LINE_OUT 1 VRMS
2.83 V p-p
Output Impedance1 1 Ω External Load Impedance1 32 Ω Output Capacitance1 15 pF
External Load Capacitance1 1,000 pF VREF_FILT 2.050 2.250 2.450 V VREF_OUT(MIC, C/LFE, LIN) (xVREF [2:0] = 001) 2.250 V
(xVREF [2:0] = 100, A
(xVREF [2:0] = 010) 0.0 V
Current Drive 5 mA
Mute Click (Muted Output, Unmuted Midscale DAC Output) ±5 mV
1
Guaranteed by design, not production tested.
= 5.0 V) 3.700 V
VDD
Table 10. Static Digital Specifications—AC ’97
Parameter Min Typ Max Unit
High Level Input Voltage (VIH), Digital Inputs 0.65 × DVDD V Low Level Input Voltage (VIL) 0.35 × DVDD V High Level Output Voltage (VOH), IOH = 2 mA 0.90 × DVDD V Low Level Output Voltage (VOL), IOL = 2 mA 0.10 × DVDD V Input Leakage Current −10 10 µA Output Leakage Current −10 10 µA Input/Output Pin Capacitance 7.5 pF
Rev. 0 | Page 7 of 56
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Table 11. Power Supply (Quiescent State)
Parameter Min Typ Max Unit
Power Supply Range—Analog (AVDD) ± 10% 4.5 5.5 V Power Supply Range—Digital (DVDD) ± 10% 2.97 3.63 V Power Dissipation—Analog (AVDD)/Digital (DVDD) 365/171.6 mW Analog Supply Current—Analog (AVDD) 62.0 mA Digital Supply Current—Digital (DVDD) 53.2 mA Power Supply Rejection (100 mV p–p Signal @ 1 kHz) 40 dB
Table 12. Power-Down States—AC ’97 (Quiescent State)
Parameter Set Bits AVDD Typ DVDD Typ Unit
ADC PR0 53.0 45.7 mA FRONT DAC PR1 53.7 47.7 mA CENTER DAC PRI 62.0 53.2 mA SURROUND DAC PRJ 53.5 47.1 mA LFE DAC PRK 62.0 52.8 mA ADC + ALL DACs PR1, PR0, PRI, PRJ, PRK 27.0 14.5 mA Mixer PR2 36.6 53.2 mA ADC + Mixer PR2, PR0 27.6 45.7 mA ALL DACs + Mixer PR2, PR1, PRI, PRJ, PRK 12.6 33.0 mA ADC + ALL DACs + Mixer PR2, PR1, PR0, PRI, PRJ, PRK 2.4 14.5 mA Standby PR5, PR4, PR3, PR2, PR1(IJK), PR0 0.0 0.05 mA Headphone Standby PR6 55.0 53.2 mA LINE_OUT HP Standby LOHPEN = 0 62.0 53.2 mA
Table 13. Clock Specifications
Parameter Min Typ Max Unit
Input Clock Frequency (Reference Clock Mode)
Recommended Clock Duty Cycle 40 50 60 %
14.31818
48.000
MHz MHz
Rev. 0 | Page 8 of 56
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ABSOLUTE MAXIMUM RATINGS
Table 14.
Power Supply Min Max Unit
Digital (DVDD) −0.3 +3.6 V Analog (AVDD) −0.3 +6.0 V Input Current (Except Supply Pins) ±10.0 mA Analog Input Voltage (Signal Pins) −0.3 AVDD + 0.3 V Digital Input Voltage (Signal Pins) −0.3 DVDD + 0.3 V Ambient Temperature (Operating)
Commercial
Industrial Storage Temperature −65 +150 °C
0 –40
+70 +85
°C
Stresses greater than those listed under Absolute Maximum Ratings can cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods can affect device reliability.
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating
= T
T
AMB
T
CASE
PD = power dissipation in W θ
= thermal resistance (case-to-ambient)
CA
θ
= thermal resistance (junction-to-ambient)
JA
θ
= thermal resistance (junction-to-case)
JC
Table 15. Thermal Resistance
Package θJA θ
LQFP 48°C/W 17°C/W 31°C/W LFCSP 47°C/W 15°C/W 32°C/W
− (PD × θCA)
CASE
= case temperature in °C
θ
JC
CA
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 9 of 56
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PIN CONFIGURATION AND FUNCTION DESCRIPTION
S/PDIF_OUT
EAPD
AVDDLINE_OUT_R
AVSSLINE_OUT_L
AVDDHEADPHONE_R
AVSSHEADPHONE_L
48 47 46 45 44 39 38 3743 42 41 40
1
DV
DD
PIN 1
2
AC97CK
GPO
DV
SDATA_OUT
BIT_CLK
DV
SDATA_IN
DV
SYNC
RESET
PCBEEP
IDENTIFIER
3 4
SS
5 6 7
SS
8 9
DD
10 11 12
13 14 15 16 17 18 19 20 21 22 23 24
AD1986A
TOP VIEW
(Not to Scale)
AUX_L
AUX_R
PHONE_IN
JACK_SENSE_A
JACK_SENSE_B
Figure 2. Pin Configuration
CD_L
CD_GND
Table 16. Pin Function Descriptions
Mnemonic Pin Number Input/Ouput Description
AC ’97CK 2 I
SDATA_OUT 5 I Link Serial Data Output. Input Stream. BIT_CLK 6 I/O
SDATA_IN 8 I/O Link Serial Data Input. Output stream. SYNC 10 I Link Frame Sync. RESET
11 I Link Reset, Master Hardware Reset.
AVDDMONO_OUT
SURR_OUT_R
36
SURR_OUT_L
35
AV
34
DD
VREF_OUT (C/LFE)
33
LFE_OUT
32
CENTER_OUT
31
AV
30
SS
VREF_OUT (LINE_IN)
29
VREF_OUT (MIC_1/2)
28
VREF_FILT
27
AV
26
SS
AV
25
DD
CD_R
MIC_1
MIC_2
LINE_IN_L
LINE_IN_R
04785-002
External Clock In (14.31818 MHz) for AC ’97 Operation. Clock or DVSS must be stable before reset deasserts. Tied to digital ground for HD audio operation.
Link Bit Clock, 12.288 MHz Serial Data Clock Output for AC ‘97, 24 MHz Input for HD Audio.
Table 17. Digital Input/Output
Mnemonic
Pin Number
Input/ Output Description
S/PDIF_OUT 48 O S/PDIF Output. EAPD 47 O External Amplifier Power-Down Output. In HD audio mode this is part of LINE_OUT widget. GPO 3 O General-Purpose Output Pin. A digital signal that can be used to control external circuitry.
Table 18. Jack Sense
Mnemonic Pin Number Input/Ouput Description
JACK_SENSE_A 16 I JackSense 0–3 Input. JACK_SENSE_B 17 I Jack Sense 4–7 Input.
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Table 19. Analog Input/Output
Pin
Mnemonic
PCBEEP 12 I Analog PC Beep Input. Routed to all output capable pins when RESET is asserted. PHONE_IN 13 I Mono Line Level Input. AUX_L 14 I Auxiliary Left Channel Input. AUX_R 15 I Auxiliary Right Channel Input. CD_L 18 I CD-Audio-Left Channel. CD_GND 19 I CD-Audio-Analog-Ground-Reference (for Differential CD Input). CD_R 20 I CD-Audio-Right Channel. MIC_1 21 I Microphone 1 or Line-In-Left Input (See LISEL Bits in Register 0x76). MIC_2 22 I Microphone 2 or Line-In-Right Input (See LISEL Bits in Register 0x76). LINE_IN_L 23 I Line-In-Left Channel or Microphone 1 Input (See OMS Bits in Register 0x74). LINE_IN_R 24 I Line-In-Right Channel or Microphone 2 Input (See OMS Bits in Register 0x74). CENTER_OUT 31 I/O Center-Channel Output or Microphone 1 Input (See OMS Bits in Register 0x74). LFE_OUT 32 I/O Low-Frequency-Enhanced Output or Microphone 2 Input (See OMS Bits in Register 0x74). HEADPHONE_L 39 O Headphone-Out-Left Channel (See HPSEL Bits in Register 0x76). HEADPHONE_R 41 O Headphone-Out-Right Channel (See HPSEL Bits in Register 0x76). LINE_OUT_L 43 O Line-Out (Front)—Left Channel (See LOSEL Bit in Register 0x76) (HP Drive-Capable). LINE_OUT_R 45 O Line-Out (Front)—Right Channel (See LOSEL Bit in Register 0x76) (HP Drive-Capable). MONO_OUT 37 O Mono Output to Telephony Subsystem Speakerphone. SURR_OUT_L 35 I/O Surround-Left Channel Output or Line-In-Left Input (See LISEL and SOSEL Bits in Register 0x76). SURR_OUT_R 36 I/O
Number
Input/ Ouput Description
Surround-Right Channel Output or Line-In-Right Input (See LISEL and SOSEL Bits in Register 0x76).
Table 20. Filter/Reference
Pin
Mnemonic
VREF_FILT 27 O Voltage Reference Filter. VREF_OUT (MIC) 28 O Programmable Voltage Reference Output (Intended for MIC Bias on the MIC_1/2 Channels). VREF_OUT
(LINE_IN) VREF_OUT (C/LFE) 33 O Programmable Voltage Reference Output (Intended for MIC Bias on the C/LFE Channels).
Number
29 O Programmable Voltage Reference Output (Intended for MIC Bias on the LINE_IN Channels).
Input/ Ouput Description
Table 21. Power and Ground
Input/
Mnemonic Pin Number
DVDD 1, 9 N/A Digital Supply Voltage (3.3 V). DVSS 4, 7 N/A Digital Supply Return (Ground). AVDD
AVSS 26, 30, 40, 44 N/A Analog Supply Return (Ground).
25, 34, 38, 42, 46
Ouput Description
N/A
Analog Supply Voltage (5.0 V). AV degrade performance.
supplies should be well filtered because supply noise will
DD
Rev. 0 | Page 11 of 56
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AC’97 REGISTERS
Table 22. Register Map
Reg Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
0x00 Reset x SE4 SE3 SE2 SE1 SE0 ID9 ID8 ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 0x0290
0x02 Master Volume LM x x LV4 LV3 LV2 LV1 LV0 RM x x RV4 RV3 RV2 RV1 RV0 0x8080
0x04 Headphones Volume LM x x LV4 LV3 LV2 LV1 LV0 RM x x RV4 RV3 RV2 RV1 RV0 0x8080
0x06 Mono Volume M x x x x x x x x x x V4 V2 V2 V1 V0 0x8000
0x0A PC Beep M A/DS x F7 F6 F5 F4 F3 F2 F1 F0 V3 V2 V1 V0 x 0x8000
0x0C Phone Volume M x x x x x x x x x x V4 V3 V2 V1 V0 0x8008
0x0E Microphone Volume LM x x LV4 LV3 LV2 LV1 LV0 RM M20 x RV4 RV3 RV2 RV1 RV0 0x8888
0x10 Line In Volume LM x x LV4 LV3 LV2 LV1 LV0 RM x x RV4 RV3 RV2 RV1 RV0 0x8888
0x12 CD Volume LM x x LV4 LV3 LV2 LV1 LV0 RM x x RV4 RV3 RV2 RV1 RV0 0x8888
0x16 AUX Volume LM x x LV4 LV3 LV2 LV1 LV0 RM x x RV4 RV3 RV2 RV1 RV0 0x8888
0x18 Front DAC Volume LM x x LV4 LV3 LV2 LV1 LV0 RM x x RV4 RV3 RV2 RV1 RV0 0x8888
0x1A ADC Select x x x x x LS2 LS1 LS0 x x x x x RS2 RS1 RS0 0x0000
0x1C ADC Volume LM x x x LV3 LV2 LV1 LV0 RM x x x RV3 RV2 RV1 RV0 0x8080
0x20 General Purpose x x x x DRSS1 DRSS0 MIX MS LPBK x x x x x x x 0x0000
0x24 Audio Int. and Paging I4 I3 I2 I1 I0 x x x x x x x PG3 PG2 PG1 PG0 0xxx00
0x26 Power-Down Ctrl/Stat EAPD PR6 PR5 PR4 PR3 PR2 PR1 PR0 x x x x REF ANL DAC ADC 0x000x
0x28 Ext’d Audio ID ID11 ID0 x x REV1 REV0 AMAP LDAC SDAC CDAC DSA1 DSA0 x SPDF DRA VRA 0x0BC7
0x2A Ext’d Audio Stat/Ctrl x x PRK PRJ PRI SPCV x LDAC SDAC CDAC SPSA1 SPSA0 x SPDIF DRA VRA 0x0xx0
0x2C Front DAC PCM Rate R15 R14 R13 R12 R11 R10 R09 R08 R07 R06 R05 R04 R03 R02 R01 R00 0xBB80
0x2E Surr. DAC PCM Rate R15 R14 R13 R12 R11 R10 R09 R08 R07 R06 R05 R04 R03 R02 R01 R00 0xBB80
0x30 C/LFE DAC PCM Rate R15 R14 R13 R12 R11 R10 R09 R08 R07 R06 R05 R04 R03 R02 R01 R00 0xBB80
0x32 ADC PCM Rate R15 R14 R13 R12 R11 R10 R09 R08 R07 R06 R05 R04 R03 R02 R01 R00 0xBB80
0x36 C/LFE DAC Volume LFEM x x LFE4 LFE3 LFE2 LFE1 LFE0 CNTM x x CNT4 CNT3 CNT2 CNT1 CNT0 0x8888
0x38 Surround DAC Volume LM x x LV4 LV3 LV2 LV1 LV0 RM x x RV4 RV3 RV2 RV1 RV0 0x8888
0x3A SPDIF Control V VCFG SPSR x L CC6 CC5 CC4 CC3 CC2 CC1 CC0 PRE COPY /AUDIO PRO 0x2000
0x60 EQ Control EQM x x x x x x x SYM CHS BCA5 BCA4 BCA3 BCA2 BCA1 BCA0 0x8080
0x62 EQ Data CFD15 CFD14 CFD13 CFD12 CFD11 CFD10 CFD9 CFD8 CFD7 CFD6 CFD5 CFD4 CFD3 CFD2 CFD1 CFD0 0xxxxx
0x70 Misc. Control Bits 2 x x x MVREF2 MVREF1 MVREF0 x x MMDIS x JSMAP CVREF2 CVREF1 CVREF0 x x 0x0000
0x72 Jack Sense JS1 SPRD JS1 DMX JS0 DMX JS MT2 JS MT1 JS MT0 JS1 EQB JS0 EQB x x JS1 MD JS0 MD JS1 ST JS0 ST JS1 INT JS0 INT 0x0000
0x74 Serial Configuration SLOT16 REGM2 REGM1 REGM0 REGM3 OMS2 OMS1 OMS0 SPOVR LBKS1 LBKS0 INTS CSWP SPAL SPDZ SPLNK 0x1001
0x76 Misc. Control Bits 1 DACZ AC97NC2 MSPLT SODIS3 CLDIS x DMIX1 DMIX0 SPRD 2CMIC SOSEL SRU LISEL1 LISEL0 MBG1 MBG0 0x6010
0x78 Advanced Jack Sense JS7ST JS7INT JS6ST JS6INT JS5ST JS5INT JS4ST JS4INT JS4-7H x JS3MD JS2MD JS3ST JS2ST JS3INT JS2INT 0xxxxx
0x7A Misc. Control Bits 3 JSINVB HPSEL1 HPSEL0 LOSEL JSINVA LVREF2 LVREF1 LVREF0 x x x LOHPEN GPO MMIX x x 0x0000
0x7C Vendor ID1 F7 F6 F5 F4 F3 F2 F1 F0 S7 S6 S5 S4 S3 S2 S1 S0 0x4144
0x7E Vendor ID2 T7 T6 T5 T4 T3 T2 T1 T0 REV7 REV6 REV5 REV4 REV3 REV2 REV1 REV0 0x5378
0x601 Codec Class/Rev x x x CL4 CL3 CL2 CL1 CL0 RV7 RV6 RV5 RV4 RV3 RV2 RV1 RV0 0x0002 0x621 PCI SVID PVI15 PVI14 PVI13 PVI12 PVI11 PVI10 PVI9 PVI8 PVI7 PVI6 PVI5 PVI4 PVI3 PVI2 PVI1 PVI0 0xFFFF
0x641 PCI SID PI15 PI14 PI13 PI12 PI11 PI10 PI9 PI8 PI7 PI6 PI5 PI4 PI3 PI2 PI1 PI0 0xFFFF
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AD1986A
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Reg Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default
0x661 Function Select x x x x x x x x x x x FC3 FC2 FC1 FC0 T/R 0x0000
0x681 Function Information G4 G3 G2 G1 G0 INV DL4 DL3 DL2 DL1 DL0 IV x x x FIP 0xXxxx
0x6A1 Sense Register ST2 ST1 ST0 S4 S3 S2 S1 S0 OR1 OR0 SR5 SR4 SR3 SR2 SR1 SR0 0xXxxx
1
Codec is always master, ID bits are read-only 0 (zeros).
2
Bits for the AD198x are backward-compatible only, AC97NC and MSPLT are read-only 1 (ones).
3
SODIS/SOSEL were LODIS/LOSEL in the AD1985. Most AD1985 configurations swap LINE_OUT and SURROUND pins; these bits really operate as SO not LO.
Rev. 0 | Page 13 of 56
AD1986A
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HD AUDIO WIDGETS
Table 23. Root Node
NID Name TID Type Description
0x00 Root N/A Root Device identification.
Table 24. Function Group Node
NID Name TID Type Description
0x01 Function N/A Function Designates this device as an audio codec.
Table 25. ADI Specific Verb Support
Verb G/S VID Description Bit
SDI Select Get 0xF04 N/A (0) N/A (0)
Set 0x704x N/A (0) 8 N/A (0)
Processing Coefficient
Set 4--x ADI-specific function control 16 N/A (0) Coefficient
Index
Set 5--0x ADI function index 8 N/A (0) Processing
Index
Set 0x703 N/A (0) 8 N/A (0)
Get C--0x N/A (0)
Get D--0x N/A (0)
Get 0xF03 N/A (0) N/A (0)
Payload
Table 26. S/PDIF Audio Output
NID Name TID Type Description
0x02 S/PDIF Audio Output 0x0 Audio Output
Table 27. ADI Specific Verb Support
Payload
Response
Verb G/S VID Description Bit
Get 0xF04 N/A (0) N/A (0) SDI Select Set 0x704 N/A (0) 8 N/A (0)
(32 Bits) Description
Table 28. Front DAC Audio Output
NID Name TID Type Description
0x03 Front DAC Audio Output 0x0 Audio Output Designates the front channel DACs.
Response (32 Bits) Description
The AD1986A has only a single SDI line, thus set SDI verbs are ignored and get SDI verbs always return a 0.
ADI-Specific Function Setting
ADI Function Index
Designates the codec S/PDIF digital stream interface. Selects between the HD audio I/F and the record ADC as sources.
The AD1986 has only a single SDI line, thus set SDI verbs are ignored and get SDI verbs always return a 0.
Get/set the vendor specific function at the below coefficient index address. Address is an 8-bit value and does not auto-increment.
Get/set the index of the vendor-specific function. The index does not auto-increment when writing the function (processing coefficient) command.
No processing states are supported by this node. Set operations do nothing, Get operations always return a 0.
Rev. 0 | Page 14 of 56
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AD1986A
Table 29. ADI Specific Verb Support
Verb G/S VID Description BIt
SDI Select
Processing Coefficient
Set 4--x Coefficient 16 N/A (0) Coefficient
Index
Set 5--0x Coefficient Index 8 N/A (0) Processing
State
0x00 Off On 0x01 Benign On 0x02 Benign On 0x80 Off Off 0x81 Benign Off 0x82 Benign Off Set 0x703 Processing State 8 N/A (0)
Payload
Get 0xF04 N/A (0) N/A (0)
Set 0x704 N/A (0) 8 N/A (0) Get C--0x N/A (0) Coefficient
Get D--0x N/A (0)
Get 0xF03 N/A (0)
Response (32 Bits) Description
The AD1986A has only a single SDI line, thus set SDI verbs are ignored and get SDI verbs always return a 0.
Get/set the processing coefficient at the current coefficient index. Index can be set by the “set coefficient index” verb. The coefficient indexes and data are identical to the AC’ 97 Registers 0x60 and 0x62 definitions (see the EQ Control Register (Register 0X60) and EQ Data Register (Register 0X62) sections). Note that the AD1986A does not automatically increment the coefficient index. The index must be written for each coefficient that is to be loaded or read.
Coefficient Index
Processing State
Get/set the processing coefficient index for the get/set Processing Coefficient verb. The coefficient indexes and data are identical to the AC’ 97 register 0x60 and 0x62 definitions. (see the EQ Control Register (Register 0X60) and EQ Data Register (Register 0X62) sections). Note that the AD1986A does not automatically increment the coefficient index. The index must be written for each coefficient that is to be loaded or read.
Processing states supported by the AD1986 Digital EQ:
Value
Note that the AD1986A considers states on and benign as both benign. If the on state is set, the AD1986 will set and return the benign state. States 0x00 or 0x80 must be set when loading coefficients. Setting state 0x80 will load coefficients with SYM off. Default state 0x00 is SYM on. When symmetry is on, only ½ of the coefficients (one channel) need to be loaded.
Processing (EQM Bit [Inversed]) Symmetry (SYM Bit)
Table 30. Surround DAC Audio Output
NID Name TID Type Description
0x04 Surround DAC Audio Output 0x0 Audio Output Designates the surround channel DACs.
Table 31. ADI Specific Verb Support
Verb G/S VID Description Bit SDI
Select Set 0x704x N/A (0) 8 N/A (0)
Get 0xF04 N/A (0) N/A (0)
Payload
Response (32 Bits) Description
The AD1986 has a only single SDI line, thus set SDI verbs are ignored and get SDI verbs always return a 0.
Rev. 0 | Page 15 of 56
AD1986A
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Table 32. Center/LFE DAC Audio Output
NID Name TID Type Description
0x05 Center/LFE DAC Audio Output 0x0 Audio Output Designates the surround channel DACs.
Table 33. Record ADC Audio Input
NID Name TID Type Description
0x06 Record ADC Audio Input 0x1 Audio Input Designates the record channel ADCs.
Table 34. Analog Mixer
NID Name TID Type Description
0x07 Analog Mixer 0x2 Audio Mixer Mixes analog input signals into line out audio.
Table 35. Mono Mixer
NID Name TID Type Description
0x08 Mono Mixer 0x2 Audio Mixer
Table 36. Downmix
NID Name TID Type Description
0x09 Surround to Stereo Down Mix 0x2 Audio Mixer Mixes 5.1 stereo to 4.0 or 2.0 on front channels.
Table 37. ADI Specific Verb Support
Payload
Response
Verb G/S VID Description Bits
Amplifier Gain/Mute
Set 3--0x Amp Set Payload 16 N/A (0)
Get B--0x Amp/Index 16
(32 Bits) Description
Amp settings
Table 38. Headphone Selector
NID Name TID Type Description
0x0A Headphone Selector 0x3 Audio Selector Chooses the HP source.
Table 39. Line Out Selector
NID Name TID Type Description
0x0B Line Out Selector 0x3 Audio Selector Chooses the line out source.
Table 40. Surround Selector
NID Name TID Type Description
0x0C Surround Selector 0x3 Audio Selector Chooses the surround source.
Table 41. Center/LFE Selector
NID Name TID Type Description
0x0D Center/LFE Selector 0x3 Audio Selector Chooses the center/LFE source.
Table 42. Mono Out Selector
NID Name TID Type Description
0x0E Mono Out Selector 0x3 Audio Selector Chooses the mono out source.
Mixes the left/right channels from the analog mixer into a mono signal.
This widget contains mute bits for the output and only one input. Surround DAC (input amp Index 0), has a mute bit. The CLFE DAC input (input amp Index 1) does not have a mute control. Writing the CLFE DAC input mute will have no effect and will always return a 0 when read.
Rev. 0 | Page 16 of 56
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AD1986A
Table 43. Microphone Selector
NID Name TID Type Description
0x0F Microphone Selector 0x3 Audio Selector
Chooses the microphone inputs between the MIC_1/2 and C/LFE pins. Contains the microphone gain boost amplifier.
Table 44. Line In Selector
NID Name TID Type Description
0x10 Line In Selector 0x3 Audio Selector
Chooses the line in inputs between the line in, surround and MIC_1/2 pins.
Table 45. MIC_1/2 Swap
NID Name TID Type Description
0x11 MIC_1/2 Swap 0x3 Audio Selector
Swaps the left/right association of MIC_1/2 on the input pins only. Allows up mix, spreading one microphone to both left and right output channels.
Table 46. ADI Specific Verb Support
Payload
Response
Verb G/S VID Description BIt
Processing Get C--0x N/A (0) N/A (0) Not supported. Writes have no effect, reads always return a 0. Coefficient Set 4--0x N/A (0) 16 N/A (0) Coefficient Get D--0x N/A (0) N/A (0) Not supported. Writes have no effect, reads always return a 0. Index Set 5--0x N/A (0) 8 N/A (0) Processing
State
0x00 Off Off 0x01 Benign On 0x02 Benign On Set 0x703 Processing State 8 N/A (0)
Get 0xF03 N/A (0)
(32 bits) Description
Processing State
Controls the up-mix function of the MIC_1/2 swap widget. Up-Mix will spread the selected left channel (see the left/right swap feature of the enable EAPD/BTL verb description) to both the left and right channel outputs of this stereo widget.
Value Processing State Up-Mix Spreading
Note that the AD1986 considers both on and benign states as benign. If the on state is set, the AD1986 will set and return the benign state.
Table 47. Record Selector
NID Name TID Type Description
0x12 Record Selector 0x3 Audio Selector Chooses the analog source to the record ADCs.
Table 48. Microphone MixAmp
NID Name TID Type Description
0x13 Microphone MixAmp 0x3 Audio Selector The microphone amplifier input to the analog mixer.
Table 49. Phone MixAmp
NID Name TID Type Description
0x14 Phone MixAmp 0x3 Audio Selector The phone amplifier input to the analog mixer.
Table 50. CD MixAmp
NID Name TID Type Description
0x15 CD MixAmp 0x3 Audio Selector The CD amplifier input to the analog mixer.
Rev. 0 | Page 17 of 56
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