Analog Devices AD1955 Datasheet

High Performance Multibit - DAC

a

FEATURES
5 V Power Supply Stereo Audio DAC System
Accepts 16-/18-/20-/24-Bit Data
Supports 24-Bit, 192 kHz Sample Rate PCM Audio Data
Supports SACD Bit Stream and External Digital Filter

Interface

Accepts a Wide Range of PCM Sample Rates Including:

32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, and
192 kHz

Multibit Sigma-Delta Modulator with "Perfect Differen-

tial Linearity Restoration" for Reduced Idle Tones and

Noise Floor
Data Directed Scrambling DAC––Low Sensitivity to Jitter
Supports SACD Playback with "Bit Expansion" Filter
Differential Current Output for Optimum Performance

8.64 mA p-p Differential Output
120 dB SNR/DNR (not muted) at 48 kHz Sample Rate

(A-Weighted Stereo)
123 dB SNR/DNR (Mono)
–110 dB THD + N
110 dB Stop-Band Attenuation with 0.0002 dB

Pass-Band Ripple
8 Oversampling Digital Filter
On-Chip Clickless Volume Control
Supports SACD-Mute Pattern Detection
Supports 64 f
Internal Digital Filter Pass-Through for External Filter
Master Clock: 256 fS, 512 fS, 768 f
Hardware and Software Controllable Clickless Mute
Serial (SPI) Control for Serial Mode, Number of Bits,

Sample Rate, Volume, Mute, De-Emphasis, Mono Mode
Digital De-Emphasis for 32 kHz, 44.1 kHz, and 48 kHz

Sample Rates
Flexible Serial Data Port with Right-Justified, Left-

Justified, I
28-Lead SSOP Plastic Package

APPLICATIONS
High End DVD Audio
SACD
CD
Home Theater Systems
Automotive Audio Systems
Sampling Musical Keyboards
Digital Mixing Consoles
Digital Audio Effects Processors

/128 fS DSD SACD with Phase Mode

S

S

2

S, and DSP Modes

with SACD Playback

AD1955

FUNCTIONAL BLOCK DIAGRAM

DSD

BITSTREAM

INPUT

4

DIGITAL
SUPPLY

DSD FILTER

RESET

MUTE

ANALOG
SUPPLY

ZERO
FLAGS

(continued on page 12)

16-/20-/24-BIT

AUDIO DATA/

EXTERNAL

DIGITAL

FILTER INPUT

MASTER

CLOCK INPUT

AUTO -CLOCK

DIVIDER

3/4

SERIAL DATA

INTERFACE

DIGITAL

FILTER ENGINE

NOISE-SHAPED

SCRAMBLING

I-DAC

L-CH R-CH

DIFFERENTIAL

CURRENT OUTPUT

I-DAC

MUX

CONTROL

DATA INPUT

3

SPI CONTROL

EXTERNAL

FILTER I/F

S/H

MULTIBIT -

MODULATOR

VOLTA G E

REFERENCE

PRODUCT OVERVIEW

The AD1955 is a complete, high performance, single-chip, stereo
digital audio playback system. It is comprised of a multibit sigma­delta modulator, high performance digital interpolation filters,
and continuous-time differential current output DACs. Other
features include an on-chip clickless stereo attenuator and mute
capability, programmed through an SPI compatible serial control
port. The AD1955 is fully compatible with all known DVD audio
formats including 192 kHz as well as 96 kHz sample frequencies
and 24 bits. It is also backward compatible by supporting 50 µs/
15 µs digital de-emphasis intended for “redbook” compact discs,
as well as de-emphasis at 32 kHz and 48 kHz sample rates.

The AD1955 has a very flexible serial data input port that
allows for glueless interconnection to a variety of ADCs, DSPs,
SACD decoders, external digital filters, AES/EBU receivers, and

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2002

AD1955–SPECIFICATIONS

TEST CONDITIONS

(Unless otherwise noted.)

Analog Supply Voltages (AVDD) . . . . . . . . . . . . . . . . . . . . 5 V

Digital Supply Voltages (DV
Reference Current (I

Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . 25°C

Input Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.288 MHz

Input Signal . . . . . . . . . . . . . . . . . 984.375 Hz, 0 dB Full Scale

Input Sample Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 kHz

Measurement Bandwidth . . . . . . . . . . . . . . . . 20 Hz to 20 kHz

Word Width . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Bits

Load Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 pF

Load Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 kΩ

Input Voltage HI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 V

Input Voltage LO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 V

REF

) . . . . . . . . . . . . . . . . . . . . 5 V

DD

) . . . . . . . . . . . . . . . . . . . . . 0.960 mA

ANALOG PERFORMANCE

Parameter Min Typ Max Unit

Resolution 24 Bits

SIGNAL-TO-NOISE RATIO (20 Hz to 20 kHz)*

Differential Output (A-Weighted, RMS) (Stereo) 120 114 dB
Differential Output (A-Weighted, RMS) (Mono) 123 dB
Single-Ended (A-Weighted, RMS) (Stereo) 119 dB

DYNAMIC RANGE (20 Hz to 20 kHz, –60 dB Input)*

Differential Output (A-Weighted, RMS) (Stereo) 120 114 dB
Differential Output (A-Weighted, RMS) (Mono) 123 dB
Single-Ended (A-Weighted, RMS) (Stereo) 119 dB

Total Harmonic Distortion + Noise (Stereo) at 0 dBFS –110 –102.5 dB

ANALOG OUTPUTS

Differential Output Range (Full Scale) 8.64 mA p-p
Output Capacitance at Each Output Pin 100 pF
Output Bias Current, Each Output –3.24 mA

Out-of-Band Energy (0.5  f
Reference Voltage 2.245 2.39 2.505 V

DC ACCURACY

Gain Error ± 6%
Interchannel Gain Mismatch 0.01 0.26 dB
Gain Drift 25 ppm/°C

Interchannel Crosstalk (EIAJ Method) –125 dB
Interchannel Phase Deviation ± 0.1 Degrees
Mute Attenuation –100 dB
De-Emphasis Gain Error ± 0.1 dB

*Measured with Audio Precision System Two Cascade in RMS Mode. Averaging Mode will show approximately 2 dB better performance.

Performance of right and left channels are identical (exclusive of the Interchannel Gain Mismatch and Interchannel Phase Deviation specifications).

Specifications subject to change without notice.

to 100 kHz) –90 dB

S

(See figures. I

= 0.960 mA, V

REF

= 2.80 V.)

BIAS

REV. 0–2–

AD1955

DIGITAL I/O

Parameter Min Typ Max Unit

Input Voltage HI (V
Input Voltage LO (V
Input Leakage (I
Input Leakage (I
High Level Output Voltage (V
Low Level Output Voltage (V
Input Capacitance 20 pF

Specifications subject to change without notice.

(–40C to +85C, unless otherwise noted.)

) 2.2 V

IH

) 0.8 V

IL

@ VIH = 2.4 V) –3+3µA

IH

@ VIL = 0.8 V) –3+3µA

IL

) IOH = 1 mA 2.4 V

OH

) IOL = 1 mA 0.4 V

OL

TEMPERATURE

Parameter Min Typ Max Unit

Specifications Guaranteed 25 °C
Functionality Guaranteed –40 +85 °C
Storage –55 +125 °C

Specifications subject to change without notice.

POWER

Parameter Min Typ Max Unit

SUPPLIES

Voltage, Digital 4.50 5 5.50 V
Voltage, Analog 4.50 5 5.50 V
Analog Current 20 mA
Analog Current—Reset 20 mA
Digital Current 22 mA
Digital Current—Reset 2 mA

DISSIPATION

Operation—Both Supplies 210 mW
Operation—Analog Supply 100 mW
Operation—Digital Supply 110 mW

POWER SUPPLY REJECTION RATIO

1 kHz 300 mV p-p Signal at Analog Supply Pins –77 dB
20 kHz 300 mV p-p Signal at Analog Supply Pins –72 dB

Specifications subject to change without notice.

DIGITAL FILTER CHARACTERISTICS

Stop-Band

Sample Rate (kHz) Pass Band (kHz) Stop Band (kHz) Attenuation (dB) Pass-Band Ripple (dB)

44.1 DC–20 24.1–328.7 110 ± 0.0002
48 DC–21.8 26.23–358.28 110 ±0.0002
96 DC–39.95 56.9–327.65 115 ±0.0005
192 DC–87.2 117–327.65 95 0/–0.04 (DC – 21.8 kHz)

0/–0.5 (DC – 65.4 kHz)
0/–1.5 (DC – 87.2 kHz)

Specifications subject to change without notice.

REV. 0

–3–

AD1955

SPECIFICATIONS

(continued)

GROUP DELAY

Chip Mode Group Delay Calculation fS (kHz) Group Delay Unit

INT8 Mode 5553/(128  f
INT4 Mode 5601/(64  f
INT2 Mode 5659/(32  fS) 192 921 µs

Specifications subject to change without notice.

DIGITAL TIMING

(Guaranteed over –40C to +85C, AVDD = DVDD = 5.0 V  10%.)

Parameter Description Min Unit

t

DMP

t

DML

t

DMH

t

DBH

t

DBL

t

DBP

t

DLS

t

DLH

t

DWH

t

DWL

t

DDS

t

DDH

t

DPHS

t

DSDS

t

DSDH

t

DSKP

t

DSKH

t

DSKL

t

DMP

t

DML

t

DMH

t

CLS

t

CLH

t

CDS

t

CDH

t

RSTL

Specifications subject to change without notice.

MCLK Period (F
MCLK LO Pulsewidth (All Modes) 0.4  t
MCLK HI Pulsewidth (All Modes) 0.4  t
BCLK/EF_BCLK High 20 ns
BCLK/EF_BCLK Low 20 ns
BCLK/EF_BCLK Period 60 ns
LRCLK/EF_WCLK Setup 0 ns
LRCLK Hold (DSP Serial Port Mode Only) 15 ns
EF_WCLK High 20 ns
EF_WCLK Low 20 ns
SDATA/EF_LDATA/EF_RDATA Setup 0 ns
SDATA/EF_LDATA/EF_RDATA Hold 20 ns
DSD_PHASE Setup 20 ns
DSD_DATA Setup 5 ns
DSD_DATA Hold 5 ns
DSD_SCLK Period 60 ns
DSD_SCLK High 20 ns
DSD_SCLK Low 20 ns
CCLK Period 50 ns
CCLK LO Pulsewidth 15 ns
CCLK HI Pulsewidth 10 ns
CLATCH Setup 0 ns
CLATCH Hold 15 ns
CDATA Setup 0 ns
CDATA Hold 5 ns
RST LO Pulsewidth 10 ns

)48903.8 µs

S

)96911.6 µs

S

MCLK

= 256  F

)50ns

LRCLK

DMP

DMP

ns
ns

REV. 0–4–

AD1955

H

ABSOLUTE MAXIMUM RATINGS

*

Parameter Min Max Unit

to DGND –0.3 6 V

DV

DD

AV

to AGND –0.3 6 V

DD

Digital Inputs DGND – 0.3 DV
Analog Outputs AGND – 0.3 AV

+ 0.3 V

DD

+ 0.3 V

DD

AGND to DGND –0.3 +0.3 V
Reference Voltage (AV

+ 0.3)/2

DD

Soldering 300 °C

10 sec

*Stresses greater than those listed under Absolute Maximum Ratings may cause

permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

ORDERING GUIDE

Model Temperature Package Description Package Option

AD1955ARS –40°C to +85°C 28-Lead SSOP RS-28
AD1955ARSRL –40°C to +85°C 28-Lead SSOP RS-28 on 13" Reels
EVAL-AD1955EB Evaluation Board

*RS = Shrink Small Outline Package

PACKAGE CHARACTERISTICS

Package Typ Unit

(Thermal Resistance 109.0 °C/W



JA

[Junction-to-Ambient])

(Thermal Resistance 39.0 °C/W



JC

[Junction-to-Case])

*

PIN CONFIGURATION

DVDD

LRCLK/EF_WCLK

BCLK/EF_BCLK

SDATA/EF_LDATA

EF_RDATA

DSD_SCLK

DSD_LDATA

DSD_RDATA

DSD_PHASE

AGND

IOUTR+

IOUTR–

FILTR

IREF

1

2

3

4

5

6

AD1955

7

TOP VIEW

(Not to Scale)

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

DGND

MCLK

CCLK

CLATC

CDATA

PD/RST

MUTE

ZEROL

ZEROR

AGND

IOUTL+

IOUTL–

FILTB

AVDD

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD1955 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

REV. 0

–5–

AD1955

PIN FUNCTION DESCRIPTIONS

Pin No. I/O Mnemonic Description

1 DVDD Digital Power Supply Connected to Digital 5 V Supply

2 Input LRCLK/EF_WCLK Left/Right Clock Input for Input Data in PCM Mode

Word Clock in External Filter Mode

3 Input BCLK/EF_BCLK Bit Clock Input for Input Data in PCM Mode

Bit Clock Input in External Filter Mode

4 Input SDATA/EF_LDATA MSB First, Twos Complement Serial Audio Data

Two Channel (left and right), 16-Bit to 24-Bit Data in PCM Mode
Left Channel Data in External Filter Mode

5 Input EF_RDATA Not used in PCM Mode

Right channel data in External Filter Mode

6 I/O DSD_SCLK

7 Input DSD_LDATA DSD Left Channel Data Input

8 Input DSD_RDATA DSD Right Channel Data Input

9 I/O DSD_PHASE DSD Phase Reference Signal. This clock should be 64  44.1 kHz,

10 AGND Analog Ground

11 Output IOUTR+ Right Channel Positive Analog Output

12 Output IOUTR– Right Channel Negative Analog Output

13 Output FILTR Voltage Reference Filter Capacitor Connection. Bypass and decouple the

14 IREF Connection Point for External Bias Resistor

15 AVDD Analog Power Supply Connected to Analog 5 V Supply

16 Output FILTB Filter Capacitor Connection with Parallel 10 µF and 0.1 µF Capacitors to AGND

17 Output IOUTL– Left Channel Negative Analog Output

18 Output IOUTL+ Left Channel Positive Analog Output

19 AGND Analog Ground

20 Output ZEROR Right Channel Zero Flag Output. This pin goes high when the right channel

21 Output ZEROL Left Channel Zero Flag Output. This pin goes high when the left channel has

22 Input MUTE Mute. Assert high to mute both stereo analog outputs. Deassert low for nor-

23 Input PD/RST Power Down/Reset. The AD1955 is placed in a reset state and the digital

24 Input CDATA Serial Control Input, MSB First, Containing 16 Bits of Unsigned Data. Used

25 Input CLATCH Latch Input for Control Data

26 Input CCLK Clock Input for Control Data. Control input data must be valid on the rising

27 Input MCLK Master Clock Input. Connect to an external clock source.

28 DGND Digital Ground

Serial Clock Input for DSD Data. This clock should be 64  44.1 kHz,

2.8224 MHz or 128  44.1 kHz, 5.6448 MHz in Normal Mode, 128 

44.1 kHz, 5.6448 MHz or 256  44.1 kHz, 11.2896 MHz in Phase Mode.

2.8224 MHz. If not used, this pin should be connected low.

voltage reference with parallel 10 µF and 0.1 µF capacitors to AGND.

has no signal input or the DSD mute pattern is detected.

no signal input or the DSD mute pattern is detected.

mal operation.

circuitry is powered down when this pin is held low. The AD1955 is reset on
the rising edge of this signal. The serial control port registers are reset to the
default values. Connect high for normal operation.

for specifying control information and channel-specific attenuation.

edge of CCLK. CCLK may be continuous or gated.

REV. 0–6–

Typical Performance Characteristics–AD1955

TPC 1. Pass-Band Response, 8 Mode, 48 kHz Sample Rate

TPC 2. Complete Response, 8 Mode, 48 kHz Sample Rate

TPC 4. Complete Response, 4 Mode, 96 kHz Sample Rate

TPC 5. Pass-Band Response, 2 Mode, 192 kHz
Sample Rate

TPC 3. 44 kHz Pass-Band Response 4 Mode, 96 kHz
Sample Rate

REV. 0

–7–

TPC 6

. Complete Response, 2 Mode, 192 kHz

Sample Rate

AD1955

TPC 7. DSD Digital Filter Pass Band

TPC 8. DSD Digital Filter Response, Input Sample
Rate = 2.8224 MHz

TPC 10. FFT Plot, DNR = 121 dBFS (A-Weight), PCM
SR = 48 kHz, –60 dBFS @ 1 kHz

TPC 11. FFT Plot, SNR = 121 dBFS (A-Weight), PCM
SR = 48 kHz with Zero Input

TPC 9. FFT Plot, THD + N = –110 dBFS, PCM SR = 48
kHz,

0 dBFS @ 1 kHz

TPC 12. Linearity, PCM SR = 48 kHz, 0 dBFS to
–140 dBFS Input @ 200 Hz

REV. 0–8–