Altera APEX Getting Started Manual

APEX PCI Development Kit

Getting Started User Guide

101 Innovation Drive San Jose, CA 95134 (408) 544-7000 http://www.altera.com

Kit Version: 2.1.0

Document Version: 2.1.0 rev. 1

Document Date: April 2002

Copyright © 2002 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Altera products are protected under numerous U.S. and foreign patents and pending applications, mask work rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

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UG-A20KEPCI-2.1

About this User Guide

This user guide provides comprehensive information about the Altera® APEX™ peripheral component interconnect (PCI) Development Kit.

Table 1 shows the user guide revision history.

How to Find Information

Go to the following sources for more information:

■ See “Features” on page 10 for a complete list of the kit features,

including new features in this release.

■ Refer to the APEX PCI Development Kit readme file on the APEX PCI

Development Kit for late-breaking information that is not available in

this user guide.

Table 1. User Guide Revision History

Date Description

April 2002, v2.1.0 Updated the kit and PCI Compiler ve rsio n num bers. Added

information about the PCI-BOARD/A10C development board.

October 2001, v2.0

December 2000, v1.0

■ The Adobe Acrobat Find feature allows you to search the contents of

a PDF file. Click the binoculars toolbar icon to open the Find dialog box.

■ Bookmarks serve as an additional table of contents.

■ Thumbnail icons, which provide miniature previews of each page,

provide a link to the pages.

■ Numerous links, shown in green text, allow you to jump to related

information.

Updated the organization of the document. Added information on the prototyping flow an d a prot otyping walkthrough.

First version of user guide.

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APEX PCI Development Kit Getti ng Star ted User Guide

How to Contact

For the most up-to-date information about Altera products, go to the Altera world-wide web site at http://www.altera.com.

Altera

For technical support on this product, go to

http://www.altera.com/mysupport. For additional information about

Altera products, consult the sources shown in Table 2.

Table 2. How to Contact Altera

Information Type USA & Canada All Other Locations

Technical support http://www.altera.com/mysupport/ http://www.altera.com/mysupport/

(800) 800-EPLD (3753) (7:00 a.m. to 5:00 p.m.

Pacific Time) Product literature http://www.altera.com http://www.altera.com Altera literature services lit_req@altera.com (1) lit_req@altera.com (1) Non-technical customer

service

FTP site ftp.altera.com ftp.altera.com

Note:

(1) You can also contact your local Altera sales office or sales representative.

(800) 767-3753 (408) 544-7000

(408) 544-7000 (1) (7:00 a.m. to 5:00 p.m. Pacific Time)

(7:30 a.m. to 5:30 p.m. Pacific Time)

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APEX PCI Developmen t K it Getti ng Star ted U ser Gu id e

Typographic

The APEX PCI Development Kit Getting Started User Guide uses the typographic conventions shown in Table 3.

Conventions

Table 3. Conventions

Visual Cue Meaning

Bold Type with Initial Capital Letters

bold type External timing paramet ers , direc to ry name s, project names, disk drive names,

Italic Type with Initial Capit al Letter s

Italic type Internal timing parameters and variables are shown in italic type. Examples: t

Initial Capital Letters Keyboard keys and menu names are shown with initial capit al let ter s. Ex am ples :

“Subheading Title” Referenc es to sections within a document and titles of on-line help topics are shown

Courier type Signal and port names are shown in lowercase Courier type. Examples: data1, tdi,

1., 2., 3., and a., b., c.,... Numbered steps are used in a list of items when the sequence of the items is

■

v The checkmark indicates a procedure that consists of one step only. 1 The hand points to informa tio n tha t req uires sp ec ial attention.

r The angled arrow indicates you should press the Enter key.

f The feet direct you to more inform at ion on a particular topic.

Command names, dia log box titles , che ckbox options, and dialog box opt ions are shown in bold, initial capital letters. Example: Save As dialog box.

filenames, filename extens ions, and software utility names are sh ow n in bold t yp e. Examples: f

Document titles are shown in italic type with initial capital letters. Example: AN 75:

High-Speed Board De si gn.

Variable names are enclosed in angle brackets (< >) and shown in italic type. Example: <file name>, <project name>.pof file.

Delete key, the Options menu.

in quotation marks. Exam ple: “T yp ographic Conventions.”

input. Active-low signals are denoted by suffix n, e.g., resetn.

Anything that must be typed ex ac t ly as it app ears is shown in C ourier type. For example: c:\qdesigns\tutorial\chiptrip.gdf. Also, sections of an actual file, such as a Report File, refere nc es to parts of files (e.g ., the AHDL k ey wo rd SUBDESIGN), as well as logic funct ion nam es (e. g. , TRI) are sh ow n in Co urier.

important, such as the step s list ed in a proc edure. Bullets are used in a list of items whe n the seq uenc e of the items is not imp ort ant .

, \qdesigns directory, d: drive, chiptrip.gdf file.

MAX

PIA

, n + 1.

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Contents

About this User Guide ............................................................................................................................... iii

How to Find Information ..............................................................................................................iii

How to Contact Altera ..................................................................................................................iv

Typographic Conventions ..............................................................................................................v

About this Kit ..................................................................................................................................................9

General Description .........................................................................................................................9

Features ...........................................................................................................................................10

Documentation ...............................................................................................................................10

Getting Started ............................................................................................................................................11

Before You Begin ............................................................................................................................11

Development Kit Contents ...................................................................................................11

Inspect the Board ...................................................................................................................11

Hardware Requirements .......................................................................................................12

Software Requirements .........................................................................................................12

Software Installation ......................................................................................................................13

Board Installation ...........................................................................................................................13

Kit Application Walkthrough ......................................................................................................16

Example 1. PCI Target Write (Demo) .................................................................................17

Example 2. PCI Master Write (Demo) .................................................................................18

Example 3. PCI Master Loop (Debug) ................................................................................19

Example 4. Latency Timer Configuration Register & PCI Master Loop (Debug) ........21

Example 5. Address Offset & Target Loop (Debug) .........................................................22

Configuring the APEX Device .....................................................................................................24

Serial Configuration Using Flash Memory ........................................................................24

Selecting the Flash Section to Configure the APEX Device .....................................25

Flash Programming Walkthrough ..............................................................................26

JTAG Configuration ..............................................................................................................28

Prototyping Overview ...................................................................................................................29

Install PCI Compiler ..............................................................................................................30

Simulate Your Application Design ......................................................................................30

Synthesize Your Application Design ..................................................................................30

Compile in the Quartus II Software & Generate Programming Files ............................31

Write the .rbf of Your Design into Flash .............................................................................31

Hardware Test Your Application Design ...........................................................................32

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Contents

Prototyping Walkthrough ............................................................................................................32

Before You Begin ....................................................................................................................32

Synthesize the Reference Design .........................................................................................34

Compile the Reference Design in the Quartus II Software ..............................................36

Write the .rbf into the Flash Memory ..................................................................................37

Hardware Test the Reference Design ..................................................................................38

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About this KitAbout this Kit

About this Kit

General Description

Figure 1. APEX PCI Development Kit

The APEX PCI Development Kit provides a complete hardware platform so that designers can quickly begin hardware testing and verification.

Figure 1 shows the APEX PCI Development Kit contents.

The development kit includes:

■ APEX PCI Development Board—You can use the 3.3-V PCI

development board in a 32- or 64-bit PCI slot. It supports 33- and 66-MHz PCI interfaces as well as PCI-X interfaces. You can use the board as a desktop application with an external power supply. You can also add a PCI mezzanine card (PMC), i.e., daughter card, to the board. Refer to the APEX PCI Development Board Data Sheet for more information on the board.

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APEX PCI Development Kit Getting Started User Guide About this Kit

■ Reference Design—The kit includes a pci_mt64 reference design that

contains a DMA engine, a FIFO interface, and an SDRAM controller. The design is useful for a variety of hardware applications and lets you begin prototyping and verification quickly. For more information on the reference design, refer to FS 10: pci_mt64 MegaCore Function Reference Design.

■ APEX PCI Development Kit Application—The APEX PCI Development

Kit Application (hereafter called kit application) provides an interactive platform with which you can perform PCI transactions. You can also use the kit application as a starting point for developing your own custom software.

Features

Documentation

■ Can be used to prototype a wide variety of custom designs, coupled

with Altera PCI MegaCore functions

■ Allows designers to focus engineering efforts on value-added custom

development, reducing time to market

■ Provides a prototyping platform for both PCI form factor and

standalone designs

■ Supports 32- and 64-bit 33- and 66-MHz PCI designs

■ Includes a 64-bit 66-MHz hardware verified, open source PCI

reference design

■ Includes an open source Windows application that can be used as a

starting point for custom software applications

■ 3.3-V PCI and PCI-X expansion card

– PCI-BOARD/A4E development board includes an

EP20K400EFC672 device that supports 33- and 66-MHz PCI interfaces

– PCI-BOARD/A10E development board includes an

EP20K1000EFC672 device that supports 33-MHz PCI interfaces

– PCI-BOARD/A10C development board includes an

EP20K1000CF672 device that supports 33- and 66-MHz PCI interfaces

The APEX PCI Development Kit contains the following documentation:

■ APEX PCI Development Board Data Sheet—Describes the specifications

of the board and how to load design data into the APEX device.

■ PCI MegaCore Function User Guide—Provides the specifications of

Altera PCI MegaCore functions and explains how to use them.

■ FS 10: pci_mt64 MegaCore Function Reference Design—Describes the

reference design that is included with the kit.

■ Configuring PLDs with Flash Memory White Paper—Describes device

APEX configuration with flash memory and a MAX 3000A device.

■ APEX PCI Development Kit Configuration Controller Circuit White

Paper—Describes the flash controller program that is configured into the APEX device when the board powers up.

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Getting St art ed

Before You Begin

Before using the kit or installing the software, check the contents of the kit and inspect the board to verify that you received all of the items. If any of the items are missing, contact Altera before you proceed. You should also verify that your PC meets the kit hardware and software requirements.

Development Kit Contents

Table 1 shows the items shipped in the kit.

Table 1. APEX PCI Development Kit Contents

Contents Development Kit Ordering Code

PCI-BOARD/A4E PCI-BOARD/A10E PCI-BOARD/A10C

APEX PCI development board with an EP20K400E device

APEX PCI development board with an EP20K1000E device

APEX PCI development board with an EP20K1000C device

PCI Development Kit CD-ROM v v v

ByteBlasterMV downlo ad ca ble v v v Selector guides for Altera dev ice s, too ls, and IP

MegaCore functions Jungo WinDriver device driver C D -R OM (1) v v v

v v v

Getting Started

Note:

(1) The kit includes a CD-ROM containing a free 30-day evaluation of Jungo’s WinDriver device driver. Altera

developed the kit application using WinDriver. For more information on the driver, refer to the documentation on the WinDriver CD-ROM.

Inspect the Board

Place the board on an anti-static surface and inspect it to ensure that it has not been damaged during shipment. Verify that all components are on the board and appear intact.

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APEX PCI Development Kit Getti ng Star ted User Guide Getting Started

Refer to the APEX PCI Development Board Data Sheet—which is available on the PCI Development Kit CD-ROM—for information on the board components and their location.

1 The board can be damaged without proper anti-static handling.

Therefore, you should take anti-static precautions before handling the board.

Hardware Requirements

The APEX PCI development board is a 3.3-V PCI card that should only be used in 3.3-V PCI systems. To use the board in 5.0-V PCI systems, you must use a 5.0-V to 3.3-V PCI extender card to convert the 5.0-V PCI system to a

3.3-V PCI system. Additionally you must have a PC that can accommodate a long PCI form-factor card.

Refer to the APEX PCI Development Kit readme file for a partial listing of extender card suppliers.

Software Requirements

To use the kit application, you must have the Windows 2000, Windows NT version 4.0 Service Pack 5, or Windows 98 operating system on your PC. The kit application provided with the kit has been tested on these systems only.

1 You must have administrative privileges to install the kit

application device driver on Windows 2000 or Windows NT systems.

To create designs for the board, you must have the following software installed on your PC:

■ A full version of the Quartus II software version 2.0 service pack 1 or

higher (i.e., you cannot use the free web version)

■ PCI Compiler version 2.1.1 or higher (you must have purchased a

license for the software)

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