Akai LTA-26C902 Schematic

Models:

LTA-26C902
LTA-32C902

LTA-37C902

www.akai.ru

2

Energy Saving Mode if there is no signal input.

● Multi Language On-Screen Display menu

Ordinary and graphical user interface makes the menu operation more user-friendly

● Power Energy Saving Mode (power management mode)

In PC mode, the LCD TV will automatically power off within 30 seconds and enter into the Power

Energy Saving Mode if there is no VGA signal input. It will automatically exit from the Power Energy

Saving Mode and work again when it received a valid VGA signal or press any button on the

panel/remote control.

● Plug and Play

It is no need to equip any installation software when the product is used as computer terminal display

equipment

● Legerity, convenience, low power consumption

● Digital Photo Album Function(Only for CHD-W260F8P/CHD-W270F8P/ CHD-W320F8P/

CHD-W370F8P)

● Built-in DVD Module（Only for CHD-TD260F8 /CHD-TD270F8/CHD-TD320F8/CHD-TD370F8）

⑴Entirely Compatible to DVD、SVCD、VCD、CD、MP3

⑵Compatible to PAL/NTSC Discs

⑶High quality digital audio coaxial input enable you to feel as if sit in the theatre with the perfect classical

hi-fidelity experience

⑷Automatically delete unsuitable parts according to the chosen play levels (max.8 )(only for DVD discs

with play level control)

⑸

As many as 32 subtitles

⑹As many as 8 audios

Unit IC Compositions：

LS08 chassis LCD TV is mainly composed of regulator IC、RF IC、video processor IC、Power Amplify

IC、Analog Video IC、System Control IC and Key Control IC, see this IC frame as below:

4

PCB Assembly：

It is mainly composed of TV Board、Remote Control Receiver(Signal Receiver) 、Side AV Board、

K Board and Main Board. Hereunder function introduction to every PCB Assembly：

Numbe

Parts Description

r

1 Main Board

Assembly

It is the core of signal processing for LCD TV, which takes responsibility of

transforming outer signal into the uniform digital signal identified by LCD display

with use of System Control IC. TV and AV signals input from TV Board are

decoded by UOCIII to transport RGB signal which is to be transformed by

TDA8759 modulus to transport 24bit RGB digital signal, then it is to be

transformed by GM1601/GM1501 to produce LVDS signal displayed on the
screen, in addition, signals input from VGA、DVI would directly enter into
GM1501 procedure 、format transformation and on screen display.

5

2 TV Board

Assembly

3 Remote

Control

Receiver

Assembly

4 Built-in Power

Board

Assembly

5 K Board

Assembly

6 Screen

Assembly

7 Side AV Board It is used for earphone output, AV input, S input

It is mainly composed of two tuners (main and sub tuners) 、AV/S 、HD signal

terminals and some peripheral processing IC. The main tuner demodulates RF

signal to IF signal, and the sub tuner produces CVBS signal, all signals are sent to

the main board after transfer.

is composed of one indicator light and one remote control receiver, which enable

Users operate the TV conveniently and know its current working status simply with

a remote control..

It can transform AC 220V into DC for ICs, including +24V，+12V，+5V and +5VS

power supply in standby mode.

It consists of 7 function buttons by which users can operate the TV freely.

Screens for LS08 have the built-in adverse transformer which change DC into high

voltage AC signal to lighten the back light; The LCD screen is used to display the

image after the image signal has been processed by the main board.

,

6

CHAPTER TWO MAIN ICs FUNCTION INTRODUCTION

GENERAL INTRODUCTION:

TV Board

Number Location Type Main Function

1 UT1 TMI4-C22P2RW Audio and image intermediate frequency signal

output

2 UT2 TAD5-C2IP1RW Sub picture CVBS signal output

Main Board

3

4 U701 24LC32A T/SN Buffer

5 U306,U307,UA3 FSAV330QSCX Switch selection

6 K201 K7262N Audio surface filter

7 K202 K9352N Audio surface filter

8 U6 TPA3002D2PHPR Audio amplifier

9 U801 AM29LV800DT-70EC

10 U700 GM1501-BD Video processor

11 U201 TDA15063H-N1B06557 AV decoder

12 U402 SAA7115HL/V1 Sub channel video decoder

13 U305 SM5302AS-G-ET High definition signal filter

14 U400 TDA8759HV/8/C1 Video signal modulus transformer

15 U5 TDA9178T/N1 Video signal picture amendment

16 U600

.ICs FUNCTION INTRODUCTION IN DETAILS

Main Tuner (TMI4-C22P2RW)

1 AGC Auto gain control

2 UT NC

3 ADD Ground

4 SCL IIC bus (Clock)

5 SDA IIC bus (Data)

6 NC NC

7 +5V Power supply

8 NC NC

9 30V To produce 0~30V tune voltage

10 NC NC

11 IF Intermediate frequency TV signal

Sub Tuner (TAD5-C2IP1RW):

1 AGC Auto gain control

2 NC NC

7

U302，U303

Pin Definition Description

Pin Definition Description

24LC21A T/SN EEPROM

Flash，control program inside

MT46V2M32LG-4

Frame buffer

Intermediate frequency TV signal

3 ADD Ground

4 SCL IIC bus (Clock)

5 SDA IIC bus (Data)

6 NC NC

7 +5V Power supply

8 NC NC

9 33V To produce 0~30V tune voltage

10 NC NC

11 IF Intermediate frequency output (NC)

12 IF Intermediate frequency output (NC)

13 SW0 Band control

14 SW1 Band control

15 NC NC

16 SIF NC

17 AGC Auto gain control

18 VEDIO CVBS signal output

19 +5V Power supply

20 AUDIO NC

GM1501

GM1501is a kind of processing chassis for dual channels image and video, which is mainly used for

LCD displays and integrative TV products. With the resolution of WUXGA, it not only supports PIP
technique, but possesses some IC functions applied to image catch 、process and clock display. It

integrates high velocity AD converter, PLL, high reliability DVI receiver, X86 series miccontrol and LCDS

inverter. See the features as below:

Main Features

● High quality image zoom function;

● Analog RGB signal input interface;

● Intelligent output signal auto identification;

● Integrated high-power PLL output;

● High-reliable self-adaptive DVI input interface;

●4:4:4/4:2:2/CCR656/601 8/16/24bit digital video interface;

● Embedded IC for adjustments of gain、contrast、brightness、color saturation、hue and fleshtone;

● Efficiency in reducing EMI electromagnetism inference;

● Inclined grain processing with small angle;

● High quality video processing;

● Programmable output format;

● Embedded LVDS transport;

● Advanced OSD;

● Embedded micro controller

Pin Description :

Pin Name Description

Analog Signal Input Port

8

L3 AVSYNC ADC vertical synchronization signal input

L4 AHSYNC ADC horizontal synchronization signal input

N2 VGA-SCL VGA lock input

N1 VGA-SDA VGA digital input
D1、D2 RED+、RED-

Red analog signal input

C3 SOG Green synchronization signal
C1、C2 GREEN+、­B1、B2 BLUE+、BLUE-

Green analog signal input

Blue analog signal input

A2,B3,E3,D3 ADC3.3 ADC3.3Vpower supply
A3，A4
A5，B4
C4，D4，E1，E2，E4

ADC1.8 ADC1.8Vpower supply

ADC-DGND ADC digital ground

ADC-AGND ADC analog ground

DVI Input Output Port

N4

N3
A6，B6 RXC+，RXC­A8～A10
B8～B10

DVI-SCL

DVI-SDA

～RX2+

RX0+

RX0-～RX2-

DDC interface , serial clock signal
DDC interface ，serial data signal

DVI clock input signal

DVI input port

B11 REXT Exterior exit resistance
C6～C11
D6、D8～D10

A7,A11,B5,B7,C7,D7

DVI-3.3 DVI 3.3V power supply

DVI-1.8 DVI 1.8V power supply

DVI-GND DVI ground

D11

Low Bandwidth ADC Port

C13 LBADC-33 ADC3.3Vpower supply
A12，B12，C12 LBADC_IN1～

ADC analog input channel

LBADC_IN3

D12 LBADC_RETURN Channel analog ground

D13 LBADC-GND Power supply voltage analog ground

OCM IC Port

AA1~AA3,Y1~Y3,

W1~W3,V1~V4,

OCMADDR0～

OCMADDR19

Address input output port

U1~U4,T1~T3

AB1~AB3,AC1~AC3,

AD1~AD4,AE1~AE3,

OCMDATA0~

OCMDATA15

Data input output port

AF1~AF3

OCM Port Control Signal

R1，T4，P1，P2

ROM_CSn~

ROM_CS2n

Part selection signal

R2 OCM_REn Read enable signal

R3 OCM_WEn Write enable signal

L1

L2

OCM_INT2

OCM_INT1

Interrupt

M1 OCM_UDO OCM data output

M2 OCM_UDI OCM data input

D25 OCM_TIMER1 OCM timer input

9

Standard Definition Video Control Port

D16 SVCLK SV pels clock input

C14 SVHSYNC SV horizontal synchronization signal input

B14 SVVSYNC SV vertical synchronization signal input

A14 SVODD Scan status input

A17 SVDV SV data input

Standard Definition Video Data Port

D14,D15,A15,A16,

B15,B16,C15,C16

SVDATA7~

SVDATA0

SV ITU656 data input

Video Control Port

A20 VCLK Video pels clock signal

D19 VHS_CSYNC Video horizontal synchronization signal input

C20 VVS Video vertical synchronization signal input

B20 VODD Scan status input

D20 VDV (VSOG) Video data input

B17 VCLAMP Video clamp enable output

A21,A22,A23,B21,

B22,C21,C22,D21

C17,C18,C19,A18

A19,B18,B19,D18

B23,B24,B25,A24

A25,C23,C24,D24

VGRN7~ VGRN0 Green signal or Y signal input

VRED7~ VRED0

VBLU7~ VBLU0

Red signal or V/Cr/Pr signal input

Blue signal or U/Cb/Pb signal input

Screen Control Port

A26 PPWR Screen power control

B26 PBIAS Screen bias control
D26，C25，C26

PWM2 ~PWM0 Pulse width modulation output

AC7 DCLK Pels clock output

AC16 OEXTR Connect external LVDS bias resistance

LVDS Port

AE14~AE16,AE19~

AE23,AF13~AF16

A0-~A3-, A0+~A3+

B0-~B3-, B0+~B3+

Low voltage difference data input

AF19~AF23,AF11

AD14,AD11,AE13

AE11,AC11,AF10

AE12,AF12,

LVDS_SHIELD[5] ~

LVDS_SHIELD[0]

Low voltage difference protect output

AC+,AC-,BC+,BC- Low voltage difference protect input

AF20,AE20

Screen Port Power Supply

AD12,AD13,AC12 LVDSB_3.3 LVDS B channel power supply

AC13,AC14,AC15 LVDSB_GND B channel ground

AC20,AC21,AC22 LVDSA_3.3 LVDS A channel power supply

AD19,AC19,AC20 LVDSA_GND A channel ground

AE17 VDDD33_LVDS Analog power supply

AD17 VSSD33_LVDS Analog ground

Clock Composite and Power Supply

G4 XTAL crystal oscillator interface

10

F2

VDDD33_PLL，

Digital power supply

H1 VDDD33_SDDS

J1 VDDD33_DDDS

G2 VSSD33_PLL

Digital ground

J4 VSSD33_SDDS

K4 VSSD33_DDDS

F4 VDDA33_RPLL

Analog power supply

G1 VDDA33_FPLL

H3 VDDA33_SDDS

J3 VDDA33_DDDS

F3 VSSA33_RPLL

Analog ground

H4 VSSA33_FPLL

H2 VSSA33_DDDS

J2 VSSA33_DDDS

G3 TCLK Reference clock signal input

K2 ACS_RSET_HD External resistance port

System Signal

K1 RESETn Reset signal
M3，M4 IR0，IR1

P4 MSTR_SCL Main clock output signal

P3 MSTR_SDA

Main data output/input signal 信号

R4 EXTCLK External clock input

Frame Storage Interface

U24,U23 FSCLKp,FSCLKn Fine storage clock output

V24,V25 FSRAS,FSCAS Address output

V26 FSWE Write enable port

W26 FSCKE Read enable port

J24 FSVREF Reference voltage input

K26 FSVREFVSS Reference voltage ground

W25 FSVREF Reference voltage input

W24 FSVREFVSS Reference voltage ground

L26 FSDQS Data filter

F24~F26,G23~G26

H24~H26,J25,J26,

FSDATA31~

FSDATA0

Data input output port

R24~R26,P24~P26

N23~N26,…….

T24,T25,U25,U26 FSDQM3~ FSDQM0 Data output mark

Y26

Y25

AA24~AA26

AB24~AB26,

FSBKSEL1

FSBKSEL0

FSADDR11~

FSADDR0

，

Layer address

Range address output

AC24~AC26

AD24~AD26

E23, F23, H23, J23,

L23,M23,P23, R23,

FS_2.5

2.5V power supply

T23,V23,W23,Y23,

11

AA23,AB23,AC23

K23 VDDA18_DLL 1.8V power supply

K25 VSSA18_DLL Power supply ground

Digit power supply

K10,K11,K16,K17,

CORE_1.8 1.8V power supply

L11,L16,T11,T16,

T17,U10,U11,U16,U17

D23, W4,Y4, AA4,

AB4,AC4,AC6,D17,

IO_3.3

3.3V power supply

D22,AC8,AC10

K12,K13,K14,K15,

L10,L12,L13,L14,

D_GND

Power ground

L15,L17,M10,M11,
M12,M13。。。。。。
A1，AC，D5，AC17，
K3，F1

NO_CONNECT

NC

GM1501Internal Diagram：

TDA8759：

TDA8759 is a triple 8-bit video converter interface. The IC converts a RGB analog signal into a 24bit

RGB or YUV or YCbCr digital signal , or converts a YUV or YCbCr analog signal into a YUV or RGB digital

signal with a sampling rate up to 81 Msps. The IC supports resolutions from 480i and VGA to HDTV and

XGA.

12

Main Features:

● Triple 8-bit Analog-to-Digital Converter (ADC)

●Three independent analog video sources up to 81 Msps selectable by I2C-bus

●Auto check on interval scan video signal

●1.8Vand 3.3Vsupplies

● Low gain variation with temperature

●Output format RGB 4:4:4, YUV 4:4:4, YUV 4:2:2 ,CCIR 656 or YUV 4:2:2 semi-planar standard on

output bus；

●I²C bus control

●Programmable clock phase adjustment cells

●Amplifier bandwidth of 100 MHz

●Integrated PLL divider

●Power-Downmode

TDA8759 Internal Diagram：

Pin Description：

Pin Name Description

1 HREF Horizontal reference output

2 VCLK Video clock output

3,13,21,29,

37,45,164

13

VDDO Video port output supply voltage

4,14,22,30

38,46,165
7，8，9，10，

OGND Video port output

ground

VPA0~VPA7 Video port A

15，16，17，18

11,116,130,132 VDDC Power supply port

12,117,159 CGND Ground

23~28,31,32 VPB0~VPB7 Video port B

35,36,39~44 VPC0~VPC7 Video port C

47,53,57,58,55

AGND Analog ground

60,66,70,71,75

81,83,85,86,

48,54,59,61,67

VDDA Power supply port

69,76,82,85,87,88

49 REFB/Pb Blue/blue-chrominance channel reference input

52,51,50 B/Pb1~ B/Pb3 Blue/blue-chrominance channel analog input

56 BIAS Bias input

62 REFG/Y Green/green-chrominance channel reference

input

65,64,63 G/Y1~G/Y3 Green/green-chrominance channel analog input

74,73,72 SOG/Y1~SOG/Y3 Sync on green//brightness channel input

77 REFR/Pr Red/red-chrominance channel reference input

80,79,78 R/Pr1~ R/Pr3 Red/red-chrominance channel analog input

89~92,97~101

TST0~TST17 Reserved for test

112,121,122,

124,125,160~163

93 PD Power-down control input

94 OE Output enable input

96 A0 I²C bus address control input

102 COAST PLL control input

103 GAIN Gain input

104 CLAMP Clamp input

105~107 VSYNC1~VSYNC3 Vertical synchronization input

108~110 H(C)SYNC1~

H(C)SYNC3

Horizontal (composite)synchronization input

111 CKEXT External clock input

113 TCLK Reserved for test

114 DIS I²C bus disable control input

118 SDA I²C bus data input/output

119 SCL I²C bus clock input

120,126,127,131

IGND Input digital ground

133,142,148,

123,138,139,145

VDDI Input digital supply voltage

151,157

166 PL PLL disable belock output

167 DE Data enable output

14

168 HS Horizontal synchronization input

169 VS vertical synchronization input

170 CS Color synchronization output

171 ORR/V Red / chrominance ADC output

172 ORB/U Blue /chrominance ADC output

173 ORG/Y Green / chrominance ADC output

174 VAI Video dynamic indication output

175 FREF Scan output

17 VREF Vertical channel reference input

TPA3002D2：

The TPA3002D2 is a 9-W (per channel) efficient, Class-D audio amplifier for driving bridged-tied stereo

speakers. The TPA3002D2 can drive stereo speakers as low as 8 . The high efficiency of the TPA3002D2

eliminates the need for external heatsinks when playing music.

Main Features：

● 9W /Ch into an 8Ω load from 12Vsupply;

● Efficient, class D operation eliminates heatsinks and reduces power supply requirements;

●32-step DC volume control from -40db~36db;

●Line outputs for external headphone;

●Thermal and short-circuit protection

Pins Functions：

Pin Name Description

26, 30 AGND Analog ground for digital/analog cells in core

33 AVCC

29 AVDD 5V regulated output capable of 100mA output

7 AVDDREF Reference 5V output

13 BSLN

24 BSLP

48 BSRN

37 BSRP

28 COSC I/O for charge/discharge currents onto capacitor for ramp generator

6 LINN

5 LINP
16，17
20，21

34 MODE Input for MODE control. A logic high on this pin places the amplifier in

35 MODE_OUT Output for control of the variable output amplifiers. When the MODE pin

15

LOUTN

LOUTP

High-voltage analog power supply（8~14V）

Bootstrap I/O left channel

Bootstrap I/O right channel

triangle wave

Negative differential audio input for left channel

Positive differential audio input for left channel

Class-D 1/2-H-bridge negative output for left channel

Class-D 1/2-H-bridge positive output for left channel

the variable output mode and the Class-D outputs are disabled. A logic

low on this pin places the amplifier in the Class-D mode and Class-D

stereo outputs are enabled. Variable outputs (VAROUTL and

VAROUTR) are still enabled in Class-D mode to be used as line-level

outputs for external amplifiers.

(34) is a logic high, the MODE_OUT

pin is driven low. When the MODE pin (34) is a logic low, the

MODE_OUT pin is driven high. This pin is

intended for MUTE control of an external headphone amplifier. Leave

unconnected when not used for

headphone amplifier control.

18,19,42,43 PGNDR,PGNDL Power ground for left channel H-bridge Power ground for right

channel H-bridge

14,15,22,23 PVCCL

Power supply for left channel H-bridge (tied to pins 22 and 23

internally), not connected to PVCCR or AVCC.

38,39,46,47 PVCCR

PVCCL 22, 23 – Power supply for left channel H-bridge (tied to pins 14

and 15 internally), not connected to PVCCR or AVCC.

PVCCR 38,39 – Power supply for right channel H-bridge (tied to pins 46

and 47 internally), not connected to PVCCL or AVCC.

PVCCR 46, 47 – Power supply for right channel H-bridge (tied to pins

38 and 39 internally), not connected to PVCCL or AVCC.

12 REFGND Ground for gain control circuitry. Connect to AGND. If using a DAC to

control the volume, connect the DAC ground to this terminal.

32 RINP

2 RINN

Positive differential audio input for right channel

Negative differential audio input for right channel

27 ROSC Current setting resistor for ramp generator. Nominally equal to 1/8*

44,45,

40,41

ROUTN, ROUTP Class-D 1/2-H-bridge negative output for right channel

ROUTP 40, 41 O Class-D 1/2-H-bridge positive output for right channel

1 SD Shutdown signal for IC (low = shutdown, high = operational). TTL logic

levels with compliance to VCC.

9 VARDIFF DC voltage to set the difference in gain between the Class-D and

VAROUT outputs. Connect to GND or AVDDREF if VAROUT outputs

are unconnected.

10 VARMAX DC voltage that sets the maximum gain for the VAROUT outputs.

Connect to GND or AVDDREF if VAROUT outputs are unconnected.

31 VAROUTL Variable output for left channel audio. Line level output for driving

external HP amplifier.

32 VAROUTR VAROUTR 32 O Variable output for right channel audio. Line level

output for driving external HP amplifier.

25 VCLAMPL VCLAMPL 25 – Internally generated voltage supply for left channel

bootstrap capacitors.

36 VCLAMPR Internally generated voltage supply for right channel bootstrap

capacitors.

11 VOLUME DC voltage that sets the gain of the Class-D and VAROUT outputs.

8 VREF Analog reference for gain control section.

4 V2P5 2.5-V Reference for analog cells, as well as reference for unused audio

input when using single-ended inputs.

TPA3002D2 Internal Diagram：

16

SM5301AS ：

order Butterworth lowpass filter configuration. The filter characteristics have been optimized for

minimal overshoot and flat group delay, it has a variable cutoff frequency and guaranteed driver-stage

channel gain difference and phase difference values.

Main Features:

● supply voltage：5V±10%；

●

_DC voltage level restore sync clamp function

● Output buffer gain switching function: 0, 6dB (input-to-output AC signal gain)

● Channel-to-channel gain difference: 0.5dB(±5% supply voltage variation)；

●

Channel-to-channel phase difference: 3.5 degree

● Output signal harmonic distortion (all channels):1.5%

● Cutoff frequency: 5.8 to 37MHz variable

SM5301AS Internal Diagram：

17

Pin Description：

Pin Name Description

2 GSG1 GOUT/UOUT output buffer gain set input

1 GINA/UINA

3 GINB/UINB

Analog G

pin.

Analog G

INA or UINA signal input. Sync signal is input on SYNCIN

INB or UINB signal input. Sync signal is input on SYNCIN

pin.

5 BINA/VINA

7 BINB/VINB

Analog B

pin.

Analog B

INA or VINA signal input. Sync signal is input on SYNCIN

INB or VINB signal input. Sync signal is input on SYNCIN

pin

6 GSB1 BOUT/VOUT output buffer gain set input

9 DISABLE Power save function. Built-in pull-down resistor.

10,13,16,19 GND Ground

11 BOUT/VOUT B/V signal output

14 GOUT/UOUT Analog 5V supply

17 ROUT/YINB R/Y signal output

12,15,18,24 VCC

Analog 5V supply

20 RFC LPF (lowpass filter) cutoff frequency setting resistor connection

21 VFC LPF (lowpass filter) cutoff frequency setting voltage input

22 MUXSEL Input select signal

23 SYNCIN Filter channel external H-Sync signal input.

26 GSR1 ROUT/YOUT output buffer gain set input

25 RINA/YINA

27 RINB/YINB

Analog R

pin.

INA or YINA signal input. Sync signal is input on SYNCIN

Analog RINB or YINB signal input. Sync signal is input on SYNCIN

pin.

18

4,8,28 NC No connection(leave open or connect to ground)

SAA7115：

The SAA7115 is a video capture device for various applications ranging from small screen products like

e.g. digital set top boxes, personal video recording applications to big screen devices like e.g. LCD

projectors due to it’s improved comb filter performance and 10 bit video output capabilities.

Main Features:

●Six analog inputs, internal analog source selectors;

●Two improved 9 Bit CMOS analog-to-digital converter in differential CMOS style;

●Automatic Clamp Control (ACC) for CVBS, Y and C;

●Enhanced Horizontal and vertical Sync Detection;

●PAL delay line for correcting PAL phase errors;

●Automatic TV/VCR detection;

SAA7115 Internal Diagram：

Pin Function：

Pin Name Description

1,8,11,17,23,25,33

43,51,58,68,75,83

93

2 TDO Test Data Output for Boundary Scan Test (2)

3 TDI Test Data Input for Boundary Scan Test (with internal pull-up)(2)

4 XTOUT crystal oscillator output signal, auxiliary signal

6 XTALO 24.576 (32.11) MHz crystal oscillator output; not connected if XTALI is

19

VDD Supply voltage port

7 XTALI driven

by an external single-ended oscillator.

Input terminal for 24.576 (32.11) MHz crystal oscillator or connection

of external oscillator with TTL compatible square wave clock signal.

6 VXDD Crystal oscillator power supply

10,12,14,16 AI21~AI24 Analog signal input 21~24

13 AI2D

19 AI1D

20 AI11

18 AI12

5,9,15,21,24,26,38

50,63,76,88,100

AGND

VSS

differential input for ADC channel 2 (pins AI24, AI23, AI22, AI21)

differential input for ADC channel 1 (pins AI12, AI11)

analog input 11

analog input 12

ground

22 AOUT Analog test output (do not connect)

27 CE Chip Enable or RESET input (with internal pull up)

28 LLC

29 LLC2

line-locked system clock output (27 MHz nominal), for backward

compatibility,

do not use for new applications

line locked clock/2 output (13.5 MHz nominal) for backward

compatibility, do

not use for new applications

30 RESON RESet Output Not signal

31 SCL IIC serial clock line (with inactive output path)

32 SDA IIC serial data line

34 RTS0

35 RTS1

real time status or sync information, controlled by subaddr. “11h and

12h”

RTS1 35 O real time status or sync information, controlled by

subaddr. “11h and 12h”

36 RTCO Real time control output

37 AMCLK Audio master clock output

39 ASCLK Audio serial clock output

40 ALRCLK Audio lift/right clock output

41 AMXCLK Audio master external clock input

42 ITRDY Target ready input, image port(with internal pull up)

45 ICLK clock output signal for image-port, LCLK of LPB image port mode, or

optional

asynchron. backend clock input

46 IDQ output data qualifier for image port (optional: gated clock output)

47 ITRI image-port output control signal, effects all I-port pins incl. ICLK,

enable and active polarity is under software control (bits IPE in

subaddr. “87”) output path used for Testing: scan output

48 IGP0

20

49 IGP1 general purpose output signal 0; image-port (controlled by subaddr.

“84”,”85”)

general purpose output signal 1; image-port (controlled by subaddr.

“84”,”85”),

same functions as IGP0

52 IGPV multi purpose vertical reference output signal; image-port

(controlled by subaddr. “84”,”85”)

53 IGPH multi purpose horizontal reference output signal; image-port

(controlled by subaddr. “84”,”85”)

54~57,59~62 IPD0~IPD7 image port data output

64~67,69~72 HPD0~HPD7 Host port data I/O, carries UV chrominance information in 16 bit video

I/O modes

80 XTRI X-port output control signal, effects all X-port pins (XPD[7:0], XRH,

XRV, XDQ

and XCLK) enable and active polarity is under software control (bits

XPE in subaddr. “83”)

81,82,84,85,

89,90,86,87

XPD0~XPD7 expansion-port data

expansion-port data

91 XRV vertical reference I/O expansion-port:

In ten bit video output mode: this signal represents the video bit 0.

92 XRH horizontal reference I/O expansion-port:

In ten bit video output mode: this signal represents the video bit 1.

94 XCLK clock I/O expansion port

95 XDQ data qualifier I/O expansion port

96 XRDY task flag or read signal from scaler, controlled by XRQT (subaddr.

83H)

97 TRSTN Test ReSeT Not for Boundary Scan Test (with internal pull-up); for

board design

without Boundary Scan connect TRSTN to ‘ground’(1)

98 TCK

99 TMS

Test Clock for Boundary Scan Test (with internal pull-up)(2)

Test Mode Select for Boundary Scan Test or Scan Test (with internal pull-up)(2)

UOC (Ⅲ TDA15063H)：

The UOCIII series combines the functions of a Video Signal Processor (VSP) together with a FLASH

embedded TEXT/Control/Graphics 　-Controller (TCG 　-Controller) and US Closed Caption decoder.

Main Features:

●DVB/VSB IF circuit for preprocessing of digital TV signals;

●Video switch with 3 external CVBS inputs and a CVBS output;

●Automatic Y/C signal detector;

●Adaptive digital (4H/2H) PAL/NTSC comb filter for optimum separation of the luminance and the

chrominance signal;

●Picture improvement features with peaking (with switchable center frequency, depeaking, variable

positive/negative peak ratio, variable pre-/overshoot ratio and video dependent coring), dynamic skin tone

control, gamma control and blue and black stretching. All features are available for CVBS, Y/C and

RGB/YPBPR signals.

21

The mono intercarrier sound circuit has a selective FM-PLL demodulator which can be switched to the

different FM sound frequencies (4.5/5.5/6.0/6.5 MHz). The quality of this system is such that the external

band-pass filters can be omitted. In the stereo versions of UOCIII the use of this demodulator is optional

for special applications.

Normally the FM demodulators of the stereo demodulator/decoder part are used (see below).

●The FM-PLL demodulator can be set to centre frequencies of 4.72/5.74 MHz so that a second sound

channel can be demodulated. In such an application it is necessary that an external bandpass filter is

inserted.

●The vision IF and mono intercarrier sound circuit can be used for the demodulation of

FM radio signals. With an external FM tuner also signals with an IF frequency of 10.7

MHz can be demodulated. For the QIP90 versions this is valid only for the “stereo”

versions

●Built-in adaptable brightness delay circuit

●switchable brightness signal transmission rate

Pin Description：

Pin Name Description

1,2,12,18,28,40

68,81,89,92,95,101

121,125

3,4,45,69,82,88,90,

91,93,94,96,100,

110,117,118,124

5 VREF_POS_LSL

6 VREF_NEG_LSL+HPL

7 VREF_POS_LSR+HPR

8 VREF_NEG_HPL+HPR

9 VREF_POS_HPR

10 XTALIN Crystal oscillator input

VSS,GND ground

VDD Power supply

SDAC input signal

11 XTALOUT Crystal oscillator output

13 VGUARD/SWIO V-guard input / I/O switch

14 DECDIG decoupling digital supply

15 VP1 decoupling digital supply

16 PH2LF

17 PH1LF

19 SECPLL

20 DECBG

21 EWD/AVL East-West drive output or AVL capacitor

22 VDRB

23 VDRA

24 VIFIN1

25 VIFIN2

27 IREF reference current input

29 SIFIN1/DVBIN1

30 SIFIN2/DVBIN2

31 AGCOUT tuner AGC output

phase-2 filter

phase-1 filter

SECAM PLL decoupling

bandgap decoupling

vertical drive B output

vertical drive A output

IF input 1

IF input 2

SIF input 1 / DVB input 1 SIF

22

32 EHTO EHT / overvoltage protection input

33 AVL/SWO/SSIF/REFO/REFIN Automatic Volume Levelling / switch output reference

output / external reference signal DVB operation

34 AUDIOIN5L

35 AUDIOIN5R

36 AUDOUTSL

37 AUDOUTSR

audio-5 input (left signal)

audio-5 input (right signal)

audio output for SCART/CINCH (left signal)

audio output for SCART/CINCH (right signal)

38 DECSDEM decoupling sound demodulator

39 QSSO/AMOUT/AUDEEM QSS intercarrier output / AM output / deemphasis

41 PLLIF PLL filter

42 SIFAGC/DVBAGC AGC sound IF / internal-external AGC for DVB

applications

43 DVBO/IFVO/FMRO

Digital Video Broadcast output / IF video output

44 DVBO/FMRO

46 AGC2SIF AGC capacitor second sound IF

47 VP2 2nd supply voltage TV processor (+5 V)

48 IFVO/SVO/CVBSI video output / selected CVBS output / CVBS

49 AUDIOIN4L

50 AUDIOIN4R

audio-4 input (left signal)

audio-4 input (right signal)

51 CVBS4/Y4 CVBS/Y input

52 C4 chroma-4 input

53 AUDIOIN2L/SSIF

54 AUDIOIN2R

56 AUDIOIN3L

57 AUDIOIN3R

30 AUDOUTLSL

Audio input

61 AUDOUTLSR

62 AUDOUTHPL

63 AUDOUTHPR

58 CVBS3/Y3 CVBS/Y input

59 C2/C3 chroma-2/3 input

55 CVBS2/Y2 CVBS/Y input

64 CVBSO/PIP CVBS/PIP signal output

65 SVM scan velocity modulation output

66 FBISO/CSY flyback input/sandcastle output or composite H/V

67 HOUT horizontal output

70 VIN (R/PRIN2/CX) V-input for YUV interface

71 UIN (B/PBIN2) U-input for YUV interface

72 YIN (G/YIN2/CVBS-YX) Y-input for YUV interface

73 YSYNC Y-input for sync separator

74 YOUT Y-output (for YUV interface)

75 UOUT (INSSW2) U-output for YUV interface

76 VOUT (SWO1) V-output for YUV interface

77 INSSW3 3rd RGB / YPBPR insertion input

23

78 R/PRIN3 3rd R input / PR input

79 G/YIN3 G input / Y input

80 B/PBIN3 3rd B input / PB input

83 BCLIN beam current limiter input

85 RO Red output

86 GO Green output

87 BO Blue output

97 INT0/P0.5 external interrupt 0 or port 0.5 (4 mA current sinking

direct drive of LEDs)

98,99,102~109

111~116,119,120

122,123,126~ 128

UOCⅢ Internal Diagram：

P0.0~ P0.4

P1.0~P1.7,P2.0~P2.5,

P3.0~P3.3

Data port

CHAPTER THREE SIGNAL FLOW ANALYSIS AND KEY POINT

MEASURE DATA

The chapter mainly introduces the receipt and dispose of the AV signal , the power

supply system and system control process of this TV.

Signal Flow Analysis

1.Video signal flow：

24

the AV/S and IF signal which is demodulated by main demodulator are sent by TV plank into video

decode chassis UOC for decoding ,then the output analog video signal is sent into analogⅢ -to-digital
converter TDA8759HV/8/C1 for A/D transform to produce R、G、B digital signals which are transformed in

format by GM1601/GM1501, then, it transformed the different input formats into the uniform up-screen

signal format.

The signal demodulated by sub demodulator is directly sent into submenu video decoder

SAA7115HL/V1 for video decoding and A/D conversion，then again sent into GM1601/GM1501 to do

format transform, the output up-screen is used for submenu display.

After selection, the PC、 HDTV(YPBPR) and DVI signals are sent directly into GM1601/GM1501 for

processing to form uniform up-screen signal.

2.Accompanying sound flow:

TV

accompanying sound：RF signal is demodulated by main demodulator to SIF(companying

sound intermediate frequency) signal, SIF is sent into UOC for demodulation and sound disⅢ posal，then,

the output audio signal is zoomed in by D class TPA3002D2PHPR and is sent into the speaker at last.

AV

companying sound：the audio signal input by AV is directly disposed by UOC and zoomed in Ⅲ

by TPA3002D2PHPR,then transported to the speaker.

After the
disposed by UOC and zoomed in by Ⅲ TPA3002D2PHPR to make the speaker work.

3.、TV power supply system：
4 channels voltage are transported from the power supply board, they are +24V，+12V，+5V and

+5VS. +24V is provided for inverter of LCD panel, +12V is provided for PA, +5V is transformed by the
manostat into 3.3V、2.5V and 1.8V for IC, it may be turned down under standby mode, while +5VS is
provided for MCU、infrared receiver、EEPROM.

5V is divided into two ways, one way is provided for other IC and apparatus, the 5V will be turned

down under standby mode, but can not be cut off.. The other 5V is provided for MCU、infrared receiver、

EEPROM and so on, it would not be cut off under standby mode.

companying sound of PC、DVI、YPbPr are selected by MC74LVX4052DR2 , then they are

25

The composition and distribution of the TV power supply：（please see the next page）

26

The Manostat Pin Voltage in Main Board Schedule

Name Type PIN1(V) PIN2(V) PIN3(V) PIN4(V) PIN5(V)

UP7 LM1117-1.8V 0 1.8 5 1.8

UP1 LM1117-3.3V 0 3.3 5 3.3

UP6 LM2596-5.0 24 5 0 5 0

U405 LM1117-3.3 0 3.3 5 3.3

U3 78M08 12 0 8

U403 LM1117-1.8V 0 1.8 5 1.8

U503 LM1806-3.3 0 3.3 5 3.3

U505 LM1117-2.5 0 2.5 5 2.5

U506 LM1117-3.3 0 3.3 5 3.3

U501 LM2596-5.0 12 5 0 5

U502 LM2596-5.0 24 5 0 5 0

U504 LM1117-1.8V 0 1.8 5 1.8

Main Components and Socket Locations and Definitions:

27

Outlet Definition:

Number Name Connected Object Function Description

1 JP5 TV plane

2 JP2 Side AV

3 JP6 DVD AV output

4 JP7 Speaker

5 JP8 loudhailer

6 JP4 DVD decode board

7 JP3 outside AV input

8 JP9 Up screen(screen

inverter input）

9 JP10 Up screen(screen

inverter input)

10 JP12 power supply plane

28

GND，GND，GND，+12V，+12V，+12V

11 J171 Prepare to use

13 JP11 power supply plane

14 JP1 power supply plane

15 J700 Prepare to use

16 CN702 Prepare to use

17 CN700 remote control

18 CN701 K plane

19 CN304 Prepare to use

20 CN303 Prepare to use

21 JP701 display

22 CN306 Prepare to use

23 AVP303 DVI audio input

24 CN300 DVI port

25 AVP300 VGAaudio input

26 CN301 VGA port

+12V，+12V，GND，GND，GND，GND，24V，24V
SB，GND，GND，5V，5V，5V，GND，GND，12V，

12V

Main Components explanation:
Number Name Components Function Description

A U201
B U400
C U402

TDA15063H-N1B06557 Audio/video decoder

TDA8759HV/8/C1 Video signal AD converter

SAA7115HL/V1 Sub channel video decoder

D U600 MT46V2M32LG-4 Frame buffer memorizer
E U700
F U305
G U801
H U6
I U5
J K202
K K201
L UA3
M U701
N U307
O U306
P U302
Q U303

GM1601/GM1501-BD Video processor

SM5302AS-G-ET HD signal filter

AM29LV800DT-70EC

TPA3002D2PHPR Audio PA

TDA9178T/N1 Video signal image improve

K9352N Sound surface filter

K7262N Sound surface filter

FSAV330QSCX Select switch

24LC32A T/SN Buffer

FSAV330QSCX Select switch

FSAV330QSCX Select switch

24LC21A T/SN EEPROM

24LC21A T/SN EEPROM

Flash，the TV control procedure put in it

Main Point Wave Picture:

th

1 RF input color stripe signal, TV signal wave in the 19P

th

the 10P

P

of SAA7115 also like this:

P

pin of sub tuner UT1,The wave of

29

2 RF input color stripe signal,the Pin85,Pin86,Pin87 of U201 output R,G,B signal wave,the
E pole wave of Q171,Q172,Q173:

th

3 RF input color stripe signal, I²C bus clock signal UOCIII_SCL, the wave of the 98P
U201,the 11P

th

P

pin of U5,the 4P

th

P

pin of parent/sub RF tuner:

P

pin of

30

.4 RF input color stripe signal, UOC vertical sync signal, the wave of the 22th pin of

th

U201,the 105P

P

pin of U400:

.5 RF input color stripe signal，UOC vertical sync signal , the wave of the 22th pin of

th

U201,the 105P

P

pin of U400:

RF input color stripe signal，UOC vertical sync signal , the wave of the 22th pin of U201,the

th

P

P

pin of U400:

105

31

th

.6 RF input gray ladder signal, the TV signal wave in the 19P

th

The wave in the 10P

P

of SAA7115 also like this:

P

pin of SAA7115:

32

7 The 1KHz sound signal input, the wave of the 60P

th

2th、6P

P

pin of U6 also like this:

th

P

、61th pin of U201, the wave of the

8 The 1KHz sound signal input, the wave of 16P

th

P

45P

pin of U6 and pins:

th

33

P

、17P

th

P

、20P

th

P

、2140P

th

P

、41th 、44P

th

P

、

Location

No.

UP7 LM1117-1.8V 0 1.8 5 1.8

UP1 LM1117-3.3V 0 3.3 5 3.3

UP6 LM2596-5.0 24 5 0 5 0

U405 LM1117-3.3 0 3.3 5 3.3

U3 78M08 12 0 8

U403 LM1117-1.8V 0 1.8 5 1.8

U503 LM1806-3.3 0 3.3 5 3.3

U505 LM1117-2.5 0 2.5 5 2.5

U506 LM1117-3.3 0 3.3 5 3.3

U501 LM2596-5.0 12 5 0 5

U502 LM2596-5.0 24 5 0 5 0

U504 LM1117-1.8V 0 1.8 5 1.8

Type PIN1(V) PIN2(V) PIN3(V) PIN4(V) PIN5(V)

34

CHAPTER FOUR SYMPTOMS AND CORRECTION

Symptom One：Display card of PC no image in DVI.
Reason and Resolve: If some display card of DVI can not receive the data when turning on

the TV, there is no output; if pull out the DVI line abruptly, there is also no DVI output; Before
starting PC, connect the DVI line with LCD TV steadily, So DVI can receive the correct date
from DDC（ Display Data Channel） when turning on the TV,DDC is in chassis 24LC21.

Symptom Two： No picture but sound, on LOGO when turning on the TV, background light is

bright.

Reason and Resolve: Check the connect line in up screen, and connect the line.

Symptom Three：No picture、no sound ,no snowflake in TV mode, but AV is normal.
Reason and Resolve: Check the outside of high frequency (also bus and power supply),

there is no problem ,but no output from high frequency, so the tuner is disabled.

Symptom Four：LCD TV can not be controlled.(inc red lamp is on but the TV is off, remote

control and local keys can not control the TV ,etc.)

Reason and Resolve：the LCD TV can not work abruptly, power off and turning it on again.

35

CHAPTER FIVE BREAKABLE AND MAINTENANCE PARTS

This list is provided for reference, all the parameters of those maintenance parts are subject to change without

notice

for future improvement, please refer the latest models and specifications as the standard.

Akai LTA-26C902

NO.

1.

2.

3.

4.

5.

6.

7.

8.

9.

10.

11.

12.

13.

14.

15.

16.

17.

18.

Name

Front frame 8807400311J JUJ8.074.031-1

Faceplate 8808100160J JUJ8.081.016

Back cover 8807400501J JUJ8.074.050-1

Base decoration board 8735600050J JUJ7.356.005

Base 8807000130J JUJ8.070.013

Main board assembly 86690003521J JUJ6.690.035-21 PCB JUJ7.820.088

TV board assembly 8669700040J JUJ6.697.004 PCB JUJ7.820.128

Remote receive board

assembly

Key-press board

assembly

Buttons 8833700110J JUJ8.337.011

Built-in power supply

module

TFT panel 68212600105 LC260W01

Electronic tuner 8289100454E TAD5-C2IP1RW

Electronic tuner 8289100063E

Electric speaker 56224605080 Y2929-01-5W-8Ω

Electric speaker 562D6608082 Y50138-01-8W-8Ω

Remote controller

Assembly

Code

8669300150J JUJ6.693.015 PCB JUJ7.820.103

8669400180

8669400190

67128017905

J JUJ6.694.018 PCB JUJ7.820.104

J JUJ6.694.019 PCB JUJ7.820.091

FSP179-4F01

Assembly

Number

TMI4-C22P

E2.891.006-3)

2RW(JU

PCB Number

0.1

0.1

0.1

0.1

0.1

0.1

0.1

1
1

2

2
1

Breakable

Ratio

（‰）

1

0.5
1

0.5

0.5

Akai LTA-32C902

NO.

Front frame 8807400410J JUJ8.074.041

1

Back cover 8807400422J JUJ8.074.042-2

2

Name Assembly Code

Assembly

Number

PCB NO.

0.1

0.1

Breakable

Ratio

（‰）

36

3
4

5

6

7
8

9

10
11

12

13
14
15

16

17

18

Base decoration board 8735600040J JUJ7.356.004

Base 8807000160J JUJ8.070.016

Main board assembly
（LG screen）

Main board assembly
（SAMSUNG screen）

AV board assembly 8669300150J JUJ6.693.015 PCB JUJ7.820.103

TV board assembly 8669700040J JUJ6.697.004 PCB JUJ7.820.128

Remote receive board

assembly

Key press board assembly 8669400190J JUJ6.694.019 PCB JUJ7.820.091

Buttons 8833700110J JUJ8.337.011

Built-in power supply

module

TFT panel

Electronic tuner 8289100063E TMI4-C22P2RW

Electronic tuner 8289100454B TAD5-C2IP1RW

Electric speaker 56224605080 Y2929-01-5W-8Ω

Electric speaker 562D6608082

Remote controller KLC5A

8669000350J JUJ6.690.035 PCB JUJ7.820.088

8669000354J JUJ6.690.035-4 PCB JUJ7.820.088

8669400180

67128017905

J JUJ6.694.018 PCB JUJ7.820.104

FSP179-4F01

68219632010 LC320W01 LG screen

Y50138-01-8W-8

Ω

0.1

0.1

0.1

0.1

1
1
2

2

1

1

1

0.5
1

0.5

0.5

A k a i L T A - 3 7 C 9 0 2

NO. Name

Frame

1

Back cover

2

Base

3

Main board assembly

4

AV board assembly

5

TV board assembly

6

Remote receiver board

7

assembl

Key press board assembly

8

Built-in power supply

9

module

TFT panel

10

Suspending screen

11

12

Electronic tuner

y

Assembly

e

Cod

8807400430J JUJ8.074.043

8807400442J JUJ8.074.044-2

8807000160J JUJ8.070.016

8669000354J JUJ6.690.035-9

8669300150J JUJ6.693.015

8669700040J JUJ6.697.004

8669400200J JUJ6.694.020

8669400240J JUJ6.694.024

67128024105 FSP241-4F01

68213700105 LC370W01

886400063E TMI4-C22P2RW

8289100063E TMI4-C22P2RW

Assembly

Number

PCB NO.

0.1

0.1

PCB JUJ7.820.088

PCB JUJ7.820.103

PCB JUJ7.820.128

PCB JUJ7.820.104

PCB JUJ7.820.091

5

0.1

0.1

1

Breakable

Ratio

（‰）

0.1

1

0.5
1

0.5

0.5

13

Electronic tuner

8289100454E TAD5-C2IP1RW

1

37

14

Sound boxes

56232971081

Y3297-L-10W-8Ω

1

15

Sound boxes
Electric speaker

14

Electric speaker

15

16

Remote controller

DVD maintenance parts( only for models with DVD module):

DVD touch key label

DVD output board

assembly

DVD decoding board

assembly

Converter board

assembly
DVD driver 59C11060850 TDR-085

8669300120J JUJ6.693.012

8661800060J JUJ6.618.006

8669300130J JUJ6.693.013

8669100080J JUJ6.691.008

56232971082

56232971082

56239390580

8201803510L KLC5A

Y3297-R-10W-8Ω

Y3297-R-10W-8Ω
Y3939-01-5W-8Ω

CHAPTER SIX FACTORY MODE AND NOTICE

1

1
2

1

Enter into factory menu

1. Enter into child lock of main menu in TV mode, press “OK, the password input box will appear;

2. Use remote control to input the follows in order:7,red key,9,blue key, then you can enter into factory

mode menu. After entering into factory mode menu, sign of the factory menu M will appear.

factory menu and setup

1. factory menu display is below:

M

Index: 1

HWUC_BRI 0x1F

The M denotes entering into factory mode now, the figures of index denotes the index number now,the

HWUC_BRI denotes the name of adjusting item now, the 0X1F denotes the numerical value.

2. Each adjusting item have only one index number ,the operator press the numeric key or press P+/P-

directly.

3. Optional and adjustable items, the corresponding relation of index number and adjusting item is below:

(Index)

1 HWUC_BRI UocIII subsidiary

2 HWUC_SAT UocIII saturation V+/V- Adjust subsidiary saturation

3 HWUC_CON UocIII contrast V+/V- Adjust subsidiary contrast

4 HWUC_AGC UocIII AGC V+/V- Adjust AGC

5 PIP Brightness 7115 subsidiary

6 PIP VGA 7115 contrast V+/V- Activate sub picture When

Name Item Meanings

brightness

brightness

Operating

Key

V+/V-

V+/V-

Remark

Adjust subsidiary brightness

Activate sub picture When

adjusting it

38

Contrast adjusting it

7 Balance Sound balance

V+/V-

The tuning value is 50，-50，

0

8 Volume Sound Volume V+/V- Step is 10

9 Sound System Sound System V+/V- DK/I/BG/M

10 Auto Search Auto searching V+/ok Source of Signal is TV

11 White Balance White balance V+/ok

12 AutoColor Auto color revise

V+/ok

Source of Signal VGA

/YpbPr /TV

13 DVD DVD preset V+/V- 1 represents preset

14 BBE BBE preset V+/V- 1 represents preset

15 TruSurround TruSurround preset V+/V- 1 represents preset

16 SALESFOR SALESFOR V+/V- Set the target country

17 Factory Out initialization V+/ok Leave factory set

18 Clear EEProm initialize EEPRom V+/ok Initialize the storage date

19 D Mode Enter into design

mode

V+/ok

Adjustable design mode all

the parameter

20 DPF DPF preset V+/V- 1 represents preset

21 BBE_CONT BBE plus set V+/V- Adjust BBE plus

22 BBE_PROC BBE plus set V+/V- Adjust BBE plus

23 Newcom Newcom set V+/V- 1 represents preset

notice：

th

1、if no especial demand, please do not enter into the 20

th

2 、 when tuning the 16

P

P

item ,the storage data will be cleaned off, therefore, if not

P

P

item(design mode);

necessary ,please do not adjust it, the items of index number 1,2,3,4,5,6 are not necessary to adjust.

Adjustment methods for factory menu

1. Select the adjusting item

You can skip to the adjusting items by pressing the number key, also can select the adjusting item in

the order of P+/P-.when pressing the number key, if the adjusting item is 1~9,input the corresponding

number keys and press down “OK”, if the adjusting items tens digit, input a tens digit. For example ,press

number key 8 when adjusting the volume, you can see the color which become green, then press down

“OK”, the color of index number turns red, So you already selected corresponding volume adjusting item.

If adjust DVD preset, first input 1,then input 3,you can adjust DVD preset.

2. Adjustment methods

Adjust it according to the operating key in above list. For one act operation ,press OK/V+.

example Auto Color, for some variable add/reduce, Example Volume, press V+/V- .

3. The illuminate of white balance and AutoColor adjustment method

Index 11 is corresponding to manual balance ,press “OK” or “V+” to display three corresponding

variable, press “P+/P-”to select, press “V+/V-” to adjust, press down menu key to exit.

The index of AutoColor is 12,press “OK”or “V+” to do color revision, then the adjusted value will display.

39

4. BBE plus adjustment

Index number of BBE plus adjustment is 22 and 23,adjust it by adjusting “V+/V-”,the value of W270F8E

and W320F8E are set 0X09,but the W370F8E is set 0X0F.

5. Press down the【DISPLAY】 first before switching the program number in factory mode, press P+/P- to

switch before the display content do not disappear;

6. All menu functions are on in factory mode, if necessary you can use menu to check the items and effect

test.

Factory debug item

1. Auto color revise（AutoColor）
Firstly finish auto color revise first before factory debug. Revise in TV、YPBPR and PC respectively.
① Requisite Meter

PC one

HD signal source one

② Debug（Revise in TV、YPBPR and PC respectively）

Park the channel in C-3 under TV mode TV, then do AutoColor.

Input color stripe signal in YPBPR and do AutoColor.

Input window signal in PC, the window is white, black signal around.
The result will appear in screen after AutoColor adjustment,make the adjustment results of Rgain、
Ggain and Bgain close to 0 × 80,if the difference is too great,adjust the value of

HWUC_CON(auxiliary saturation),and readjust the AutoColor.

2. White balance, color temperature adjustment

① Requisite Meter

CHROMA 7120 color analyze instrument（or same function instrument,contain color coordinate –
chroma diversion card） one
White balance adjusting frock（request the video output range 0-1V is adjustable,750hm load）

one

② Prepare

A. connect all equipments, switch the condition of LCD TV to AV.

B. Set the picture of LCD TV for standard condition

C. Set the distance of light receiver of white balance from center place of LCD display screen for

15cm±3cm .

2

D. Make sure that the environmental brightness is below 2cd/m

③ White balance, color temperature adjustment

Before adjusting it, put the first LCD TV in AV condition, and the image in standard condition, white

balance adjust frock send the white vertical signal output from video into AV, adjust output range of

balance adjust frock, make the brightness of the LCD TV 200±20cd/m

analyze instrument to obtain the brightness ),then fix the video output range of white balance adjust

frock(until all the LCD TV are adjusted).

Enter into white balance adjusting item of factory mode, change R,G,B value(try best to adjust this 3

value biggest) .

Make color temperature coordinate value accord with that of the table below (error value within

±4%) ：

Z X Y

P

P

2

P

P

(use CHROMA 7120 color

40

K12000 0.270 0.277

Note：The color temperature and color coordinate are contented for above request, you should judge the
exist of color windage phenomenon, namely the value of Δuv is 0 or not
If Δuv is not 0 , readjust R,G,B value to 0,and meet color coordinate request.

41

654321

D

Ls08-Frame Memory-02
Ls08-Frame Memory-02

FSDQS

FSDATA[0..31]

FSDATA[0..31]
FSDQS
23SDD[31..0]

FSDQM[0..3]

23SDA[10..0]

FSADDR[0..11]

C

ls08-Memory I_F-05
ls08-Memory I_F-05

OCMADDR[0..19]

OCMDATA[0..7]

LS08-Power_Display-06
LS08-Power_Display-06

POWER_OFF

FSCKE

FSBKSEL1

/FSCAS
/FSRAS

/FSWE

FSBKSEL0

FSCLK-

FSCLK+

23SDDQM

23SDBA0
23SDBA1

23SDWE#
23SDCAS#
23SDRAS#

23SDCS#

23SDCLK

/ROM_CS
/OCM_RE

/OCM_WE

PBIAS

PPWR

FSDQM[0..3]
FSCKE
FSBKSEL1
/FSCAS
/FSRAS
/FSWE
FSBKSEL0
FSCLK­FSCLK+
23SDA[10..0]
23SDDQM
23SDBA0
23SDBA1
23SDWE#
23SDCAS#
23SDRAS#
23SDCS#
23SDCLK
FSADDR[0..11]

/ROM_CS
/OCM_RE
/OCM_WE
OCMADDR[0..19]
OCMDATA[0..7]

PBIAS
PPWR
POWER_OFF

MSTR_SDA MSTR_SCL
VGRN[7..0]
23SDD[31..0]
23SDCLK
23SDDQM
23SDCS#
23SDBA0
23SDBA1
23SDCAS#
23SDCAS#
23SDWE#
23SDA[10..0]

VVS
VCLK

VHS
VBLU[7..0]
VRED[7..0]
Scart2_CIn
Scart2_VideoIn
Video1_C_IN
Video1_Y_IN
SubchannelTV
ITRU[0..7]
7115_RSON
SVCLK

SAA7115_EN
Tv_BOUT
Tv_GOUT
Tv_ROUT
TV_Csync
Scart1VideoIN
Yout
PRout
PBout
8759PowerDown
AVS
SVCLK
AHS
SAA7115_EN

Ls08-AD convert-01
Ls08-AD convert-01

MSTR_SDA MSTR_SCL
VGRN[7..0]
23SDD[31..0]
23SDCLK
23SDDQM
23SDCS#
23SDBA0
23SDBA1
23SDCAS#
23SDRAS#
23SDWE#
23SDA[10..0]

VVS
VCLK

VHS
VBLU[7..0]
VRED[7..0]
Scart2_CIn
Scart2_VideoIn
Video1_C_IN
Video1_Y_IN
SubchannelTV
ITRU[0..7]
7115_RSON
SVCLK

SAA7115_EN
Tv_BOUT
Tv_GOUT
Tv_ROUT
TV_Csync
Scart1VideoIN
Yout
PRout
PBout
8759PowerDown
AVS
SVCLK
AHS
SAA7115_EN

/OCM_WE
/FSRAS
OCMADDR[0..19]
MSTR_SCL
FSCLK+
/FSCAS
OCMDATA[0..7]
MSTR_SDA
/ROM_CS
PBIAS
/FSWE
DVI_SDA
FSCKE
VGA_SDA
FSDQS
FSBKSEL1
FSCLK­FSBKSEL0
FSDATA[0..31]
PPWR
/OCM_RE
FSADDR[0..11]
PWM3

SEC_SDA
RGB/YPbPr_SEL

POWER_OFF
Set_tristate2
Set_tristate2
ChannelSel2
ChannelSel1
Sel_HsVs
Teltext_MUTE
Communication
AudioSelADDB
AudioSelADDA
SAA7115_EN
8759PowerDown
7115_RSON
IRDATA
M_SCL
M_SDA

LS08-Gm1601-03
LS08-Gm1601-03

/FSRAS RXC-

MSTR_SCL
FSCLK+
/FSCAS

MSTR_SDA
/ROM_CS
PBIAS
/FSWE
DVI_SDA
FSCKE
VGA_SDA
FSDQS

FSCLK- RX2­FSBKSEL0
FSDATA[0..31] RX0­PPWR
/OCM_RE
FSADDR[0..11]
PWM3

SEC_SDA
RGB/YPbPr_SEL

POWER_OFF
Set_tristate2
Set_tristate1
ChannelSel2
ChannelSel1
Sel_HsVs
Teltext_MUTE
Communication
AudioSelADDB
AudioSelADDA
SAA7115_EN
8759PowerDown
7115_RSON
IRDATA
M_SCL
M_SDA

GREEN+/OCM_WE

AHSOCMADDR[0..19]

VGA_SCL

SVCLK

RXC+OCMDATA[0..7]

GREEN-

ITRU[7..0]

RED+

BLUE-

BLUE+

RX1-

DVI_SCL

RX1+
RX2+FSBKSEL1

AVS

RX0+

RED-

SOG

FSDQM[0..3]

VGA_CAB

DVI_CAB

VCLK

VVS
VHS

SCRT2-FSEL

CC_INT1

VRED[7..0]

VGRN[7..0]

VBLU[7..0]

ITRU[7..0]

SVCLK

Ypbpr/RGB_EN

HV_SEL

GREEN+
RXC­AHS

VGA_SCL
SVCLK
RXC+
GREEN­ITRU[7..0]
RED+
BLUE­BLUE+
RX1­DVI_SCL
RX1+
RX2+
RX2-

RX0­AVS
RX0+
RED­SOG
FSDQM[0..3]

VGA_CAB
DVI_CAB

VCLK
VVS
VHS

VRED[7..0]
VGRN[7..0]
VBLU[7..0]
ITRU[7..0]
SVCLK

Ypbpr/RGB_EN
HV_SEL

BLUE­VGA_SDA
BLUE+
RED­GREEN+
DVI_CAB
RX1+
GREEN­RX1­RX0­RED+
RXC­RX2­RX2+
RXC+
RX0+
DVI_SCL
VGA_CAB
DVI_SDA
VGA_SCL
SOG
AVS
AHS
Scart2_CIn
Scart2_VideoIn
Video1_C_IN
Video1_Y_IN
SubchannelTV
Scart1VideoIN
Set_tristate2
Set_tristate1
ChannelSel2
ChannelSel1
Sel_HsVs
Yout
PRout
PBout
AudioSelADDA
AudioSelADDB
Teltext_MUTE
IRDATA
Communication

ls08-Graphics_Components In-04
ls08-Graphics_Components In-04

BLUE-

RGB/YPbPr_SEL
VGA_SDA
BLUE+

Ypbpr/RGB_EN
RED­GREEN+
DVI_CAB
RX1+
GREEN­RX1­RX0­RED+
RXC­RX2­RX2+
RXC+
RX0+
DVI_SCL
VGA_CAB
DVI_SDA
VGA_SCL
SOG
AVS
AHS
Scart2_CIn
Scart2_VideoIn
Video1_C_IN
Video1_Y_IN
SubchannelTV
Scart1VideoIN
Set_tristate2
Set_tristate1
ChannelSel2
ChannelSel1
Sel_HsVs
Yout
PRout
PBout
AudioSelADDA
AudioSelADDB
Teltext_MUTE
IRDATA
Communication

PWM3

HV_SEL

RGB/YPbPr_SEL

PWM3

Ypbpr/RGB_EN

HV_SEL

D

C

B

NEW5-ls08-Sound Amplifier

NEW1-ls08-12029

SC1_RIN
SC1_GIN
SC1_BIN
FBLIN1
C_3D
Y_3D
AV_R
AV_L
AVS2
UOCIII_SCL
SC1_Laudio
SC1_Raudio
MUX_L
MUX_R
PH-SW
Scart2_Cin
Scart2_VideoIn
Video1_C_IN
Video1_Y_IN
Scart1VideoIN
AVS1
SC2_LIN
SC2_RIN
Tuner_IF
MM_SCL
MM_SDA
MUTE

A

NEW1-ls08-12029

SC1_RIN
SC1_GIN
SC1_BIN
FBLIN1
C-3D
Y-3D
AV-R
AV-L
AVS2
UOCIII_SCL
SC1_Laudio
SC1_Raudio
MUX_L
MUX_R
PH-SW
Scart2_CIn
Scart2_VideoIn
Video1_C_IN
Video1_Y_IN
Scart1VideoIN
AVS1
SC2_LIN
SC2_RIN
Tuner_IF
MM_SCL
MM_SDA
MUTE
UOCIII_SDA

SC_AVOUT

TV_Rout

TV_Gout

TV_Bout

TV_Csync

AGC
SCOL
SCOR

MOL

MOR

3D_IN

Communication

UOC_SW1
UOC_SW2

DVD_id
3D_reset

SC_AVOUT

TV_Csync
AGC

MOL
MOR
3D_IN
Communication
UOC_SW1
UOC_SW2
DVD_id
3D_reset

SC_AVOUT
UOC_SW1
UOC_SW2
AGC
UOCIII_SDA
UOCIII_SCL
SubchannelTV
MM_SCL
MM_SDA

NEW2-ls08-INPUT PORT
NEW2-ls08-INPUT PORT

SCOL
SCOR
SC_AVOUT
UOC_SW1
UOC_SW2
AGC
UOCIII_SDA
UOCIII_SCL

Scart2_VideoIn

SubchannelTV
MM_SCL
MM_SDA

AV-R
AV-L

FBLIN1

AVS1
SC1_Laudio
SC1_Raudio

AVS2
Scart2__CIn

Video1_Y_IN

Video1_C_IN

Scart1VideoIN

Scart1_R

Scart1_G

Scart1_B
SC2_LIN
SC2_RIN
SC1_RIN

SC1_GIN

SC1_BIN

DVD_id
Tuner_IF

R_YPBPR

Y_YPBPR

B_YPBPR
YPBPR_R
YPBPR_L

AV_R
AV_L
FBLIN1
AVS1
SC1_Laudio
SC1_Raudio
AVS2
Scart2_Cin
Scart2_VideoIn
Video1_Y_IN
Video1_C_IN
Scart1VideoIN

SC2_LIN
SC2_RIN
SC1_RIN
SC1_GIN
SC1_BIN

Tuner_IF
R_YPBPR
Y_YPBPR
B_YPBPR
YPBPR_R
YPBPR_LUOCIII_SDA

Power_off
Backlight_on_off
DVD_On/Off
IRDATA/SCL
State/SDA

MOL
MOR
MUTE

NEW5-ls08-Sound Amplifier.Sch

MOL
MOR
MUTE

NEW3-ls08-POWER
NEW3-ls08-POWER.SCH

Power_off
Backlight_on_off
DVD_On/Off
IRDATA/SCL
State/SDA

B

A

Title

Number RevisionSize

C

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

1 2 3 4 5 6

1
2
3
4
5
6
7
8
9
10
11
12

7
6
5
4
3
2
1

UOCIII_write_ctrl

JP3

CON-9

DVD_C

DVD_Y
DVD-L

DVD-R
DVD_Video

SPDIF

D

CON-12

C

B

A

JP4

JP6
CON-7

UOCIII_write_ctrl= +5V, UOC CONNECT WITH 1601
UOCIII_write_ctrl= 0V, UOC CONNECT WITH VGA

9
8
7
6
5
4
3
2
1

MM_SDA

R352
47K

RA9

75

VCC5A

M_SDA
VGA_SDA1

MM_SDA

1

Video1Y_IN

Video1C_IN
AVR

AVL
VCC5A

RA20
10k

RA13

75

VCC5A

R322
10K

3

2

GND

RA16
10k

1
2
3
4
5
6

GND

Q308
2SC1815Y

CA1 0.1uF

VCC5A

RA17
10k

RA21
10k

1

SEL

2

1B1

3

1B2

4

1A

5

2B1

6

2B2

7

2A

8

GND

UA3
FSAV330M

UA1

MC14016BDR2

A1

VCC

B1

C1

A2

C4

B2

B4

C2

A4

C3

B3

GND7A3

VCC5A

RA18

10k

VCC

/OE

4B1
4B2

4A
3B1

3B2

3A

VCC5A

14
13
12
11
10
9
8

MM_SCL

16
15

14
13

12
11

10
9

CA8

0.1u

GND

VGA_SCL1
M_SCL

MM_SCL

RA19
10k

Video1_C_IN
Video1_Y_IN
DVD_id

DVD-L
AVL

AV-L
DVD-R

AVR
AV-R

CA4

0.1uF

Video1_C_IN
Video1_Y_IN
DVD_id

RA34A
0

AV-L

AV-R

The DVD Player Must Output With DC-LEVEL Signal.

VCC5A

RA47
22

CA7

0.1uF

VCC5A

SC_AVOUT

SC1_GIN

SC1_GIN

To UOCIII&Tuner Board.

QA12

2SC1015Y

SC1_BIN

SC1_RIN

+5VOUT

CA9

0.1uF

+5VOUT

SC1_BIN

SC1_RIN

SC_AVOUT

CA31

10V220uF

CA19

+

10uF

RA10
470

RA33

4.7k

RA34

4.7k

CA20

+

10uF

RA35

RA49
220

+5VOUT

4.7k

RA36

4.7k RA45

AVS1

Scart1VideoIN

Scart2_VideoIn

UOCIII_SDA
UOCIII_SCL

+5VOUT

RA44
330

FBLIN1

SC2_RIN
SC2_LIN

AVS2
Scart2_CIn

330

QA5
2SC1815Y

UOCIII_SDA

UOCIII_SCL

CA6

0.1uF

QA6

2SC1815Y

RA37

4.7k

CA21

+

10uF

RA38

4.7k

CA5

0.1uF

SC2_RIN
SC2_LIN

AVS2
Scart2_CIn

Scart2_VideoIn

+5VOUT

To Board Side.

SC1_BIN

AVS1
SC1_GIN

SC1_RIN
FBLIN1

Scart1VideoIN

+12V_dc

+5VB

QA7
2SC1815Y

RA46
330

To GM1601 Board.

Scart1_G

Scart1_B

Scart1_R

JP5

1

26

2

27

3

28

4

29

5

30

6

31

7

32

8

33

9

34

10

35

11

36

12

37

13

38

14

39

15

40

16

41

17

42

18

43

19

44

20

45

21

46

22

47

23

48

24

49

25

50

SDA-7166102050

Y_YPBPR

B_YPBPR
R_YPBPR

SC1_Laudio
SC1_Raudio

YPBPR_L
YPBPR_R

SCOL

SCOR

+32V

SubchannelTV

Scart1_G

Scart1_B

Scart1_R

YPBPR_R

SubchannelTV

UOC_SW1

UOC_SW2
Tuner_IF

AGC

654321

D

C

Y_YPBPR

B_YPBPR
R_YPBPR

SC1_Laudio
SC1_Raudio

YPBPR_L

SCOL

SCOR

B

UOC_SW1
UOC_SW2

Tuner_IF

AGC

A

Title

Number RevisionSize

B

Date: 13-Apr-2005 Sheet of

1 2 3 4 5 6

File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

SCART1 RGB INPUT

SCART1 RGB CONTROL

upc64084 OUTPUT

SCART1 VIDEO INPUT
VIDEO1/Y INPUT
SCART2 VIDEO/Y INPUT
S-VIDEO1 C INPUT
SCART2-C INPUT

SCART OUTPUT

VCC5A

L214
10uH

Scart1VideoIN
Video1_Y_IN
Scart2_VideoIn
Video1_C_IN
Scart2_Cin

C232

10V10uF

C268
1uF

Tuner_IF

SC1_RIN
SC1_GIN

SC1_BIN
FBLIN1

C-3D

Y-3D

SC_AVOUT

AV-L

AV-R
MUX_L
MUX_R

SC2_LIN
SC2_RIN

SC1_Laudio
SC1_Raudio

R229

3216M800MT

C269

10V100uF

R228
12K

C270

10V100uF

Tuner_IF

L217
100ohm

SC1_RIN

SC1_GIN
SC1_BIN

C-3D

Y-3D

YY_out

Scart1VideoIN

Scart2_VideoIn
Scart2_Cin

VDD5A_1

C233

0.1uF

+12V_DC

R202
10K

R201 100

C201

0.1uF
C202

0.1uF

VIFIN1

VIFIN2

SIF1

SIF2

C234 2.2uF

C235 2.2uF
R213 47K

C236 2.2uF

C237 2.2uF

R214 4.7K

C273 50V220nF

C271

6.8nF

C272

C275

0.1uF

0.01uF

R244

0

R245
100

C203

0.1uF

CT1 0.1uF
CT2 0.1uFU_IN

CT3 0.1uF
C207 0.1uF

C208 0.1uF

C209 0.1uF
C210 0.1uF

R203 1K

C238 2.2uF
C239 2.2uF

C240 50V220nF

C241 2.2uF

C242 2.2uF

R216 39K

R231 100K

R232 1K

C276

10V4.7uF

C274

0.1uF

R247

4.7K

C284

0.01uF

R246

3.3K

C283

0.01uF

C204

0.1uF

C211

0.1uF

uoc_vs

3900pF

R248

4.7K

R249

2.2K

C277

C286

nc

R250
nc

C285

R233
180

NC

U201B

78

R3/Pr

79

G3/Y

80

B3/Pb

77

FBLIN

70

V/R2/Pr

71

U/B2/Pb

72

Y/G2/Y

73

YSYNC

55

CVBS2/Y2

58

CVBS3/Y3

51

CVBS4/Y4

59

C2/C3

52

C4

48

SVO/CVBSI

24

VIFIN1

25

VIFIN2

29

SIF1

30

SIF2

53

AUDIO2_INL

54

AUDIO2_INR

56

AUDIO3_INL

57

AUDIO3_INR

21

EWD/AVI

19

SECPLL

49

AUDIO4_INL

50

AUDIO4_INR

34

AUDIO5_INL

35

AUDIO5_INR

33

SSIF

23

VDRA

22

VDRB

20

DECBG

27

IREF

26

VSC

32

EHT

28

GNDIF

17

PH1LF

16

PH2LF

38

DECSDEM

39

QSSO

91

REFAD

13

VGUARD

TDA15063H-N1B06557

L215
1uH

C287
4700

Q201

2SC388

R252

27

R251

2.2K

UOUT/INSSW2

AUDIO_OUT_LSL

AUDIO_OUT_LSR
AUDIO_OUT_HPL
AUDIO_OUT_HPR

K201

K3953M(K7262D CHINA)

R263

R263A

0

NC

SW

21345

R264
NC

Q202

2SC1815Y

YOUT

VOUT/SWO1

CVBSO/PIP

ROUT
GOUT
BOUT

BCLIN
BLKIN

SVM

FBISO

HOUT

AGC

IFVO

FMRO
PLLIF

SIFAGC

AGC2SIF

AUDOUTSL
AUDOUTSR

INT0

P00/I2SDI1/0

P01/I2SDO1
P02/I2SDO2
P03/I2SCLK

P04/I2SWS

P10/INT1

P11/T0

P12/INT2

P13/T1
P14/RX
P15/TX

P16/SCL
P17/SDA

P20/TPWM

P21/PWM0
P22/PWM1
P23/PWM2
P24/PWM3
P25/PWM4

P30/ADC0
P31/ADC1
P32/ADC2
P33/ADC3

21345

R264A
0

D205
2CK75D

74
75
76

64

85
86
87

83

84
65
66

67

uoc_hs

31
43
44

41

42

46

36
37

60
61
62

63

97

106
105
104
103
102

98
99
126
107
127
128
108
109

111
112
113
114
122
123

115
116
119
120

VIFIN2
VIFIN1

SIF filter

K9656M(K9352M/D CHINA))

To TDA9178

100

RT11
RT12
RT13

R265

A1

R261

YY_out

100

U_out

100

V_out

100

3D_IN

R205 100
R206 100
R207 100

TV_Rout
TV_Gout
TV_Bout

VCC5A

C215

0.1uF

C212 10V47uF

C213

R266

4.7K

1000pF

R221
390

VCC5A

R209

680

R208
100

R204

VCC5A

27K

R210
10K R211

C247

0.1uF

C214
10nF

TV_Csync

68K

R212

TV_Csync

D201
2CK75D

10k

AGC

C248
16V22uF

AGC

V3_3A

C243 1uF

C244 1uF

R217 1K
R218 1K C265

R219 100
R220 100

R227
100

R224 47
R237 47

R222 100

R235 100
R236 100

R262

100

100

R260

100

R270

100

R259

100

R258A

100

R258
RT15

100

R239
10K

VCC5A

SCOL
SCOR

MOL
MOR

D3.3V

R225

R238

10K

10K

R234
100

R253
10K

100

UOC_SW2

UOC_SW1

SAW_SW

R243
10K

SUB-TUNER SWITCH

VCC5A

R240
10K

VCC5A

+5VB

AVS1
MUTE
AVS2
5VSW

R271
10K

IRDATA/SCL
DVD_On/Off

UOC_SW2

UOC_SW1

SCOL
SCOR
MOL

MOR

UOCIII_SCL
UOCIII_SDA

DVD_id
MM_SCL

MM_SDA

AVS1

MUTE

AVS2

R223
22K

Sound Amplifier

IRDATA/SCL

UOCIII_SCL
UOCIII_SDA

DVD_id

MM_SCL
MM_SDA

Communication

V3_3A

R226
22K

R241

4.7K

CT11
1000pF

VCC5A

To DVD IR

Communication

R242

4.7K

V3_3A

+12V_3A

CT4A

0.1uF

C216

0.1uF

C217

0.1uF

C249

0.1uF

C250

0.1uF

C251

0.1uF

C278

0.1uF

V1_8V1_A

L216
10uH

LT1 10uH

CT8

100uF16V

L201
10uH

L202
10uH

C219

10V47uF

L203
10uH

L207
10uH

C253
10V47uF

L208
10uH

L209
10uH

L210
10uH

10V10uF

NC(15K)

C279

VCC5A

RT21

C218

10V47uF

C220

10V47uF

C255
10V47uF

C252

2.2uF

RT20

NC

C222A

2.2uF

0.1uF

C280

CT4

0.1uF

VDD5A_1

VDD5A_2

VDD3A

0.1uF

0.1uF

0.1uF

0.1uF

C221

0.1uF

C257

C258

C259

C260

C222

0.1uF

C223

0.1uF

U201A

15

VDD5A_1

18

GNDA1

47

VDD5A_2

40

GNDA2

82

VDD5A_3

81

GNDA3

1

GNDA

4

VDD3A

12

GNDA

88

VDD3

110

VDDP

118

VDD18

5

VREF_SDAC1

6

GREF_SDAC1

7

VREF_SDAC2

8

GREF_SDAC2

9

VREF_SDAC3

U3

4

MC78M08CDT

4

IN1GND2OUT

3

VSSCOMB

V8SWTCH

TDA15063H-N1B06557

Select Y2 -- Saronix 9922 520 20264

CT9

100uF16V

VDDC
VDDC
VDDC

VSSC
VSSC
VSSC

VREF

VSS_REF

VCOMB

VADC

VSSADC

VDDA

GNDAUD

VDDC

VDD3A

VSSC

DECDIG

XOUT

XIN

CT5

0.1uF

C281

22pF

124
100
117

101
121
125

90

89

69

68

96

95

93

92

3

94

C263A

0.1uF

2
45

C288

0.22uF

14

10

11

C224

0.1uF

VCOMB

C261

0.1uF

C262

0.1uF

C225

0.1uF

V1_8V1_A

C226

0.1uF

L212
10uH

L211 10uH

VDD3A_94

C263

0.22uF

DECDIG

L204
10uH

L205
10uH

10V47uF

C264

0.1uF

L213
10uH

Y201

24.576MHz

YY_out

U_out
V_out

CHINA:R263 0; R264 NC
CHINA:R263 NC; R264 0

K202

VCC5A

MM_SDA
MM_SCL

R256

UOCIII_SDA

CT6
100pF

JP201
CON-4

10

4

3

CT10
100pF

UOCIII_SDA RT3 100
UOCIII_SCL

TV_Csync

RT4 100

RT5 100
RT6 100
RT7 100

TDA9178T

U5

MM_SCL

MM_SDA

UOCIII_SCL

2

R254
22K

H: L' L:BG/DK/I (EUROPE)
H: BG/DK/I L:M/N (CHINA)

SAW_SW

1

Title

Number RevisionSize

A2

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

C230

C282
22pF

C227

0.1uF

10V100uF

L218
10uH
C266

VDD5A_2

RT202
47K

6

8
9

1

14
11

3
4
5

C228

0.1uF

VCC5A

0.1uF

V3_3A

QT201

2SC1815Y

YIN
UIN
VIN

SC

SDA

SCL

ADCEXT1
ADCEXT2
ADCEXT3

C263B

0.1uF

L1

V1_8V1

10uH

C231
10V47uF

V3_3A

V1_8ANA

V1_8V1

+5VB

RT201
10K

V1.8CONTROL

20

VCC

19

YOU

17

UOUT

16

VOUT

15

DECDIG

7

ADR

10

TP

18

VEE

2

NC

23

NC

24

NC

UOCIII TAD12019H
UOCIII TAD12019H

2

CT7

0.1uF

Y-3D
U_IN
C-3D

C256

0.1uF

D

C

B

Component Video Inputs

A

CN306

CON-13

MSTR_SDA

MSTR_SCL

1
2
3
4
5
6
7
8
9
10
11
12
13

DVI CONNECTOR

GND

GND

Y_YPBPR

B_YPBPR

R_YPBPR

GND

1
2
3
4

ANALOG DDC

2N7002E

DPF_H
DPF_V

DPF_Raudio

DPF_Laudio

25

RX2-

RX2+

GND
RX4-

RX4+

SCL
SDA

VS

RX1-

RX1+

GND
RX3-

RX3+

5V

GND

HP

RX0-

RX0+

GND
RX5-

RX5+

GND

RXC+

RXC-

RED

GRN

BLU

HS

GND

26

DVI-I

U302

VCC8A0

A1

WP

A2

SCL

GND

SDA

24LC21

R306
10K

213

U312 2N7002E

R307
10K

213

U313

C359

2.2uF/6.3V

Y_YPBPR

C360

2.2uF/6.3V

B_YPBPR

R_YPBPR

C361

2.2uF/6.3V

DPFR
DPFG

DPFB

R324
47K

R355A
0

GNDGND

R361A

0

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16

17
18
19
20
21
22
23
24

C1
C2
C3
C4
C5

2

7
6
5

C313

0.1uF

CN300

GNDGND

GND

3

C300

0.1uF

+3.3V_SW

R396
10K

+3.3V_SW

R398
10k

2.2uF/6.3V

R329
47K

RX2­RX2+

DVISCL
DVISDA

RX1­RX1+

R300

HOT_PLUG

RX0­RX0+

RXC+
RXC-

+5V

1

D311

BASY3

R310

22K

GND

C317

0.1uF

0.1uF

C312

R359

1.8k

GND

C336

0.1uF

C362

C345

0.1uF

R377

75

GND

10K/5%

R311
22K

+5V_ANG

L301

22uH/0.5A/<1R

+5V_FIL

+3.3V_SW

GND

GND GND GND

1
2

100

R397

3

100

R360

4

5
6

7

GND

8
9

DPF_G

10
11

12

DPF_B

13

DPF_R

GND

C363

DPF_R

2.2uF/6.3V

C349

DPF_G

0.1uF

R379
75

C364

2.2uF/6.3V

GND

DPF_B

C350

0.1uF
R378
75

GND

DVISCL
DVISDA
VGA_SCL
VGA_SDA

+5V

RA12
10K

3

2

GND

+5V_FIL

C314

C315

0.1uF

0.1uF

GND

C365

10uF/6.3V

10uF/6.3V

U305

REF1
VDD

SDA
SCL

VSS

MUXSEL
ADS

IN1A
IN1B

ISET
IN2A

IN2B

IN3A
IN3B14GND3

TAB129TAB2

SM5301AS

30

GND

GND

2SC1815Y

C366

REF2
REF3

VCC1
OUT1A

OUT1B

GND1

VCC2

OUT2A
OUT2B

GND2

VCC3

OUT3A

OUT3B

VGA_SDA1

Q309

C316

0.1uF

1

R301 100
R314 100

1
2
3
4

GND

U311

1

A1

2

B1

3

A2

4

B2

5

C2

6

C3
GND7A3

MC14016BDR2

GND

UOCIII_write_ctrl

R399

1k

TP328

TP329

+5V

28
27

26
25

24
23

22

21
20

19
18

17
16

15

GND

R302

10K/5%

U303

A1
A2
GND

24LC21

DIGITAL DDC

VCC

C1
C4
B4
A4
B3

R313
47

VGA_SDA2

C318

47uF/6.3V

C367

10uF/6.3V

Y_OUT

PB_OUT

PR_out

D300

2

S1 S2

GND

C358

0.1uF

BASY3

C301

0.1uF

CN301
DB15 HD

+5V_MUX

DVI_5V

1

D313A
BAV99L

3

D312A

BAV99L

1 2

GND

R354
47K

GND

5
10

GND

4
9

A-BLUE

3
8

A-GREEN

2
7

A-RED

1
6

GND

R325
5K

1%

R326
5K

1%

GND

R327
5K

1%

1%

R328
5K

GND

A-HS

A-VS

C338

100uF/6.3V

Teltext_HS
Teltext_VS

3

R303
10K

VCC8A0

7

WP

6

SCL

5

SDA

+5V

14
13
12
11
10

GND

9
8

VGA_SCL1

VGA_5V

Graphic Inputs

R312
47

GND

VGA_SCL2

15

A-VS

14

A-HS

13
12

11

GND

C323

0.1uF

C319

100uF/6.3V

C320
330nF

C321

100uF/6.3V

D301

BAV99L

1 2

+5V

GND

3

1 2

VGA_SDA2 VGA_SCL2

R315

10K

R330
75

GND

GND

R321

R323

47K

47K

GNDGND

C339

0.1uF

R355
47K

D312

BAV99L

R331

75

GND

3

D302

BAV99L

+5V

GND

R332

75

3

3

D303

D304

BAV99L

BAV99L

1 2

1 2

1 2

D313

D314

BAV99L

3

1 2

22uF/6.3V

C302

D315

BAV99L

BAV99L

3

3

1 2

1 2

R317
5K

1%

0.1uF

C303

R316
5K

1%

GND

R333

0.1uF

5K

1%

C326

R334
5K

1%

C324

22uF/6.3V

GND

R335

0.1uF

5K

1%

C327

R336
5K

1%

C325

22uF/6.3V

GND

+5V_MUX

R362
5K

1%

R363
5K

1%

GND

+5V_ANG

R361
47K

GNDGND

DVI Test Points are just SMTobservation points on the traces with no stub

3

3

D305

BAV99L

3

D306

D307

BAV99L

BAV99L

1 2

1 2

1 2

Static protection.+5V can be changed to +5V_ANG according to PCB layer.

D317

BAV99L

3

3

3

D316

BAV99L

1 2

1 2

1 2

A-REDA-GREENA-BLUE

+5V_MUX

C305

C304

0.1uF

C306

0.1uF

10uF/16V

GND

U306

FSAV330M

1

SEL

RED_GR

Pr_FIL

GRN_GR

Y_FIL

Teltext_R
Scart1_R

Teltext_G

Scart1_G

L302

22uH/0.5A/<1R +5V_MUX

C340

10uF/16V

VCC

1B12/OE

3

1B2

4B1

4

1A

4B2

5

2B1

4A

6

2B2

3B1

7

2A

3B2

8

GND

GND

1

3

4
5

6
7

8

3A

U307 FSAV330M

SEL

1B12/OE
1B2

1A
2B1

2B2

2A
GND

FSAV330M Truth Table
S /OE FUNCTION
X H DISCONNECT
L L A=B1
L H A=B2

C341

0.1uF

GND

GND

+3.3V_DIG

C346

0.1uF

GND

3

D308

BAV99L

1 2

3

D318

BAV99L

1 2

A-VS A-HS

+5V_MUX

16
15

14
13

12

BLU_GR

11

Pb_FIL

10

9

VCC

4B1

4B2

4A

3B1

3B2

3A

C342

0.1uF

16

15
14

13
12

11
10

9

3

D309

BAV99L

+5V_ANG

10uF/16V

+5V_MUX

Teltext_B
Scart1_B

C343

0.01uF

Scart1VideoIN

1 2

C307

TP300

TP305

TP301

TP306

TP302

TP303
TP304

+5V

TP307

3

3

D310

BAV99L

1 2

100K

C309

C308

0.1uF

0.1uF

GND

R318 470
R319 20

R339 20

R340 20

R338

R337

NC

R341

NC

NC

GND

This pin set H indicate output is set to tristate.

R348A
100

DPF_V

C344

0.01uF

R392
620

C353
470pF

R394

GND

47K

GND

RX2­RX2+

RX1­RX1+

RX0­RX0+

RXC+
RXC-

DVI_SCL

DVI_SCL

DVI_SDA

DVI_SDA
VGA_SCL
VGA_SDA

VGA_CAB

R320

GND

R34256

R34356

GND

GND

This pin set H indicate output is set to tristate.

U308

1

NO0B

2

NO1B

3

COMB

4

NO3B

5

NO2B

6

Inhibit

7

VEE

8

GND

NLAS4052

GND

U301
EL1883L

C351

1

0.1uF

CYSNCout

2

Video-in

3

VSYNCout
GND4Burst/Porchout

GND

GND

10uF/16V

VCC

NO1A
NO2A

COMA

NO0A
NO3A

ADDB
ADDA

HSYNCout

RESET

Static Protection.

GND

R34456

+5V_MUX

C347

VDD

R304
1K

R305
100K

GND

16

15

Teltext_HSTeltext_VS

14

DPF_H

13
12

11
10

9

8
7
6
5

R395

47K

DVI_CAB

C310 0.01uF

C311 0.01uF
C328 0.01uF

C329 0.01uF
C330 0.01uF

C331 0.01uF
C332 0.01uF

Schmitt Triggers

Low:Select VGA HS/VS.
High:Select TeltextHSVS.

+5V_MUX

R393
680K

GND

GND

GND

TP308

GND

TP309

GND

TP310

GND

TP311

GND

TP312

GND

TP313

GND

TP314

GND

TP315

GND

TP316

GND

TP317

GND

TP318

GND

TP319

GND

TP320

GND

TP321

GND

TP322

GND

TP323

GND

TP327

GND

TP324

SOG
BLUE+

BLUE-

TP325

GREEN+
GREEN-

TP326

RED+
RED-

100
100

R347

100

100

R348

U310B

SN74LVC14AD

R364
100

GND

SN74LVC14AD

U310C

5 6

9 8

Sel_HsVs

Set_tristate1
ChannelSel1

ChannelSel2
Set_tristate2

U310D

SN74LVC14AD

5*%6,*1$/*1'VDWPPIURPUHVSHFWLYH 5*%VHULHV&DSDFLWRUV

R345
R346

R348B
100

SN74LVC14AD

U310A

1 2

3 4

+5V_MUX

R4

4.7K

C352

0.1uF

SOG
BLUE+

BLUE­GREEN+

GREEN-

RED+
RED-

Set_tristate1
ChannelSel1

ChannelSel2
Set_tristate2

MUX_R

MUX_L

AHS

AVS

+5V_MUX

R5

4.7K

HV_SEL

NLAS4052 Truth Table
B A FUNCTION
0 0 COMA=NO0A; COMB=NO0B

0 1 COMA=NO1A; COMB=NO1B
1 0 COMA=NO2A; COMB=NO2B
1 1 COMA=NO3A; COMB=NO3B

MUX_R

MUX_L

DELETE BUFFER

Inhabit=1:All output is open.

+5V_ANG

22uH/0.5A/<1R

DPF_Raudio

GND

The Teltext is controned by GM1601 or UOCIII .

UOCIII_SCL

R308 20
R309 20UOCIII_SDA

IRDATA
Teltext_MUTE

500 Page Teltext interface.

+5V_AUD

3

Q300

R349

2.2K

Q301

DPF_Laudio

R381

2.2K

Q307

3

2

GND

2

GND

3

2

GND

VGA_L

VGA_R

3

2

GND

3

2

GND

GND

R365

2.2K

2.2K

3

2

1

+5V_AUD

R367

47K

Q304

2SC1815Y

Q305

2SC1815Y

+5V_AUD

R387
47K

+5V_AUD

R382

Q303

2SC2712Y

R350
47K

1

R351
47K

R366
47k

1

R380

2.2K

1

R388
47K

R389
47k

1

1

R370
10K

2SC1815Y

L300

+5V_AUD

C334

10uF/16V

GND

YPbPr_RR

U309

1

NO0B

VCC

2

NO1B

NO1A

3

COMB

NO2A

4

NO3B

COMA

5

NO2B

NO0A

6

Inhibit

NO3A

7

VEE

ADDB

8

GND

ADDA

NLAS4052

YPbPr_LL

C335

0.1uF

2SC1815Y

16

15
14

13
12

11

10
9

DVI_R

Q306
2SC1815Y

+5V_AUD

2SC1815Y

R369

2.2K

Q302

2SC1815Y

DVI_L

+5V_AUD

R368

2.2K

1 2 3 4 5 6 7 8

+5V_ANG

C333

47uF/16V

+

3

2

GND

3

2

GND

C356

47uF/16V

+

R390
47K

+

R383

2.2K

+

R371
10K

C348
47uF/16V

C357

47uF/16V

Tel_SCL
Tel_SDA

IRDATA

Teltext_MUTE
Teltext_R

Teltext_G
Teltext_B
Teltext_R

Teltext_HS
Teltext_VS

3D_IN

YPBPR_L

YPBPR_R

+5V_AUD

R384
47K

1

R385
47K

+5V_AUD

1

C354

47uF/16V

R386
47k

+

47uF/16V

R391
47K

AudioSelADDB

AudioSelADDA

CN303

1
2
3
4
5
6
7
8

CON8

GND

CN304

1
2
3
4
5
6
7
8

CON8

GND

YPBPR_L

YPBPR_R

+

R357

10K
R356
22K

GND

C355

R358
10K

R375
22K

GND

R373
10k

R372
22K

GND

R374
10K

R376
22K

GND

AudioSelADDB

AudioSelADDA

Title

Number RevisionSize

Orcad D

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

87654321

1
2
3

GND

VGA Audio Input

1
2
3

GND

DVI Audio Input

AVP300
AV-1

AVP303
AV-1

D

C

B

A

C701

47uF/6.3V

C700

47uF/6.3V

C703

C702

0.1uF

0.1uF
C705

C704

0.1uF

0.1uF

GND

C716
47uF/6.3V

C718

C719

0.1uF

0.1uF

C721

C720

0.1uF

0.1uF

D

GND

C749

0.1uF

C753

0.1uF

+1.8V_DVI

C738

C737

0.1uF

0.1uF

+3.3V_DVI

C754

C755

0.1uF

0.1uF

GND

GND

C733
47uF/6.3V

C746

0.1uF

C750

47uF/6.3V

C736

C735

0.1uF

0.1uF

C748

C747

0.1uF

0.1uF

C752

0.1uF

GND

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C

Set VOL- VOL+ CH- CH+ AV/TV MENU and POWER totally 7keys on Keyboard.、 、 、 、 、

+3.3V_DIG

C760

47uF/6.3V

C799

GND

CN700

1

CN-5

2
3
4
5

CN701

1

CN-4

2
3
4

IRDATA

To KeyControlBoard.

B

A

C798

0.1uF

0.1uF

GND

GND

LED1_KEYPAD
LED2_KEYPAD
IRDATA

GND

GND

R746
0

C732

C795

0.1uF

0.1uF

GND

GND

U702

3

VCC

2

RSTN

1

GND

MAX809LEN

SOT23

+5V

GND

CN702
CON3

ADC_IN2
ADC_IN1

C796
470pF

R739
NC

/RESET3.3V

Q700

2SC1815Y

R706
220

R707
220

C797
470pF

GNDGND

+3.3V_DIG GND

C760A
100pF

GND

GND

+3.3V_DIG

C717A
1000pF

1

GND

2
3

GND

FSVREF

C767

C768

0.1uF

0.1uF

+3.3V_ADC

C773

C772

47uF/6.3V

C774

0.1uF

C775

0.1uF

0.1uF

GND

C777

47uF/6.3V

C787

47uF/6.3V

C791

47uF/6.3V

C778

0.1uF

GND

C788

0.1uF

GND

C792

0.1uF

0.1uF

+3.3V_LVDSA

C789

0.1uF

+3.3V_LVDSB

C793

0.1uF

0.1uF

C790

0.1uF

C794

0.1uF

C780

C779

GND

1 2 3 4 5 6 7 8

C706

0.1uF

C722

0.1uF

C739

0.1uF

2SC1815Y

R738
NC

C717
1000pF

GND

C776

0.1uF

C781

0.1uF

+3.3V_LVDS

GND

Q701

R717A
100K

GNDGND

C786

0.1uF

C707

0.1uF

C723

0.1uF

C740

0.1uF

+3.3V_DIG

CN703

HEADER 4

GPROBE

C769

0.1uF

C782

0.1uF

+3.3V_PLL

1
2
3
4

+1.8V_ADC

+3.3V_DIG

RN700
22X4

FSDATAU0
FSDATAU1
FSDATAU2
FSDATAU3
FSDATAU4
FSDATAU5
FSDATAU6
FSDATAU7

RN700A
22X4

FSDATAU8
FSDATAU9
FSDATAU10
FSDATAU11
FSDATAU12
FSDATAU13
FSDATAU14
FSDATAU15

RN702A
22X4

FSDATAU16
FSDATAU17
FSDATAU18
FSDATAU19
FSDATAU20
FSDATAU21
FSDATAU22
FSDATAU23

RN704

FSDATAU24
FSDATAU25
FSDATAU26
FSDATAU27
FSDATAU28
FSDATAU29
FSDATAU30
FSDATAU31

Place Series termination resistors on bidirectional lines-DATA and DQS midway between gm1601 BGA and memory

Max trace length on this interfce is 2.5 inches
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FSCLK+, FSCLK- should be routed like a differentail pair

FSCLK+
FSCLK-

PanelP

+

C730

C731

0.1uF

Panel_Power

0.1uF

GNDL

GNDL

R702
22k

+3.3V_DIG

R720
22K

8759PowerDown

SAA7115_EN
AudioSelADDA
AudioSelADDB
Communication

M_SCL
M_SDA

For LG LC300W01 panel.

M_SCL

M_SDA

8759PowerDown

SAA7115_EN

AudioSelADDA
AudioSelADDB
Communication

HIGH:

8759PowerDown

+3.3V_I/O_BGA

+5V

R727
100

Reserved The Route.

R745

R744

10K

10K

TP705 TP706 TP707

DCLK

RESET_2310
DVS
Standby

R727A
10K

IRDATA/SCL
State/SDA

MUTE

+5V

VGA_CAB

VGA_CAB

DVI_CAB

DVI_CAB

PPWR
PBIAS

R714

3.3K

GND

VCLK

VVS
VHS

Sel_HsVs

C713

0.1uF

C729

0.1uF

VRED[7..0]

VGRN[7..0]

VBLU[7..0]

ITRU[7..0]

SVCLK

/OCM_WE
/OCM_RE
/ROM_CS

+1.8V_CORE

C714

0.1uF

R700
270

BLUE­BLUE+

GREEN-

GREEN+

RED-

RED+

VGA_SCL

VGA_SDA

VCLK

VVS
VHS
CHKARM
ENBARM

DVDKEY

OCMADDR[0..19]

POWER_OFF
RGB/YPbPr_SEL

Set_tristate1
Set_tristate2
ChannelSel1
ChannelSel2
Sel_HsVs
Teltext_MUTE

SOG

AHS
AVS

C715

0.1uF

DVI_SCL

DVI_SDA

BLUE­BLUE+
GREEN­GREEN+
RED­RED+
SOG

VGA_SCL
VGA_SDA
AHS
AVS

ACS_RSET_HD

VRED0
VRED1
VRED2
VRED3
VRED4
VRED5
VRED6
VRED7

VGRN0
VGRN1
VGRN2
VGRN3
VGRN4
VGRN5
VGRN6
VGRN7

VBLU0
VBLU1
VBLU2
VBLU3
VBLU4
VBLU5
VBLU6
VBLU7

SVCLK

RX0+

RX0-

RX1+

RX1-

RX2+

RX2-

RXC+

RXC-

ITRU0
ITRU1
ITRU2
ITRU3
ITRU4
ITRU5
ITRU6
ITRU7

MSTR_SCL
MSTR_SDA

/OCM_WE
/OCM_RE
/ROM_CS

/OCM_CS2
/OCM_CS1
/OCM_CS0

OCMADDR19
OCMADDR18
OCMADDR17
OCMADDR16
OCMADDR15
OCMADDR14
OCMADDR13
OCMADDR12
OCMADDR11
OCMADDR10
OCMADDR9
OCMADDR8
OCMADDR7
OCMADDR6
OCMADDR5
OCMADDR4
OCMADDR3
OCMADDR2
OCMADDR1
OCMADDR0

OCMDATA7
OCMDATA6
OCMDATA5
OCMDATA4
OCMDATA3
OCMDATA2
OCMDATA1
OCMDATA0

+3.3V_LBADC

FSDATAU[0..31]

U700

GM1601

BGA416

FSDATAU0

E24

FSDATAU1

E25

FSDATAU2

E26

FSDATAU3

G26

FSDATAU4

G24

FSDATAU5

H26

FSDATAU6

H24

FSDATAU7

J25

FSDATAU8

T26

FSDATAU9

R25

FSDATAU10

P24

FSDATAU11

P26

FSDATAU12

N24

FSDATAU13

N26

FSDATAU14

M25

FSDATAU15

L24

FSDATAU16

L25

FSDATAU17

M26

FSDATAU18

M24

FSDATAU19

N25

FSDATAU20

N23

FSDATAU21

P25

FSDATAU22

R26

FSDATAU23

R24

FSDATAU24

K24

FSDATAU25

J26

FSDATAU26

H25

FSDATAU27

G23

FSDATAU28

G25

FSDATAU29

F24

FSDATAU30

F25

FSDATAU31

F26

FSADDRU0

AD25

FSADDRU1

AD26

FSADDRU2

AC24

FSADDRU3

AC25

FSADDRU4

AB26

FSADDRU5

AA24

FSADDRU6

AA25

FSADDRU7

AA26

FSADDRU8

Y24

FSADDRU9

AB25

FSADDRU10

AC26

FSADDRU11

AB24
U24

U23

FSDQSU

L26

FSDQMU0

T25

FSDQMU1

U25

FSDQMU2

U26

FSDQMU3

T24

/FSWEU

V26

/FSCASU

V25

/FSRASU

V24

FSCKEU

W26

FSBKSELU0

Y25

FSBKSELU1

Y26

AC18
AD18
AE18
AF18

TXA3+

AE19

TXA3-

AF19

TXAC+

AE20

TXAC-

AF20

AD21
AD22

TXA2+

AE21

TXA2-

AF21

TXA1+

AE22

TXA1-

AF22

TXA0+

AE23

TXA0-

AF23
AD23

AD24
AE24
AF24
AF25
AF26
AE25

R726

AE26

4.7k

R715

AE8

22

AF8

R716

AC9
AD9

22

AE9
AF9
AD10
AE10

AF10
AC11
AD11
AE11

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AF11
AF12
AE12
AF13

AE13
AD14
AF14
AE14
AF15
AE15
AF16
AE16

R710

R742

AC7

NC

100

AF17

DHS

AD16
AD7

DEN

R743
100

AD8
AF7
AE7
AF6
AE6

R723

AD6
AF5

100

AE5

R724

AD5
AC5

100

AF4
AE4

R725
100

PPWR

A26

PBIAS

B26
AC17

OEXTR

AC16
AD15

P23

FS_2.5

Gm1601

+3.3V_LVDSB

+3.3V_LVDSA

L23

FS_2.5

E23

T23

V23

R23

Y23

AA23

AB23

AC23

W23

F23

AC12

AD12

AD13

FS_2.5

FS_2.5

FS_2.5

FS_2.5

FS_2.5

FS_2.5

FS_2.5

FS_2.5

FS_2.5

FS_2.5

LVDSB_3.3

LVDSB_3.3

LVDSB_3.3

+1.8V_CORE

K17

U17

U11

L16

T16

T17

L11

K10

K16

T11

U16

U10

K11

AC4

K23

D17

D23

IO_3.3

IO_3.3

CORE_1.8

CORE_1.8

CORE_1.8

CORE_1.8

CORE_1.8

IO_3.3

VDDA18_DLL

LCD TV / MONITOR CONTROLLER

CORE_1.8

CORE_1.8

CORE_1.8

CORE_1.8

CORE_1.8

CORE_1.8

CORE_1.8

N4

DVI_SCL

N3

DVI_SDA

A8

RX0+

B8

RX0-

A9

RX1+

B9

RX1-

A10

RX2+

B10

RX2-

A6

RXC+

B6

RXC-

D5

NO_CONNECT

C5

NO_CONNECT

B11

REXT

B1

BLUE-

B2

BLUE+

C1

GREEN-

C2

GREEN+

D1

RED-

D2

RED+

C3

SOG

A1

NO_CONNECT

N2

VGA_SCL

N1

VGA_SDA

L4

AHSYNC

L3

AVSYNC

R4

EXTCLK

G4

XTAL

G3

TCLK

F1

NO_CONNECT

K3

NO_CONNECT

K2

ACS_RSET_HD

C19

VRED0

B19

VRED1

A19

VRED2

D18

VRED3

C18

VRED4

B18

VRED5

A18

VRED6

C17

VRED7

A23

VGRN0

C22

VGRN1

B22

VGRN2

A22

VGRN3

D21

VGRN4

C21

VGRN5

B21

VGRN6

A21

VGRN7

B25

VBLU0

A25

VBLU1

D24

VBLU2

C24

VBLU3

B24

VBLU4

A24

VBLU5

C23

VBLU6

B23

VBLU7

A20

VCLK

B20

VODD

C20

VVS

D19

VHS_CSYNC

D20

VDV

B17

VCLAMP

C26

PWM0

PWM1

C25

PWM1

PWM2

D26

PWM2

PWM3

D25

OCM_TIMER1

A12

LBADC_IN3

B12

LBADC_IN2

C12

LBADC_IN1

D12

LBADC_RETURN

C16

SVDATA0

B16

SVDATA1

A16

SVDATA2

D15

SVDATA3

C15

SVDATA4

B15

SVDATA5

A15

SVDATA6

D14

SVDATA7

A17

SVDV

A14

SVODD

B14

SVVSYNC

C14

SVHSYNC

D16

SVCLK

M1

OCM_UDO

M2

OCM_UDI

K1

/RESET

M4

IR1

M3

IR0

P4

MSTR_SCL

P3

MSTR_SDA

R3

/OCM_WE

R2

/OCM_RE

R1

/ROM_CS

L1

/OCM_INT2

L2

/OCM_INT1

P2

/OCM_CS2

P1

/OCM_CS1

T4

/OCM_CS0

T3

OCMADDR19

T2

OCMADDR18

T1

OCMADDR17

U4

OCMADDR16

U3

OCMADDR15

U2

OCMADDR14

U1

OCMADDR13

V4

OCMADDR12

V3

OCMADDR11

V2

OCMADDR10

V1

OCMADDR9

W3

OCMADDR8

W2

OCMADDR7

W1

OCMADDR6

Y3

OCMADDR5

Y2

OCMADDR4

Y1

OCMADDR3

AA3

OCMADDR2

AA2

OCMADDR1

AA1

OCMADDR0

AB3

OCMDATA15

AB2

OCMDATA14

AB1

OCMDATA13

AC3

OCMDATA12

AC2

OCMDATA11

AC1

OCMDATA10

AD1

OCMDATA9

AE1

OCMDATA8

AF1

OCMDATA7

AD2

OCMDATA6

AE2

OCMDATA5

AF2

OCMDATA4

AD3

OCMDATA3

AE3

OCMDATA2

AF3

OCMDATA1

AD4

OCMDATA0

CORE_1.8

+2.5V_DDR+3.3V_I/O_BGA

AC6

AC8

AC10

D22

AA4

AB4

Y4

H23

J23

M23

C13

IO_3.3

IO_3.3

IO_3.3

IO_3.3

IO_3.3

IO_3.3W4IO_3.3

IO_3.3

FS_2.5

FS_2.5

FS_2.5

LBACD-33

AD20

AC22

LVDSA_3.3

LVDSA_3.3

+3.3V_LVDS

AC21

LVDSA_3.3

AE17

VDDD33_LVDS

FSVREF

J24

W25

FSVREF

FSVREF

+1.8V_DVI

D6

DVI_1.8

DVI_1.8D8DVI_1.8D9DVI_1.8

+3.3V_DVI

+1.8V_ADC

+3.3V_ADC +3.3V_PLL

A4

C10

D10

C11

DVI_3.3

E3

F4

F2

G1

H1

J1

DVI_3.3C6DVI_3.3C8DVI_3.3C9DVI_3.3

ADC_1.8A3ADC_1.8

ADC_3.3A2ADC_3.3B3ADC_3.3D3ADC_3.3

FSDATA0
FSDATA1
FSDATA2

VDDA33_PLL

VDDA33_FPLL

VDDA33_RPLL

VDDA33_SDDSH3VDDA33_SDDS

FSDATA3

VDDA33_DDDSJ3VDDA33_DDDS

FSDATA4
FSDATA5
FSDATA6
FSDATA7
FSDATA8

FSDATA9
FSDATA10
FSDATA11
FSDATA12
FSDATA13
FSDATA14
FSDATA15
FSDATA16
FSDATA17
FSDATA18
FSDATA19
FSDATA20
FSDATA21
FSDATA22
FSDATA23
FSDATA24
FSDATA25
FSDATA26
FSDATA27
FSDATA28
FSDATA29
FSDATA30
FSDATA31

FSADDR0
FSADDR1
FSADDR2
FSADDR3
FSADDR4
FSADDR5
FSADDR6
FSADDR7
FSADDR8

FSADDR9
FSADDR10
FSADDR11

FSCLKp
FSCLKn

FSDQS

FSDQM0
FSDQM1
FSDQM2
FSDQM3

FSWE
FSCAS
FSRAS
FSCKE

FSBKSEL0
FSBKSEL1

GPIO_G06_B0
GPIO_G06_B1
GPIO_G06_B2
GPIO_G06_B3

GPIO_G05_B0
GPIO_G05_B3

GPIO_G04_B0
GPIO_G04_B1
GPIO_G04_B2
GPIO_G04_B3
GPIO_G04_B4
GPIO_G04_B5
GPIO_G04_B6
GPIO_G04_B7

GPIO_G07_B0
GPIO_G07_B1
GPIO_G07_B2
GPIO_G07_B3
GPIO_G07_B4
GPIO_G07_B5
GPIO_G07_B6
GPIO_G07_B7

LVDS_SHIELD[0]
LVDS_SHIELD[1]
LVDS_SHIELD[2]
LVDS_SHIELD[3]

LVDS_SHIELD[4]
LVDS_SHIELD[5]

DCLK
GPIO_14
GPIO_15
GPIO_16

GPIO_G08_B5/JTAG_RESET

GPIO_G08_B4/JTAG_TDO

GPIO_G08_B3

GPIO_G08_B2/JTAG_TDI

GPIO_G08_B1/JTAG_MODE

GPIO_G08_B0/JTAG_CLK

GPIO_G09_B5
GPIO_G09_B4
GPIO_G09_B3
GPIO_G09_B2
GPIO_G09_B1
GPIO_G09_B0

PPWR

PBIAS

NO_CONNECT

OEXTR

D_GND

A3+

A3-

AC+

AC-

A2+

A2-

A1+

A1-

A0+

A0-

B3+

B3-

BC+

BC-

B2+

B2-

B1+

B1-

B0+

B0-

C708

0.1uF

C724

0.1uF

C710

C709

0.1uF

0.1uF

C726

C725

0.1uF

0.1uF

C712

C711

0.1uF

0.1uF

+2.5V_DDR

C727

C728

0.1uF

0.1uF

+3.3V_I/O_BGA

C742

C741

0.1uF

C756
22pF

14.318MHz

C743

0.1uF

0.1uF

+3.3V_DVI

+3.3V_PLL

GND

3

12

X700

R703

3.3K

GND

C757
22pF

VRED[7..0]

R701
10K/5%

GND

XTAL
TCLK

VGRN[7..0]

VBLU[7..0]

TP700

TP712TP711

1K

R719

1K

R711

To programable filter.

R718

R717
10K/5%

+3.3V_DIG

+5V

GND

RXD
TXD

R738A
100

R738B
100

10K/5%

GND

ITRU[7..0]

TP701

MSTR_SCL

MSTR_SDA

TP710TP709

CC_INT1
CC_INT

TP702
TP703

TP704

OCMADDR[0..19]

C770

0.1uF

C771

0.1uF

+3.3V_PLL

GND

C783

0.1uF

TP758

POWER_OFF

Set_tristate1
Set_tristate2

ChannelSel1

C784

0.1uF

ChannelSel2

Teltext_MUTE

GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

D_GND

LVDSB_GND

LVDSB_GND

LVDSB_GND

VSSA33A_LVDS

VSSA33A_LVDS

VSSA33A_LVDS

OCMDATA[0..7]

OCMDATA[0..7]

D_GND

A13

U14

PQFP208

VSSA18_DLL

D_GND

L15

M15

P15

R15

U15

M11

N11

R11

P16

N17

N10

R10

K12

L12

M13

M12

N12

P12

T12

U12

L13

N13

R13

L10

T13

T10

K14

L14

N14

P14

T14

K15

N15

T15

M16

N16

R16

R12

K13

P13

U13

M14

R14

P11

M10

M17

P17

R17

P10

K25

B13

L17

GND

VSSD33_LVDS

FSVREFVSS

FSVREFVSS

ADC_DGNDA5DVI_GNDA7DVI_GNDB7DVI_GNDC7DVI_GNDD7DVI_GND

ADC_AGND

ADC_AGNDE2ADC_AGNDC4ADC_AGND

ADC_AGND

ADC_DGND

E1

E4

D4

B4

K26

AC13

AC14

W24

AC15

AC19

AC20

AD19

AD17

A11

D11

LBADC_GND

VSSA33_RPLLF3VSSD33_PLLG2VSSA33_FPLLH4VSSA33_SDDSH2VSSD33_SDDSJ4VSSA33_DDDSJ2VSSD33_DDDS

DVI_GNDB5DVI_GND

D13

K4

GND

6
7
8

6
7
8

6
7
8

6
7
8

6
7
8

6
7
8

6
7
8

6
7

8

RN706A
22X4

TP714

FSDATA0

45

FSDATA1

3

FSDATA2

2

FSDATA3

1

FSDATA4 FSDQM1

45

FSDATA5

3

FSDATA6

2

FSDATA7

1

RN702
22X4

FSDATA8

45

FSDATA9

3

FSDATA10

2

FSDATA11

1

FSDATA12

45

FSDATA13

3

FSDATA14

2

FSDATA15

1

22X4

RN704A

FSDATA16

45

FSDATA17

3

FSDATA18

2

FSDATA19

1

FSDATA20

45

FSDATA21

3

FSDATA22

2

FSDATA23

1

22X4

22X4

RN706

FSDATA24

45

FSDATA25

3

FSDATA26

2

FSDATA27

1

FSDATA28

45

FSDATA29

3

FSDATA30

2

FSDATA31

1

FSADDRU[0..11]

FSCLK+
FSCLK-

FSDQS

FSDQS

NC

R71

NC

R72

R730NCR729NCGND

R708
NC

GND

R732
R728
NC

R733
0

NCR731

NC

R734

R737

0

0

R7360R735

0

+5V_4A

JP700
20PIN

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20

R705
33

R704
NC

TP777

LCD-ON

JTAG_TRST

+3.3V_DIG

R709

2.7K

R721

R722

4.7K

4.7k

TP708

HV_SEL

+3.3V_DIG

RN701
22X4

FSCKEU

6

/FSCASU

7

FSDQMU1

8

/FSWEU
FSDQMU2

6

FSDQMU3

7

FSDQMU0

8

RN701A

22X4

FSDATA[0..31]

FSADDRU9
FSADDRU4
FSADDRU5
FSADDRU6
FSADDRU7
FSADDRU8
FSBKSELU1
FSBKSELU0

RN703A

FSADDRU0
FSADDRU1
FSADDRU2
FSADDRU3
FSADDRU10
FSADDRU11

3ODFH6HULHVWHUPLQDWLRQUHVLVWRUVRQDOODGGUHVVDQG FRQWUROOLQHVYHU\FORVHWRJP%*$

Unloaded trace impedance on this interface is 90 Ohm
Loaded trace impedace with DRAM load is 65 Ohm (for 2.5 inch total trace
length)

JP701

1
2
3
4
5
6
7
8
9

TXA3+

10

TXA3-

11

TXAC+

12

TXAC-

13
14

TXA2+

15
16

TXA2-

17

TXA1+

18

TXA1-

19

TXA0+

20

TXA0-

21
22
23
24
25

PanelP

26
27
28
29
30

FLATCABLE30

GNDL

RN703
22X4

6
7
8

6
7
8

RN705

6
7
8

6
7
8

RN705A
22X4

22X4

FSCKE

45

/FSRAS/FSRASU

3

/FSCAS

2
1

/FSWE

45

FSDQM2

3

FSDQM3

2

FSDQM0

1

FSADDR9

45

FSADDR4

3

FSADDR5

2

FSADDR6

1

FSADDR7

45

FSADDR8

3

FSBKSEL1

2

FSBKSEL0

1

22X4

45
3

FSADDR0

2

FSADDR1

1

FSADDR2

45

FSADDR3

3

FSADDR10

2

FSADDR11

1

To OS Driving of Sharp

Pin 2\4\6 Should Be Set 3.3V

MSTR_SCL
MSTR_SDA

R2

3.3K

0.1

+3.3V

R1
1K

MA30PPMA31PPMA32PPMA33

MA34PPMA35PPMA36PPMA37

MA38PPMA39PPMA40PPMA41

M1PPM2PPM3PPM4PPM5PPM6PPM7PPM8PPM9PPM10PPM11PPM12PPM13PPM14PPM15PPM16

PP

PP

PP

MEC1PPMEC2PPMEC3PPMEC4PPMEC5PPMEC6PPMEC7

+3.3V_DIG

R712

2.7K

I2C address: A2H and A3H

R713

2.7K

GND

MSTR_SCL
MSTR_SDA

U701

8

VCC

7

WP

6

SCK

5

24LC32A-I/SN

SOIC8 (150mil BODY)

1

A0

2

A1

3

A2

VSS4SI

GND

FSCKE
/FSRAS
/FSCAS

/FSWE

FSDATA[0..31]

FSADDR[0..11]

GND

CONPT1

7
6
5
4
3
2
1

+3.3V_SW
+5V_SW

100

R740

100

R741

C290

0.1uF

GND GND

Panel_Power

R3

3.3KC1

Q1
2SC1815Y

GNDL

C785

0.1uF

Title

Number RevisionSize

Orcad D

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

FSBKSEL1
FSBKSEL0

FSADDR[0..11]

RPT1

4.7K

RPT8

0

RPT7

NC

RPT6

0

RPT4

0

RPT3
NC

C291

0.1uF

U1
IRF7314

S1D
S2D
S3D
G4D

H1
PPP10

123456789

FSDQM[0..3]

GND

PP

87654321

FSDQM[0..3]

D

+5V_4A

RPT2
1K

C

J700

1
2
3
4
5
6

CON6

PanelP

8
7
6
5

PP

B

10

A

4321

RN401

22X4

ADUB00

R406A
75

R406

R403A

75

R412
100

+3.3V_DEC

10n

75

c4120

10n

c415

10n

R402

12K

75

c416

10n

c4121

10n

c417

10n

c410

10n

c418

10n

c412

10n

C419A

10n

c419

R403

10n

75

c413

10n

c414 10n

R405 1K

R452

47

R413
NC
R451
22

R414
100

GND

L404
10uH+1.8V_SW

C450

0.1uF

L405
10uH

C451

0.1uF

C449

C452

0.1uF

0.1uF

GND

R183
100

TV_Bout

TV_Bout

D

TV_Gout

TV_Gout

VCC5A

TV_Rout

100

R182

TV_Rout

C

+3.3V_SW

L401

+3.3V_SW

3.3Vcca

10uH

L400

3.3Vcore

10uH

C422

0.1uF

+3.3V_DEC

Q172
2SC1815Y

L174

R174

2.2uH

75

R173

C179

470

330pF

Q173

R184

2SC1815Y

100

R180
75

R179
470

C182
330pF

TV_BBout

R175

C180
330pF

L175

2.2uH

C183
330pF

TV_GGout

R175A

NC

75

R181A

R181

75

NC

L171

TV_Csync

C174

0.1uF

TV_RRout

C173
330pF

R176

R176A

NC

75

3.3V_out

R444

4.7K

SDA_V

3.3V_out

R453

4.7k

SCL_V

C436

C438

C440

0.1u

C434

C437

0.1uF

0.1uF

+ C435

22u/10V + C456

C443

0.1u

0.1u

0.1u

GND

+ C444

C439

22u/10V

0.1uF

GND

L403

+1.8V_SW

10uH

+

C442
470u/10V

MSTR_SDA

MSTR_SCL

L402
10uH

C423

0.1u

C424

0.1uF

C172

Q171
2SC1815Y

R171
470

3.3V_out

C425

0.1uF

C426

0.1uF

10V22uF

L172

2.2uH

R172
75

C171
330pF

R454
1K

213

U404 2N7002E

R455
1k

213

U406

2N7002E

C427

C430

C433

0.1u

0.1u

0.1u

C428

C431

0.1uF

0.1uF

C429

C432

0.1uF

0.1uF C447

GND

c4119

10n

PBout

R400

R400A

75

Yout

c4122

10n

Yout

GND

uoc_vs

TV_Csync

uoc_hs

SDA_V
SCL_V

+ C446

C445

22u/10V

0.1u

1.8Vcore

C448

0.1uF

0.1uF

TDA8759 AD Power Supply.

+3.3V_SW

L406
10uH

+3.3V_DEC

L407

C459
47nF

C460
47nF

C461
47nF

C462
47nF

C463
47nF
C464

47nF

C465
47nF

C466
47nF

High is effective.

C481
100n

10uH

98

GND

10

AI24

12

AI23

14

AI22

16

AI21

13

AI2D

18

AI12

20

AI11

19

AI1D

C483

C482

100n

100n

B

R420

SubchannelTV

SubchannelTV

Scart1VideoIN

Scart2_CIn

Video1_C_IN

Scart2_VideoIn

Video1_Y_IN

A

Scart1VideoIN

Scart2_CIn

Video1_C_IN

Scart2_VideoIn

Video1_Y_IN

SAA7115_EN

18R
R419
0

R424

0
R422
0

R423

0

R421

0

R429

R433

NC R430NCR431

NC

R435

NC
R428
56R

NC

SAA7115_EN

3V3D

C470

C469

C468

+C467

10u

100n

100n

100n

3V3D

3V3A

99

3

97

2

11

75

TDI

TMS

TCK

TDO

TRSN

VDDE1VDDE25VDDE51VDDE

VDDA023VDDA117VDDA2

CE27VSSA024VSSA29VSSA115AGND21VXSS5VSSE26VSSI38VSSE50VSSI63VSSE76VSSI88VSSE

100

R436
100

GND

'Strapping' I2C Slave

C488

C485

C484

100n

100n

100n

VDDI33VDDI43VDDI58VDDI68VDDI83VDDI

SAA7115HL

LLC28LLC229RESON30RTS034RTS135RTCO36TEST044TEST173TEST2

C489
100n

C420

49
50
51

52
56

62
63
64

65
72
73

74
77

78
79
80

95
102
103
104
105
106
107
108
109
110
111
113

118
119
114

96

C453

0.1uF

R441

Open
C493
100n

U400A

TDA8759

REF_B/Pb
B/Pb3

B/Pb2
B/Pb1
BIAS

REF_G/Y
G/Y3

TDA8795

G/Y2

G/Y1
SOG/Y3

SOG/Y2
SOG/Y1
REF_R/Pr

R/Pr3
R/Pr2

R/Pr1
HE
COAST
GAIN
CLAMP
VSYNC1
VSYNC2
VSYNC3
HSYNC1
HSYNC2
HSYNC3
CKEXT
TCLK

SDA
SCL
DIS
A0

1.8Vpll

+C457

22u/10V

GND

3.3Vpll

+C458

22u/10V

GND

22u/10V

93

8

HPD072HPD171HPD270HPD369HPD467HPD566HPD665HPD764TEST377TEST478TEST5

VXDD

74

81

ITRU7

C494A

R443

100n

4.7K

ITRU6

ITRU5

ITRU4

ORR/V
ORB/U
ORG/Y

ITRU3

VP27
VP26
VP25
VP24
VP23
VP22
VP21
VP20

VP17
VP16
VP15
VP14
VP13
VP12
VP11
VP10

VP07
VP06
VP05
VP04
VP03
VP02
VP01
VP00

HREF

CKP

FREF

VREF

ITRU2

HS
VS

OE

PL

DE
CS

VAI

XPD090XPD189XPD287XPD386XPD485XPD584XPD682XPD7

ITRU0

ITRU1

C494
100n

44

ADUB7

43

ADUB6

42

ADUB5

41

ADUB4

40

ADUB3

39

ADUB2

36

ADUB1

35

ADUB0

32

ADYG7

31

ADYG6

28

ADYG5

27

ADYG4

26

ADYG3

25

ADYG2

24

ADYG1

23

ADYG0

18

ADVR7

17

ADVR6

16

ADVR5

15

ADVR4

10

ADVR3

9

ADVR2

8

ADVR1

7

ADVR0

1

168

4 5

169

3
2
1

2

RN402
47X4

94
166

GND

167
170

171
172
173

R415

174
175

4.7K

176

8759PowerDownHIGH:

8759PowerDown

8759Powerdown

79

31

32

22

SCL

SDA

AOUT

XRI192XRV91XCLK94XDQ95XRDY96XTRI80XTOUT

4

C4003

C4001

100n

100n

22X4

RN404A

1
2
3
4 5
1
2
3
4 5

22X4

RN408A

1
2
3
4 5
1
2
3
4 5

RN406A

1

22X4

2
3
4 5
1
2
3
4 5

RN406

22X4

6

7

8

MA1PPMA2PPMA3

PP

3.3Vcore

R408
100

1.8Vpll

3.3Vpll

C454

0.1uF

R425 100R/5%
R426 100R/5%

U402

54

IPD7

55

IPD6

56

IPD5

57

IPD4

59

IPD3

60

IPD2

61

IPD1

62

IPD0

42

ITRDY

45

ICLK

46

IDQ

47

ITR1

48

IGP0

49

IGP1

52

IGPV

53

IGPH

37

AMCLK

39

ASCLK

40

ALRCLK

41

AMXCLK

ALRCLK is used to seleted to 24.576MHZ crystal.

6

XTAL

7

XTAL1

SAA7115HL

TP406TP405

R450

22

3V3A

+ C4002

10u

GND

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

ADHS
ADVS

ADCLK

C4123
NC

1.8Vcore

3.3Vcore

3.3Vcca

3.3Vcore

3.3Vcca

C455

0.1uF

ADUB77
ADUB66
ADUB55
ADUB44
ADUB33
ADUB22
ADUB11
ADUB00

ADYG77
ADYG66
ADYG55
ADYG44
ADYG33
ADYG22
ADYG11
ADYG00

ADVR77
ADVR66
ADVR55
ADVR44
ADVR33
ADVR22
ADVR11
ADVR00

R456
NC

C4004

22P

3.3V_out

SCL_V
SDA_V

SVCLK

VHS

164

3
13
21
29
37
45
11

116
130
132
158

138
139
145
151
157

48
54
61
67
69
76
82
59

123

93
85

87
88

156
155
153
152
150
149
147
146
144
143
141
140
137
136
135
134
129
128
115

34
33
20
19

6

5

RN404

22X4

RN408
22X4

U400B

TDA8759

Vp
Vp
Vp
Vp
Vp
Vp
Vp
Vcore
Vcore

TDA8759

Vcore
Vcore
Vcore

Vcore
Vcore
Vcore
Vcore
Vcore
Vcca
VccA
Vcca
Vcca
Vcca
Vcca
Vcca
Vbias

Vi2c

PD
Vfro

Vpll_1.8v
Vpll_3.3v

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

24.576MHz

Y400

GND C404

ITRU[0..7]

Strapping' Clock

22P

OGND
OGND
OGND
OGND
OGND
OGND
OGND

DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND

AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND

AGND_pll
AGND_pll

DGNDi2c
DGNDi2c

TST17
TST16
TST15
TST14
TST13
TST12
TST11
TST10

When FLI2300 is not installed,where should SHREF be connected?

165
4
14
22
30
38
46

12
117
127
131
159
133
142
148
154

47

GND

53
55
57
58
60
66
68
70
71
75
81
83

84
86

120
126

GND

163
162
161
160
125
124
122
121
112

TST9

101

TST8

100

TST7

99

TST6

98

TST5

97

TST4

92

TST3

91

TST2

90

TST1

89

TST0

GND

GND

C4124
NC

SVCLK

ITRU[0..7]

Reset SAA7115 on the same time.

GND GND

ADUB11
ADUB22
ADUB33
ADUB44
ADUB55
ADUB66
ADUB77

RN401A

ADVR00
ADVR11
ADVR22
ADVR33
ADVR44
ADVR55
ADVR66
ADVR77

RN410A

ADYG00
ADYG11
ADYG22
ADYG33
ADYG44
ADYG55
ADYG66
ADYG77

RN400A

ADHS
ADVS12

ADCLK

+5V_SW

GND

4 5
3
2
1
4 5
3
2
1

22X4

RN410

4 5
3
2
1
4 5
3
2
1

22X4

RN400

4 5
3
2
1
4 5
3
2
1

22X4

3
4 5

RESET_2310

R445

10K/5%

C407
47uF/10V

VBLU0
VBLU1

6
7

VBLU2

8

VBLU3
VBLU4
VBLU5

6

VBLU6

7

VBLU7

8

22X4

VRED0
VRED1

6
7

VRED2
VRED3

8

VRED4
VRED5

6

VRED6

7
8

VRED7

22X4

VGRN0

6

VGRN1

7

VGRN2
VGRN3

8

VGRN4
VGRN5

6
7

VGRN6

8

VGRN7

RN411 22X4

8

VHS

VHS

7

VVS

VVS

6

VCLK

VCLK

ADUB00
ADUB11
ADUB22

ADUB33
ADUB44
ADUB55
ADUB66
ADUB77

ADVR00

ADVR11

ADVR22

ADVR33

ADVR44

ADVR55

ADVR66

ADVR77

ADYG00

TP402

DEVADDR1

DEVADDR0
SCL_V
SDA_V

RESET_2310

+3.3V_SW

R447

10K/5%

10K/5%

R446

2300OE#
DEVADDR1
DEVADDR0

+3.3V_SW

GND

+1.8V_SW

GND

+3.3V_SW

DECOUPLING FOR FLI2310

U405
LM1117DTX-3.3

VIN3TAB

C408

0.1uF

Leave 1sq inch- exposed copper area attached to Tab of U408

TO-252

ADHS
ADVS

ADCLK

ADYG11
ADYG22
ADYG33
ADYG44

ADYG55
ADYG66
ADYG77

R437 100R/5%

R438 100R/5%
R439 100R/5%
R442 100R/5%

23SDD0
23SDD1
23SDD2

R449

22R/5%

FB411

1 2

C471

0.1uF

0.1uF

FB412

1 2

C495

0.1uF

0.1uF
L412

5.6uH/5%

GND

C4111

0.1uF

4
2

GND

1

D

VBLU[7..0]

C

3.3VS23

GND

X400

13.5MHz

1 2

VSSio

GND

R401
470K/1%

193

3

R409 22R/5%

192

191

VDD9(3.3)

XTAL OUT

23SDD16

190

XTAL IN

23SDD17

TEST2

R410 22R/5%

189

TEST1

23SDD18

R411 22R/5%

188

TEST0

23SDD19

187

23SDD20

186

DAC_PVDD(3.3)

23SDD21

C401

22pF

0.1uF
C402

+ +

185

184

183

182

181

180

DAC_RSET

DAC_AVSS

DAC_VREFIN

DAC_GR_AVSS

DAC_VREFOUT

DAC_AVDD(3.3)

DAC_GR_AVDD(3.3)

FLI2310

23SDD25

23SDD23

23SDD24

23SDD26

23SDD22

GND

179

178

177

176

DAC_COMP

DAC_AVSSR

DAC_AVDDR(3.3)

23SDD27

23SDD29

23SDD28

C405
22uF/6.3V

175

174

173

DAC_ROUT

DAC_AVSSG

DAC_AVDDG(3.3)

23SDD30

23SDD31

172

171

170

DAC_GOUT

DAC_BOUT

DAC_AVSSB

DAC_AVDDB(3.3)

23SDA9

23SDA10

0.1uF
C403

169

168

167

DAC_VSS

DAC_PVSS

DAC_VDD(1.8)

23SDA7

23SDA8

C406
22uF/6.3V

DACRST#

166

165

164

163

AVSS_PLL_FE

AVSS_PLL_SDI

AVDD_PLL_FE(1.8)

AVDD_PLL_SDI(1.8)

23SDA5

23SDA6

C411 0.1uF

162

161

160

159

158

PLL_PVSS

AVSS_PLL_BE2

AVSS_PLL_BE1

G/Y/Y_OUT_7
G/Y/Y_OUT_6

AVDD_PLL_BE2(1.8)

AVDD_PLL_BE1(1.8)

G/Y/Y_OUT_5
G/Y/Y_OUT_4
G/Y/Y_OUT_3
G/Y/Y_OUT_2
G/Y/Y_OUT_1
G/Y/Y_OUT_0

R/Y/Pr_OUT_7
R/Y/Pr_OUT_6
R/Y/Pr_OUT_5
R/Y/Pr_OUT_4
R/Y/Pr_OUT_3
R/Y/Pr_OUT_2

VDDcore7(1.8)
R/Y/Pr_OUT_1
R/Y/Pr_OUT_0
B/U/Pb_OUT_7
B/U/Pb_OUT_6
B/U/Pb_OUT_5
B/U/Pb_OUT_4
B/U/Pb_OUT_3
B/U/Pb_OUT_2

B/U/Pb_OUT_1
B/U/Pb_OUT_0

VDDcore6(1.8)

SDRAM CLKIN

SDRAM CLKOUT

SDRAM DQM

SDRAM CASN
SDRAM RASN

SDRAM ADDR2

SDRAM ADDR1

SDRAM ADDR0

100

101

102

103

23SDA0

23SDA3

23SDA4

23SDA2

23SDA1

187R/1%

157

PLL_PVDD(1.8)

VSSio

VDD8(3.3)

VSScore

VSSio

VDD7(3.3)

CLKOUT

VSScore

CTLOUT4
CTLOUT3
CTLOUT2
CTLOUT1

CTLOUT0
TEST OUT1
TEST OUT0

TEST3
VSSio

VDD6(3.3)

SDRAM CSN
SDRAM BA0
SDRAM BA1

SDRAM WEN

104

23SDA[10..0]
23SDD[31..0]

R404

DAC1.8V
DAC3.3V
PLL1.8V

OE

GND

156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105

)257(67385326(,1&$6(

RDACOUT
GDACOUT
BDACOUT

R41675R/1%

1.8VS23

2300OE#
FLIGRN7
FLIGRN6
FLIGRN5
FLIGRN4
FLIGRN3
FLIGRN2
FLIGRN1
FLIGRN0

FLIHS

SDCKO

FLIRED7
FLIRED6
FLIRED5
FLIRED4
FLIRED3
FLIRED2
FLIRED1
FLIRED0

R41775R/1%

FLICLK

FLIHREF
FLIVS

2))/,21/<

R418

75R/1%

GND

VGRN[7..0]

FLICLK
FLIHREF
FLIHS

FLIVS

RN403

FLIBLU7
FLIBLU6
FLIBLU5
FLIBLU4
FLIBLU3
FLIBLU2
FLIBLU1
FLIBLU0

RN403A22X4

6
7
8

6
7
8

22X4

6
7
8

6
7
8

R432
22R/5%

R434
22R/5%

1 TP4031

1
2
3
4 5

R440100R/5%

RN409

RN405A

6
7
8

6
7
8

22

VGRN7

45
3

VGRN6
VGRN5

2

VGRN4

1

VGRN3

45

VGRN2

3
2

VGRN1
VGRN0

1

22X4

RN405

VRED7

45
3

VRED6

2

VRED5
VRED4

1

VRED3

45

VRED2

3
2

VRED1

1

VRED0

22X4

RN407

RN407A 22X4

1 TP400

23SDCLK
23SDDQM
23SDCS#
23SDBA0
23SDBA1
23SDCAS#
23SDRAS#
23SDWE#
23SDA[10..0]
23SDD[31..0]

8
7
6

22X4

VBLU7

45
3

VBLU6
VBLU5

2

VBLU4

1

VBLU3

45

VBLU2

3
2

VBLU1
VBLU0

1

GND

VCLK
VHS

VVS

1 TP401

1 TP404

C4125
NC

VRED7..0]

VBLU[7..0]

23SDCLK
23SDDQM
23SDCS#
23SDBA0
23SDBA1
23SDCAS#
23SDRAS#
23SDWE#
23SDA[10..0]
23SDD[31..0]

VCLK
VHS

VVS

VGRN[7..0]

VRED[7..0]

C400

22pF

GND

208

207

206

205

204

203

202

201

200

199

198

197

196

195

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

U401

HS_PORT2

HSYNC1_PORT1
VSYNC1_PORT1
FIELD ID1_PORT1
IN_CLK1_PORT1
HSYNC2_PORT1
VSYNC2_PORT1
FIELD ID2_PORT1
VDD1(3.3)
VSSio
IN_CLK2_PORT1
B/Cb/D1_0
B/Cb/D1_1
B/Cb/D1_2
B/Cb/D1_3
B/Cb/D1_4
VDDcore1(1.8)
VSScore
B/Cb/D1_5
B/Cb/D1_6
B/Cb/D1_7
R/Cr/CbCr_0
R/Cr/CbCr_1
R/Cr/CbCr_2
R/Cr/CbCr_3
R/Cr/CbCr_4
R/Cr/CbCr_5
R/Cr/CbCr_6
R/Cr/CbCr_7
G/Y/Y_0
VDD2(3.3)
VSSio
G/Y/Y_1
G/Y/Y_2
G/Y/Y_3
G/Y/Y_4
VDDcore2(1.8)
VSScore
G/Y/Y_5
G/Y/Y_6
G/Y/Y_7
IN_SEL
TEST
DEV_ADDR1
DEV_ADDR0
SCLK
SDATA
RESET_N
VDD3(3.3)
VSSio
SDRAM D0
SDRAM D1
SDRAM D2

VS_PORT2

FID_PORT2

D1_IN_7

D1_IN_6

D1_IN_5

D1_IN_4

D1_IN_3

D1_IN_2

VSScore

D1_IN_1

194

D1_IN_0

VDDcore8(1.8)

IN_CLK_PORT2

SDRAM D353SDRAM D454SDRAM D555SDRAM D656SDRAM D757SDRAM D858SDRAM D959SDRAM D1060SDRAM D1161VDD4(3.3)62VSSio63SDRAM D1264SDRAM D1365SDRAM D1466SDRAM D1567VDDcore3(1.8)68VSScore69SDRAM D1670SDRAM D1771SDRAM D1872SDRAM D1973SDRAM D2074SDRAM D2175SDRAM D2276SDRAM D2377SDRAM D2478SDRAM D2579VDDcore4(1.8)80VSScore81SDRAM D2682SDRAM D2783SDRAM D2884SDRAM D2985SDRAM D3086SDRAM D3187VDD5(3.3)88VSSio89TEST IN90SDRAM ADDR1091SDRAM ADDR992SDRAM ADDR893SDRAM ADDR794SDRAM ADDR695VDDcore5(1.8)96VSScore97SDRAM ADDR598SDRAM ADDR499SDRAM ADDR3

GND

23SDD3

23SDD8

23SDD12

23SDD11

23SDD13

23SDD7

23SDD6

23SDD4

23SDD5

23SDD15

23SDD14

23SDD9

23SDD10

NOTE: FLI2300 could be used in place of FLI2310

B

3.3VS23

+

C480

22uF/6.3V

1.8VS23

C4104

22uF/6.3V

DAC1.8V

PLL1.8V

C486

22uF/6.3V

C4105
22uF/6.3V

C474

C472

0.1uF

C496

0.1uF

C4112

0.1uF

C476

C479

C473

0.1uF

0.1uF

C498

C497

0.1uF

0.1uF

C4114

C4113

0.1uF

0.1uF

C478

C475

C477

0.1uF

0.1uF

0.1uF

0.1uF

+

C4103

C4100

C4102

C499

C4101

0.1uF

0.1uF

0.1uF

0.1uF

DAC3.3V

+

C4118

22uF/6.3V

C4117

C4116

C4115

0.1uF

0.1uF

0.1uF

+5V_SW

TO-252

U403
LM1117DTX-1.8

VIN3TAB

GND

1

+3.3V_DEC

C409
47uF/6.3V

C491

C492

47uF/10V

0.1uF

Leave 1sq inch- exposed copper area attached to Tab of U408

GND

+1.8V_SW

L409

5.6uH/5%

+ +

C487

0.1uF

L410

5.6uH/5%

GND

C4106

0.1uF

GND

+1.8V_SW

4
2

C490
47uF/6.3V

WHEN FLI2310 IS PRESENT

WHEN FLI2310 IS NOT PRESENT

ASSEMBLE RN700 TO RN707.

DO NOT ASSEMBLE RN710, RN711,RN712,RN713

ASSEMBLE RN710, RN711,RN712,RN713

DO NOT ASSEMBLE TO RN700 TO RN707.

A

1 2 3 4

Title

Number RevisionSize

B

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

654321

NC

R519

NC

R521A

NC

R521

C501A

D502
SMB05

C501

0.1uF

0.1uF

PBIAS

C503
100uF/35V

PBIAS

U502

LM2596-5.0

Feedback

1

Vin

output

ON/OFF

GND

5

3

4
2

1N5824

D501

L501
33uH

C519
470uF

+5V

R508
47K

3

1

Q501

2SC2712Y

2

R509

10K

R506

10K

R508A
NC

R502
47K

U501

LM2596-5.0

1

Vin

5

Feedback

ON/OFF

3

output

GND

4

33uH

2

+

C502A

D500
1N5824

C504

470uF

0.1uF

3

1

Q500
2SC2712Y

Panel_Power

GNDL

TP504L500

+24V_1A

C505

0.1uF

D

+12V_3A

C500
470uF

PPWR

C502

0.1uF

R501 10K

2

GND

TO-263

U503
LM1086CS-3.3

VIN3TAB

GND

1

+3.3V

4

2

C509

47uF/6.3V

GNDL

R503

0

GND GNDL

R504

0

GND

+5V

C506

C

47uF/10V

GND

C513

0.1uF

U505
LM1117DTX-2.5

TO-252

VIN3TAB

GND

1

4
2

C515

47uF/6.3V

GND

+5V

Leave 1sq inch- exposed copper area attached to Tab of U902
Leave room for heat sink

U504
LM1117DTX-1.8

VIN3TAB

SOD4001

D504

GND

C507
47uF/10V

C508

0.1uF

Leave 1sq inch- exposed copper area attached to Tab of U903

TO-252

GND

1

GND

+1.8V

4

1 2

+1.8V_CORE

FB500

2

C510

47uF/6.3V

+5V

C511
47uF/10V

Leave 1sq inch- exposed copper area attached to Tab of U905

R507A

+3.3V_ADC +3.3V_DVI

L505

B

2.2uH/0.5A/<1R

+1.8V

+1.8V_DVI

L504

2.2uH/0.5A/<1R

+3.3V_ADC

L507

2.2uH/0.5A/<1R

+3.3V_PLL

L510

2.2uH/0.5A/<1R

+3.3V_I/O_BGA+3.3V_ADC

+3.3V_ADC +3.3V_LBADC

L512

2.2uH/0.5A/<1R

R513
47K

R516
100K

GND

0

R507
47K

1

GND

+5V

R505

1.2/0.5W

C517

0.1uF

2SC2712Y

+5V_MCU

+5V

3

2

GND

Q503

R510
22K

Q502
2SC2712Y

GND

L503

+1.8V_ADC

L508

2.2uH/0.5A/<1R

+3.3V_LVDSB

L509

2.2uH/0.5A/<1R

L511

+3.3V_DIG

POWER_OFF

POWER_OFF

R514
47K

R517
100K

Q505

2SC2712Y

+3.3V_LVDS+3.3V_LVDSA

+3.3V_ADC

2.2uH/0.5A/<1R

+3.3V_ADC +3.3V_ADC +3.3V_ADC

+1.8V

L506

2.2uH/0.5A/<1R

2.2uH/0.5A/<1R

GND

+5V

Backlight_on_off

R511
47K

32V-EN

+3.3V

GND

CP7
1u

DP3

BAS62-A13

CP8
1u

DP4

BAS62-A13

1
2
3
4

3

3

CP21

50V100uF

U507

S1
G1
S2
G2

IRF7314

SO-8

12

12

+32V

GND

3

3

D1
D1
D2
D2

12

12

+32V

CP31

0.1uF

+2.5V_DDR

8
7
6
5

DP3A
BAS62-A13

DP4A

BAS62-A13

RP4

2.2k/0.5W

DP2
UPC574

GND

+3.3V_SW

CP9
1u

CP10
1u

+3.3V_ADC

3

+1.8V

+50V

1 2

D506

BAV99

D

C

B

+5V_4A

U508

S1
G1
S2
G2

IRF7314

SO-8

+5V_ANG

8

D1
D1
D2
D2

+5V_SW

7
6
5

A

Leave 1sq inch- exposed copper area attached to Tab of U907

U506

C514

0.1uF

LM1117DTX-3.3

TO-252

VIN3TAB

GND

1

4
2

+5V

C512

A

47uF/10V

+3.3V_ADC

GND

C516

47uF/6.3V

R515
47K

GND

R518
100K

Q504
2SC2712Y

R512
47K

GND

1
2
3
4

Title

Number RevisionSize

C

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

1 2 3 4 5 6

4321

CA2

100uF/16V

RA11
470K

CA44 1u

CA45
1u

RA4
RA5

RA6

+12V_DC

+

GND

2SA1015Y

CA46 1u
CA47 1u
CA48 1u

QA1

CA3

0.1u

RA2
10K

MUTE

GND

+12Vaudio_ctrl

RA3
150K

Low is mute/shutdown.

RA55
RA7
RA8

4.7k
10k

15k

+12V_AUDIO

CA55

0.1u
CA37

220uF/16V

CA38
10n

+

CA39
10n

37

38

39

40

41

42

43

44

45

46

47

48

BSRN

PVCCR

PVCCR

ROUTN

1

SD

2

RINN

3

RINP

4

V2P5

5

LINP

6

LINN

7

AVDDREF

8

VREF

9

VARDIFF

10

VARMAX

11

VOLUME

12

REFGND

+12V_AUDIO +12V_AUDIO

CA35

0.1u
CA40
10n

TPA3002D2

BSLN13PVCCL14PVCCL15LOUTN16LOUTN17PGNDL18PGNDL19LOUTP20LOUTP21PVCCL22PVCCL23BSRP

PGNDR

PGNDR

ROUTN

ROUTP

PVCCR

PVCCR

ROUTP

CA41
10n

BSRP

MODE_OUT

24

LA1
33uH

U6

TPA3002D2

VCLAMPR

MODE

AVCC
VAROUTR
VAROUTL

AGND

AVDD

COSC
ROSC

AGND

VCLAMPL

LA2
33uH

CA50

CA36

0.1u

Mode_in

+5VE

RA54
120K

SPDIF_SW

CA24

0.1uF

CA25

0.1uF

+12V_AUDIO

CA34

0.1u
CA51 100n

CA42

0.47uF

+12V_AUDIO

CA33

0.1u

CA49
1u

36
35
34
33
32
31
30
29
28
27
26
25

1u

High is shut down the erphone

CA10 10u

+

CA52 220P

1
2

CE3

0.47u

JP7

CON2

RE1
10K

CE1
1u

1
2
3

RE2
10K

CE2

RE4

1u

10K

RE3
10K

BYP
GND

VO1

SD

AVDD

IN24VO2

UE1
TPA6110A2

IN1

When mode_in is Low,AMP is in class_D.
And the Mode_out is output High.

RE5
10K

8
7

+5VE

6

5

CA27

0.1uF

RE6
10K

CE4
100u

+

CE5
100u

+

RA14
120K

Mode_in

SPDIF/L

4
3
2

1

JP2
CON-4

D

C

B

+12V_3A

RA1
10

D

DA1

NC

RA15
470K

+24V_4A

C

B

+

CA53

47uF/16V

W05Z6.8B

DA3

MUTE

MOL

MOR

DA2

2CK75D

RA50
100K

MOL

MOR

15K
15k

10k

LA3
33uH

CA26

JUMP

RA0

A

1 2 3 4

LA4
33uH

CA43

0.47uF

0.1uF
CA28

0.1uF

JP8

1
2

CON2

Title

Number RevisionSize

A4

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

RE7
1K

RE8
1k

A

+2.5V_DDR

654321

C603

C600

D

47uF/6.3V

C602

0.1uF

0.1uF

C604

0.1uF

C605

0.1uF

C606

0.1uF

C607

0.1uF

C608

0.1uF

C609

0.1uF

C610

0.1uF

C611

0.1uF

C612

0.1uF

C613

0.1uF

C614

0.1uF

C615

0.1uF

D

GND

L600

FSADDR[0..11]

FSBKSEL0
FSBKSEL1

FSCLK-

FSCLK+

FSCKE

/FSRAS
/FSCAS

/FSWE

FSDATA[0..31]

FSADDR0
FSADDR1
FSADDR2
FSADDR3
FSADDR4
FSADDR5
FSADDR6
FSADDR7
FSADDR8
FSADDR9
FSADDR10
FSADDR11

FSBKSEL0
FSBKSEL1

FSCLK­FSCLK+
FSCKE

/FSRAS
/FSCAS
/FSWE

FSDQS

GND

31

32
33
34
47
48
49
50
51
45
36
37

29
30

54
55
53
28
27
26
25
94

FSDQM0

23

FSDQM1

56

FSDQM2

24

FSDQM3

57

38
39
40
41
42
43
44
87
88
89
90
91
93

MT46V2M32LG-4

TQFP-100

+2.5V_DDR

A0

A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11

BA0
BA1

CLK
CLK
CKE
CS
RAS
CAS
WE
DQS

DM0
DM1
DM2
DM3

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DNC
NC

+2.5V_DDR

73

79

VDDQ2VDDQ8VDDQ14VDDQ22VDDQ59VDDQ67VDDQ

VSSQ5VSSQ11VSSQ

VSSQ70VSSQ76VSS16VSS46VSS

VSSQ

62

82

19

GND

R600
10K

86

VDDQ

U600

FSVREF

C617

0.1uF

GND

97
98
100
1
3
4
6
7

60
61
63
64
68
69
71
72

9
10
12
13
17
18
20
21

74
75
77
78
80
81
83
84

FSDATA0
FSDATA1
FSDATA2
FSDATA3
FSDATA4
FSDATA5
FSDATA6
FSDATA7

FSDATA8
FSDATA9
FSDATA10
FSDATA11
FSDATA12
FSDATA13
FSDATA14
FSDATA15

FSDATA16
FSDATA17
FSDATA18
FSDATA19
FSDATA20
FSDATA21
FSDATA22
FSDATA23

FSDATA24
FSDATA25
FSDATA26
FSDATA27
FSDATA28
FSDATA29
FSDATA30
FSDATA31

23SDA[10..0]

23SDDQM

23SDWE#

23SDCAS#

23SDRAS#

+3.3V_SW

23SDBA0

23SDBA1

23SDCS#

23SDCLK

23SDA[10..0]

23SDA0

23SDA1
23SDA2
23SDA3

23SDA4
23SDA5
23SDA6
23SDA7

23SDA8
23SDA9
23SDA10

23SDDQM

23SDBA0

23SDBA1

23SDWE#

23SDCAS#

23SDRAS#

23SDCS#

23SDCLK

R6011K

23SDD[31..0]

25
26
27
60

61
62
63
64

65
66
24

14
21
30
57
69
70
73

16

71
28

59

22

23

17

18

19

20

68

67

23SDD[31..0]

3.3VSDRAM2

U601

A0
A1
A2
A3

A4
A5
A6
A7

A8
A9
A10

NC
NC
NC
NC
NC
NC
NC

DQM0

DQM1
DQM2

DQM3

BA0

BA1

WE

CAS

RAS

CS

CLK

CKE

FB600

1

29

VDD

VDD15VDD

SDRAM-64MBX32

86 PIN TSOP

VSS86VSS72VSS

58

12

12

43

VDD

VDDQ3VDDQ9VDDQ35VDDQ41VDDQ

VSSQ6VSSQ32VSSQ12VSSQ

VSS

44

GND

FSVREF

58

65

96

DQ0

VDD15VDD35VDD

VDD

VREF

VDDQ95VDDQ

VSSQ99VSSQ92VSSQ

DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23

DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

MCL

VSS

52

66

85

FSVREF

FSVREF

FSDATA[0..31]

FSADDR[0..11]

C

FSDQM[0..3]

FSDQM[0..3]

FSDQS

B

FB601

GND

38

49

VSSQ

46

5.6uH/5%

C616
47uF/6.3V

3.3VSDRAM1

81

VDDQ55VDDQ75VDDQ

VSSQ52VSSQ78VSSQ

84

+3.3V_SW

DQ0
DQ1
DQ2
DQ3

DQ4
DQ5
DQ6
DQ7

DQ8

DQ9
DQ10
DQ11

DQ12
DQ13
DQ14
DQ15

DQ16
DQ17
DQ18
DQ19

DQ20
DQ21
DQ22
DQ23

DQ24
DQ25
DQ26
DQ27

DQ28
DQ29
DQ30
DQ31

MT48LC2M32B2TG-5

23SDD0

2

23SDD1

4

23SDD2

5

23SDD3

7

23SDD4

8

23SDD5

10

23SDD6

11

23SDD7

13

23SDD8

74

23SDD9

76

23SDD10

77

23SDD11

79

23SDD12

80

23SDD13

82

23SDD14

83

23SDD15

85

23SDD16

31

23SDD17

33

23SDD18

34

23SDD19

36

23SDD20

37

23SDD21

39

23SDD22

40

23SDD23

42

23SDD24

45

23SDD25

47

23SDD26

48

23SDD27

50

23SDD28

51

23SDD29

53

23SDD30

54

23SDD31

56

C

B

R602
10K

GND

FSCLK+

A

FSCLK-

3ODFHWKLVSDUDOOHOWHUPLQDWLRQFORVHWRFRUUHVSRQGLQJPHPRU\,&3LQV

R603

150(140)

3.3VSDRAM1

3.3VSDRAM2

GND

C618

0.1uF

C626

0.1uF

GND

C619

0.1uF

C627

0.1uF

C620

0.1uF

C628

0.1uF

C621

0.1uF

C629

0.1uF

C622

0.1uF

C623

0.1uF

C624

0.1uF

C625

0.1uF

A

Title

Number RevisionSize

Orcad C

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

1 2 3 4 5 6

Component Video Inputs

AV_IN

YPbPr

4321

Pr

1

JPY1

AV-1-3PKA

5
2

Pb

6

Y

3
4
7

D

GND

3

JPY3

2

YPbPr Left Audio

YPbPr Right Audio

AV-1

JPY2

AV-1

RY4
22K

1

3
2
1

RY5
10k

RY6
22K

RY7
10k

C

0

20

AUDIO

GND

19

+5V

18

VIDEO

17

AGC

16

SIF

15

NC
SW1

SW0

IF

UT1

TM14-C22P2RW

IF

NC

30V
AFT

+5V

NC

B

SDA

SCL

ADD

NC

AGC

RT8
100

RT7
100

+32V

UOC_SW1
UOC_SW0

CT7

0.1u

14
13

12
11

10

9
8

7

6

RT5

5

100
RT4

4

100

3

CT8

0.1u

UOCIII_SDA

UOCIII_SCL

+5V-T1

2

1

0

11

IF

GND

10

NC

9

33V

8

NC

7

+5V

ADD

+5V

SDA

AGC

6

5
4

SCL

3

2

UT

1

UT2

TAD5-E2122W

A

Tuner_IF

+32V

RT6
NC

CT3

0.1u

CT6

0.1u

RT2

UOCIII_SDA

100
RT1

UOCIII_SCL

100

CT5

0.1u

Pr

RY3

82

Y

RY1
82

Pb

RY2

82

YPbPr_L

YPbPr_R

+5V-T1

SubchannelTV

UOC_SW1

UOC_SW0

+ CT11

CT1

CT9

0.1u

0.1u

Tuner_IF

+5V-T2 +5VB

+ CT2

CT4

470u

0.1u

UOCIII_SDA

UOCIII_SCL

AGC

AGC

470uF

LT1
22uH

LT2
22uH

CT10

0.1u

+5VB

CT12

0.1uF

+ CT15

470uF

+ CT16

470u

S-VIDE

AVP1
AV-3-1

AVP2
AV-3-1

AV-OU

Y1

3 2

D

C

B

CA24

10uF

CA25
10uF

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25

+

+

1
2
3
4
5
6
7
8
9

+12V_PORT

+12V_PORT

RA37
12k

RA40

6.8k

J1A

50PIN_12

RA51
10K

QA6
2SC1162Y

RA49
180

QA1
2SC2712C

CA26

+

10uF

RA39
1k

RA38
12k

QA8
2SC2712C

RA48
180

RA34

6.8k

CA31

0.1uF

CA2

16V470uF

QA2
2SC2712C

RA35
1k

CA27

10uF

CA28
100uF

+

RA8

VOUT

82

+

CA29

0.1uF

ROUT

LOUT

V1

1

5
2

6
3
4
7

CA1

100P

L1
R1

CA3

100P

RA10
100 10改 为

RA1
82

RA11
10K

RA2
22K

RA12

10K
RA3
22K

1

5
2

6
3
4
7

J3

C1

14

CA41000P

J

6 5

RA4

100 10改 为

RA5
82

L1 56UH

RA6

4.7k

+5VB

VIN

LIN

RIN

VOUT

LOUT
ROUT

YIN

RA7

CIN

100 10改 为

RA9
82

K

Y
Pb
Pr
LIN
RIN
YPbPr_L
YPbPr_R
AVOUTL

AVOUTR

+32V

SubchannelTV

UOC_SW0
UOC_SW1
Tuner_IF UOCIII_SDA
AGC

J1B

26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

+12V_dc

VIN

AV_VOUT

K
CIN

YIN

UOCIII_SCL

AV_VOUT

+5VB

AVOUTL

AVOUTR

+12V_dc

AV_VOUT

RA36
100

AVOUTL

AVOUTR

50PIN_12

A

Title

Number RevisionSize

B

Date: 13-Apr-2005 Sheet of

1 2 3 4

File: E:\USER\MJ\LP08\YLT-chn\LS08 -CHINA-0923.ddb辅板 Drawn By:

4

MUX / CONNECTORS

654321

D

2.3~3.0:source

2.67V

KK1

C

SOURCE

R1
27K

KK2

MENU

VOL++

KK3

R2
10K

KK4

VOL---

R3
10K

KK5

CH--

0~0.8v: STANDBY++0.81~1.6v:VOL--1.61~2.3v:MENU

0.3V1.2V2.0V

R4

4.7K

KK6

POWER

R5

4.7K

KK7

CH+ NO KEY PRESS 3V~3.3v

R6
1K

GND
GND

R7
1K

JK1

1
2
3
4

CN-4

D

C

0.3V1.2V2.0V

0~0.8v: CH++0.81~1.6v:CH--1.61~2.6v:VOL+

B

A

Title

Number RevisionSize

B

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08 -CHINA-0923.ddb辅板 Drawn By:

1 2 3 4 5 6

B

A

654321

D

+3.3V_DIG

LK1
22UH

JK2

5

UK1

C

HS0038A2M3V

GND

OUT

1

Vs

CK1

2

16V-47U

3

CK2

+

0.1UF

L1

GREEN RED

1 2

LIGHT

3

IRDATA
LED2
LED1

+3.3V_DIG

4
3
2
1

CN-5

D

C

B

A

Title

Number RevisionSize

B

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08 -CHINA-0923.ddb辅板 Drawn By:

1 2 3 4 5 6

B

A

4321

L3

3.3uH

C1

D

330pF

C2
330pF

R5
82

+5VOUT

D

L1

3.3uH

C3
330pF

R16
1K

C6
330pF

+5V

R7
10k

Q2
2SC2712C

C9
100pF

C10
100pF

R17

1K

C8

R3
82

AUDIO-L-IN

AUDIO-R-IN

16V-10U

+

R4
82

C

13

K

11

Y

10

S

B

J3

AVW133RD-1S

A

9
8

C

12
1

5
2

6
3
4
7

L2

3.3uH
C5

330pF

R12
10K

R19
22K

R15
10K

R20
22K

C4
330pF R1

Q3
2SC2712C

C7

16V-10U

82

+5V

+

R8
10k

+5VOUT

82

R18
1K

R13
10k

R14
10k

R2

R6
10K

R9
10K

Q5
2SC2712C

R21
330

+5V

Q1
2SC2712C

Q4
2SC2712C

R22

47

C13

0.1uF

+5VOUT

+

SVIDEO-C-IN

AUDIO-L-IN

AUDIO-R-IN

C12
16V100U

Title

EARPHONE-R

EARPHONE-L

+5V

R10
10K

PH-SW

J2

1
2
3
4
5
6
7
8
9

CON-9

4
3
2
1

J1

K
R
L
G

W3F4P-D

1
2
3
4

J4

CN-4

R11
10K

+5V

C

B

A

Number RevisionSize

A4

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS 08 -CHINA-0923.ddb辅板 Drawn By:

1 2 3 4

4321

JP1

CON-10

D

+12V_3A

10
9
8
7

+5V_MCU

+5V_4A

6
5
4
3
2
1

StandBy_power

For GM1601 Board supply. +5V_4A

For panel supply.

+

+5V

RP2
22k

CP13

470uF

CP2

0.1uF

+5V_4A

CP15

0.1uF

32V-EN

470uF

LP3
22uH+5VB

VCC5A

D

+CP3

CP4

0.1uF

CP5

0.1uF

+

J171
NC

CP6

470uF

1
2

C
3
4
5
6
7
8

IRDATA/SCL

State/SDA

B

V3_3A

CP18

0.1uF

JP9

JP11

+24V_1A

8
7
6
5
4
3

+12V_3A

2
1

C

CON-8

CON-14 1

JP12

+24V_4A

+5VB

14
13
12
11
10
9
8
7
6
5
4
3
2
1

JP10

CON-14

6
5
4

+24V_4A

CN-6

3
2
1

RP6
nc

RP5

nc

CP34A

0.1uF

+5VB

RP10

NC

Backlight_on_off

Brightness

RP11

CP32

0

UP3

IRF7134

S1
G1
S2
G2

0.1uF

D1
D1
D2
D2

+12V_AUDIO

8
7
6
5

RP11 RP10

CHIMEI: 0 NC

B

+12V_3A

RA53

0.27/0.5W

LG 30: NC OK
LG 26: 2.2k 1k
AU 26: 1K 3.3k

1
2
3

+12Vaudio_ctrl

4

+24V_4A

14
13
12
11
10
9
8
7
6
5
4
3
2

CP26

0.1uF

CP34

0.1uF

+5VB

Backlight_on_off

Low is Normal on mode.
High is standby mode.

QP2

2SC1815Y

Backlight_on_off

Standby

RP8
10k

DP6

SOD4001

+24V_1A

CP35

0.1uF

UP7

LM1117-1.8V

3

GND

VIN

CP23

0.1uF

CP36
100uF/35V

4

4

OUT

1

2

GND

1

DVD_On/Off

UP4

Si2311DS

GND

GND

CP20

CP24

0.1uF

LM2596-5.0

Vin

V1_8V1

GND

UP6

Feedback

ON/OFF

5

DVD_On/Off

2

1

CP22
47uF

output

GND

3

R6
0

V1.8CONTROL

4
2

DP1

1N5824

V1_8ANA

3

P_CHANNEL

1
2
3
4

+5VB

LP1
33uH

UP2
IRF7314+5VB

S
S
S
G

VIN

3

D
D
D
D

LM1117-3.3V

4

4

OUT

2

CP11

0.1uF

8
7
6
5

UP1

1

GND

CP37

0.1uF

CP14

10V100uF

CP1

0.1uF

D3.3V

IRDATA/SCL

State/SDA

LP5
10uH

0.1uF

GND

GND

CP16

0.1uF

CP17

10V100uF

A

Title

A

Number RevisionSize

A4

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

1 2 3 4

654321

OCMDATA[0..7]

OCMDATA[0..7]

+3.3V_DIG

D

OCMADDR[0..19]

OCMADDR[0..19]

/OCM_WE

/OCM_RE
/ROM_CS

/OCM_WE
/OCM_RE
/ROM_CS

+3.3V_DIG

C

R802

/RESET3.3V

/ROM_CS

678

678

4.7K

29LV800BT

OCMADDR19
OCMADDR18
OCMADDR17
OCMADDR16
OCMADDR15
OCMADDR14
OCMADDR13
OCMADDR12
OCMADDR11
OCMADDR10
OCMADDR9
OCMADDR8
OCMADDR7
OCMADDR6
OCMADDR5
OCMADDR4
OCMADDR3
OCMADDR2
OCMADDR1

/OCM_RE
/OCM_WE

U801

13

14

C800

47uF/6.3V

+3.3V_DIG

GND

C801

0.1uF

16

A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

OE#
WE#

RST#

CE#

VCC37VPP

17
48

1
2
3
4
5
6
7

8
18
19
20
21
22
23
24
25

28
11

12

26

WP#

BYTE#

A-DQ15

A20/NC
A19/NC

RY/BY#

DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VSS
VSS

47
45

OCMADDR0

43
41
39
36
34
32
30
44

OCMDATA7

42

OCMDATA6

40

OCMDATA5

38

OCMDATA4

35

OCMDATA3

33

OCMDATA2

31

OCMDATA1

29

OCMDATA0

10
9

15
27

46

D

C

RN800
10k

123

4 5

123

B

RN801

RN801A

10K

1
2
3
4 5
1
2
3
4 5

10K

R800 10K
R801 10K

8
7
6

8
7
6

INT_OSC
8-BIT_FLASH2

8-bit_flash1
8-bit_flash3

OCMADDR10
OCMADDR11
OCMADDR9
OCMADDR8
OCMADDR13
OCMADDR14
OCMADDR12
OCMADDR15

OCMADDR16
OCMADDR18

OCMADDR17

A

OCMADDR19

4 5

RN800A
10KX4

Custom1
Custom2

Serial Interface Debug1
Serial Interface Debug2

Serial Interface Debug3

BOOTSTRAP HEADER
OPEN=1
SHUNTED=0

R803
10K

GND

R804 0
R805 0
R806 0
R807 NC

10: LOW (Use TCLK)

11: LOW (set all display output to '0')
12: LOW
13: LOW(disable serial interface debug)
14: LOW
15: LOW
16: HIGH (use crystal)
17: LOW (8bit bus with OCM access external ROM)
18: HIGH
19: LOW

B

A

Title

GND

GND

Number RevisionSize

Orcad B

Date: 13-Apr-2005 Sheet of
File: E:\USER\MJ\LP08\YLT-chn\LS08_MAIN_TDA8759-20050223.DdbDrawn By:

1 2 3 4 5 6