Acer AL2032W Schematic

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Acer AL2032W
Service Guide
Service guide files and updates are available on the CSD web: for more information, Please refer to http://csd.acer.com.tw/
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Copyright
Copyright © 2004 by Acer Incorporated. All rights reserved. No part of this publication may be reproduced,
transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in
any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual or otherwise, without the
prior written permission of Acer Incorporated.
Disclaimer
The information in this guide is subject to change without notice. Acer Incorporated makes no representations or
warranties, either expresses or implied, with respect to the contents hereof and specifically disclaims any
warranties of merchantability or fitness for any particular purpose, Any Acer Incorporated software described in
this manual is sold or licensed “as is ”. Should the programs prove defective following their purchase, the buyer
(and not Acer Incorporated, its distributor, of its dealer) assumes the entire cost of all necessary servicing, repair,
and any incidental or consequential damages resulting from any defect in the software.
Acer is a registered trademark of Acer Corporation.
Intel is a registered trademark of Intel Corporation.
Pentium and Pentium II/III are trademarks of Intel Corporation.
Other brand and product names are trademarks and/or registered trademarks of their respective holders.
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Conventions
The following conventions are used in this manual:
Screen messages
Note
Warning
Caution
Important
Denotes actual messages that appear on screen
Gives bits and pieces of additional information related to the current topic.
Alerts you to any damage that might result from doing or not doing specific actions.
Gives precautionary measures to avoid possible hardware or software problems.
Reminds you to do specific actions relevant to the accomplishment of procedures.
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Preface
Before using this information and the product it supports, please read the following general information.
1. this Service Guide provides you with all technical information relating to the BASICCONFIGURATION
decided for Acer’s “global” product offering. To better fit local market requirements and enhance product
competitiveness, your regional office MAY have decided to extend the functionality of a machine (e.g.
add-on card, modem, or extra memory capability). These LOCALIZED FEATURES will NOT be covered
in this generic service guide. In such cases, please contact your regional offices or the responsible
personnel/channel to provide you with further technical details.
2. please not WHEN ORDERING FRU PARTS, that you should check the most up-to-date information
available on your regional web or channel. If, for whatever reason, a part number change is made, it will
not be noted in the printed Service Guide, for ACER-AUTHORIZED SERVICE PROVIDERS, your Acer
office may have a DIFFERENT part number code to those given in the FRU list of this printed Service
Guide. You MUST use the list provided by your regional Acer office to order FRU parts for repair and
Service of customer machines.
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WARNING: (FOR FCC CERTIFIED MODELS)
NOTE: this equipment has been tested and found to comply with the limits for a Class B digital device,
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy,
and if not installed and used in accordance with the instructions, may cause harmful interference to radio
communications. However, there is no guarantee that interference will not occur in a particular installation. If this
equipment does cause harmful interference to radio or television reception,
Which can be determined by turning the equipment off and on, the user is encouraged to try to correct the
interference by one or more of the following measures:
1. Reorient or relocate the receiving antenna.
2. Increase the separation between the equipment and receiver.
3. Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
4. Consult the dealer or an experienced radio/TV technician for help.
NOTICE:
1. The changes or modifications not expressly approved by the party responsible for compliance could void
the user’s authority to operate the equipment.
2. Shielded interface cables and AC power cord, if any, must be used in order to comply with the emission limits.
3. The manufacturer is not responsible for any radio or TV interference caused by unauthorized modification to
this equipment. It is the responsibility of the user to correct such interference.
®
As an ENERGY STAR
guidelines for energy efficiency.
Partner our company has determined that this product meets the ENERGY STAR
®
WARNING:
To prevent fire or chock hazard, do not expose the monitor to rain or moisture. Dangerously high voltages are
present inside the monitor. Do not open the cabinet. Refer servicing to qualified personnel only.
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PRECAUTIONS
Do not use the monitor near water, e.g. near a bathtub, washbowl, kitchen sink, laundry tub,
Swimming pool or in a wet basement.
Do not place the monitor on an unstable trolley, stand, or table. If the monitor falls, it can injure a person and
cause serious damage to the appliance. Use only a trolley or stand recommended by the manufacture or
sold with the monitor. If you mount the monitor on a wall or shelf, use a mounting kit approved by the
manufacture and follow the kit instructions.
Slots and openings in the back and bottom of the cabinet area provided for ventilation. To ensure reliable
operation of the monitor and to protect it from overheating, be sure these openings are not blocked or
covered. Do not place the monitor on a bed, sofa, rug or similar surface. Do not place the monitor near or
over a radiator or heat register. Do not place the monitor in a bookcase or cabinet unless proper ventilation
is provided.
The monitor should be operated only from the type of power source indicated on the label. If you are not
sure of the type of power supplied to your home, consult your dealer or local power company.
The monitor is equipped with a three-pronged grounded plug, a plug with a third (grounding) pin. This plug
will fit only into a grounded power outlet as a safety feature. If your outlet does not accommodate the
three-wire plug, have an electrician install the correct outlet, or use an adapter to ground the appliance
safely. Do not defeat the safety purpose of the grounded plug.
Unplug the unit during a lightning storm or when it will not be used for long periods of time. This will protect
the monitor from damage due to power surges.
Do not overload power strips and extension cords. Overloading can result in fire or electric shock.
Never push any object into the slot on the monitor cabinet. It could short circuit parts causing a fire or
electric shock. Never spill liquids on the monitor.
Do not attempt to service the monitor yourself; opening or removing covers can expose you to dangerous
voltages and other hazards. Please refer all servicing to qualified service personnel.
To ensure satisfactory operation, use the monitor only with UL listed computers which have appropriate
configured receptacles marked between 100-240V AC, Min. 3.5A.
The wall socket shall be installed near the equipment and shall be easily accessible.
For use only with the attached power adapter (output 12V DC) which have UL,CSA listed license
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SPECIAL NOTES ON LCD MONITORS
The following symptoms are normal with LCD monitor and do not indicate a problem.
NOTES
Due to the nature of the fluorescent light, the screen may flicker during initial use. Turn off the Power Switch
and then turn it on again to make sure the flicker disappears.
You may find slightly uneven brightness in the screen depending on the desktop pattern you use.
The LCD screen has effective pixels of 99.99% or more. It may include blemishes of 0.01% or less such as a
missing pixel or a pixel lit all of the time.
Due to the nature of the LCD screen, an afterimage of the previous screen may remain after switching the
image, when the same image is displayed for hours. In this case, the screen is recovered slowly by changing
the image or turning off the Power Switch for hours.
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Table of contents
Chapter 1 MONITOR FEATURE ………………………………………………………….9
Chapter 2 OPERATING INSTRUTION …………………………………………………….15
Chapter 3 Machine assembly ……………………………………………………………21
Chapter 4 TROBLE SHOOTING ………………………………………………………….27
Chapter 5 CONNECTOR INFORMATION ……………………………………………….29
Chapter 6 FRU LIST ………………………………………………………………………..30
Chapter 7 SCHEMATIC DIAGRAM …………………………………………………………31
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Monitor Feature
Chapter 1
Driving system TFT Color LCD
Size 20.1” wide
Pixel pitch 0.258 mm
Viewable angle 178(H) x 178 (V) degree
Brightness LG panel: 300 cd/m2(typ)
Contrast Ratio 600:1 (typ)
LCD Panel
Input
H-Frequency 31-81KHZ
V-Frequency 50-75HZ
Display Color 16.7 million Colors
Maximum Dot Clock ® 162MHz
Max Resolution 1680X1050@60HZ
Plug & Play VESA DDC2B
EPA ENERGY STAY
Audio output Rated Power 5.0W rms(Per channel)
Input Connector D-Sub 15 pin, or DVI-D cable
Input Video Signal Analog : 0.7Vp-p,75OHM
Response time 16ms (Tr+Tf)
Video R,G,B Analog & DVI box (optional)
Separate Sync H/V TTL
ON Mode <75W
OFF Mode <3W
Horizontal : 433.4mm
Screen Size (Active)
Power Source 90~240 Vac, 50~60HZ
Environmental
Considerations
Weight (N.W.) 6.8kg
Dimension 510.3(W) x 443.9(H) x 206.6D) mm
Vertical : 270.9mm
Operating Temp : 5 to 40 degree ;
Storage Temp : -20 to 60 degree ;
Operating Humidity : 15% to 85%
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* Power Switch
* MENU/ENTER
* / Volume
* / Volume
Switch
* Auto Adjust KEY
Function
External Controls :
* Contrast/brightness
* Focus
* Clock
* H.Position
* W.Position
* Language
* OSD Color temperature
* OSD Position & Timeout
* Auto Config
* Input
* Information
* Reset
* Exit
Regulatory Compliance cUL, FCC, TUV, CE, ISO13406-2
Timeings
The product has 29 memory modes in total. 19 modes are preset and 10 modes
are user definable.
MODE NO. 1 2 3 4
RESOLUTION
Dot clock(MHz)
f h
H-Total ( us ) 31.78(900dots) 31.778 (800 dots) 28.571(864 dots) 26.413 (832 dots)
H-Sync ( us ) 3.813(108dots) 3.813 (96 dots) 2.116 (64 dots) 1.270(40 dots)
H-B-P ( us ) 1.907(54dots) 1.907 (48 dots) 3.175 (96 dots) 4.064(128 dots)
H-Active ( us ) 25.42(720dots) 25.422 (640 dots) 21.164 (640 dots) 20.317(640 dots)
720 x 400 640 x 480 640x480 640 x 480
28.321 25.175 30.24 31.5
31.469kHz 31.469kHz 35.0kHz 37.861kHz
H-F-P ( us ) 0.636(18dots) 0.636 (16 dots) 2.116 (64 dots) 0.762(24 dots)
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f v
70Hz(70.087) 60Hz (59.940) 66.7 HZ (66.667) 72.809Hz
V-Total (ms ) 14.27(449 lines) 16.683 (525 lines ) 15.000 (525 lines ) 13.735(520 lines)
V-Sync ( ms ) 0.064(2 lines) 0.064 (2 lines ) 0.086 (3 lines ) 0.079(3 lines)
V-B-P (ms ) 1.112(35 lines) 1.049 (33 lines ) 1.114 (39 lines ) 0.739(28 lines)
V-Active ( ms ) 12.71(400 lines) 15.253 (480 lines ) 13.714 (480 lines ) 12.678(480 lines)
V-F-P ( ms ) 0.384(12 lines) 0.317 ( 10 lines) 0.086 (3 lines ) 0.237(9 lines)
SYNC. H/V -/+ - / - +/+ -/-
POLARITY
Or -/-
SEP . SYNC Y Y Y Y
MODE NO. 5 6 7 8
RESOLUTION
640 x 480 800 x 600 800 x 600 800 x 600
Dot clock(MHz)
31.5 36 40 49.5
f h
37.500kHz 35.16kHz 37.879kHz 46.875kHz
H-Total ( us ) 26.667(840 dots) 28.44(1024 dots) 26.40 (1056 dots) 21.333 (1056dots)
H-Sync ( us ) 2.032 (64 dots) 2.00(72 dots) 3.200 (128 dots) 1.616 (80 dots)
H-B-P ( us ) 3.810 (120 dots) 3.56(128 dots) 2.200 ( 88 dots) 3.232 (160 dots)
H-Active ( us ) 20.317 (640 dots) 22.22(800 dots) 20.00 ( 800 dots) 16.162 (800 dots)
H-F-P ( us ) 0.508 (16 dots) 0.67(24 dots) 1.000 (40 dots) 0.323 (16 dots)
f v
75Hz (75) 56.25 60Hz (60.316) 75Hz (75.000)
V-Total (ms ) 13.333 (500 lines) 17.78(625 lines) 16.58 (628 lines) 13.333 (625lines)
V-Sync ( ms ) 0.080 (3 lines) 0.06(2 lines) 0.106 (4 lines) 0.064 (3 lines)
V-B-P (ms ) 0.427 (16 lines) 0.63(22 lines) 0.607 (23 lines) 0.448 (21 lines)
V-Active ( ms ) 12.80 (480 lines) 17.07(600 lines) 15.84 (600 lines) 12.80 (600lines)
V-F-P ( ms ) 0.027 ( 1 line ) 0.03( 1 line) 0.026 (1 line ) 0.021 (1 line )
SYNC. H/V - / - +/+ + / + + / +
POLARITY
SEP . SYNC Y Y Y Y
MODE NO. 9 10 11 12
RESOLUTION
800 x 600 832 x 624 1024 x 768 1024 x 768
Dot clock(MHz)
50 57.283 65 75
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f h
48.077kHz 49.72kHz 48.363kHz 56.48kHz
H-Total ( us ) 20.80 (1040dots) 20.11(1152 dots) 20.677(1344 dots) 17.71(1328 dots)
H-Sync ( us ) 2.400 ( 120 dots) 1.12(64 dots) 2.092(136 dots) 1.81(136 dots)
H-B-P ( us ) 1.280 (64 dots) 3.91(224 dots) 2.462(160 dots) 1.92(144 dots)
H-Active ( us ) 16.00 (800 dots) 14.52( 832 dots ) 15.754(1024 dots) 13.65(1024 dots)
H-F-P ( us ) 1.120 (56 dots) 0.56(32 dots ) 0.369(24 dots) 0.32(24 dots)
f v
72Hz (72.188) 74.55Hz 60.004Hz 70.07Hz
V-Total (ms ) 13.85 (666 lines) 13.41(667 lines) 16.666(806 lines) 14.27(806 lines)
V-Sync ( ms ) 0.125 (6 lines) 0.06(3 lines) 0.124(6 lines) 0.11(6 lines)
V-B-P (ms ) 0.478 (23 lines) 0.78(39 lines) 0.600(29 lines) 0.51(29 lines)
V-Active ( ms ) 12.48 (600 lines) 12.55 (624 lines) 15.880(768 lines) 13.60(768 lines)
V-F-P ( ms ) 0.770 ( 37 line ) 0.02(1 line) 0.062(3 lines) 0.05(3 lines)
SYNC. H/V + / + +/+ -/- -/-
POLARITY
SEP . SYNC Y Y Y Y
MODE NO. 13 14 15 16
RESOLUTION
1024 x 768 1280 x 1024 1280 x 1024 1152 x 864
Dot clock(MHz)
78.75 108 135 108
f h
60.02kHz 63.981kHz 79.976KHz 67.5 KHz
H-Total ( us ) 16.66(1312 dots) 15.630 (1688 dots) 12.504 (1688 dots) 14.815(1600 dots)
H-Sync ( us ) 1.22 (96 dots) 1.037 (112 dots) 1.067 (144 dots) 1.185(128 dots)
H-B-P ( us ) 2.23 (176 dots) 2.296 (248 dots) 1.837 (248 dots) 2.370(256 dots)
H-Active ( us ) 13.00 (1024 dots) 11.852 (1280 dots) 9.481 (1280dots) 10.667(1152 dots)
H-F-P ( us ) 0.20 (16 dots) 0.444 (48 dots) 0.119 (16 dots) 0.593(64 dots)
f v
75.03Hz 60.020Hz 75.025 Hz 75.06 Hz
V-Total (ms ) 13.33 (800 lines) 16.661 (1066 lines) 13.329 (1066 lines) 13.333(900 lines)
V-Sync ( ms ) 0.05 (3 lines) 0.047 ( 3 lines) 0.038 (3 lines) 0.044(3 lines)
V-B-P (ms ) 0.47 (28 lines) 0.594 ( 38 lines) 0.475 (38 lines) 0.474(32 lines)
V-Active ( ms ) 12.80 (768 lines) 16.005 (1024 lines) 12.804(1024 lines) 12.800(864 lines)
V-F-P ( ms ) 0.02 (1 lines) 0.016 (1 line ) 0.013 (1 lines) 0.015(1 lines)
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SYNC. H/V -/- +/+ +/+ +/+
POLARITY
SEP . SYNC Y Y Y Y
17"
MODE NO. 17 18 19 20
RESOLUTION
Dot clock(MHz)
f h
H-Total ( us ) 16.667 (1800dots) 13.333 (2160 dots) 22.244 (1650dots)
H-Sync ( us ) 1.037 ( 112 dots) 1.185 ( 192 dots) 0.539 ( 40 dots)
H-B-P ( us ) 2.889 (312 dots) 1.877 (304 dots) 2.966 (220 dots)
H-Active ( us ) 11.852 (1280 dots) 9.877 (1600 dots) 17.256 (1280 dots)
H-F-P ( us ) 0.889 (96 dots) 0.395 (64 dots) 1.483 (110 dots)
1280 x 960 1600 x 1200 1280 x 720
108 162 74.176
60.000 KHz 75.000 KHz 44.955KHz
f v
V-Total (ms ) 16.667 (1000 lines) 16.667 (1250 lines) 16.683 (750 lines)
V-Sync ( ms ) 0.050 (3 lines) 0.040 (3 lines) 0.111 (5 lines)
V-B-P (ms ) 0.600 (36 lines) 0.613 (46 lines) 0.445 (20 lines)
V-Active ( ms ) 16.000 (960 lines) 16.000 (1200 lines) 16.016 (720 lines)
V-F-P ( ms ) 0.017 ( 1 line ) 0.013 ( 1 line ) 0.111 (5 lines)
SYNC. H/V + / + + / + + / +
POLARITY
SEP . SYNC Y Y HDTV
60.00Hz 60.00 Hz 59.94Hz
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Monitor Block Diagram
DVI INPUT
( CN8 )
VGA INPUT
( CN7 )
MEMORY I/ F
39VF020 ( XU1 )
DI GITAL DDC
24AA02 ( U12)
SDA/ S CL
ANALOG DDC
24AA02 ( U10)
SDA/ S CL
+3 . 3V_ I / O_MALI BU
+1. 8V_CORE
RX2 , RX1, RX0 , RXC
RED , GRE EN , BLUE , SD A/S CL
OCMADDR[ 0.. 19] ,OCMDATA[ 0 . . 7 ]
MUT E
+3. 3V_LBADC
PWM1
+2. 5V_DDR
+3 . 3V_L VDS A
+3 . 3V_L VDS B
GM1601 (U5)
+1 . 8V_DVI
+3. 3V_LVDS
TXA0+/- , TXA1+/- , TXA2+/ - ,TXA3 +/- , TXAC+/ -
TXB0+/ - ,TXB1+/- , TXB2+/- , TXB3+/- , TXBC+/-
+1. 8V_ADC
+3. 3V_DVI
FS DAT A, FSADD R , FS BKS E L 0/ 1
LBADC_RETURN / IN1 / IN2 / IN3
+3. 3V_PLL
+3. 3V_ADC
RESET
MSTR SCL/SDA
FSCLK-/ +, FSDQM
POWER SWITCH
AIC 1563 (U2)
(U3) +2.5V (U4) +3.3V (U6) +1.8V
MAX809_1 (U8)
24LC32SN (U7)
FRAME STORE
MT46V2M32LG-4 ( U1 )
TO PANEL
KEY CONT ROL
+12V FROM POWER BOARD
/RESET
I2C
(CN2)
(CN4)
AUDI O IN ( L/ R )
VOLUME
AUDI O
TPA3002D2 ( U9 )
SPKR0+/-
SPKL0+/ -
SPEAK
( CN6 )
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PCB CONDUCTOR VIEW
Main Board
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Button Board
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Chapter 2
OPERATING INSTRUCTIONS
Front Panel Definition
This Section defines the front panel User Interface for Led Indictor and Key function.
Key Definition:
There are five keys defined in this system and described bellows.
* Adjusting display settings
External Controls
1
2
3
4
5
POWER
OSD
Function
UP/ PLUS
DOWN /
MINUS
AUTO
Power on/off
Blue: power on
Orange: in sleep mode
Press to view OSD.
Press again to enter a selection in OSD.
If OSD is active, press to select or adjust OSD options. If OSD
is inactive, press once, then press the buttons marked or
to adjust the volume.
If OSD is active, press to select or adjust OSD options. If OSD
is inactive, press once, then press the buttons marked or
to adjust the volume.
If OSD is active, press to exit a selection in OSD. If OSD is
inactive, press and the monitor will automatically optimize the
position, focus and clock of your display.
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OSD Menu
Picture
Brightness:
This adjusts the brightness of the picture on the screen.
Contrast:
This adjusts dark and light shades of color relative to each other to
achieve a comfortable contrast.
Color temp. :
There are three ways of adjusting color:
Warm (Reddish white)
Cool (Bluish white)
User : You can adjust the colors red, green and blue to the intensity
you desire.
Focus:
This removes any horizontal distortion and makes the picture clear
and sharp.
Clock:
If there are any vertical stripes seen on the background of the screen
this renders them less noticeable by minimizing their size. It also
changes the size of the horizontal screen.
H-Position:
This adjusts the horizontal screen position.
V-Position:
This adjusts the vertical screen position.
Audio
Vol ume : Adjusts the volume.
Mute : on /off
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Option
Auto Config. :
System runs auto-configuration.
Reset:
Recall to default settings.
Information: This shows brief information on the screen.
Setting
Language:
Select the OSD menu language from
English, French, German, Italian, Spanish, Simplified Chinese,
Traditional Chinese, Japanese and Russian.
OSD H. Position
OSD V. Position
OSD Time-out
This changes the position of the OSD window on the screen and staying
time.
LED Definition
The system equips one dual color (blue/amber) led to indict system status and defined as bellows :
System Status LED Color
System in normal operation mode Blue
System in power-saving mode
System in power-off mode Dark
Amber
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LOGO :
When the monitor is power on, the LOGO will be showed in the center, and disappear slowly.
HOW TO OPTIMIZE THE DOS-MODE
Plug and play
Plug & play DDC2B feature
This monitor is equipped with VESA DDC2B capabilities according to the VESA DDC STANDARD. It allows the
monitor to inform the host system of its identity and, depending on the level of DDC used, communicate
additional information about its display capabilities. The communication channel is defined in two levels, DDC2B.
The DDC2B is a bi-directional data channel based on the I2C protocol. The host can request EDID information
over the DDC2B channel.
THIS MONITOR WILL APPEAR TO BE NON-FUNCTIONAL IF THERE IS NO VIDEO INPUT SIGNAL. IN
ORDER FOR THIS MONITOR TO OPERATE PROPERLY, THERE MUST BE A VIDEO INPUT SIGNAL.
This monitor meets the Green monitor standards as set by the Video Electronics Standards Association(VESA)
and/or the United States Environmental Protection Agency (EPA) and The Swedish Confederation Employees
(NUTEK). This feature is designed to conserve electrical energy by reducing power consumption when there is
no video-input signal present. When there is no video input signal this monitor, following a time-out period, will
automatically switch to an OFF mode. This reduces the monitor’s internal power supply consumption. After the
video input signal is restored, full power is restored and the display is automatically redrawn. The appearance is
similar to a “Screen Saver” feature except the display is completely off. The display is restored by pressing a key
on the keyboard, or clicking the mouse.
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USING THE RIGHT POWER CORD
The accessory power cord for the Northern American region is the wallet plug with NEMA 5-15 style and is UL
listed and CSA labeled. The voltage rating for the power cord shall be 125 volt AC.
Supplied with units intended for connection to power outlet of personal computer: Please use a cord set
consisting of a minimum No. 18 AWG, type SJT or SVT three conductors flexible cord. One end terminates with a
grounding type attachment plug, rated 10A, 250V,CEE-22 male configuration. The other end terminates with a
molded-on type connector body, rated 10A, 250V, having standard CEE-22 female configuration.
Please note that power supply card needs to use VDE 0602, 0625, 0821 approval power cord in European
counties.
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Chapter 3
Machine assembly
This chapter contains step-by-step procedures on how to assemble the monitor for
maintenance and trouble shooting
NOTE : 1. The screws for the different components vary in size. During the disassembly process, group the
screws with the corresponding to avoid mismatch when putting back the components.
2. Note : The monitor surface is susceptible to scratching! Therefore, lay the monitor on a soft surface
when mounting or removing the base.
3. Wear gloves.
Front View : ( unit : mm )
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Real View :
Top View :
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Side View : ( unit : mm )
Assembly process
Picture Description
1. Get the panel and put it on the table
carefully.
1. Fix left and right bracket (BKT) on the
panel.
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1. Get bezel and put it on the table
2. Assemble panel into bezel
1. Lock screw * 3 pcs to fasten bezel and
left side bracket (BKT)
.
2. Lock screw * 3 pcs to fasten bezel and
right side bracket (BKT).
1. Insert LCD cable in panel connector
1. Assemble speaker on the bezel
1. Tidy speaker cable as picture shows.
1. Assemble PCB BKT on the L/R of BKT
2. Tidy cable as picture shows
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1. Get inverter and insert cable
2. Insert button cable in main board
connector
1. Lock 4*pcs screw to fasten m/b and
PCB BKT
1. First to lock 4*pcs screw to fasten
Inverter board on the PCB BKT
2. Get m/b and insert speaker cable, then
assemble it on the
1. Lock 4 pcs screw to fasten m/b on the
pcb BKT
1. Insert INV-M/B cable, then tidy button
cable and inv-m/b
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1. Lock screw*2pcs to fasten panel hold
1. insert LCD cable in m/b connector
1. Assemble shielding and pcb BKT
2. Lock 7pcs screw to fasten shielding
3. Insert ccft cable L/R of into inverter/b
connector
1. Stick al foil *2pcs on ccft connector of
pcb shielding
1. Lock io nut 2pcs in VGA connector
1. Assemble button/b and back cover
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1. Insert button/b cable in button/b
connector
1. Assembly back cover and bezel
2. Lock screw * 6 pcs to fasten and back
cover
1. Lock screw*2 pcs to fasten bezel and
PCB shielding.
2. Assembly DVI box, if necessary.
1. Assembly stand base and back cover.
2. lock screw *6 pcs to fix it.
1. Assembly VESA cover and back cover.
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NONONON
N
Chapter 4
TROUBLE SHOOTING
This chapter provides trouble shooting information forAL2032
1. No Power
o Power
Check Adaptor Power
Output =18V
OK
Check Scalar Module
Output
L4 =5V?
U4 #2 = 3.3V ?
L 13 = 1.8V ?
Check Power Button
From Scalar/B(CN5)
to Button/B(CN1)
OKKK
O
Change Adaptor Power
Board
Change Scalar Module Board
Ye s
Check Cable
Open ?
Change Cable
Change Switch or Button Board
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NoN
No No No No N
N
N
No Characters , Missing one color
2.
oCharacters
Missing one color
Change Inverter Board
o
Check Inverter From
Scaler board OK ?
o
Check CN4
12Vdc Output
OK
Check L4
5Vdc Output
OK
Check U6(pin2)
1.8Vdc Output
OK
Check U4(pin2)
3.3Vdc Output
OK
Check CN2 to Panel
Signal Output
OK
o
Change Adaptor
Check or Change
U2 , Q6 , D3
Check or Change
U6
Check or Change
U4
Mhz
SYNC ?
TalCheck X
OK
?
Change X1
Check or Change
Cable Or Panel
Change VGA Cable
14.318
Check H , V
OK
Change U5
- 30 -
Page 31
3. No audio
NoNoNo N
N
o Audio
Change U12 or U9
Check Input source
Or Change CN9
o
Check Input Signal
CN9 OK ?
OK
Check CN6 to Speaker
OK ?
OK
Check U12(Pin9)
& U9 OK ?
OK
Check U9Pin1(Mute)
& Q10 & U9 OK ?
Change Speaker o r
CN6(Cable)
Change Q9 or U9
- 31 -
Page 32
Connector Information
k
S
N
N
)
)
N
NC
Phonejack stereo
PIN1. AC power cord : CEE22 typed connector
PIN2. Audio cable
PIN3. Audio : Line-in receptacle
Chapter 5
J1
1
2
3
PHONEJACK STEREO
Video signal connector 15P Mini D-Sub connector x 1
1
6
2
7
3
8
4
9
CN6
5
10
DB15HD
16
17
11
12
13
14
15
PIN
SIGNALMNEMO
Red VideoRV 1
Green VideoGV 2
4
Blue VideoBV 3
one
GND 5
Ground(DDC return
Red GNDRG 6
Green GNDGG 7
Blue GNDBG 8
+5V 9
+ 5V (for DDC
Sync GNDSG 10
C 11
DA 12
one
DDC Data
Horizontal SyncHS 13
Vertical SyncVS 14
SCL 15
DDC Cloc
- 32 -
Page 33
Proprietary connecting of DVI box
The 44 pin of proprietary DVI box is defined as follows:
1 RX2- 23 SCART_FUNC
2 RX2+ 24 KEY3
3 RX1- 25 SCART
RGB_CON
4 RX1+ 26 SCL5V
5 RX0- 27 nYCOEN
6 RX0+ 28 SDA5V
7 RXC- 29 NVDSW_SEL
8 RXC+ 30 HSCL
9 GND 31 REST
10 GND 32 HSDA
11 Y0 33 DVI_ DETECT
12 Y1 34 CORD_ RESET
13 Y2 35 CORD_DETECT
14 Y3 36 ADO_L
15 Y4 37 DETECT
16 Y5 38 AGND
17 Y6 39 IR0
18 Y7 40 ADO_R
19 LLC VPC 41 V51R
20 KEY1 42 GND
21 GND 43 V12
22 KEY2 44 V12
- 33 -
Page 34
Chapter 6
FRU (Field Replaceable Unit) list
This chapter gives you the FRU (Field Replaceable Unit) listing in global configurations of AL2032W. Refer to this
chapter whenever ordering for parts to repair or for RMA (Return Merchandise Authorization).
NOTE : Please note WHEN ORDERING FRU PARTS, that you should check the most up-to-date information available on
your regional web or channel(http://aicsl.acer.com.tw/spl/
will not be noted in the printed Service Guide. For ACER-AUTHORIZED CERVICE PROVIDERS, your Acer
office may have a DIFFERENT part number code to those given in the FRU list of this printed Service Guide. You
MUST use the local FRU list provided by your regional Acer office to order FRU parts repair and service of
customer machines.
NOTE: To scrap or to return the defective parts, you should follow the local government ordinance or regulations on how
best to dispose it, or follow the rules set by your regional Acer office on how to return it.
). For whatever reasons a part number change is made, it
- 34 -
Page 35
AL2032W Exploded Diagram
35 Chapter 6
Page 36
Chapter 7
SCHEMATIC DIAGRAM
Main Board Circuit
V 5 2 / F u 2
8
2
5
7
C
5 C
GND
V 5 2
/ F u 2
5
7
2
4
3
C
C
GND
V
5 2
/
5
F
6
u
5
4
2
C
C
2
GND
+1.8V_D VI
6
/ F u 1
1
.
6
0 1 C
GND
Route (VIN1/ADC_IN1, ADC1_RETURN) and (VIN2/ADC_IN2, ADC2_RETURN) as differential tracks close to each oth er and ground the return track of each pair very close to the Malibu D12 ball and grou nd pin
Optional Filter Caps in between a pair on LBADC differential tracks close to the Malibu chip
GND
GND
GND
10K/6
LED_G
LED_R
6
6
6
6
V
/
/
/
/
5
6
F
F
F
F
/
6
2
u
u
u
u
/
/
F
1
1
1
1
5
1
0
7
F
F
u
.
.
.
.
3
4
5
4
u
u
1
0
0
0
0
0
4
.
1
1
1
1
1
2
8
4
5
.
0
2
3
C
C
C
1
C
1
0
1
C
C
C
6
6
/
/
V
6
F
6
5
F
6
/
6
/
/
u
2
u
/
/
F
F
F
1
1
0
9
F
.
.
u
u
F
u
2
2
u
0
0
1
1
u
3
1
4
1
1
9
1
.
.
1
.
5
2
2
.
2
2
1
0
0
0
C
2
C
2
1
1
0
1
1
1
C
C
C
C
C
6 / F
6
6
/
/
u
6
6
V
1
/
F
F
/
.
6
5
u
u
/
F
F
0
2
1
1
4
u
3
u
F
/
.
.
3
1
7
1
u
4
7
0
0
F
.
.
1
7
1
6
1
5
6
2
u
0
0
.
1
1
1
1
7
C
2
C
0
1
1
1
2
C
C
C
C
C
+3.3V_DVI
6
/
6
6
F
6
6
/
/
V
/
/
u
5
F
F
F
F
1
3
.
u
u
2
u
u
4
/
0
1
1
6
7
1
1
2
9
1
.
.
9
F
.
.
4
5
5
5
5
0
0
0
4
0
u
C
5
1
1
1
1
1
2
C
C
C
C
C
2
C
GND
FSVREF
+1.8V_ADC
C38
C39
C62
C63
0.1uF/6
0.1uF/6
0.1uF/6
0.1uF/6
+3.3V_ADC
GND
C171
C70
C175
C168
0.1uF/6
22uF/25V
0.1uF/6
0.1uF/6
6
6
C77
/
/
6
6
6
/
/
/
F
F
F
u
u
F
F
u
1
1
u
u
4
5
22uF/25V
.
.
0
1
8
1
1
7
6
7
6
.
0
0
.
.
7
7
1
1
7
7
25V
0
0
0
1
1
1
1
C
C
C
C
C
C
+3.3V_LV DSA
C44
C131
C132
C133
22uF/25V
0.1uF/6
0.1uF/6
0.1uF/6
25V
+3.3V_LV DSB
GND
C148
C142
C144
C52
0.1uF/6
0.1uF/6
0.1uF/6
22uF/25V
25V
GND
+5V
R151
R150
10K/6
R152 4K7/6
2
3
R153 4K7/6
Q13
2
MMBT3904L
1
+1.8V_CORE
6
6
6
/
/
/
6
F
6
F
F
/
6
/
6
u
u
u
/
/
F
F
1
1
1
7
3
6
F
u
.
.
F
.
u
3
5
3
u
1
0
0
u
0
1
5
.
1
1
1
.
1
2
1
9
.
4
0
.
0
C
2
C
C
3
0
1
0
1
1
C
C
C
6 /
6
6
/
6
F
6
/
/
6
/
6
u
F
/
/
F
F
F
1
u
8
F
F
u
.
u
u
1
2
u
0
u
1
0
.
1
0
1
6
.
1
.
.
1
4
1
7
0
6
3
1
.
.
0
0
0
C
2
2
1
1
C
0
0
1
1
C
C
C
C
+3.3V_I/O_MALIBU
6 /
F
6
6
6
6
u
/
/
/
/
1
F
F
F
F
.
u
u
u
u
0
1
3
1
1
1
.
.
.
.
6
0
0
0
0
1
0
1
8
6
5
5
C
1
1
1
C
C
C
6
/
6
6
/
/
F
F
F
u
u
u
1
2
.
1
1
5
6
.
.
0
5
1
0
0
1
C
C
MSTR_S C L
MSTR_SDA
C169
0.1uF/6
+3.3V_PLL
6
6
/
/
F
F
u
u
1
1
6
.
.
6
0
0 1 C
+3.3V_LV DS
C47
0.1uF/6
GND
+3.3V_AD C
3
Q12
4 5
MMBT3904L
1 R
MENU
1
SEL PWR DOWN UP RIGHT LEFT
8 9 C
Junction from A change to B
6 4 1 C
8 1 1 C
6
/ K 3 3
6 / F u 1
. 0
6 / F u 1
. 0
+2.5V_DDR
6 / F
6
u
/
1
2
F
.
4
u
0
1
C
. 0
+3.3V_PL L
CN3
1 2 3 4
4606-04-04P-R/N S
6
/ K 3 3
5
6
5
5
1
1
R
R
6 / F u 1
4
3
.
9
9
0
1
1
C
C
6
/ K 3 3
6 / F u 1
. 0
22pF/6
C68
X1
6
/ K 3 3
7 5 1 R
6 / F u 1
5
.
9
0 1 C
TXD
RXD
+3.3V_PLL
C67 22pF/6
14.318MHz
+5V
TXD
GND
OCMDATA[0..7]6
6
/
6
/
K 3
K
3
3
0
9
3
6
5
8
1
1
5 1
R
R
R
6
6
/
/
F
F
u
u
1
7
1
.
8
6
.
9
0
9
9
0
1
1
1
C
C
C
R170 0/6/NC
R171 0/6/NC
+3.3V_D VI
R131 0/6
R132 0/6
VGA_SCL3
VGA_SDA3
R77 3K3/6
GND
R78 10K/6
GND
PWM07
PWM17
GND
RXD
T103
GND
/OCM_WE6
/OCM_RE6
/ROM_CS6
T111
OCMADDR[0..19]6
6
/
less R94 to CN6 pin 11
K 3 3
R101,R103 net swap
R161 1K/6
R162 1K/6
R163 1K/6
R164 1K/6
R165 1K/6
R166 1K/6
R167 1K/6
R168 220R/6
R169 220R/6
6 / F u 1
. 0
TO BUTTON BOARD
GND
RX0+ RX0­RX1+ RX1­RX2+ RX2­RXC+ RXC-
R54 249R/6 1%
BLUE-3
BLUE+3
GREEN-3
GREEN+3
RED-3
RED+3
SOG3
AHS3
AVS3
ACS_RSET_HD
R37 10K/6
GND
T105
T106
SCART_FUNC
SCART_RGB_CON
GND
T101
T104
/RESET
IR1 IR0
T108
T109
T110
KEY1 KEY2 KEY3 RIGHT LEFT
T113
T114
OCMDATA7 OCMDATA6 OCMDATA5 OCMDATA4 OCMDATA3 OCMDATA2 OCMDATA1 OCMDATA0
CN5
10 9 8 7 6 5 4 3 2 1
4501-10-10P-R
2.0mm pitch 90° E&T 4607-11Pin
+1.8V_CORE
0 1
8
6
4
6
0
1
7
1
6
0
7
6
1
7
1
6
3
3
7
1
1
1
1
1
1
1
1
1
1
C
C
C
C
1
1
1
2
1
2
U
T
K
K
U
L
T
T
K
L
A
A
U
A
A
U
K
K
D
D
8
8
8
8
8
8
8
8
8
8
8
8
8
3
3
3
L
3
3
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
L
1
1
1
1
1
1
1
1
1
1
1
1
1
3
3
3
3
3
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
D _
E
E
E
E
E
E
E
E
E
E
E
E
E
O
O
O
O
O
8
I
I
I
I
I
R
R
R
R
R
R
R
R
R
R
R
R
R
1
O
O
O
O
O
O
O
O
O
O
O
O
O
DVI_SCL DVI_SDA RX0+ RX0­RX1+ RX1­RX2+ RX2­RXC+ RXC­NO_CONNECT NO_CONNECT REXT
BLUE­BLUE+ GREEN­GREEN+ RED­RED+ SOG NO_CONNECT VGA_SCL VGA_SDA AHSYNC AVSYNC EXTCLK
XTAL TCLK NO_CONNECT NO_CONNECT ACS_RSET_HD
VRED0 VRED1 VRED2 VRED3 VRED4 VRED5 VRED6 VRED7
VGRN0 VGRN1 VGRN2 VGRN3 VGRN4 VGRN5 VGRN6 VGRN7
VBLU0 VBLU1 VBLU2 VBLU3 VBLU4 VBLU5 VBLU6 VBLU7
VCLK VODD VVS VHS_CSYNC VDV VCLAMP
PWM0 PWM1 PWM2 OCM_T IME R1
LBADC_IN3 LBADC_IN2 LBADC_IN1 LBADC_RETURN
SVDATA0 SVDATA1 SVDATA2 SVDATA3 SVDATA4 SVDATA5 SVDATA6 SVDATA7
SVDV SVODD SVVSYNC SVHSYNC SVCLK
OCM_UDO OCM_UDI
/RESET IR1 IR0 MSTR_S C L MSTR_S D A
/OCM_WE /OCM_RE /ROM_CS /OCM_INT2 /OCM_INT1 /OCM_CS2 /OCM_CS1 /OCM_CS0
OCMADDR19 OCMADDR18 OCMADDR17 OCMADDR16 OCMADDR15 OCMADDR14 OCMADDR13 OCMADDR12 OCMADDR11 OCMADDR10 OCMADDR9 OCMADDR8 OCMADDR7 OCMADDR6 OCMADDR5 OCMADDR4 OCMADDR3 OCMADDR2 OCMADDR1 OCMADDR0
OCMDATA15 OCMDATA14 OCMDATA13 OCMDATA12 OCMDATA11 OCMDATA10 OCMDATA9 OCMDATA8 OCMDATA7 OCMDATA6 OCMDATA5 OCMDATA4 OCMDATA3 OCMDATA2 OCMDATA1 OCMDATA0
A
C
C
C
C
C
C
C
C
C
C
C
C
C
D D V
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
N
N
N
G
G
G
_
_
_
D
D
D
4
3
5
1
1
1
U
L
A
D
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
3
2
5
1
7
0
0
1
1
2
5
2
5
6
2
2
2
5
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
N
N
P
R
K
R
L
M
N
M
M
N
M
P
T
P
U
U
R
N4
N3
A8
B8
A9
B9
A10
B10
A6
B6
D5
C5
B11
B1
B2
C1
C2
D1
D2
C3
A1
N2
N1
L4
L3
R4
G4
XTAL
G3
TCLK
F1
K3
K2
C19
B19
A19
D18
C18
B18
A18
C17
A23
C22
B22
A22
D21
C21
B21
A21
B25
A25
D24
C24
B24
A24
C23
B23
A20
B20
C20
D19
D20
B17
C26
PWM0
C25
PWM1
D26
D25
A12
B12
C12
D12
C16
Y0
B16
Y1
A16
Y2
D15
Y3
C15
Y4
B15
Y5
A15
Y6
D14
Y7
A17
T102
A14
B14
C14
D16
LLC_VPC
M1
M2
K1
M4
M3
P4
MSTR_SCL MSTR_SDA
P3
R3
/OCM_WE
R2
/OCM_RE
R1
T107
/OCM_CS
L1
L2
P2
P1
T4
T3
OCMADDR19 OCMADDR18
T2
OCMADDR17
T1
U4
OCMADDR16 OCMADDR15
U3
OCMADDR14
U2
OCMADDR13
U1
V4
OCMADDR12
V3
OCMADDR11 OCMADDR10
V2 V1
OCMADDR9 OCMADDR8
W3
OCMADDR7
W2
OCMADDR6
W1
Y3
OCMADDR5
Y2
OCMADDR4
Y1
OCMADDR3 OCMADDR2
AA3
OCMADDR1
AA2
OCMADDR0
AA1
AB3
AB2
AB1
AC3
T112
AC2
AC1
AD1
AE1
AF1
AD2
AE2
AF2
AD3
AE3
AF3
AD4
+3.3V_LVDSB
3
3
3
2
3
2
3
2
4
3
2
2
4
3
4
2
A
4
B
1
D
A
W
Y
A
C
3
3
3
3
3
3
.
.
.
.
.
.
3
3
3
3
3
3
_
_
_
_
_
_
O
O
O
O
O
O
I
I
I
I
I
I
D
D
D
D
D
D
N
N
N
N
N
N
G
G
G
G
G
G
_
_
_
_
_
_
D
D
D
D
D
D
3
3
4
0
3
0
3
1
1
1
1
1
1
1
K
T
T
L
R
N
L
1
3
3
3
3
3
3
3
3
3
2
2
2
2
2
2
2
A
B
C
2
2
2
C
2
2
E
V
R
Y
A
A
A
W
F
T
L
H
P
J
M
A
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
­_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
D
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
C
F
F
F
F
F
F
F
F
F
F
F
F
F
F
F
A B L
L L
D
_ 8
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
1
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
A
G
G
G
G
G
G
G
G
G
G
G
G
G
G
G
S
G
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
_
S
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
V
D
6
4
6
4
6
2
5
3
4
5
3
5
3
4
5
3
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
N
P
N
L
M
R
T
R
N
K
K
P
T
U
M
K
B
GND
+3.3V_LBADC
+2.5V_D DR
+3.3V_I/O_MALIBU
+3.3V_LVDSA
2 1 D A
3
. 3 _ B S D V L
D N G _ D
4 1 R
+1.8V_D VI
+3.3V_LVDS
+3.3V_DVI
FSVREF
1
2
0
3
7
5
2
2
2
1
1
1
0
0
4
2
6
1
8
1
9
9
8
1
C
C
E
D
D
2
A
A
A
A
A
J
D
W
C
C
D
D
C
D
3
3
3
.
.
.
3
3
3
_
_
_
B
B
A
S
S
S
D
D
D
V
V
V
L
L
L
D
D
D
D
N
N
N
N
G
G
G
G
_
_
_
_
D
D
D
D
0
7
1
7
1
1
1
1
P
M
M
P
C
3
3
3
3
3
8
8
8
8
S
F
F
.
.
.
.
.
.
.
.
.
E
E
3
3
D
1
3
3
1
1
3
1
_
_
_
_
_
_
_
_
_
R
R
V
I
I
I
I
I
I
I
A
A
L
V
V
_
V
V
V
V
V
V
V
V
S
S
S
S
3
D
D
D
D
D
D
D
D
F
F
D
D
3
V
V
D
L
L
D D V
S
S
S
S
D
D
D
D
V
V
V
D
D
D
S
S
D
L
L
L
V
D
D
S
S
N
N
N
_
_
_
L
N
N
N
_
V
V
G
G
G
A
A
A
_
_
_
G
F
F
G
G
3
3
3
3
D
D
D
D
3
E
E
A
A
D
B
B
B
3
3
3
_
_
N
N
N
N
S
S
S
A
A
A
D
R
R
C
C
C
G
G
G
G
S
S
S
S
V
V
D
D
D
_
_
_
_
S
S
S
S
S
S
D
D
D
V
V
V
D
D
D
D
L
L
L
V
V
V
V
F
F
A
A
A
0
9
5
9
4
3
7
4
2
1
1
1
1
1
1
7
0
6
7
2
1 R
4
C
C
C
D
1
C
C
D
2
2
4
1
A
A
A
A
P
A
A
A
W
L
K
D
E
B
+3.3V_PLL
+1.8V_ADC
+3.3V_ADC
U5
3
6
1
1
3
3
2
3
4
3
4
2
1
3
GM1601
D
B
A
A
A
E
C
F
F
J
J
G
H
H
3
3
.
.
3
3
_
_
C
C
D
D
A
A
D
D
D
N
N
N
G
G
G
_
_
_
I
I
I
V
V
V
D
D
D
1
1
7
1
1
D
A
D
L
L
L
S
S
L
L
L
D
D
P
P
P _
D
D
F
R
_
S
S
3
_
_
_
3
3
3
3
3
A
3
3
3
3
A
A
D
A
A
D
D
D
D
D
V
D
D
D
D
V
V
V
V
GPIO_G08_B5/JTAG_R ESET
GPIO_G08_B4/JTAG_TDO
GPIO_G08_B2/JTAG_TDI
GPIO_G08_B1/JTAG_MOD E
GPIO_G08_B0/JTAG_C LK
L L
D
P
N
R
G
_
D
_
3
N
C
3
G
A
_
D
I
S
A
V
S
B L
V
D
3 1
2
3
5
D
G
F
B
S
S
D
D
D
D
D
D
_
_
3
3
3
3
A
A
D
D
D
D
V
V
FSDATA10 FSDATA11 FSDATA12 FSDATA13 FSDATA14 FSDATA15 FSDATA16 FSDATA17 FSDATA18 FSDATA19 FSDATA20 FSDATA21 FSDATA22 FSDATA23 FSDATA24 FSDATA25 FSDATA26 FSDATA27 FSDATA28 FSDATA29 FSDATA30 FSDATA31
FSADDR10 FSADDR11
GPIO_G06_B0 GPIO_G06_B1 GPIO_G06_B2 GPIO_G06_B3
GPIO_G05_B0 GPIO_G05_B3
GPIO_G04_B0 GPIO_G04_B1 GPIO_G04_B2 GPIO_G04_B3 GPIO_G04_B4 GPIO_G04_B5 GPIO_G04_B6 GPIO_G04_B7
GPIO_G07_B0 GPIO_G07_B1 GPIO_G07_B2 GPIO_G07_B3 GPIO_G07_B4 GPIO_G07_B5 GPIO_G07_B6 GPIO_G07_B7
LVDS_SHIELD[0] LVDS_SHIELD[1] LVDS_SHIELD[2] LVDS_SHIELD[3]
LVDS_SHIELD[4] LVDS_SHIELD[5]
GPIO_14/DH S GPIO_15/DVS GPIO_16/DEN
GPIO_G08_B3
GPIO_G09_B5 GPIO_G09_B4 GPIO_G09_B3 GPIO_G09_B2 GPIO_G09_B1 GPIO_G09_B0
NO_CONNECT
S
L
D
L
L
L
P
D
P
F
S
_
_
_
3
3
3
3
3
3
D
A
A
S
S
S
S
S
S
V
V
V
4
2
H
H
GND
416PBGA
E24
FSDATA0
E25
FSDATAU0
FSDATA1
E26
FSDATAU1
G26
FSDATA2
FSDATAU2
G24
FSDATA3
FSDATAU3
H26
FSDATA4
FSDATAU4
FSDATA5
H24
FSDATAU5
FSDATA6
J25
FSDATAU6
FSDATA7
T26
FSDATAU7
FSDATA8
R25
FSDATAU8
FSDATA9
P24
FSDATAU9
P26
FSDATAU10
N24
FSDATAU11
N26
FSDATAU12
M25
FSDATAU13
L24
FSDATAU14
L25
FSDATAU15
M26
FSDATAU16 FSDATAU17
M24
N25
FSDATAU18 FSDATAU19
N23
FSDATAU20
P25
R26
FSDATAU21 FSDATAU22
R24
FSDATAU23
K24
J26
FSDATAU24 FSDATAU25
H25
FSDATAU26
G23
G25
FSDATAU27 FSDATAU28
F24
FSDATAU29
F25
FSDATAU30
F26
FSDATAU31
AD25
FSADDRU0
FSADDR0
AD26
FSADDRU1
FSADDR1
AC24
FSADDR2
AC25
FSADDRU3
FSADDR3
AB26
FSADDRU4
FSADDR4
AA24
FSADDR5
FSADDRU5
AA25
FSADDRU6
FSADDR6
AA26
FSADDRU7
FSADDR7
Y24
FSADDRU8
FSADDR8
AB25
FSADDRU9
FSADDR9
AC26
FSADDRU10
AB24
U24
FSCLKU+
FSCLKp
U23
FSCLKU-
FSCLKn
L26
FSDQSU
FSDQS
T25
FSDQMU0
FSDQM0
U25
FSDQMU1
FSDQM1
U26
FSDQMU2
FSDQM2
T24
FSDQMU3
FSDQM3
V26
/FSWEU
FSWE
V25
/FSCASU
FSCAS
V24
/FSRASU
W26
FSRAS
Y25
FSCKE
FSBKSELU0
Y26
FSBKSEL0
FSBKSELU1
FSBKSEL1
AC18
AD18
AE18
AF18
AE19
A3+
AF19
A3-
AE20
AC+
AF20
AC-
AD21
AD22
AE21
A2+
AF21
A2-
AE22
A1+
AF22
A1-
AE23
A0+
AF23
A0-
AD23
MENU
AD24
SEL
AE24
PWR
AF24
DOWN
AF25
UP
AF26
LED_G
AE25
LED_R
AE26
ADO_C
AE8
nYCOEN
AF8
nVDSW_SEL
AC9
nRESET
AD9
AE9
AF9
CARD_RESET
AD10
AE10
TUNER12V_KEY
AF10
AC11
AD11
AE11
AF11
B3+
AF12
B3-
AE12
BC+
AF13
BC-
AE13
AD14
AF14
B2+
AE14
B2-
AF15
B1+
AE15
B1-
AF16
B0+
AE16
B0-
T115
AC7
DCLK
AF17
T116
AD16
AD7
AD8
JTAG_TRST
AF7
AE7
AF6
AE6
AD6
AF5
TT_I2C SD A
AE5
TT_I2C SC L
AD5
AC5
AF4
AE4
A26
PPWR
B26
PBIAS
AC17
AC16
OEXTR
OEXTR
AD15
D_GND
GND
S
S
S
D
D
D
D
D
D
S
D
D
_
_
_
3
3
3
3
3
3
D
A
D
S
S
S
S
S
S
V
V
V
C76
4
4
2
J
J
K
0.1uF/6
TXA3+ TXA3­TXAC+ TXAC-
TXA2+ TXA2­TXA1+ TXA1­TXA0+ TXA0-
TXB3+ TXB3­TXBC+ TXBC-
TXB2+ TXB2­TXB1+ TXB1­TXB0+ TXB0-
R48 0/6
PPWR PBIAS
R42 3K3/6
/FSWEU /FSRASU /FSCASU FSCKEU FSDQMU0 FSDQMU3FSCKEU FSDQMU1 FSDQMU2
R59 10K/6
R52 2K7/6
C78
0.1uF/6
RN11
FSDATAU0
33
FSDATAU1 FSDATAU2 FSDATAU3
RN12
FSDATAU4
33
FSDATAU5 FSDATAU6
RN7
FSDATAU7
33
FSDATAU10 FSDATAU11 FSDATAU9 FSDATAU8
RN6
FSDATAU14
33
FSDATAU15 FSDATAU12
RN13
FSDATAU13
33
FSDATAU16 FSDATAU17 FSDATAU18
RN9
FSDATAU19
33
FSDATAU20 FSDATAU21 FSDATAU22 FSDATAU23
RN5
FSDATAU28
33
FSDATAU26 FSDATAU25
RN4
FSDATAU24
33
FSDATAU29 FSDATAU30 FSDATAU31 FSDATAU27
RN3
FSADDRU6
33
FSADDRU5 FSADDRU4 FSADDRU9
RN2
FSBKSELU1FSADDRU2
33
FSBKSELU0 FSADDRU8 FSADDRU7
FSADDRU0 FSADDRU1
RN8
FSADDRU11
33
FSADDRU10 FSADDRU3 FSADDRU2
FSCLK+ FSCLK-
R34 33R/6
RN10
1
8
33
2
7
3
6
4
5
1
8
RN1
2
7
33
3
6
4
5
+3.3V_D IG
R173
10K/6
R128
ADO_C 8
10K/6
DVI DETECT
CARD DETECT
TUNER 12 V_K EY 7
+3.3V_D IG
MUTE
MUTE 8
+3.3V_D IG
+3.3V_D IG
R63 10K/6
VGA_CAB
T117
PPWR 7
PBIAS 7
GND
+5V
C80
0.1uF/6
GND
FSDATA[0..31]
1
8
FSDATA0
2
7
FSDATA1
3
6
FSDATA2
4
5
FSDATA3
8
1
FSDATA4
7
2
FSDATA5
6
3
FSDATA6
5
4
1
8
FSDATA7
2
7
FSDATA10
3
6
FSDATA11
4
5
FSDATA9 FSDATA8
1
8
FSDATA14
2
7
FSDATA15
3
6
FSDATA12
4
5
8
1
FSDATA13
7
2
FSDATA16
6
3
FSDATA17
4
5
FSDATA18
1
8
FSDATA19
2
7
FSDATA20
3
6
FSDATA21
4
5
FSDATA22 FSDATA23
8
1
FSDATA28
7
2
FSDATA26
6
3
FSDATA25
5
4
1
8
FSDATA24
2
7
FSDATA29
3
6
FSDATA30
4
5
FSDATA31 FSDATA27
1
8
FSADDR6
7
2
FSADDR5
6
3
FSADDR4
5
4
FSADDR9
1
8
FSBKSEL1
2
FSBKSEL0
7
3
FSADDR8
6
4
5
FSADDR7
R36 33R/6
FSADDR0
R35 33R/6
FSADDR1
1
8
FSADDR11
2
7
FSADDR10
3
6
FSADDR3FSADDRU11
4
5
FSADDR2
/FSWE
/FSWE 5
/FSRAS 5
/FSRAS
/FSCAS 5
/FSCAS FSCKE
FSCKE 5
FSDQM0 FSDQM3 FSDQM1 FSDQM2
Place Ser ies te rm ination re sis tors o n bidire ctional line s-DATA an d DQS (RN600,RN602,RN604,RN606,R605) midway be twe en U600 anf U700
Max trace lengt h on this inter fce is 2.5 inches
Minimiz e trace length dif feren ce betw ee n DQS and data and among the data lines
R603, R604 very close to U600
FSCLK+, FSCLK- should b e rout ed like a diffe rent ail pair
+3.3V_D IG
R33
10K/6
TVBOX_D ETEC T
VGA_CAB 3
+3.3V_D IG
3
C C
1
/RESET
V
OUT
D N G
U8
MAX809_0
2
GND
FSDATA[0..31] 5
FSBKSEL1 5
FSBKSEL0 5
FSCLK+ 5
FSCLK- 5
FSDQS 5
FSDQM[0..3] 5
Place Series termination resistors on all address and control line s (RN601,RN603,RN605) very close to U600
Unloaded tr ace im pedan ce on th is inte rface is 90 Ohm Loaded tr ace imp edace w ith DRAM load is 65 Ohm (for 2.5 inch t otal trace length)
+3.3V_D IG
R172
10K/6
+5V
+3.3V_D IG
R174
R175
0/6
0/6/NC
R82 2K7/6
8
R81 2K7/6
7
6
MSTR_S C L
5
MSTR_S D A
GND
I2C addre ss: A2H and A3H
/RESET
FSADDR[0..11] 5
R84 0/6
U7
VCC WP SCK
24LC32-SN
SOIC8
V5IR
+3.3V_LV DS
R15
10K/6/NC
R129 0/6/NC
R16
PANEL_VC C
0/6/NC
GND
1
A0
2
A1
3
A2
4
R85
VSSSI
0/6/NC
GND
GND
3
3
8
8
3
3
.
.
.
.
.
.
3
3
1
1
3
3
_
_
_
_
_
_
I
I
C
C
C
C
V
D
D
D
D
D
A
A
A
A
D
D
D
D
N
N
N
N
D
D
D
G
G
G
G
N
N
N
D
A
A
A
_
_
_
_
_
G
G
G
_
_
_
C
I
I
I
C
C
C
V
V
V
D
D
D
D
A
D
D
D
A
A
A
7
4
5
7
7
4
1
A
A
B
C
E
C
E
CN8
1
RX2-
1
3
RX1-
3
5
RX0-
5
7
RXC-
7
9
9
11
Y0
11
13
Y2
13
15
Y4
15
17
Y6
17
19
LLC_VPC
19
21
21
23
SCART_FUNC
23
25
SCART_RGB_CON
25
27
nYCOEN
27
29
nVDSW_SEL
29
31
nRESET
33
DVI DETECT
33 34
35
CARD DETECT
35 36
37
TVBOX_DETECT
37 38
39
IR1
39 40
41
41 42
43
43 44
V12
1841 44P
GND
TXA0­TXA1­TXA2-
TXAC­TXA3­TXB0-
TXB1­TXB2­TXBC­TXB3-
R130 0/6/NC
LCDVCC
GND
PANEL_VCC
V 5
6
2
/
/
F
F
u
u
1
1
2
.
2
1
2
0
1
C
C
GND
Title
04. gm1601
Size Document Number Rev
04. gm1601
2
RX2+
2
4
RX1+
4
6
RX0+
6
8
RXC+
8
10
10
12
Y1
12
14
Y3
14
16
Y5
16
18
Y7
18
20
KEY1
20
22
KEY2
22
24
KEY3
24
26
MSTR_SCL
26
28
MSTR_SDA
28
30
TT_I2CSCL
30
32
TT_I2CSDA
3231
34
CARD_RESET
36
ADO_L 8
38
40
42
44
GND
AGND
CN2
1
2
TXA0+
1
2
3
4
TXA1+
3
4
5
6
TXA2+
5
6
7
8
7
8
9
10
TXAC+
9
10
11
12
TXA3+
11
12
13
14
TXB0+
13
14
15
16
15
16
17
18
TXB1+
17
18
19
20
TXB2+
19
20
21
22
TXBC+
21
22
24
23
TXB3+
23
24
25
26
25
26
27
28
LCDVCC
27
28
29
30
LCDVCC
29
30
1841 30P
GND
PROJECT : M0TW
Quanta Computer Inc.
M0TW
48Tuesday, September 14, 2004Date: Sheet
ADO_R 8
+3.3V_LV DS
C N
/ 6
4
/ 1
K 0
R 1
3 1 R
C N / 6
/ 0
GND
A
of
- 36 -
Page 37
CN9
ZD005D 100
MUTE4
ADO_L4
LIN_L
+2.5V_DDR
1
5
4
3
2
ADO_L LIN
C202 1u/8
AGND
MUTE
VOLUME7
12V_A
lef t_in
6 /
F
3
p
1
0
1
2
C
2
AGND
+12V
R75 4K7/6
+5V
6
/ F u 1
. 0
9 9 1 C
AGND
R109 0/6
R110 0/6
6
/
F
4
p
1
0
1
2
C
2
AGND
R79 10K/ 6
L36 CX000800000/1206
U12
1
2Y1
2
2Y0
3
3Y1
4
3Z
5
3Y0
6
E
7
VEE
8
GND S3
74HCT4053
L20 CX000800000/1206
L22 CX000800000/1206
L23 CX000800000/1206
C
C
N
N
/
/
6
6
/
/
K
K
1
1
.
.
5
5
4
3
1
1
1
1
R
R
AGND
AGND
L 4 0 9
3
3
AGND
2
T B
0MM 1
6
Q
/
K
1
0 1
6 7 R
AGND
VOLUME
16
VCC
15
2Z
14
1Z
13
1Y1
C201 1u/8
12
1Y0
11
S1
10
S2
9
AGND
AGND
ADO_C
AGND
AGND
6
/ F u 1
. 0
0 0 2 C
RIN
ADO_R
+12V
LIN_L
6 /
F
p 0
2
2
0
2
1 C
AGND
RIN
LIN
RIN_R
6 /
F p
0
1
2
0
2
1 C
C75 1u/8
C79 1u/8
C83 1u/8
C85 1u/8
C95 1u/8
6
/ F u 1
. 0
7 9
C
ADO_R 4
ADO_C 4
RIN_R
AGND
C204 0.1uF/6
C205 0.1uF/6
V 5 2
/
F
1
u
8
2
C
2
U9
1
SDZ
2
RIN+
3
RIN-
4
V2P5
5
LIN-
6
LIN+
7
AVDDR EF
8
VREF
9
VARDI FF
10
VARMAX
11
VOL
12
AGND
9 0 1
C
C
V
5 2 / F u 2 2
6 /
F u 1 . 0
2 7
8
7
4
4
+ R S B
+ L S B
3
4
1
1
6
/ F u 1
. 0
4 0 1 C
12V_A
12V_A
C71
0.01uF/ 6
6
5
4
4
R
R
C
C
C
C
V
V
P
P
L
L
C
C
C
C
V
V
P
P
5 1
C103 0.01uF/ 6
SPKRO+ SPKRO-
12V_A
6 0
6 0 2 1
/ 0 0 0 0 0 8
6
0
1
0
L
0 X C
4 4
+
+
T
T
U
U
O
O
R
R
+
+
T
T
U
U
O
O
L
L
6
7
1
1
6
0
2
1
/ 0 0 0 0 0 8 0 0
4
0
2
X
L
C
2 1
/
6
6
0
/
/
0
F
F
p
0
p
0
0
0
0
0
0
8
0
4
0
5
0
1
6
1
6
0
7
C
0
C
1
X
L
C74
C
0.01uF/ 6
0
3 4
R D N G P
L D N G P
8 1
9
1
2
3
4
4
4
-
-
R
R
T
T
C
D
U
U
C
N
O
O
V
G
R
R
P
P
L
L
-
-
D
C
T
T
N
C
U
U
G
V
O
O
P
L
L
P
9
0
1
2
1
2
2
2
8 3
R C C V
VCLAMPR
P
VAROUTR
L C C V P
3 2
7 3
-
R
S B
MOD EB
MOD E
AVCC
VAROUTL
AVDD
COSC
ROSC
AGND
VCLAMPL
­L S B
4 2
3 7
C
NC
6 /
F u 1 . 0
TPA3003D2
V 5 2 / F
6
u
6
2
C
2
36
C82 1u/8
35
34
33
32
31
30
29
C87 0.1uF /6
28
C96 220pF/ 6
27
R87 120K/6
26
25
C99 1u/8
12V_A
6
V
/
5
F
2
u
/
1
4
F
.
6
8
u
0
8
2
C
C
2
L21 CX000800000/1206
AGND
AGND
GND
C106 0.01uF/ 6
88Tuesday , September 14, 2004
CN6
1 2 3 4
4501-04-04P-R
of
A
6
6
/
0
F
2
u
1
1
/
.
0
0
0 0 0 0 8
5
0
2
0
L
0 X
6
6
/
/
C
F
F
p
p
0
0
0
0
0
0
111
121
1
1
C
C
SPKLO-
SPKLO+
12V_A
0 1
5
1
0
C
1 C
Tit le
Size Document Number Rev
Date: Sheet
V 5 2 / F u 2 2
SPKRO+ SPKRO­SPKLO+ SPKLO-
08. Audio
08. Audio
PROJECT : M0TW
Quanta Computer Inc.
M0TW
6
/ F u 1
. 0
GND
0 3 C
6 /
1
F
3
u 1
C
. 0
FSADDR0 FSADDR1 FSADDR2 FSADDR3 FSADDR4 FSADDR5 FSADDR6 FSADDR7 FSADDR8 FSADDR9 FSADDR10 FSADDR11
FSBKSEL0 FSBKSEL1
FSCLK­FSCLK+ FSCKE
/FSRAS /FSCAS /FSWE DQS
6
/
/
F
F
5
u
u
C
1
1
.
.
0
0
FSDQM0 FSDQM1 FSDQM2 FSDQM3
MT46V2 M32LG -4
TQFP -10 0
4 C
31
32
33
34
47
48
49
50
51
45
36
37
29
30
54
55
53
28
27
26
25
94
23
56
24
57
38
39
40
41
42
43
44
87
88
89
90
91
93
V
V
5
5
4
2
0
2
9
/
/
2
2
C
GND
FSDATA[0..31]4
FSADDR[0..11]4
2
F
F
C
u
u
C
2
2
2
2
FSBKSEL04
FSBKSEL14
FSCLK-4
FSCLK+4
FSCKE4
/FSRAS4
/FSCAS4
/FSWE4
FSDQS4
FSDQM[0..3]4
6
6
6
6
/
2
F
C
u 1
.
0
+2.5V_DDR
4
8
2
1
Q
Q
D
D
D
D
V
V
Q
Q
S
S
S
S
V
V
1
9
1
5
1
6
/
/
6
/
F
3
u
1
1
.
C
0
7
9
2
6
5
2
Q
Q
Q
Q
D
D
D
D
D
D
D
D
V
V
V
V
Q
Q
Q
Q
S
S
S
S
S
S
S
S
V
V
V
V
2
0
6
6
7
7
/
F
F
F
u
u
u
1
1
7
.
1
.
0
3
9
7
7
Q D D
V
Q
S S V
2
2
9
8
GND
8
8
.
2
0
1
2
0
C
C
C
5
5
5
6
5
6
1
3
6
9
9
8
Q
Q
Q
D
D
D
D D D V
Q S S V
D
D
D
D
D
D
V
V
V
V
D
D
V
V
Q
S
S
S
S
S
S
S
S
S
S
V
V
V
V
V
6
6
6
9
5
1
4
6
9
8
6 /
F
3
u
C
1 . 0
A0 A1 A2 A3 A4 A5 A6 A7 A8/AP A9 A10
A11
BA0 BA1
CLK
CLK CKE CS
RAS
CAS
WE
DQS
DM0 DM1 DM2 DM3
NC NC NC NC NC NC NC NC NC NC NC DNC NC
6
/ F u 1
. 0
FSVREF
8
5
F E
R
V
2 5
6
6
6
/
/
/
F
F
F
6
7
9
u
u
u
1
1
C
1
1
1
.
.
.
C
C
0
0
0
U1
97
DQ0
98
DQ1
100
DQ2
1
DQ3
3
DQ4
4
DQ5
6
DQ6
7
DQ7
60
DQ8
61
DQ9
63
DQ10
64
DQ11
68
DQ12
69
DQ13
71
DQ14
72
DQ15
9
DQ16
10
DQ17
12
DQ18
13
DQ19
17
DQ20
18
DQ21
20
DQ22
21
DQ23
74
DQ24
75
DQ25
77
DQ26
78
DQ27
80
DQ28
81
DQ29
83
DQ30
84
DQ31
L C M
Place series termination resistors very close to U600
FSDATA0 FSDATA1 FSDATA2 FSDATA3 FSDATA4 FSDATA5 FSDATA6 FSDATA7
FSDATA8 FSDATA9 FSDATA10 FSDATA11 FSDATA12 FSDATA13 FSDATA14 FSDATA15
FSDATA16 FSDATA17 FSDATA18 FSDATA19 FSDATA20 FSDATA21 FSDATA22 FSDATA23
FSDATA24 FSDATA25 FSDATA26 FSDATA27 FSDATA28 FSDATA29 FSDATA30 FSDATA31
+2.5V_D DR
FSVREF
GND
C1
0.1uF/6
R4
140R/6 1%
GND
R3 10K/6 1%
FSVREF
R1 10K/6 1%
FSCLK+
FSCLK-
Place R704 termination close to corresponding U600 Pins
PROJECT : M0TW
Titl e
05. Frame Store
Size Doc ument Number Rev
Date: Sheet
Quanta Computer Inc.
05. Fram e Store
MOTW
58Thursday , September 02, 2004
of
A
- 37 -
Page 38
+3.3V_LVDS
+3.3V_LBADC
+3.3V_ DVI
+3.3V_ DIG
2
3
4
5
+1.8V_C ORE
+3.3V_LVDSB
+3.3V_I/O_MALIBU
H4
1
MTH276D126
CX000800000/1206
CX000800000/1206
9
8
7
6
+3.3V_ADC
CX000800000/1206
CX000800000/1206
CX000800000/1206
CX000800000/1206
H5
2
9
3
8
1
4
7
6
5
MTH276D126
GND
GND
H6
2
9
3
8
1
4
7
5
6
MTH276D126
GND
GND
GND
H2
2
3
1
4
5
MTH276D126
GND
L18
L6
L9
L11
CX000800000/1206
L19
L7
CX000800000/1206
L10
CX000800000/1206
L26
CX000800000/1206
H1
2
3
1
4
5
MTH276D126
9
8
7
6
GND
+3.3V_PLL
9
8
7
6
AGND
+3.3V_LVDSA
GND
+1.8V_ DVI
L12
L14
AGND
+1.8V_ADC
H3
2
9
3
8
1
4
7
5
6
MTH276D126
GND
GND
VGA_5V
GND
D8
DAN202U
1
3
U10
1
2
A1A2WP
3
4
GND
24C02
ANA LOG DDC
VGA_SCL
VGA_SDA
A-BLUE
A-GREEN
A-RED
3
C N V 6
4
5
D
1
%
%
1
1
6
6
/
/
R
R
5
5
7
7
4
0
0
0
1
1
R
R
GND
GND
Near VGA pins
3
C N
/
/
V 6
.
.
5
5
D
1
VGA_5V
% 1
6 R
5 7
3 0 1 R
GND
6 /
F p
7 4 0 0 1
C
/
R88 20R /6 1%
R90 20R/6 1%
R91 20R6 1%
R93 20R /6 1%
R95 0/6
6
/
F p
7 4 8 0 1 C
%
%
1 6
/
R
6 5
9 8
R
GND
GND
U11
1
1A
2
1Y
3
2A
4
2Y
5
3A
6
3Y
8
4Y
9
4A
SN74LVC14A/N C
C89 0.01uF/6
C90 0.01uF/6
C91 0.47uF/6
C92 0.01uF/6
C69 0.01uF/6
C94 0.01uF/6
C93 0.01uF/6
%
1
1
6
6
/
/
R
R
6
6
5
5
3
2
8
9
R
R
GND
VCC GND
CN7
7
R101 100R/6
+5V
8
7
6
5
GND
C88
0.1uF/6
GND
R102 100R/6
R86
10K/6
3
1
GND
2
VCCA0
SCL SDA
3
D7
5.6V/NC
1
GND
R98
10K/6
D6
5.6V/NC
VGASCL
VGASDA
15
14
13
12
11
DB15 HD
A-VS
1
5
10
4
9
3
8
2
7
1
6
6 1
GND
A-HS
A-VS
R97 22R/6
A-HS
R96 22R/6
S N
/
6
/
5 0
R
1
0 1
R
5
GND
R106 0/ 6/NC
GND
RGB SIGNAL GNDs at 2 -mm f rom r espe cti ve RGB ser ies Capac itor s
R94 0/6
13
6A
12
6B
11
5A
10
5B
14
7
6 /
F u 1
7
.
0
0
1
C
GND
GND
VGA_SCL 4
VGA_SDA 4
VGA_CAB 4
BLUE+ 4
BLUE- 4
SOG 4
GREEN+ 4
GREEN- 4
RED+ 4
RED- 4
AHS 4
AVS 4
+3.3V
PROJECT : M0TW
Qua nta Computer In c.
Titl e
03. Graphic Inputs
Size Document Number Rev
03. Graphic Input s
Date: Sheet
M0TW
38Friday, Sept ember 10, 2004
A
of
- 38 -
Page 39
+3.3 V_DI G
R40 10K/6/NC
R43 10K/6
R67 10K/6
/OCM_WE4
/OCM_RE4
/ROM_CS4
/OCM_WE /OCM_RE /OCM_CS
OCMADDR[0..19]4
OCMDATA[0.. 7]4
OCMDATA[0..7]
OCMADDR[0..19]
+3.3V_ DIG
V 5 2 / F
0
u
6
2
C
2
GND
Sock et for a X8 Flash (64/128/256/512K) and PROMJETmem ory Em ulator
6
/ F u 1
9
.
5
0
C
OCMADDR18 OCMADDR17 OCMADDR16 OCMADDR15 OCMADDR14 OCMADDR13 OCMADDR12 OCMDATA1 OCMADDR11 OCMADDR10 OCMADDR9 OCMADDR8 OCMADDR7 OCMADDR6 OCMADDR5 OCMADDR4 OCMADDR3 OCMADDR2 OCMADDR1 OCMADDR0
1
30
2
3
29
28
4
25
23
26
27
5
6
7
8
9
10
11
12
XU 1
A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
A28F001
29LV040B
DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
CE# OE#
WE#
VCC
VSS
21
20
19
18
17
15
14
13
22
24
31
32
16
OCMDATA7 OCMDATA6 OCMDATA5 OCMDATA4 OCMDATA3 OCMDATA2
OCMDATA0
/ROM_CS /OCM_RE /OCM_WE
+3.3V_ DIG
GND
+3.3V_ DIG
R68 10K/6
R69 10K/6
R70 10K/6/NC
R62 10K/6/NC
R55 10K/6/NC
R47 10K/6
R50 10K/6/NC
OCMADDR8 OCMADDR9 OCMADDR13 OCMADDR14 OCMADDR15 OCMADDR16 OCMADDR18 OCMADDR17 OCMADDR19 OCMADDR10 OCMADDR11 OCMADDR12
INT_OSC
8-BIT_FLASH2
R65 10K/6
R80 10K/6
R41 10K/6
R46 10K/6
R71 10K/6
Firmware_Bypas s DDC2BI Serial_Int erfac e_Debug1 Serial_Int erfac e_Debug2 Serial_Int erfac e_Debug3
8-BIT_FLASH1 8-BIT_FLASH3 TCL K OUTPUTS_ZERO OUTPUTS_ZERO
R56 10K/6
R51 10K/6/NC
R61 10K/6
R64 10K/6
R73 10K/6
GND
GND
10: LOW (Use TCLK)
11: LOW (set all display output to '0')
12: LOW
13: LOW(disa ble se rial inte rface d eb ug)
14: LOW
15: LOW
16: HIGH (use crystal)
17: LOW (8bit b us w ith OCM acce ss e xter nal ROM)
18: HIGH
19: LOW
PROJECT : M0TW
Quanta Computer Inc.
Tit le
06. Memory I/F
Size Document Number Rev
06. Memory I/F
Date: Sheet
R22 330K/ 6
6 / F p 0
2
2
3
1
C
GND
L13
CX000800000/1206
V
+
5 2 / u 0 0
6
1
5 C
ON/OFF
ADJ
R18 47R/6
VOLUME 8
3 2 R
+5V
+1.8V_CORE
D1 1SS355
% 1 6 / K 0 4 2
Q7
1
2
2N3906
6 /
3
K
1 0 2 R
L35
CX000800000/1206
+5V
L8 CX000800000/ 1206
+5V
5
7
6
8
D2
2
4
3
1
1SS355
V5IR
+
V 5 2 / u
8
0
4
0
C
1
L5 CX000800000/ 1206
6 Q
V
+
1 4 C
O S / A 0 1 4 9 S D N
3
1
5 2 / u 0 0 1
C22
0.1uF/6
L3 47UH
1
D3
RB081L-20
2
GND
U4
VOUTVIN
ADJ/GND
AIC1084/TO252
R58
330/6 1%
GND
U3
3
1
LT1117/TO223
ADJ/GND
L30
+12V
CX000800000/1206
GND
R147 4K7/6
R144 330K/ 6
6 / F p 0
4
2
8
1
1 C
+12V
R143 47R/6
+5V
+18V
CX000800000/1206/NC
CX000800000/1206
R19 0/6/NS
R148 0/6/NC
D20 1SS355
%
1 6
/ K
5
0
4
4
1
2
R
L33 C X000800000/1206/NC
L28
L29
3
2
1
1
2
4 3 C
GND
+3.3V_ADC
2
R57
200/6 1%
+
3 5 C
0.8A Max
2
VOUTVIN
R38
200/6 1%
R39
200/6 1%
GND
L4
CX000800000/1206
6 /
V
F
6
u
6
1
/
1
V
/
.
F
6
u
6
50
p
1
0
3
3
/
0
3
u
3
C
0
C
3
0
0
0
3
2
1
3
C
GND
GND
6 0
U20
2 1
/
0
+18V
0 4 1 R
V
+
5 2 / u 0
6
0
/
801
F
1
u
8
1
/
1
C
.
u
8
0
1
1
2
C
8 1 C
GND
GND
R141
953R/6 1%
GND
V 5 2 / u 0 0 1
+2.5V_DDR
V
+
5 2 / u 0 0
3
1
4 C
8
BOOST
7
IS
6
VCC
5
AIC1563
R142 8K2/ 6 1%
C183 2200pF/6
1
DC
2
DE
3
CF
4
GNDFB
GND
R29 4K7/6
PPWR4
TUNER12V_KEY4
+5V
C189
1u/8
3
Q20
2
MMBT3904L
1
GND
5
7
6
D21
1SS355
2
4
3
Q22
MMST3906
6
/ K 1
6 4 1 R
R17
C23
4K7/6
1u/8
Q5
MMBT3904L
GND
6 0 2 1
U2
/ 0
L2 CX000800000/1206
V
+
5 2 / u 0 0 1
ON/OFF
6 / F p 0
0
2
1
1
2 C
GND
+3.3V_AD C
PWM14
PWM04
18V
ADJ
GND
+5V
R11 10K/6/NC
PBIAS4
PWM1
+18V
1 2 R
V
+
5 2
/
u
6
0
/
0
4
F
1
1
u 1
C
1
.
2
0
C
GND
L37 C X000800000/1206
GND
L15 CX000800000/1206
R126 0/6
4K7/6/NC
R9
+5V
R10
+5V
R8 1K/6
PWM0
R2 4K7/6
8 / u
1 6 2
C
GND
GND
+
V
5 2 / u
1
0
6
0
C
1
2
R6 4K7/6/NC
R7 0/6
4K7/6/NC
3
2
1
GND
8
7
6
5
R25
1K/6 1%
3
1
GND
Q1
R5 10K/6
MMBT3904L
BOOST
IS
VCC
AIC1563
R24 3K/6 1%
C33 2200pF/6
U6
3
VOUTVIN
1
ADJ/GND
AIC1084/TO252
148R/6 1%
GND
100K/6
R12
Q3
MMBT3904L /NC
Q2 MMST3906/NC
GND
1
DC
2
DE
3
CF
4
GNDFB
GND
2
R72
330R/6 1%
R74
6
/
F
R127
u 1
.
1K/6/NC
0
0 1 C
GND
GND
6 / F u 1 . 0
7 C
GND
18V
6
/
6
F
/
u
F
6
p
1
/
.
F
0
8
C80
p
2
0
0
1
7
2
2
0
C
1
2 C
5 1 C
GND
20268-04
CN4
6
6
1
7
7
2
8
8
3
9
9
4 5
18V
4500-07
7 6 5 4 3 2 1
CN1
6
/ F p 0
9
2
0
1
2 C
M0TW
68Thursday , September 02, 2004
Q21
1
R149
2
3
4K7/6
4
SI9435
8
O S / A 0 1 4 9
3
S
2
C188
D
Q
N
0.1uF/6
1
L34 47UH
2
1
D22
RB081L-20
2
GND
Q4
8
1
2
7
3
6
4
5
SI9435
L31
8
7
6
CX000800000/1206
5
C190
0.1uF/6
GND
1
6
/
7
F
8
u
6
1
/
1
.
C
F
5
6
0
p
8
8
0
1
1
0
C
C
0 1
GND
GND
GND
L1
CX000800000/1206
+
C9
C25
330uF/16V
0.1uF/6
GND
GND
PROJECT : M0TW
Quanta Computer Inc.
Title
POWER
Size Document Number Rev
07. Power
Date: Sheet
of
V 6 1 / u
1
0
9
3
1
3
C
GND
L32
CX000800000/1206
V 6 1 / u 0 3 3
PANEL_VCC
C16
0.1uF/6
25V
GND
M0TW
A
V12
C192
0.1uF/6
GND
+12V
A
of
78Tuesday, Sept ember 14, 2004
- 39-
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