Zilog Z8 ENCORE user manual

Application Note

NVDS Operation in the Z8 Encore!® and

Z8 Encore! XP® Microcontrollers

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Introduction

The Z8 Encore! ® and Z8 Encore! XP® families have parts containing Non-Volatile Data Storage (NVDS) of up to 256 bytes. This memory can perform over 100,000 write cycles. This Application Note describes the necessary operations and procedures to access the NVDS.

NVDS Operations

The NVDS memory on the Z8 Encore! ® and Z8 Encore! XP® microcontroller acts like an Electrically Erasable Programmable Read-Only Memory (EEPROM) emulated within the Flash memory that is capable of up to 100,000 write cycles. Different devices feature multiple NVDS array sizes.

	Flash	RAM	NVDS	ADC
Part	(KB)	(B)	(64B)
Number
Z8F1232	12	256	No	Yes
Z8F1233	12	256	No	No
Z8F0830	8	256	Yes	Yes
Z8F0831	8	256	Yes	No
Z8F0430	4	256	Yes	Yes
Z8F0431	4	256	Yes	No
Z8F0230	2	256	Yes	Yes
Z8F0231	2	256	Yes	No
Z8F0130	1	256	Yes	Yes
Z8F0131	1	256	Yes	No

Table 1. F0830 series Part Selection Guide

NVDS Operation in the Z8 Encore!® and Z8 Encore! XP® MCU’s

Application Note

Table 2. F083A series Part Selection Guide

Table3. F082A series Part Selection Guide

Table 4. F1680 series Part Selection Guide

The NVDS is implemented by special purpose Zilog® software stored in areas of program memory not accessible to the user. These special-purpose routines use the flash memory to store and read the data. The routines incorporate a dynamic addressing scheme to maximize the Write/Erase endurance of the Flash.

The following routines are required to access the NVDS:

1.Write routine

2.Read routine

Both of these routines are accessed with a CALL instruction to a pre-defined address outside the program memory that is not accessible to the user. Both the NVDS address and data are single-byte values. These routines save the working register set before they are used (hence, 16 bytes of stack space is needed). After finishing the call to these routines, the working register set of the user code is recovered.

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NVDS Operation in the Z8 Encore!® and Z8 Encore! XP® MCU’s

Application Note

This section discusses the following topics in detail:

•Interrupt Handling During NVDS Operation

•Flash Frequency Register Initialization

•NVDS Write Operation

•NVDS Read Operation

•Power Failure Protection

•Optimizing NVDS Memory Usage for Execution Speed

When the Z8 Encore! XP F042A Series device is in the DEBUG Mode, you can view the NVDS memory locations by performing the following steps in ZDS II:

1.Navigate to View Debug Windows Memory. The Memory Window appears.

2.In the Memory Window, select the NVDS option from the Space drop down menu to view the NVDS contents.

Interrupt Handling during NVDS Operation

Interrupts should be disabled before executing any NVDS operation (read or write) since they can alter the working register and existing stack contents.

Flash Frequency Register Initialization

The Flash Frequency Registers must be programmed based on the system clock frequency.

void init_NVDS (void)

{

FFREQH = (SYSCLOCK/1000) >> 8; FFREQL = (SYSCLOCK/1000) & 0xFF;

}

Note: SYSCLOCK is the system clock frequency in hertz. For proper NVDS operation, the flash frequency registers should always have the proper value. Hence, whenever the system clock is changed, the flash frequency register should also be updated. Improper values stored in the flash frequency register could result to corrupted data in the NVDS area.

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