ZILOG Z8E00110HEC, Z8E00110HSC, Z8E00110PEC, Z8E00110PSC, Z8E00110SEC Datasheet

DS97Z8X1300

P R E L I M I N A R Y

1

1

P

RELIMINARY

P

RODUCT

S

PECIFICATION

Z8E001

1

CMOS OTP M

ICROCONTROLLER

FEATURES

Microcontroller Core Features

■

All Instructions Execute in one 1 µ s Instruction
Cycle with 10 MHz Crystal

■

1K x 8 On-Chip OTP EPROM Memory

■

64 x 8 General-Purpose Registers (SRAM)

■

Six Vectored Interrupts with Fixed Priority

■

Operating Speed: DC - 10 MHz

■

Six Addressing Modes: R, IR, X, D, RA, & IM

Peripheral Features

■

13 Total Input/Output Pins

■

One 8-Bit I/O Port (Port A)
– I/O Bit Programmable
– Each Bit Programmable as Push-Pull or Open-

Drain

■

One 5-Bit I/O Port (Port B)
– I/O Bit Programmable
– Includes Special Functionality:

Stop-Mode Recovery Input
Comparator Inputs
Selectable Edge Interrupts
Timer Output

■

One Analog Comparator

■

16-Bit Programmable Watch-Dog Timer (WDT)

■

Software Programmable Timers Configurable as:
– Two 8-Bit Standard Timers and One 16-Bit

Standard Timer or

– One 16-Bit Standard Timer and One 16-Bit Pulse

Width Modulator (PWM) Timer

Additional Features

■

On-Chip Oscillator that Accepts XTAL, Ceramic
Resonator, LC, or External Clock

■

Programmable Options:
– EPROM Protect

■

Power Reduction Modes:
– HALT Mode with Peripheral Units Active
– STOP Mode with all Functionality Shut Down

CMOS/Technology Features

■

Low-Power Consumption

■

3.0V to 5.5V Operating Range @ 0 ° C to +70 ° C

4.5V to 5.5V Operating Range @ -40 ° C to +105 ° C

■

18-Pin DIP,SOIC, and 20-Pin SSOP Packages.

Part ROM RAM* Speed
Number (KB) (Bytes) (MHz)

Z8E001 1 64 10

* General-Purpose

Z8E001
CMOS OTP Microcontroller Zilog

2

P R E L I M I N A R Y

DS97Z8X1300

GENERAL DESCRIPTION

Zilog's Z8E001 Microcontroller (MCU) is a One-Time Pro­grammable (OTP) member of Zilog’s single-chip Z8

Plus

MCU family that allows easy software development, de­bug, prototyping, and small production runs not economi­cally desirable with masked ROM versions.

For applications demanding powerful I/O capabilities, the
Z8E001's dedicated input and output lines are grouped
into two ports, and are configurable under software con­trol.

Both 8-bit and 16-bit on-chip timers, with a large number of
user selectable modes, offload the system of administer­ing real-time tasks such as counting/timing and I/O data
communications.

Note: All signals with a preceding front slash, “/”, are

active Low. For example, B//W (WORD is active Low);
/B/W (BYTE is active Low, only).

Power connections follow conventional descriptions be­low:

Connection Circuit Device

Power

V

CC

V

DD

Ground GND

V

SS

Figure 1. Functional Block Diagram

One 16-bit
Std. Timer

Interrupt

Control

One Analog
Comparator

ALU

FLAG

Register

Pointer

RAM

Register File

Machine Timing

& Inst. Control

OTP

Prg. Memory

Program

Counter

VCC

GND XTAL

Port A

Port B

I/O

Two 8-bit Timers

or
One 16-bit PWM
Timer

I/O

/RESET

Z8E001

Zilog CMOS OTP Microcontroller

DS97Z8X1300

P R E L I M I N A R Y

3

Figure 2. EPROM Programming Mode Block Diagram

Z8E001

PORT

A

DATA
MUX

EPROM

ROM PROT

Z8E001 MCU

ADDRESS
GENERATOR

PGM + TEST
MODE LOGIC

ADDRESS
MUX

D7-0

D7-0

AD9 - 0

AD9 - 0

AD9 -0

D7 - 0

ADCLR/VPP/PGM

ADCLK

XTAL1

OPTION BIT

Z8E001
CMOS OTP Microcontroller Zilog

4

P R E L I M I N A R Y

DS97Z8X1300

PIN DESCRIPTION

Figure 3. 18-Pin DIP/SOIC Pin Identification/EPROM Programming Mode

/PGM

GND
GND
GND

ADCLR/VPP

D7
D6
D5
D4

ADCLK
XTAL1
NC
GND
VDD
D0
D1
D2
D3

18

DIP 18 - Pin

1

910

Table 1. 18-Pin DIP/SOIC Pin Assignments/EPROM Programming Mode

EPROM Programming Mode
Pin # Symbol Function Direction

1 /PGM Prog Mode Input
2-4 GND Ground
5 ADCLR/V

PP

Clear Clk./Prog Volt. Input

6-9 D7-D4 Data 7,6,5,4 In/Output
10-13 D3-D0 Data 3,2,1,0 In/Output
14 V

DD

Power Supply

15 GND Ground
16 NC No Connection
17 XTAL1 1MHz Clock Input
18 ADCLK Address Clock Input

Z8E001

Zilog CMOS OTP Microcontroller

DS97Z8X1300

P R E L I M I N A R Y

5

Figure 4. 18-Pin DIP/SOIC Pin Identification

PB1
PB2
PB3
PB4

/RST

PA7
PA6
PA5
PA4

PBO
XTAL1
XTAL2
VSS
VCC
PA0
PA1
PA2
PA3

18

DIP 18 - Pin

1

910

Table 2. 18-Pin DIP/SOIC Pin Assignments

Standard Mode
Pin # Symbol Function Direction

1–4 PB1–PB4 Port B, Pins 1,2,3,4 In/Output
5 /RESET Reset Input
6-9 PA7-PA4 Port A, Pins 7,6,5,4 In/Output
10-13 PA3-PA0 Port A, Pins 3,2,1,0 In/Output
14 V

CC

Power Supply

15 V

SS

Ground

16 XTAL2 Crystal Osc. Clock Output
17 XTAL1 Crystal Osc. Clock Input
18 PB0 Port B, Pin 0 In/Output

Z8E001
CMOS OTP Microcontroller Zilog

6

P R E L I M I N A R Y

DS97Z8X1300

PIN DESCRIPTION (Continued)

Figure 5. 20-Pin SSOP Pin Identification

PB1
PB2
PB3
PB4

/RESET

NC
PA7
PA6
PA5
PA4

PBO
XTAL1
XTAL2
VSS
VCC
NC
PA0
PA1
PA2
PA3

20

SSOP 20 - Pin

1

10 11

Table 3. 20-Pin SSOP Pin Assignments

Standard Mode
Pin # Symbol Function Direction

1–4 PB1–PB4 Port B, Pins 1,2,3,4 In/Output
5 /RESET Reset Input
6 NC No Connection
7-10 PA7-PA4 Port A, Pins 7,6,5,4 In/Output
11-14 PA3-PA0 Port A, Pins 3,2,1,0 In/Output
15 NC No Connection
16 V

CC

Power Supply

17 V

SS

Ground

18 XTAL2 Crystal Osc. Clock Output
19 XTAL1 Crystal Osc. Clock Input
20 PB0 Port B, Pin 0 In/Output

Z8E001

Zilog CMOS OTP Microcontroller

DS97Z8X1300

P R E L I M I N A R Y

7

Figure 6. 20-Pin SSOP Pin Identification/EPROM Programming Mode

/PGM

GND
GND
GND

ADCLR/VPP

NC

D7
D6
D5
D4

ADCLK
XTAL1
NC
GND
NC
VDD
NC
D1
D2
D3

20

SSOP 20 - Pin

1

10 11

Table 4. 20-Pin SSOP Pin Assignments/EPROM Programming Mode

EPROM Programming Mode
Pin # Symbol Function Direction

1 /PGM Prog Mode Input
2-4 GND Ground
5 ADCLR/V

PP

Clear Clk./Prog Volt. Input

6 NC No Connection
7-10 D7-D4 Data 7,6,5,4 In/Output
11-14 D3-D0 Data 3,2,1,0 In/Output
15 NC No Connection
16 V

DD

Power Supply

17 GND Ground
18 NC No Connection
19 XTAL1 1MHz Clock Input
20 ADCLK Address Clock Input

Z8E001
CMOS OTP Microcontroller Zilog

8

P R E L I M I N A R Y

DS97Z8X1300

ABSOLUTE MAXIMUM RATINGS

Stresses greater than those listed under Absolute Maxi­mum Ratings may cause permanent damage to the de­vice. This is a stress rating only; functional operation of the
device at any condition above those indicated in the oper­ational sections of these specifications is not implied. Ex­posure to absolute maximum rating conditions for an ex­tended period may affect device reliability. Total power
dissipation should not exceed 880 mW for the package.
Power dissipation is calculated as follows:

Parameter Min Max Units Note

Ambient Temperature under Bias –40 +105 C
Storage Temperature –65 +150 C
Voltage on any Pin with Respect to V

SS

–0.6 +7 V 1

Voltage on V

DD

Pin with Respect to V

SS

–0.3 +7 V

Voltage on /RESET Pin with Respect to V

SS

–0.6 V

DD

+1 V 2

Total Power Dissipation 880 mW
Maximum Allowable Current out of V

SS

80 mA

Maximum Allowable Current into V

DD

80 mA

Maximum Allowable Current into an Input Pin –600 +600

µ

A3

Maximum Allowable Current into an Open-Drain Pin –600 +600

µ

A4
Maximum Allowable Output Current Sunk by Any I/O Pin 25 mA
Maximum Allowable Output Current Sourced by Any I/O Pin 25 mA
Maximum Allowable Output Current Sunk by Port A 40 mA
Maximum Allowable Output Current Sourced by Port A 40 mA
Maximum Allowable Output Current Sunk by Port B 40 mA
Maximum Allowable Output Current Sourced by Port B 40 mA

Notes:

1. This applies to all pins except the /RESET pin and where otherwise noted.

2. There is no input protection diode from pin to V

DD

.

3. This excludes XTAL pins.

4. Device pin is not at an output Low state.

Total Power Dissipation = V

DD

x [I

DD

- (sum of I

OH

)]

+ sum of [(V

DD

- V

OH

) x I

OH

]

+ sum of (V

0L

x I

0L

)

Z8E001

Zilog CMOS OTP Microcontroller

DS97Z8X1300

P R E L I M I N A R Y

9

STANDARD TEST CONDITIONS

The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to
Ground. Positive current flows into the referenced pin (Fig­ure 7).

CAPACITANCE

T

A

= 25°C, VCC = GND = 0V, f = 1.0 MHz, unmeasured pins returned to GND.

Figure 7. Test Load Diagram

From Output

Under Test

150 pF

Parameter Min Max

Input capacitance 0 12 pF
Output capacitance 0 12 pF
I/O capacitance 0 12 pF

Z8E001
CMOS OTP Microcontroller Zilog

10 P R E L I M I N A R Y DS97Z8X1300

DC ELECTRICAL CHARACTERISTICS

TA = 0°C to +70 °C

Typical [1]

Sym Parameter

V

CC

[3]

Min Max @ 25°C Units Conditions Notes

V

CH

Clock Input High
Voltage

3.0V 0.7V

CCVCC

+0.3 1.3 V Driven by External

Clock Generator

5.5V 0.7V

CCVCC

+0.3 2.5 V Driven by External

Clock Generator

V

CL

Clock Input Low
Voltage

3.0V VSS–0.3 0.2V

CC

0.7 V Driven by External
Clock Generator

5.5V VSS–0.3 0.2V

CC

1.5 V Driven by External
Clock Generator

V

IH

Input High Voltage 3.0V

5.5V

0.7V

CC

0.7V

CC

VCC+0.3
V

CC

+0.3

1.3

2.5

V
V

V

IL

Input Low Voltage 3.0V

5.5V

VSS–0.3
VSS–0.3

0.2V

CC

0.2V

CC

0.7

1.5

V
V

V

OH

Output High Voltage 3.0V VCC–0.4 3.1 V IOH = –2.0 mA

5.5V VCC–0.4 4.8 V IOH = –2.0 mA

V

OL1

Output Low Voltage 3.0V 0.6 0.2 V IOL = +4.0 mA

5.5V 0.4 0.1 V IOL = +4.0 mA

V

OL2

Output Low Voltage 3.0V 1.2 0.5 V IOL = +6 mA,

5.5V 1.2 0.5 V IOL = +12 mA,

V

RH

Reset Input High Voltage 3.0V 0.5V

CC

V

CC

1.1 V

5.5V 0.5V

CC

V

CC

2.2 V

V

RL

Reset Input Low Voltage 3.0V VSS–0.3 0.2V

CC

0.9 V

5.5V VSS–0.3 0.2V

CC

1.4 V

V

OFFSET

Comparator Input Offset
Voltage

3.0V 25.0 10.0 mV

5.5V 25.0 10.0 mV

I

IL

Input Leakage 3.0V –1.0 2.0 0.064 µAVIN = 0V, V

CC

5.5V –1.0 2.0 0.064 µAVIN = 0V, V

CC

I

OL

Output Leakage 3.0V –1.0 2.0 0.114 µAVIN = 0V, V

CC

5.5V –1.0 2.0 0.114 µAVIN = 0V, V

CC

V

ICR

Comparator Input
Common Mode
Voltage Range

3.0V VSS–0.3 V

CC

–1.0 V 7

5.5V VSS–0.3 V

CC

–1.0 V 7

I

IR

Reset Input Current 3.0V -10 -60 -30 µA

5.5V -20 -180 -100 µA

I

CC

Supply Current 3.0V 2.5 2.0 mA @ 10 MHz 4,5

5.5V 6.0 4.0 mA @ 10 MHz 4,5

I

CC1

Standby Current 3.0V 2.0 1.0 mA HALT Mode VIN = 0V,VCC

@ 10 MHz

4,5

5.5V 2.0 1.0 mA HALT Mode VIN = 0V,VCC
@ 10 MHz

4,5

Z8E001

Zilog CMOS OTP Microcontroller

DS97Z8X1300 P R E L I M I N A R Y 11

T

A

= 0 ° C to
+70 °C

Typical

[1]

Sym Parameter

V

CC

[3]

Min Max @ 25°C Units Conditions Notes

I

CC2

Standby Current 3.0V 500 150 nA STOP Mode VIN = 0V, V

CC

6

5.5V 500 250 nA STOP Mode V

IN

= 0V,VCC 6

Notes:

1. Typical values are measured at V

CC

= 3.3V and VCC = 5.0V.

2. V

SS

= 0V = GND

3. The V

CC

voltage specification of 3.0 V guarantees 3.3 V +/- 0.3 V and the VCC voltage specification of 5.5 V guarantees

5.0 V +/- 0.5 V.

4. All outputs unloaded, I/O pins floating, and all inputs are at V

CC

or VSS level.

5. CL1 = CL2 = 22 pF.

6. Same as note [4] except inputs at V

CC

.

7. For analog comparator input when analog comparator is enabled.

Z8E001
CMOS OTP Microcontroller Zilog

12 P R E L I M I N A R Y DS97Z8X1300

DC ELECTRICAL CHARACTERISTICS (Continued)

TA = -40°C to

+105°C Typical [1]

Sym Parameter

V

CC

[3]

Min Max @ 25°C Units Conditions Notes

V

CH

Clock Input High
Voltage

4.5V 0.7 VCCVCC+0.3 2.5 V Driven by External Clock
Generator

5.5V 0.7 VCCVCC+0.3 2.5 V Driven by External Clock
Generator

V

CL

Clock Input Low
Voltage

4.5V VSS–0.3 0.2 V

CC

1.5 V Driven by External Clock
Generator

5.5V VSS–0.3 0.2 V

CC

1.5 V Driven by External Clock
Generator

V

IH

Input High Voltage 4.5V 0.7 VCCVCC+0.3 2.5 V

5.5V 0.7 VCCVCC+0.3 2.5 V

V

IL

Input Low Voltage 4.5V VSS–0.3 0.2 V

CC

1.5 V

5.5V VSS–0.3 0.2 V

CC

1.5 V

V

OH

Output High Voltage 4.5V VCC–0.4 4.8 V IOH = –2.0 mA

5.5V VCC–0.4 4.8 V IOH = –2.0 mA

V

OL1

Output Low Voltage 4.5V 0.4 0.1 V IOL = +4.0 mA

5.5V 0.4 0.1 V IOL = +4.0 mA

V

OL2

Output Low Voltage 4.5V 1.2 0.5 V IOL = +12 mA,

5.5V 1.2 0.5 V IOL = +12 mA,

V

RH

Reset Input High
Voltage

4.5V 0.5V

CC

V

CC

1.1 V

5.5V 0.5V

CC

V

CC

2.2 V

V

OFFSET

Comparator Input
Offset V oltage

4.5V 25.0 10.0 mV

5.5V 25.0 10.0 mV

I

IL

Input Leakage 4.5V -1.0 2.0 <1.0 µAVIN = 0V, V

CC

5.5V -1.0 2.0 <1.0 µAVIN = 0V, V

CC

I

OL

Output Leakage 4.5V -1.0 2.0 <1.0 µAVIN = 0V, V

CC

5.5V -1.0 2.0 <1.0 µAVIN = 0V, V

CC

V

ICR

Comparator Input
Common Mode
Voltage Range

4.5V 0 VCC –1.5V V 7

5.5V 0 VCC –1.5V V 7

I

IR

Reset Input Current 4.5V -18 -180 -112 µA

5.5V -18 -180 -112 µA

I

CC

Supply Current 4.5V 7.0 4.0 mA @ 10 MHz 4,5

5.5V 7.0 4.0 mA @ 10 MHz 4,5

I

CC1

Standby Current 4.5V 2.0 1.0 mA HALT Mode VIN = 0V, VCC

@ 10 MHz

4,5

5.5V 2.0 1.0 mA HALT Mode VIN = 0V, VCC
@ 10 MHz

4,5

Z8E001

Zilog CMOS OTP Microcontroller

DS97Z8X1300 P R E L I M I N A R Y 13

T

A

= -40 °C

to +105 °C

Typical [1]

Sym Parameter VCC[3] Min Max @ 25°C Units Conditions Notes

I

CC2

Standby Current 4.5V 700 250 nA STOP Mode VIN = 0V, VCC 6

5.5V 700 250 nA STOP Mode V

IN

= 0V, VCC 6

Notes:

1. Typical values are measured at V

CC

= 3.3V and VCC = 5.0V.

2. V

SS

= 0V = GND

3. The V

CC

voltage specification of 3.0 V guarantees 3.3 V +/- 0.3 V and the VCC voltage specification of 5.5 V guarantees

5.0 V +/- 0.5 V.

4. All outputs unloaded, I/O pins floating, and all inputs are at V

CC

or VSS level.

5. CL1 = CL2 = 22 pF.

6. Same as note [4] except inputs at V

CC

.

7. For analog comparator input when analog comparator is enabled.

Z8E001
CMOS OTP Microcontroller Zilog

14 P R E L I M I N A R Y DS97Z8X1300

AC ELECTRICAL CHARACTERISTICS

Additional Table

Figure 8. AC Electrical Timing Diagram

13

3

2

2

CLOCK

IRQ

N

4

5

TA= 0 °C to +70 °C

10 MHz

No Symbol Parameter

V

CC

[2] Min Max Units Notes

1 TpC Input Clock Period 3.0V 100 DC ns 1

5.5V 100 DC ns 1

2 TrC,TfC Clock Input Rise and Fall Times 3.0V 15 ns 1

5.5V 15 ns 1

3 TwC Input Clock Width 3.0V 50 ns 1

5.5V 50 ns 1

4 TwIL Int. Request Input Low Time 3.0V 70 ns 1

5.5V 70 ns 1

5 TwIH Int. Request Input High Time 3.0V 5TpC 1

5.5V 5TpC 1

6 Twsm STOP Mode Recovery Width Spec. 3.0V 12 ns

5.5V 12 ns

7 Tost

Oscillator Start-Up Time 3.0V 5TpC

5.5V 5TpC

Notes:

1. Timing Reference uses 0.7 V

CC

for a logic 1 and 0.2 VCC for a logic 0.

2. The V

DD

voltage specification of 3.0V guarantees 3.3V +/- 0.3V. The VDD voltage specification of 5.5V guarantees 5.0V +/- 0.5V.

Z8E001

Zilog CMOS OTP Microcontroller

DS97Z8X1300 P R E L I M I N A R Y 15

T

A

= –40 °C to +105 °C

10 MHz

No Symbol Parameter

V

CC

[2] Min Max Units Notes

1 TpC Input Clock Period 4.5V 100 DC ns 1

5.5V 100 DC ns 1

2 TrC,TfC Clock Input Rise

and Fall Times

4.5V 15 ns 1

5.5V 15 ns 1

3 TwC Input Clock Width 4.5V 50 ns 1

5.5V 50 ns 1

4 TwIL Int. Request Input

Low Time

4.5V 70 ns 1

5.5V 70 ns 1

5 TwIH Int. Request Input

High Time

4.5V 5TpC 1

5.5V 5TpC 1

6 Twsm STOP Mode Recovery

Width Spec.

4.5V 12 ns

5.5V 12 ns

7 Tost

Oscillator Start-Up Time 4.5V 5TpC

5.5V 5TpC

Notes:

1. Timing Reference uses 0.7 V

CC

for a logic 1 and 0.2 VCC for a logic 0.

2. The V

DD

voltage specification of 3.0V guarantees 3.3V +/- 0.3V. The VDD voltage specification of 5.5V guarantees 5.0V +/- 0.5V.