ZiLOG Z86L99 ICEBOX User Manual

Z86L9900100ZEM

Z86L9900100ZEM

Z86L99 ICEBOX

User Manual

UM005100-IRR0400

ZiLOG W

ORLDWIDE HEADQUARTERS

T

ELEPHONE

: 408.558.8500 • FAX: [phone] •

• 910 E. H

AMILTON AVENUE

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, CA 95008

This publication is subject to replacement by a later edition. To determine whether a later edition exists, or to
request copies of publications, contact

ZiLOG Worldwide Headquarters

910 E. Hamilton Avenue
Campbell, CA 95008
Telephone: [phone]
Fax: [phone]
www.ZiLOG.com

Windows is a registered trademark of Microsoft Corporation.

Document Disclaimer

© 2000 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applications, or
technology described is intended to suggest possible uses and may be superseded. ZiLOG, INC. DOES NOT ASSUME
LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR
TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG ALSO DOES NOT ASSUME LIABILITY FOR
INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION,
DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. Except with the express written approval
ZiLOG, use of information, devices, or technology as critical components of life support systems is not authorized. No
licenses or other rights are conveyed, implicitly or otherwise, by this document under any intellectual property rights.

Follow the precautions listed below to avoid permanent damage to the emulator.

I. Always use a grounding strap to prevent damage resulting from electrostatic discharge (ESD).

II.Power-Up Precautions.

1. Ensure that all power to the emulator and the target application (if any) is turned OFF.

2. Connect the target pod to the target application (if any).

ii UM005100-IRR0400

Electrical Safeguards

Follow the precautions listed below to avoid permanent damage to the emulator.

I. Always use a grounding strap to prevent damage resulting from electrostatic discharge (ESD).

II. Power-Up Precautions.

3. Ensure that all power to the emulator and the target application (if any) is turned OFF.

4. Connect the target pod to the target application (if any).

5. Power up the emulator, then press the RESET button.

6. Power up the target application (if any).

III Power-Down Precautions.

When powering down, follow this procedure in the precise order shown below:

1. Power down the target application board (if any).

2. Remove the target pod.

3. Power down the emulator.

NOTES:

1. Refer to the ÒPrecaution ListÓ section of the Product Information sheet for additional operating
precautions specific to various devices.

2. Do not leave the emulator powered up with the RS-232C cable connected to a powered-down PC.

3. Before inserting target pod into target application board, refer to Chapter 2 to determine appropriate
jumper selections and options.

UM005100-IRR0400 iii

Z86L99 ICEBOX U

P

REFACE

SER’S MANUAL

ABOUT THIS MANUAL

W e recommend that you read and understand e v erything in this manual before setting up and
using the product. However, we recognize that users have different styles of learning. There­fore, we have designed this manual to be used either as a how-to procedural manual or a ref­erence guide to important data.

The following conventions have been adopted to provide clarity and ease of use:

•

Universe Medium 10-point

– commands , displayed messages
– menu selections, pop-up lists, button, fields, or dialog boxes
– modes
– pins and ports
– program or application name
– instructions, registers, signals and subroutines
– an action performed by the software
– icons

all-caps is used to highlight to the following items:

•

Courier Regular 10-point

– bit
– software code
– file names and paths
– hexadecimal value

•

Grouping of Actions Within A Procedure Step
Actions in a procedure step are all performed on the same window or dialog box.

Actions performed on different windows or dialog boxes appear in separate steps.

UM005100-IRR0400

is used to highlight the following items

Z86L99 ICEBOX U

ABLE OF CONTENTS

T

SER’S MANUAL

Chapter Title and Subsections Page

Chapter 1
Introduction

VERVIEW

O

MULATOR FEATURES

E

UPPORTED ZI

S

ARDWARE SPECIFICATIONS

H

GUI-S
KIT C

OMPUTER REQUIREMENTS

C

ONTACTING ZI

C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

MULATOR LIMITATIONS

E

LOG D

EVICES

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

PERATING CONDITIONS

O

OWER REQUIREMENTS

P

ERIAL INTERFACE

S

UPPORTED COMPILER

ONTENTS

DDITIONAL ITEMS NOT SUPPLIED

A

PTIONAL RECOMMENDED ITEM

O

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

SSEMBLER FORMATS

, A

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5

INIMUM REQUIREMENTS

M

LOG C

USTOMER SUPPORT

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6

UM005100-IRR0400 vii

Chapter Title and Subsections Page

Chapter 2
Set-Up and Installation

H

ARDWARE INSTALLATION

Q

UICK INSTALLATION INSTRUCTIONS

C

OMPLETE INSTALLATION INSTRUCTIONS

S

OFTWARE INSTALLATION

E

MULATOR OPERATION

R

ESETTING

LED O
J

UMPER SETTINGS

DIP S
P

ERFORMING

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8

PERATION

ETTINGS

OTP

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12

PROGRAMMING

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14

Chapter 3
Overview

E

MULATION

U

SING

AVAILABLE DEBUG WINDOWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

ZDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

S

ELECT THE EMULATOR

O

PEN A PROJECT AND

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

ADD FILES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4

Appendix A
Troubleshooting Guide

INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1

COUNTER JUMPS TO UNEXPECTED ADDRESS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2

ZDS ERROR MESSAGES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3

CAN NOT OPEN WINDOWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3

OUT OF SYNCHRONIZATION WITH THE EMULATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-3

Appendix B
Problem/Suggestion Report Form

Glossary

Index

viii UM005100-IRR0400

Z86L99 ICEBOX U

SER’S MANUAL

LIST OF TABLES

Table Page

TABLE 1-1 SUPPORTED PRODUCTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3

TABLE 2-1 JUMPER SETTINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10

TABLE 2-2 DIP SETTINGS TO DISABLE DIGITAL FUNCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12

TABLE 2-3 DIP SETTINGS TO SET PULL-UP RESISTORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12

TABLE 3-1 DEBUG WINDOWS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7

UM005100-IRR0400 ix

Z86L99 ICEBOX U

SER’S MANUAL

LIST OF FIGURES

Figure Page

FIGURE 2-1 EMULATOR CONNECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2

FIGURE 2-2 J6 JUMPER SCHEMATIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3

FIGURE 2-3 Z86L9900100ZEM ICEBOX EXTERNAL TOP VIEW. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4

FIGURE 2-4 FRONT LED ASSIGNMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

FIGURE 3-1 NEW PROJECT DIALOG BOX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2

FIGURE 3-2 EMULATOR CONFIGURATION DIALOG BOX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3

FIGURE 3-3 PROJECT VIEWER WINDOW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4

FIGURE 3-4 INSERT FILES INTO PROJECT DIALOG BOX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5

FIGURE 3-5 PROJECT VIEWER WINDOW WITH FILE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5

UM005100-IRR0400 xi

Z86L99 ICEBOX U

SER’S MANUAL

CHAPTER 1
I

NTRODUCTION

OVERVIEW

Congratulations for selecting a fine development tool! The Z86L9900100ZEM ICEBOX is
ZiLOG’s in-circuit emulator providing emulation for the Z8 family of IR controllers. The
emulator is also capable of OTP programming for the family being emulated. The emulator
consists of an emulation daughter board that is plugged into a 64K motherboard via P1 and
P2 headers. The Z86D99 ICE chip is used as the emulation processor on the daughter board.

The motherboard provides host communication interface, control processor, I/O space
decoding and LED indicators. The emulator is designed to be used with ZiLOG Developers
Studio, giving the user a total package to write, edit and debug their applications.

UM005100-IRR0400 1–1

Emulator Features Introduction

EMULATOR FEATURES

Key features of the Z86L9900100ZEM ICEBOX include:

• Supports up to 32K of ROM

• Vary the operating voltage from 3.0-4.0V

• Supports in-circuit emulation on target systems that operate from 3.0-4.0V

• The user can choose to power the ICE chip from either the emulator or target board

• Supports IR devices that operate up to 8MHz

• Emulates 28 and 40-pin DIP and 28-pin SOIC

• OTP programming for 28 pin DIP and 28 pin SOIC, 40 pin DIP packages

• Emulates and supports all the features and functions for a specified Z8 IR

microcontroller

• Multitasking allows the user to use other Windows applications while ZiLOG

Developer Studio (ZDS) is running

EMULATOR LIMITATIONS

The Z86D99 ICE chip’s ROM/ROMLESS pin is used to configure the ICE CHIP for 32K of
internal ROM. This configuration affects the Z86L9900100ZEM ICEBOX in the following
ways:

• Will not support emulation of a ROMLESS operation mode

• If the host software specifies that a device has between 4K to 32K of ROM the emulator

operates as if it is emulating a device with 32K of ROM

To emulate pull-up transistors for their target board, you must manually set the emulator’s
pull-up resistor dip switches. See page 2-12 for the proper settings of the emulator’s dip
switches.

NOTE: Mask option pull-up resistance at 3V is about 200k Ohm +/-50% at room temperature. Lower

voltage may cause an increase in resistance.

1–2 UM005100-IRR0400

Introduction Supported ZiLOG Devices

SUPPORTED ZILOG DEVICES

Table 1-1 shows the products supported by the Z86L9900100ZEM ICEBOX:

TABLE 1-1. SUPPORTED PRODUCTS

Packages Emulation OTP Required accessories

28 PDIP Z86L991PZ008SC Z86D991

PZ008SC

28 SOIC Z86L991SZ008SC Z86D991

SZ008SC

40 PDIP Z86L990PZ008SC Z86D990

PZ008SC

48 SSOP N/A Z86D990

HZ008SC

28 PDIP emulation pod
28 PDIP program platform
(PC ASSY#99C0667-001)

28 PDIP emulation pod and a DIP to SOIC
conversion adapter from Emulation
Technology (AS-DIP 6-028-S003-1 or AS-DIP-6­028-S003-2)
28 SOIC program platform
(PC ASSY#99C0668-001)

40 PDIP emulation pod
40 PDIP program platform
(PC ASSY#990716-001) Rev. B

Accessories for the 48 pin SSOP will be
available the 4th quarter of 2000

HARDWARE SPECIFICATIONS

O

PERATING CONDITIONS

Operating Humidity: 10%-90% RH (Non condensing)
Operating T emperature: 20°C ±10°C
Clocks: The control processor operates at 7.3728 Mhz, the

emulation processor operates at 8Mhz

Serial Baud Rate: 57,600 bps

POWER REQUIREMENTS

This emulator requires an external 5VDC power supply.
Operating Voltage (Input): +4.75 VDC to +5.25 VDC Max (+5.0 VDC typical)
Operating Voltage (Target): +3.0 VDC to +4.0 VDC Max
Operating Current: 0.8A typical 1.5A MAX

UM005100-IRR0400 1–3

GUI-Supported Compiler, Assembler Formats Introduction

SERIAL INTERFACE

ZiLOG Developer Studio communicates with theZ86L9900100ZEM ICEBOX using a
DB25, RS-232 and DCE cable (TxD, RxD only).

GUI-SUPPORTED COMPILER, ASSEMBLER FORMATS

The Emulator supports object (binary or Intel hex) code files produced by ZiLOG Developer
Studio (ZDS), ZiLOG Macro Cross Assembler (ZMASM).

KIT CONTENTS

The emulator kit contains one each of the following items:

• Z86L9900100ZEM ICEBOX

• Z86D991 40 PDIP program platform ZiLOG PC: 99C0716-001

• Z86D991 28 PDIP program platform ZiLOG PC: 99C0667-001

• Z86D991 28 SOIC program platform ZiLOG PC: 99C0668-001

• 40 PDIP emulation pod with cable ZiLOG PC: 99C0206-001

• 28 PDIP emulation pod with cable ZiLOG PC: 99C0217-001

• 5V Power Cable with banana plugs

• RS-232 Serial Cable, 9-pin M-F

• ZiLOG Developer Studio Installation CD

• Z86L99 ICEBOX User’s Manual

ADDITIONAL ITEMS NOT SUPPLIED

The following items are required but are not currently supplied in the emulator kit:

• A source of power (+5VDC typical) for the emulator. This can be a laboratory power

supply with current rating of at least 1.5 ampere.

1–4 UM005100-IRR0400

Introduction Computer Requirements

OPTIONAL RECOMMENDED ITEM

The following items are recommended:

• Your target design. Typically this is a wire-wrapped or printed circuit prototype that

includes a socket for the target device which the emulator cable/pod plugs into.

• Z8 C-Compiler

• Oscilloscope

• Logic Analyzer

COMPUTER REQUIREMENTS

M

INIMUM REQUIREMENTS

IBM PC (or 100-percent compatible) Pentium-Based Machine
75 MHz
16 MB RAM
VGA V ideo Adapter
Hard Disk Drive (12 MB free space)
CD-ROM Drive (a CD-ROM drive is not needed if you download ZDS from the web at

www.zilog.com)
RS-232 COM Port
Mouse or Pointing Device
Microsoft Windo ws 95/98/NT
The following enhancements to the minimum requirements are recommended:
166MHz IBM PC
SVGA video adapter

UM005100-IRR0400 1–5

Contacting ZiLOG Customer support Introduction

CONTACTING ZILOG CUSTOMER SUPPORT

ZILOG has a worldwide customer support center located in Austin, Texas. The customer
support center is open from 7 a.m. to 7 p.m. Central Time.

The customer support toll-free number for the United States and Canada is 1-877-ZiLOGCS
(1-877-945-6427). For calls outside of the United States and Canada dial 512-306-4169. The
FAX number to the customer support center is 512-306-4072. Customers can also access
customer support via the website at:

• For customer service - http://register.zilog.com/login.asp?login=servicelogin

• For technical support- http://register.zilog.com/login.asp?login=supportlogin

For valuable information about hardware and software de v elopment tools go to ZiLOG home
page at http://www.zilog.com. The latest released version of the ZDS can be downloaded
from this site.

1–6 UM005100-IRR0400

Z86L99 ICEBOX U

SER’S MANUAL

CHAPTER 2
S

ET-UP AND INSTALLATION

HARDWARE INSTALLATION

Before installing the hardware, refer to Figure 2-1 for a diagram on connecting the emulator
to a PC and power supply; Figure 2-3 provides option jumper locations.

QUICK INSTALLATION INSTRUCTIONS

To install the hardware utilizing a 5VDC wall-adaptor power supply, perform the following.

1. Set the correct jumper setting for powering the ICE chip and target board. See Emulator
connection on page 2-2.

2. Plug a 5.0 VDC 1.5 Amp Wall Power Adaptor to the power connector on the
Z86L9900100ZEM ICEBOX.

3. Turn on the power supply and ensure that it is set to + 5.0V and current limited at 2.5A.

4. Connect the serial cable to the PC.

5. Connect the emulator to the target board (if performing in-circuit emulation).

6. Set up the oscillator and option jumpers.

7. Power up the Z86L9900100ZEM.

UM005100-IRR0400 2–1

Hardware Installation Set-Up and Installation

COMPLETE INSTALLATION INSTRUCTIONS

The following procedures illustrate a complete step-by-step guide on installing the emulator.

­+

FIGURE 2-1. EMULATOR CONNECTION

Set Power Jumper

The Z86L9900100ZEM ICEBOX allows the user to power the emulator and target from a
variety of different sources. Before powering the emulator the user should select their power
configuration.

CAUTION!

The user must choose their power source before powering the emulator. Before selecting a
power source study Figure 2-2, which shows a schematic of the J6 power jumper. Failure to
properly configure the power source will result in damage to the emulator or target.

2–2 UM005100-IRR0400

Set-Up and Installation Hardware Installation

The user should choose from one of the below options when selecting their power source

• Jumper pin 1 to pin 3 and pin 2 to pin 4 to power both the ICE chip and target from the

emulator’s adjustable voltage regulator (default setting)

• Jumper pin 1 to pin 3 to power the ICE chip with the emulator’s adjustable regulator

• Jumper pin 2 to pin 4 to power target with the emulator’s adjustable regulator

• Jumper pin 3 to pin 4 to power the ICE chip from the target

CAUTION!

When powering the target from the emulator ensure that the target’s power supply is discon­nected .

Emulator Adjustable

Voltage Regulator

12

3

ICE chip

5

7

FIGURE 2-2. J6 JUMPER SCHEMATIC

4

Target

6

8

Voltage Digital to Analog Converter

UM005100-IRR0400 2–3

Hardware Installation Set-Up and Installation

RS-232C

J4
J3

Target Pod P6

J6

J1

OTP programing

interface

Ice Chip

J5

Oscillator

JP2

J2

JP1

Power

Logic analyzer

connector

On

S5

1 2 3 4 5 6 7 8

On

S4

1 2 3 4 5 6 7 8
On

S2

1 2 3 4 5 6 7 8

JP4
JP3

P3

On

S1

1 2 3 4 5 6 7 8

On

S6

1 2 3 4 5 6 7 8

Debug

pins

J8
J7

Reset

Voltage

adjuster

Target Pod P5

LEDS

FIGURE 2-3. Z86L9900100ZEM ICEBOX EXTERNAL TOP VIEW

2–4 UM005100-IRR0400

Set-Up and Installation Hardware Installation

Connect the Power Supply

1. If the power supply provides voltage adjustment:

• Turn the power supply on and adjust it to +5V

• Adjust the setting adjustment for at least 2.5A, if there is a current-limiting adjustment.

2. Turn the power supply off.

3. Locate the power cable (red wire, black wire, and banana plugs on the other end). Plug in
the black banana plug into the black jack on the power supply (labeled COM, GND, or with
the ground symbol). Plug the red plug into the red jack on the power supply (labeled +, +V
or +5V).

4. Plug the white connector on the other end of the cable into the matching 4-pin connector
on the back side of the emulator. (This connection is keyed to ensure against an improper
connection.)

NOTE: The ZiLOG Power Supply Accessory Kit (ZPS05V00ZAC), which is sold separately, provides

a fixed-5V Universal Output Power Supply, accepts 110V to 220V AC input, and includes a power
cable and an in-line jack cable.

CAUTION!

Always check the supply voltage before plugging in the power cord.

Connect the Serial Cable to the PC

Locate the serial cable. Connect the male end to the female connector on the back of the ICE­BOX, and the female end to either the COM1, COM2, COM3, or COM4 connector of the
host PC.

NOTE: If connector availability is limited to a 9-pin COM1 through COM4, then use either a different

cable or a 25-pin to 9-pin converter. (Available at any electronics store for a nominal fee.)

UM005100-IRR0400 2–5

Hardware Installation Set-Up and Installation

Connect to the Design

Connect to the target design by performing the following steps:

1. Locate the emulation cable for the device.

CAUTION!

Wear a properly grounded wrist strap or similar ESD protection before continuing.

2. Plug the cable into the target device. Ensure that the pin 1 marking (as indicated by the red
mark on the ribbon cable) matches pin 1 on the target board.

3. Plug the other end of the cables into target pod on top of the emulator. See Figure 2-3 for
the location of the target pod.

4. Select the power source for the Z86D99 ICE chip by configuring the J6 jumper. See
T able 2-2 for more information on jumper settings and Figure 2-3 for the location of the J6
jumper.

5. Select either the supplied 8MHz oscillator or the target’s oscillator to clock the ICE chip.
See Jumper settings on page 2-10 for more information on how to configure the emulator
to use the target boards oscillator.

CAUTION!

The user can not run the emulator’s oscillator if the target oscillator or XTAL is connected. At
this time use one of the following methods to set the ICE-chip’s clock:

• To use the emulators oscillator remove the target’s oscillator and connect pin 2 to

pin 3 on the J5 jumper

• To Use the target’s oscillator and connect pin 1 to pin 2 on the J5 jumper and remove

the ICEBOX’s 8 MHz oscillator located at Y1.

2–6 UM005100-IRR0400

Set-Up and Installation Hardware Installation

Adjust the voltage

If the emulator is powered by its adjustable regulator then the voltage must be manually set.
Set the emulator voltage by performing the following steps:

CAUTION!

If the target and emulator are using separate power supplies then the ICE chip voltage must be
adjusted to match the target’s device voltage. Failure to match the target devices voltage with
the ICE chip’s voltage could result in damage to the emulator, target device or ICE chip.

1. Locate the voltage adjuster on top of the emulator. See Figure 2-3 for the location of the
voltage adjuster.

2. Attach the voltmeter lead to either pin 1 or pin 2 on the J6 jumper and ground.

3. Apply power to the emulator with the target device disconnected.

4. Turn the voltage adjuster’s screw until the voltmeter read-out matches the target device
output voltage.

Connect Logic Analyzer (Optional)

The logic analyzer can either be connected as part of the initial setup, or later as the user con­tinues working with their design.

Connect to a logic analyzer by performing the following steps:

1. Locate the cable for the logic analyzer.

NOTE: Wear a properly grounded wrist strap or similar ESD protection before continuing.

2. Plug the logic analyzer into the ZiLOG logic analyzer adapter (sold separately from the
Z86L9900100ZEM ICEBOX kit).

NOTE: The logic analyzer adapter can be ordered from customer support by requesting part number

98C0289-001.

3. Plug the cable from the ZiLOG logic analyzer adapter into the emulator. Ensure that the pin
1 marking (as indicated by the red mark on the ribbon cable) matches the pin 1 on the target
board. See Figure 2-3 for the location of the logic analyzer connector.

UM005100-IRR0400 2–7

Software Installation Set-Up and Installation

Power the Emulator

If anything unusual (such as an unexpected sound and/or smell occurs when turning on the
power supply, turn off the power supply and check the setting for the J6 jumper. See Emula­tor connection on page 2-2. If the power supply allows voltage adjustment, adjust it again to
+5V. (It may be somewhat lower than +5V because of the emulator load.

After power-up, press the RESET button to reset the ICE chip. (Pressing the RESET button
avoids bus contention on the I/O lines.) If the emulator is not powering your design through
the V

pin, turn on the power supply of the design.

CC

CAUTION!

If your design already has a power supply, do not power your design from the emulator VCC pin.

When powering down, follow the procedure described below:

1. Power down the target application board (if using the target power supply).

2. Power down the emulator.

NOTE: Refer to the complete Electrical Safeguards information shown on the inside cover of this man-

ual.

SOFTWARE INSTALLATION

For more information on installing ZDS refer to the user manual PDF that is included on the
installation CD-ROM or download ZDS literature from the ZiLOG web page at zilog.com.

EMULATOR OPERATION

The following topics guide the user on how to operate the emulator and configure jumper set­tings.

RESETTING

Press the RESET button on the emulator to reset the state of the target device and the status
that was established using ZDS.

For example, the emulator sets the program counter to %000C.
After reset, wait until the Ready LED is ON and has finished blinking before starting ZDS.

Refer to the LED Operation section of this chapter for more details.

NOTE: Always press the RESET button on the emulator before starting ZDS.

2–8 UM005100-IRR0400

Set-Up and Installation Emulator Operation

LED OPERATION

ZiLOG emulators use LEDs to communicate the different hardware states. The following
table gives a description of the LEDs. The Z86L9900100ZEM LED’s are located on the right
front of the emulator.

FIGURE 2-4. FRONT LED ASSIGNMENTS

LED Indication Description

READY On

Off

RUN On

Off

OTP On

Off

PWR On

Off
Blink

Communicating in Bisync Mode and waiting for command
Communicating in ASCII Mode or executing Bisync command

Running user code
Not running user code

The Emulator is performing OTP programing
The Emulator is not performing OTP programming

Emulator is powered up and Self Test is completed
Power is off
Emulator is self-testing

UM005100-IRR0400 2–9

Emulator Operation Set-Up and Installation

JUMPER SETTINGS

The following table lists jumper setting that the are easily configured by the user. See
Figure 2-3 for the jumper locations.

TABLE 2-1. JUMPER SETTINGS

Jumper Pin Position Description

J1 N/A Out (Default) OTP programming adapter pins
J2 N/A Out (Default) OTP programming adapter pins
J3 1-2 Out (Default) Reserved for data memory (do not use)
J4 1-2 Out (Default) Reserved for external memory (do not use)
J6 1-3 In (Default) ICE chip is powered by the emulator’s adjustable

regulator

J6 2-4 In (Default) Target is powered by emulator’s adjustable

regulator

J6 5-7 In ICE chip is powered by a programmable regulator

(The programmable regulator is currently not
supported . Contact ZiLOG customer support to see if
the programmable regulator has been released .)

J6 4-6 In

J7 N/A Open (Default) Do not Jumper, jumping these pins will short port

J8 1-2 In (Default) Connects Ports 4 pin 3 to target
J8 1-2 Out Disconnects ports 4 pin 3 from target
JP1 1-2 In Disable Vbo
JP1 1-2 Out (Default) Enable Vbo
JP2 1-2 In (Default) AVDD to VDD core
JP2 1-2 Out Target board will supply power to AVDD (a 40 pin

JP3 1-2 In A 28 pin part is being emulated
JP3 1-2 Out (Default) VCC_I isolates from AVDD (use internal filter)
JP4 1-2 In (Default) Cap’s to AVDD
JP4 1-2 Out N/A

Target is not powered by emulator (See Emulator

connection on page 2-2 for more information)

4 pin 3 VCC! These two pins are used as a
connector for the port 4 pin 3 IR LED.

part is being emulated)

2–10 UM005100-IRR0400

Set-Up and Installation Emulator Operation

TABLE 2-1. JUMPER SETTINGS (CONTINUED)

Jumper Pin Position Description

J1 N/A Out (Default) OTP programming adapter pins
JP5 1-2 In

ICE chip uses target oscillator/clock (see Note at the

bottom of the table)

JP5 2-3 In * (Default)

ICE chip uses emulator oscillator/clock (see Note at

the bottom of the table)

NOTE: The user can not run the emulator’s oscillator if the target oscillator or XTAL is connected. At

this time use one of the following methods to set the ICE-chip’s clock:

• To use the emulators oscillator remove the target’s oscillator and connect pin 2 to pin 3 on

the J5 jumper

• To use the target’s oscillator and connect pin 1 to pin 2 on the J5 jumper

Setting Jumpers for Targets

For all targets ensure that JP2 and JP4 are always connected. For 40 pin targets also connect
JP3.

UM005100-IRR0400 2–11

Emulator Operation Set-Up and Installation

DIP SETTINGS

DIP switch banks S1 and S3 are used to disable digital functions for ports 1 and 3. DIP
switch banks S2, S4, S5 and S6 are used to emulate port pin pull-up transistors for the Ice
Chip. See Figure 2-3 for the location of the DIP switches. The following tables list DIP set­tings that are easily configured by the user.

TABLE 2-2. DIP SETTINGS TO DISABLE DIGITAL FUNCTIONS

DIP bank Switch Description

S1 1 Turn off to disable digital functions for Port 5 Pin 0
S1 2 Turn off to disable digital functions for Port 5 Pin 1
S1 3 Turn off to disable digital functions for Port 5 Pin 2
S1 4 Turn off to disable digital functions for Port 5 Pin 3
S1 5 Turn off to disable digital functions for Port 4 Pin 4
S1 6 Turn off to disable digital functions for Port 4 Pin 5
S1 7 Turn off to disable digital functions for Port 4 Pin 6
S1 8 Turn off to disable digital functions for Port 4 Pin 7

ABLE 2-3. DIP SETTINGS TO SET PULL-UP RESISTORS

T

DIP bank Switch Description

S2 1 Turn on to set a pull-up resistor for Port 2 Pin 0
S2 2 Turn on to set a pull-up resistor for Port 2 Pin 1
S2 3 Turn on to set a pull-up resistor for Port 2 Pin 2
S2 4 Turn on to set a pull-up resistor for Port 2 Pin 3
S2 5 Turn on to set a pull-up resistor for Port 2 Pin 4
S2 6 Turn on to set a pull-up resistor for Port 2 Pin 5
S2 7 Turn on to set a pull-up resistor for Port 2 Pin 6
S2 8 Turn on to set a pull-up resistor for Port 2 Pin 7
S4 1 Turn on to set a pull-up resistor for Port 5 Pin 0
S4 2 Turn on to set a pull-up resistor for Port 5 Pin 1
S4 3 Turn on to set a pull-up resistor for Port 5 Pin 2
S4 4 Turn on to set a pull-up resistor for Port 5 Pin 3
S4 5 Turn on to set a pull-up resistor for Port 5 Pin 4

2–12 UM005100-IRR0400

Set-Up and Installation Emulator Operation

ABLE 2-3. DIP SETTINGS TO SET PULL-UP RESISTORS (CONTINUED)

T

DIP bank Switch Description

S4 6 Turn on to set a pull-up resistor for Port 5 Pin 5
S4 7 Turn on to set a pull-up resistor for Port 5 Pin 6
S4 8 Turn on to set a pull-up resistor for Port 5 Pin 7
S5 1 Turn on to set a pull-up resistor for Port 6 Pin 0
S5 2 Turn on to set a pull-up resistor for Port 6 Pin 1
S5 3 Turn on to set a pull-up resistor for Port 6 Pin 2
S5 4 Turn on to set a pull-up resistor for Port 6 Pin 3
S5 5 Turn on to set a pull-up resistor for Port 6 Pin 4
S5 6 Turn on to set a pull-up resistor for Port 6 Pin 5
S5 7 Turn on to set a pull-up resistor for Port 6 Pin 6
S5 8 Turn on to set a pull-up resistor for Port 6 Pin 7
S6 1 Turn on to set a pull-up resistor for Port 4 Pin 0
S6 2 Turn on to set a pull-up resistor for Port 4 Pin 1
S6 3 Turn on to set a pull-up resistor for Port 4 Pin 2
S6 4 Turn on to set a pull-up resistor for Port 4 Pin 3
S6 5 Turn on to set a pull-up resistor for Port 4 Pin 4
S6 6 Turn on to set a pull-up resistor for Port 4 Pin 5
S6 7 Turn on to set a pull-up resistor for Port 4 Pin 6
S6 8 Turn on to set a pull-up resistor for Port 4 Pin 7

NOTE: Mask option pull-up resistance at 3V is about 200k Ohm +/-50% at room temperature. Lower

voltage may cause an increase in resistance.

UM005100-IRR0400 2–13

PERFORMING OTP PROGRAMMING

The Z86L9900100ZEM ICEBOX is designed for OTP programming. To perform OTP pro­gramming perform the following steps:

1. Locate the supplied OTP adapter for the micro controller you wish to program. Consult
Table 1-1for the proper OTP adapter.

2. Insert the OTP adapter into the emulator’s OTP Programming socket (J1 and J2), see
Figure 2-3.

3. Place the micro controller into the OTP programing adapter.

4. If the adapter is equipped with a ziff socket, ensure that the ZIF socket locking lever is in
the down (closed) position.

5. Perform OTP programing. Consult the ZDS user manual for more information on OTP
programing.

6. Pull straight up on the micro controller to remove it from the OTP programing adapter.

NOTE: Be careful not to bend the micro controller’s pins when removing it from the OTP adapter.

Z86L99 ICEBOX U

SER’S MANUAL

CHAPTER 3
O

VERVIEW

EMULATION

The Z86L9900100ZEM ICEBOX uses the Z86D99 ICE chip to provide emulation for the Z8
family of IR controllers. The emulator is capable of OTP programming for the family being
emulated. The user can manually set pull-up resistors and adjust the voltage of the ICE chip
to match the target’s voltage.

UM005100-IRR0400 3–1

Using ZDS Overview

USING ZDS

This emulator is fully compatible with ZiLOG Developer Studio (ZDS) software. The fol­lowing steps briefly describe the procedures necessary to setup and create projects with the
Z86L9900100ZEM emulator. A summary of the emulator’s available debug windows is also
included at the end of this chapter.

For more detailed information on using ZDS, refer to the ZDS User Manual (in PDF format)
located on the installation CD-ROM, or do wnload the latest information from our web site at
www .zilog.com.

SELECT THE EMULATOR

To select the emulator and create a new project, perform the following steps:

1. Open ZDS by selecting Start>Programs>Zilog Developer Studio> ZDS.

2. Choose New Project from the File menu. The New Project dialog box appears.

NOTE: If the project has already been created, select Target from the Project menu and perform the

following steps for the ZiLOG MCU Database dialog box. See Figure 3-1.

FIGURE 3-1. NEW PROJECT DIALOG BOX

3. Select Application in the Selection by field.

4. Select IR Remote from the Master pop-up list.

5. Select a microcontroller from the IR Remote family in the Project Target pop-up list.

6. Select Z86L9900100ZEM in the Emulator pop-up list.

3–2 UM005100-IRR0400

Overview Using ZDS

7. Click on the browse button (...) in the Project Name field. The New Project Browse
dialog box appears.

8. Enter the project file name and select a path in the New Project Browse dialog box.

NOTE: All build output files, such as linker and assembly files are saved in the same directory as the

project.

9. Click Save. The project name appears in the Project Name field in the New Project dialog
box.

10. Click on Chip Data to view the micro controller specifications.

NOTE: Fields in the Chip Data page are read-only and can’t be modified.

11. Click OK. The new project is saved as the name specified in the New Project Browse
dialog box.

12. Select Emulator Configuration from the Project menu. The Emulator Configuration
dialog box appears. See Figure 3-2.

FIGURE 3-2. EMULATOR CONFIGURATION DIALOG BOX

13. Ensure that Emulator is selected in the Module field.

14. Select the port the emulator is connected to from the Port pop-up list.

15. Select 57600 from the Baud Rate pop-up list.

16. Click OK to close and apply the Emulator Configuration options.

17. Select Save Project from the File menu to save the emulator configuration setting.

UM005100-IRR0400 3–3

Using ZDS Overview

OPEN A PROJECT AND ADD FILES

A previously created project has the following attributes saved with it:

• Target settings

• Assembler and Linker settings for the specified target

• Source files (including header files)

NOTE: Use the Project Viewer window to view and access the various files in any given project.

Perform the following steps to open a previously created project:

1. Select Open Project from the File menu. The Open Project dialog box appears.

2. In the Open Project dialog box, select the previously created project. The project appears
in the Project Viewer window. See Figure 3-3.

FIGURE 3-3. PROJECT VIEWER WINDOW

Add an existing file

Perform the following steps to add an existing file to a project:

1. Select Add to Project>Files from the Project menu. The Insert Files into Project dialog
box appears. See Figure 3-4.

3–4 UM005100-IRR0400

Overview Using ZDS

FIGURE 3-4. INSERT FILES INTO PROJECT DIALOG BOX

2. Select the file to add to the project.

3. Click Open. The file appears in the Project Viewer window. See Figure 3-5.

FIGURE 3-5. PROJECT VIEWER WINDOW WITH FILE

4. Double-click on the file in the Project Viewer window. The file appears in the ZDS main
Edit window.

NOTE: In some cases, non-editable files, such as .obj files need to be included in a project.

These files will be displayed in the source file list, but cannot be opened. When the project is built,
these files are automatically linked.

5. Select Update All Dependencies from the Build menu. The Dependencies folder list
in the Project Viewer window is updated.

UM005100-IRR0400 3–5

Using ZDS Overview

Add a new file

1. Select Add to Project>New from the Project menu. The Insert New Files Into
Project dialog box appears.

2. Type a file name in the File Name field.

3. Click Open. The new file name appears in the Project Viewer window with a .asm

suffix, and a blank Edit window also appears.

NOTE: Header and Included files do not have to be added. The program detects those called by the

source code.

3–6 UM005100-IRR0400

Overview Available Debug Windows

AVAILABLE DEBUG WINDOWS

The following table lists the debug windows that are available using ZDS.

TABLE 3-1. DEBUG WINDOWS

Window Function (Updated values will display in red)

Watch

Z8 Standard
Registers

Code Memory

Disassembly

Z8 Register File

Z8 Expanded
Register

Working Registers

• Shows the symbols and the contents of the registers (see the

ZDS user manual for more information)

• Shows the contents of the Z8 standard registers

• Allows the user to monitor, edit, and download a file.ld or

file.hex into the Code Memory from generated assembly

source code

• Tracks a specific address entered in the Code Address edit box

• Shows code memory along with the corresponding

disassembled code

• Allows the user to edit, and download a file.ld or file.hex into

the Code memory

• Follows the program counter

• Provides a complete scroll down with this window, however

the scroll up is limited

• Accesses the disassembly of code at the address specified in

the Code Address field

• The Disassembly window is automatically displayed when

debugging hex code or whenever there is no corresponding
source file available at the address specified by the program
counter

• Shows all Z8 internal and external registers, all RAM pointer

and data registers, status registers and status flags, and stacks

• Monitor and edit write-able registers in this window

• Displays the Z8 Expanded Register banks that are specified in

the configuration

• Monitor and edit write-able registers directly in this window by

selecting a specific bank tab

• Modify and view working registers in this window

UM005100-IRR0400 3–7

Available Debug Windows Overview

TABLE 3-1. DEBUG WINDOWS (CONTINUED)

Window Function (Updated values will display in red)

Timer Counter
Registers

Ports Register
Internal Data

Memory

• Modify the timer/counter registers in this window

• Monitor and edit port registers in this window

• Display address from FF00 to FFFF

3–8 UM005100-IRR0400

Z86L99 ICEBOX U

SER’S MANUAL

APPENDIX A

TROUBLESHOOTING GUIDE

INTRODUCTION

Before contacting a ZiLOG representative or submitting a Problem Report, please follow
these simple steps. Also, check the Precautions and Limitations sections in the Product Infor­mation document included with the emulator to eliminate other possible known problems. If
a hardware failure is suspected, contact a local ZiLOG representative for assistance.

If the initial ZiLOG screen is not appearing after selecting the COM port and the screen mes­sage displays Time-out while reading:

1. Check the RS-232C cable connection and communication port selection in ZDS. See Select
the Emulator on page 3-2 for more information on how to configure the host PC’s port.

2. Reset the emulator and ZDS.

3. If you are using the emulator’s oscillator, ensure that you removed the target’s oscillator
and connected pin 2 to pin 3 on the J5 jumper.

4. If ICEBOX stops working after connecting to the target, check whether the target crystal is
removed while using the ICEBOX’s oscillator.

5. Try connecting another cable.

6. Check if transmit/receive signals need to be swapped.

NOTE: On some DB9 connectors for the COM ports, the transmit/receive signal may be swapped and

a Null Modem adapter may be required.

7. Ensure that the power supply is connected, is turned on, and power is available.

8. Ensure that the power supply is set at +4.75 VDC to +5.25 VDC Max (+5.0 VDC typical).

9. Ensure that the J6 power jumper has been properly configured. See Emulator connection
on page 2-2 for more information on setting the J6 jumper.

10. Check if power supply is supplying the required current (0.8A typical) to the emulator.

UM005100-IRR0400 A–1

Counter Jumps to Unexpected Address Troubleshooting Guide

11. Check P42 pin. If P42 stays low check the target pod and ensure that it is not shorting to
ground. If it is shorted, ensure that you are using the proper emulation pod, see Table 1-1.

12. After resetting the emulator, wait a minimum of 5 seconds before running ZDS.

13. If P42 always shows low, check the 40-pin target pod’s pin 31.

NOTE: The previous Z86L71 and Z86L98 ICEBOX 40 pin target pod have pin 31 connecting to

ground for emulating the L73/87/89. That target pod can not be used for Z86L990 emulation. Only use
the target cable which is shipped with the Z86L99 ICEBOX.

COUNTER JUMPS TO UNEXPECTED ADDRESS

Any instruction other than a DI instruction is used to disable interrupts. Possible causes
include:

• The stack overflows into the general register locations.

• Extra POP, PUSH, IRET, or RET is encountered (stack unbalanced).

• Program resets repeatedly.

– Program counter rolls over from value FFFF to 0000 and proceeds back to the

beginning of program.

– Watch-Dog Timer (WDT) is not initialized or refreshed.

• Unintialized interrupt vector is activated. The interrupt vector is not set to the interrupt

handler.

A–2 UM005100-IRR0400

Troubleshooting Guide ZDS Error Messages

ZDS ERROR MESSAGES

C

AN NOT OPEN WINDOWS

If this message appears while attempting to open a window in ZDS, there may be too many
applications running. Try closing the other active applications or exit and restart your PC.

OUT OF SYNCHRONIZATION WITH THE EMULATOR

This message appears whenever communication between the emulator and the PC is inter­rupted.

1. Ensure that the power cable is connected.

2. Ensure that the RS-232C cable is connected.

3. Change the baud rate setting (default is 19200). A lower setting usually improves
communications reliability.

4. Reestablish communication between ZDS and the emulator. See the ZDS user manual for
more information establishing communication with an emulator.

UM005100-IRR0400 A–3

Z86L99 ICEBOXU

SER’S MANUAL

APPENDIX B

PROBLEM/SUGGESTION REPORT FORM

If you experience any problems while operating this product, or if you note any inaccuracies
while reading the User's Manual, please copy this form, fill it out, then mail or fax it to

ZiLOG. We also welcome your suggestions!

Customer Information

Name Country
Company Telephone
Address Fax Number
City/State/ZIP E-Mail Address

Product Information and Return Information

Serial # or Board Fab #/Rev. # ZiLOG, Inc.
Software Version System Test/Customer Support
Manual Number 910 E. Hamilton Ave., Suite 110, MS 4-3
Host Computer Description/Type Campbell, CA 95008

Fax Number: [phone]
Email: [e-mail]

Problem Description or Suggestion

Provide a complete description of the problem or your suggestion. If you are reporting a
specific problem, include all steps leading up to the occurrence of the problem. Attach
additional pages as necessary.

______________________________________________________________________________________

______________________________________________________________________________________

______________________________________________________________________________________

UM005100-IRR0400 B–1

Z86L99 ICEBOX U

SER’S MANUAL

GLOSSARY

Address Space Physical or logical area of the target systemÕs

Memory Map. The memory map could be physically
partitioned into ROM to store code, and RAM for data.
The memory can also be divided logically to form sepa­rate areas for code and data storage.

ANSI American National Standards Institute.

ASCII American Standard Code of Information Interchange.

ASM Assembler File.

ASYNC Asynchronous Communication Protocol.

ATM Asynchronous Transfer Mode.

B Binary.

Baud Unit of measure of transmission capacity.

Binary Number system based on 2. A binary digit is a bit.

BISYNC Bidirectional Synchronous Communication Protocol.

Bisynchronous
Communications A protocol for communications data transfer used

extensive in mainframe computer networks. The

UM005100-IRR0400 Glossary–1

Glossary

sending and receiving computers synchronize their
clocks before data transfer may begin.

Bit A digit of a binary system. It has only two possible

values: 0 or 1.

BPS Bits Per Second. Number of binary digits transmitted

every second during a data-transfer procedure.

Buffer Storage Area in Memory.

Bug A defect or unexpected characteristic or event.

Bus In Electronics, a parallel interconnection of the internal

units of a system that enables data transfer and
control Information.

Byte A collection of four sequential bits of memory. Two

sequential bytes (8 bits) comprise one word.

CALL This command invokes a subroutine

Checksum A field of one or more bytes appended to a block of n

words which contains a truncated binary sum formed
from the contents of that block. The sum is used to
verify the integrity of data in a ROM or on a tape.

COM Device name used to designate a communication

port.

Glossary–2 UM005100-IRR0400

Glossary

Control Section A continuous logical area containing code or user

data. Each control section has a name. The linker puts
all those control sections with the same name in one
entity. The linker provides address spaces to the
control sections. There are either absolute control
sections or relocatable ones.

CPU Central Processing Unit.

Cross-Linkage Editor A linkage editor that executes on a processor that is not

the same as the target processor.

DSP Digital Signal Processing. A specialized micropro-

cessor that is tailored to perform high repetition math
processing and improve signal quality.

Emulator An emulation device. For example, an In-Circuit

Emulator (ICE) module duplicates the behavior of the
chip it emulates in the circuit being tested.

External Symbol A symbol that is referenced in the current program file

but is defined in another program file.

GUI Graphical User Interface. The windows and text that a

user sees on their computer screen when they are
using a program.

H Hexadecimal, Half-Carry Flag.

Hex Hexadecimal.

Hexadecimal A Base-16 Number System. Hex values are often

substituted for harder to read binary numbers.

ICE In-Circuit Emulator. A ZiLOG product which supports

the application design process.

IE Interrupt Enable.

UM005100-IRR0400 Glossary–3

Glossary

IM Immediate Data Addressing Mode.

IMASK Interrupt Mask Register.

IMR Interrupt Mask Register.

INC Increment.

INCW Increment Word.

Initialize To establish start-up parameters, typically involving

clearing all of some part of the deviceÕs memory space.

Instruction Command.

INT Interrupt.

Internal Symbol A symbol that is defined in a program file. This symbol

could be visible to multiple functions within the same
program file.

I/O Input/Output. In computers, the part of the system that

deals with interfacing to external devices for input or
output, such as keyboards or printers.

IPR Interrupt Priority Register.

Ir Indirect Working-Register Pair Only.

IR Infrared. A light frequency range just below that of

visible light.

IRQ Interrupt Request.

ISDN Integrated Services Digital Network.

ISO International Standards Organization.

Glossary–4 UM005100-IRR0400

Glossary

JP Jump.

JR Jump Relative.

Library A File Created by a Librarian. This file contains a

collection of object modules that were created by an
assembler or directly by a C compiler.

Local Symbol Symbol visible only to a particular function within a

program file.

LSB Least Significant Bit.

MCU Microcontroller or Microcomputer Unit.

MI Minus.

MLD Multiply and Load.

MPYA Multiply and ADD.

MPYS Multiply and Subtract.

MSB Most Significant Bit.

Nibble A Group of 4 Bits.

NMI Non-Maskable Interrupt.

NOP No Operation.

Object Module Programming code created by assembling a file with

an assembler or compiling a file with a compiler.
These are relocatable object modules and are input to
the linker in order to produce an executable file.

OMF Object Module Format.

UM005100-IRR0400 Glossary–5

Glossary

OPC Operation Code.

Op Code Operation Code.

OTP One-Time Programmable.

PCON Port configuration register.

PER Peripheral. A device which supports the import or

output of information.

POP Retrieve a Value from the Stack.

POR Power-On Reset.

Port The point at which a communications circuit termi-

nates at a Network, Serial, or Parallel Interface card.

PRE Prescaler.

PROM Programmable Read-Only Memory.

Protocol Formal set of communications procedures governing

the format and control between two communications
devices. A protocol determines the type of error
checking to be used, the data compression method, if
any, how the sending device will indicate that it has
finished sending a message, and how the receiving
device will indicate that it has received a message.

PRT Programmable Reload Timer or Print.

PTR Pointer.

PTT Post, Telephone, and Telegraph. Agency in many

countries that is responsible for providing telecommu­nication approvals.

Glossary–6 UM005100-IRR0400

Glossary

Public/Global Symbol A programming variable that is available to more than

one program file.

PUSH Store a Value In the Stack.

r Working Register Address.

R Register or Working-Register Address, Rising Edge.

RA Relative Address.

RAM Random-Access Memory. A memory that can be

written to or read at random. The device is usually
volatile, which means the data is lost without power.

RC Resistance/Capacitance.

RD Read.

RES Reset.

Resolution In a digital image, the total number of pixels in the

horizontal and vertical directions.

RFSH Refresh.

ROM Read-Only Memory. Nonvolatile memory that stores

permanent programs. ROM usually consists of
solid-state chips.

ROMCS ROM Chip Select.

RP Register Pointer.

RR Read Register or Rotate Right.

SCF Set C Flag.

UM005100-IRR0400 Glossary–7

SIO Serial Input/Output.

SL Shift Left or Special Lot.

SLL Shift Left Logical.

SMR Stop Mode Recovery.

SN Serial Number.

SOIC Small Outline IC.

SP Stack Pointer.

SPH Stack Pointer High.

SPI Serial Peripheral Interface.

SPL Stack Pointer Low.

Glossary

SRAM Static Random Access Memory.

SR Shift Right.

SRA Shift Right Arithmetic.

SRC Source.

SSI Small Scale Integration. Chip that contains 5 to 50

gates or transistors.

Static Characteristic of Random Access Memory that

enables It to operate without clocking signals.

ST Status.

STKPTR Stack Pointer.

Glossary–8 UM005100-IRR0400

Glossary

SUB Subtract.

SVGA Super Video Graphics Adapter.

S/W Software.

SWI Software Interrupt.

Symbol Definition Symbol defined when the symbol name is associ-

ated with a certain amount of memory space,
depending on the type of the symbol and the size of
Its dimension.

Symbol Reference Symbol referenced within a program flow, when-

ever It is accessed for a read, write, or execute
operation.

SYNC Synchronous Communication Protocol. An event or

device is synchronized with the CPU or other process
timing.

TC Time Constant.

TCM Trellis Coded Modulation.

TCR Timer Control Register.

TMR Timer Mode Register.

UART Universal Asynchronous Receiver Transmitter.

Component or functional block that handles asynchro­nous communications. Converts the data from the
parallel format in which it is stored, to the serial format
for transmission.

UGE Unsigned Greater Than or Equal.

UGT Unsigned Greater Than.

UM005100-IRR0400 Glossary–9

Glossary

ULE Unsigned Less Than or Equal.

ULT Unsigned Less Than.

UM UserÕs Manual.

USART Universal Synchronous/Asynchronous

Receiver/Transmitter. Can handle synchronous as well
as asynchronous transmissions.

USB Universal Serial Bus.

USC Universal Serial Controller.

UTB Use Test Box. A board or system to test a particular

chip in an end-use application.

V Volt, Overflow Flag.

V

V

V

CC

DD

PP

Supply Voltage.

Voltage from the Digital Power Supply.

Programmed Voltage.

VRAM Video Random-Access Memory. A special form of

RAM chip that has a separate serial-output port for
display refresh operations. This architecture speeds up
video adaptor performance.

V

REF

Analog Reference Voltage.

WDT Watch-Dog Timer. A timer that, when enabled under

normal operating conditions, must be reset within the
time period set within the application (WDTMR (1,0)). If
the timer is not reset, a Power-on Reset occurs. Some
earlier manuals refer to this timer as the WDTMR.

Glossary–10 UM005100-IRR0400

Glossary

WDTOUT Watch-Dog Timer Output.

Word Amount of data a processor can hold in its registers

and process at one time. A DSP word is often 16 bits.
Given the same clock rate, a 16-bit controller
processes four bytes in the same time it takes an 8-bit
controller to process two.

WR Write.

WS Wafer Sort.

X Indexed Address, Undefined.

XOR Bitwise Exclusive OR.

XTAL Crystal.

Z Zero, Zero Flag.

ZASM ZiLOG Assembler. ZiLOGÕs program development

environment for DOS.

ZDS ZiLOG Developer Studio. ZiLOGÕs program develop-

ment environment for Windows 95/98/NT.

ZEM ZiLOG Emulator.

ZiLOG Symbol Format Three fields per symbol including a string containing

the Symbol Name, a Symbol Attribute, and an Absolute
Value in Hexadecimal.

ZLD ZiLOG Linkage Editor. Cross linkage editor for ZiLOGÕs

microcontrollers.

ZLIB ZiLOG Librarian. Librarian for creating library files from

locatable object modules for the ZiLOG family of
microcontrollers.

UM005100-IRR0400 Glossary–11

Glossary

ZMASM ZiLOG Macro Cross Assembler.

ZDS ZiLOGÕs program development environment for

Windows 3.1 and up.

ZOMF ZiLOGÕs Object Module Format. The object module

format used by the linkage editor.

Glossary–12 UM005100-IRR0400

Z86L99 ICEBOX U

INDEX

SER’S MANUAL

A–D

Adjust the voltage. . . . . . . . . . . . . . 2-7

Adjusting power. . . . . . . . . . . . . . . 2-7

Available Debug Windows . . . . . . . 3-7

Chip Data. . . . . . . . . . . . . . . . . . . . 3-3

Choosing the IceChip . . . . . . . . . . . 2-8

Clocks . . . . . . . . . . . . . . . . . . . . . . 1-3

Connect to Your Design . . . . . . . . . 2-6

E–I

Error Messages. . . . . . . . . . . . . . . .A-3

Header and Included files . . . . . . . . 3-6

Insert Files . . . . . . . . . . . . . . . . . . . 3-4

installation instructions . . . . . . . . . . 2-2

J–N

jumper settings . . . . . . . . . . . . . . . . 2-8

Kit Contents. . . . . . . . . . . . . . . . . . 1-4

LED Operation. . . . . . . . . . . . . . . . 2-9

Limitations. . . . . . . . . . . . . . . . . . . 1-2

logic analyzer. . . . . . . . . . . . . . . . . 2-7

Quick installation . . . . . . . . . . . . . .2-1

Requirements . . . . . . . . . . . . . . . . .1-5

RESET . . . . . . . . . . . . . . . . . . . . . .2-8

Resetting. . . . . . . . . . . . . . . . . . . . .2-8

Selecting the emulator . . . . . . . . . . .3-2

serial cable . . . . . . . . . . . . . . . . . . .2-5

Software Installation . . . . . . . . . . . .2-8

Software Setup . . . . . . . . . . . . . . . .3-2

Supported ZiLOG Devices . . . . . . . .1-3

Target connectors . . . . . . . . . . . . . .2-4

Troubleshooting . . . . . . . . . . . . . . A-1

U–Z

voltage adjuster . . . . . . . . . . . . . . . .2-7

ZDS

adding files

Create a New Project . . . . . . . . . .3-2

Debug windows. . . . . . . . . . . . . .3-7

New Project . . . . . . . . . . . . . . . .3-3

obj files. . . . . . . . . . . . . . . . . . . .3-5

Open a project. . . . . . . . . . . . . . .3-4

Project Viewer window . . . . . . . .3-6

. . . . . . . . . . . . . . . . .3-4

O–T

OTP programming . . . . . . . . . . . . 2-14

power supply . . . . . . . . . . . . . . . . . 2-5

adjusting . . . . . . . . . . . . . . . . . . 2-5

problems . . . . . . . . . . . . . . . . . . 2-8

settings . . . . . . . . . . . . . . . . . . . 2-1

powering down. . . . . . . . . . . . . . . . 2-8

UM005100-IRR0400 Index–1

A

B

C

D

E

4 4

3 3

2 2

(U13) (U13) (U13) (U13) (U13) (U13) (U13) (U13) (U8) (U8) (U8) (U8) (U10) (U10) (U12) (U12) (U9) (U9)

C8

0.1UF

C9

0.1UF

C10

0.1UF

C11

0.1UF

C12

0.1UF

C13

0.1UF

C14

0.1UF

C15

0.1UF

C16

0.1UF

C17

0.1UF

C18

0.1UF

C19

0.1UF

C20

0.1UF

C21

0.1UF

C22

0.1UF

C23

0.1UF

C24

0.1UF

(U9) (U9) (U11) (U11) (U11) (U11) (U15) (U15) (U16) (U16) (U14) (U14) (Y1) (U1) (U1) (U2) (U2) (U3)

C26

0.1UF

C27

0.1UF

C28

0.1UF

(U3) (U3) (U3) (U6)

C44

0.1UF

C50

0.1UF

C45

0.1UF

C51

0.1UF

C46

0.1UF

C52

0.1UF

(U1) (U2) (U2)

C68

0.1UF

C69

0.1UF

C70

0.1UF

C29

0.1UF

C47

0.1UF

C53

0.1UF

+

C71
100UF

C30

0.1UF

(U7) (U5)

C48

0.1UF

C54

0.1UF

VCC_I

+

C77

100UF

C31

0.1UF

C49

0.1UF

C55

0.1UF

C32

0.1UF

C56

0.1UF

C78

0.1UF

C33

0.1UF

C34

0.1UF

C35

0.1UF

VCC

+

C72
100UF

(U14) (U14)(U16)(U12)(U12)(U10) (U15)(U10) (U15) (U16) (U17) (U17)

C57

0.1UF

VCC
1

2
3
4
5

CON5

C58

0.1UF

GND
1

2
3
4
5

CON5

C59

0.1UF

C36

0.1UF

C60

0.1UF

C37

0.1UF

(U17) (U17)

C61

0.1UF

C38

0.1UF

C62

0.1UF

C39

0.1UF

C63

0.1UF

C40

0.1UF

(U17) (U18)

C64

0.1UF

C41

0.1UF

C65

0.1UF

C42

0.1UF

(U18) (U1)

C66

0.1UF

C25

0.1UF

C43

0.1UF

C67

0.1UF

VCC

VCC

VCC_I

1 1

BYPASS/DECOUPLING CAPACITORS

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

A

B

C

D

Date: Sheet

111Monday, August 14, 2000

E

A

of

UM005100-IRR0400 Schematic 1

A

P4[0..7]
P5[0..7]

nIACKtv

P2[0..7]

P_CT_CLK

P_TBD3
P_TBD2
P_TBD1

P_CLK

P_CLR

nP_PGM

P_WR_RD

P_CLK_CE

R32_64

nEXR_OFF

nIRQ_ACK

nMAS_I

SCLK

nMDS_I

nSYNC

nRST_frI

FG_BG

AD_M[7..0]

A_I[15..8]

AD_I[7..0]

nDS_I

R_W_I
nAS_I

nAS_Itv

nDS_Itv

P34tv

A_Itv[15..8]
AD_Itv[7..0]

R_W_Itv

nSYNCtv

nMDS_Itv

SCLKtv

nMAS_Itv

nDTMRtv

XTAL1tv

nXROFFtv

nRST_Itv

nRST_Ttv

nIRQ_ACK

nRST_frI
FG_BG

AD_I[7..0]

nAS_Itv
nDS_Itv

P34tv
A_Itv[15..8]

AD_Itv[7..0]
R_W_Itv
nSYNCtv
nMDS_Itv
SCLKtv
nMAS_Itv
nDTMRtv
XTAL1tv
nXROFFtv

nRST_Itv
nRST_Ttv

nIACKtv

LG

P5[0..7]

P2[0..7]

4 4

3 3

P5_I[0..7]

P2_I[0..7]

P4_I[0..7]

P6_I[0..7]

2 2

P4[0..7]

P4_I[0..7]

P5_I[0..7]

P6_I[0..7]
P2_I[0..7]

LOGIC ANALYZER CONNECTOR

ICE

P2_I[0..7]

P6_I[0..7]
P5_I[0..7]
P4_I[0..7]

ICE MCU

B

TRANS

nAS_I

FG_BG

nAS_Itv

nDS_Itv

P34tv P34_nDM

A_Itv[15..8] A_I[15..8]

R_W_Itv
nSYNCtv nSYNC

nMDS_Itv

SCLKtv SCLK

nMAS_Itv
nDTMRtv
XTAL1tv

nRST_Ttv nRST_T

nIACKtv

VOLTAGE TRANSLATOR

AD_I[7..0]AD_Itv[7..0]

nEXR_OFFnXROFFtv

nRST_frInRST_Itv

nDR_P1MM

nAD_I_OE

I_WR_RD

nIRQ_ACK

nDS_I

R_W_I

nMDS_I

nMAS_I

R32_64

POWER

POWER LOGIC

P34_nDM
A_I[15..8]

nDS_I
nAS_I
R_W_I
nSYNC
nMDS_I
SCLK
nMAS_I

nEXR_OFF

R32_64
nRST_T

nDR_P1MM
nAD_I_OE
I_WR_RD

C

CPLD

P34_nDM
A_I[15..8]

nDS_I
nAS_I
R_W_I

nMDS_I

SCLK

nMAS_I

nEXR_OFF
R32_64

nRST_frI
nRST_T

nDR_P1MM

nAD_I_OE
I_WR_RD

CONTROL LOGIC

nRST_Itv

A_M_LO[1..0]

A_M_LO[1..0]

FG_BG

A_M_LO[1..0]

nRST_Itv

nWR_DAC

AD_M[7..0]

P_CLK_CE

P_RD_WR

P_CLR

nP_PGM

P_WR_RD

P_CT_CLK

AD_M[7..0]nSYNC
C_JAM_P1

A_M[15..8]

nDS_frI
nDS_M
nAS_M

R_W_M

C_DR_ADI

nRST_frM
nRST_CT

P_CLK

P_TBD1

nDM

P_TBD2

P_TBD3

D

P_CT_CLK

AD_M[7..0]
C_JAM_P1
A_M[15..8]
nDS_frI
nDS_M
nAS_M
R_W_M
C_DR_ADI

nRST_frM
nRST_CT

PGM_LOGIC

P_RD_WR
P_CLK_CE

P_WR_RD
nP_PGM
P_CLR
P_CLK
P_TBD1
P_TBD2
P_TBD3

CTRL

P_CT_CLK

AD_M[7..0]

C_JAM_P1
A_M[15..8]
nDS_frI
nDS_M

nAS_M

R_W_M
C_DR_ADI
nDM

nRST_frM
nRST_CT
R_W_I

nMAS_I
SCLK

nSYNC

A_I[15..8]
AD_I[7..0]

MOTHERBOARD INTERFACE

P_RD_WR

P_CLK_CE
P_WR_RD

nP_PGM
P_CLR

P_CLK

P_TBD1
P_TBD2
P_TBD3

AD_M[7..0]

PROGRAMMING LOGIC

nWR_DAC

FG_BG

nIRQ_ACK

D_P[7..0]

P_AL_CLK

P_AH_CLK

nWR_DAC

P_WR_RD

P_CLK_CE

E

P_AH_CLK

P_AL_CLK

P_AL_CLK

P_AH_CLK

P2[0..7]

P5[0..7]

P4[0..7]

D_P[7..0]

D_P[7..0]

1 1

FOR USER"S MANUAL ONLY

A

B

C

D

ZILOG
4201 Bee Caves Road
Suite C-100
Austin, TX 78746

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

Date: Sheet

211Monday, August 14, 2000

E

of

A

UM005100-IRR0400 Schematic 2

A

B

C

D

E

VCC

J3

U13

13

VCC13

26

VCC26

19

GND19

32

GND32

12

nRST_T

15

nMDS_I

16

nDS_I

17

R/W_I

18

nMAS_I

20

P34_nDM

21

nDM

22

nSYNC

24

SCLK

25

nAS_I

27

R32/63

28

nEXR_OFF

29

C_JAM_P1
FG_BG

31

nDR_P1MM

14

nRST_frI

23

nRST_toM

A_I[15..8]

A_M_LO[1..0]

DM_ENA

12

R17

10K

(TDI)

(TMS)

A_I8

VCC3

A_I8

A_I9

78

VCC78

A_I9

A_I10

7382

A_I10

A_I11

GND7

A_I11

3736353433

A_I12

DM_ENA

GND82

A_I13

A_I12

39

A_I13

A_I14

EXT_MEM

11109

DM_ENA

EXT_MEM

A_I15

A_I14

A_I15

USER NOTE:
INSTALL JUMPER IF TARGET
SYSTEM USES PORT 3 PIN 4
AS /DM PIN TO ACCESS

4 4

3 3

nEXR_OFFpg7

nDR_P1MM

2 2

A_M_LO[1..0]pg9

1 1

EXTERNAL DATA/PROGRA M
MEMORY.

nRST_Tpg11
nMDS_Ipg11

nDS_Ipg11

R_W_Ipg11

nMAS_Ipg11

P34_nDMpg11

nDMpg8

nSYNCpg11

SCLKpg11

nAS_Ipg11

R32_64pg7

C_JAM_P1pg8

FG_BGpg8

nRST_frIpg11

A_I[15..8]pg11
I_WR_RDpg11

nAD_I_OEpg11

nRST_Itvpg4,11

P_RD_WRpg10

P_TBD3pg7,10
P_TBD2pg7,10
P_TBD1pg7,10

nEXR_OFF
C_JAM_P1
nDR_P1MM

VCC

nRST_T
nMDS_I

nDS_I
R_W_I

nMAS_I

P34_nDM

nDM
nSYNC
SCLK
nAS_I

R32_64

FG_BG

nRST_frI
nRST_toM

(TMS)
(TDI)

1 2

A_M13

A_M14

A_M15

8

6548180

A_M15

A_M14

nAD_I_OE

I_WR/RD

nAD_I_OE

nRST_Itv

I_WR_RD

A_M11

A_M12

A_M13

A_M12

A_M11

nRST_Itv

A_M_LO0

48714645444140

A_M_LO0

EXT_MEM

A_M9

A_M10

A_M9

A_M10

A_M_LO1

P_RD/WR

49

50

P_RD_WR

A_M_LO1

12

A_M8

nRST_CT

nDS_M

P_CT_CLK

792184837776

A_M8

nDS_M

nRST_CT

P_CT_CLK

P_TBD1

P_TBD2

P_TBD3

54

52

51

P_TBD2

P_TBD1

P_TBD3

FOR USER"S MANUAL ONLY

A

B

J4

R18

10K

1 2

GBL_OE

GND42

GND47

423047

12

R19

10K

nRST_frM

C_DR_ADI

VCC38

VCC43

38

43

VCC

USER NOTE:
INSTALL JUMPER IF
TARGET SYSTEM USE S
PORT 1 AS ADDRESS/DATA
BUS.

nRST_frM
C_DR_ADI
nAS_M

75

nAS_M

74

R/W_M

73

AD_M0

70

AD_M1

69

AD_M2

68

AD_M3

67

AD_M4

65

AD_M5

64

AD_M6

63

AD_M7

61

P_CLKE/CE

60

P_WR/RD

58

nDS_frI

57

nP_PGM

56

P_CLR

55

P_CLK

(TDO)

I/O1

62

(TCK)

I/O2

59

GND59

72

GND72

66

VCC66

VCC53

53

C

R_W_M AD_M[7..0]
AD_M0

AD_M1
AD_M2
AD_M3
AD_M4
AD_M5
AD_M6
AD_M7

P_CLK_CE
P_WR_RD
nDS_frI
nP_PGM
P_CLR
P_CLK

(TDO)
(TCK)

VCC

EPM7128S-LC84

VCC

12

12

R20

R21

10K

10K

12

DESIGNER NOTE:

R22

ALTERA PIN USE FOR ISP CAN ALSO BE

10K

USED AS I/O CONTROL PIN. PI N NOT
CURENTLY USED AS I/O PIN CAN BE
USED AS I/O PIN IN THE FUTURE AS
NEEDED.

Title

Size Document Number Rev

D

Date: Sheet

ISP HEADER FOR ALTERA CPLD

(TCK)
(TDO)
(TMS)

(TDI)

P4
1
3
5
7
9

CONTROL LOGIC

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

B

A_M[15..8]

VCC

2
4
6
8
10

A_M[15..8] p g 8
P_CT_CLK pg8
nRST_CT pg8
nDS_M pg8

nRST_frM pg8
C_DR_ADI pg8
nAS_M pg8

R_W_M pg8
AD_M[7..0] pg8

P_CLK_CE pg7,8,10
P_WR_RD pg7,8,10
nDS_frI pg8
nP_PGM pg7,10
P_CLR pg7,10
P_CLK pg7,10

311Monday, August 14, 2000

E

of

A

UM005100-IRR0400 Schematic 3

A

4 4

3 3

USER NOTE:
INSTALL JP2 AND JP3 IF 28 PIN PART
INSTALL JP2 IF 40 PIN PART

2 2

nMAS_Itvpg11
nMDS_Itvpg11
nSYNCtvpg11
nDTMRtvpg11

Test Port

P7
2
4
6
8

10
12
14
16

nXROFFtvpg11

L99Vref+pg5

L99Vref-pg5

nIACKtvpg11

SCLKtvpg11

AGNDpg5

AVDDpg5

AVDD

AD_Itv0

1

AD_Itv1

3

AD_Itv2

5

AD_Itv3

7

AD_Itv4

9

AD_Itv5

11

AD_Itv6

13

AD_Itv7

15

VCC_I

JP2

1
2

JP3

1
2

JP4

2
1

+

C79
100uF

12

C80

.01UF

R44

10K

B

A_Itv8
A_Itv9
A_Itv10
A_Itv11
A_Itv12
A_Itv13
A_Itv14
A_Itv15

nXROFFtv

VCC_I

R27
10K

AD_Itv0
AD_Itv1
AD_Itv2
AD_Itv3
AD_Itv4
AD_Itv5
AD_Itv6
AD_Itv7

L99Vref+
nMAS_Itv
L99Vref­nMDS_Itv
nIACKtv
nSYNCtv
SCLKtv
nDTMRtv
nICEtv
AGND

2

A_Itv[15..8]

AD_Itv[7..0]

JP1

1

CON2

4
6
3

9
10
18
19
21
27
28
31
34
59
60
61
62

23
63
15
64
71
65
77
66
73
14
69

58
24

11
25
75
26
33

2
13
41
42
70
76
32

U17

Z86D99AA

L99 ICE MCU

MAD0
MAD1
MAD2
MAD3
MAD4
MAD5
MAD6
MAD7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15

Vref+
nMAS
Vref­nMDS
nIACK
nSYNC
SCLK
nDTIMER
nICE
AGND1
AGND2

nICEIBF
AVDD

VDD1_CORE
VDD4_CORE
VDD3
VDD5
VDD2

VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2

P20
P21
P22
P23
P24
P25
P26
P27

P60
P61
P62
P63
P64
P65
P66
P67

P50
P51
P52
P53
P54
P55

P56
P57a
P57b

P40

P41

P42

P43

P44

P45

P46

P47

R/nW

nRESET

XTAL1
XTAL2

NC1
NC2
NC3
NC4
NC5DVBON

C

VCC_I

12

R26

1M

(L99 PORT2)

(L99 PORT6)

(L99 PORT5)

(L99 PORT4)

P2_I0

74

P2_I1

78

P2_I2

79

P2_I3

80

P2_I4

81

P2_I5

5

P2_I6

7

P2_I7

8

P6_I0

82

P6_I1

83

P6_I2

84

P6_I3

1

P6_I4

44

P6_I5

45

P6_I6

46

P6_I7

47

P5DA_I0

55

P5DA_I1

35

P5DA_I2

38

P5DA_I3

39

P5DA_I4

40

P5DA_I5

49

P5DA_I6

54

P5DA_I7 P4DA_I[0..7]

50
52

P4DA_I0

56

P4DA_I1

67

P4DA_I2

68

P4DA_I3

72

P4DA_I4

16

P4DA_I5

17

P4DA_I6

20

P4DA_I7

22

R_W_Itv

57

nRST_Itv nRST_Itv

43

XTAL1_I

30

XTAL2_T

29
12

36
37
51
5348

P2_I[0..7]

P6_I[0..7]

P5DA_I[0..7]

D

P5DA_I[0..7] pg5,7

P4DA_I[0..7] pg5,7

VCC_IVCC_I

12

12

A_Itv[15..8] pg11
AD_Itv[7..0] pg11

P2_I[0..7] pg5,7

P6_I[0..7] pg5,7

nRST_Itv pg3,11

R46

10K

VCC_IVCC_I

12

R43

10K

FOR USER"S MANUAL ONLY

E

R45

10K

P34tv pg11

nRST_Ttvpg11

12

R42

10K

nAS_Itv pg11
nDS_Itv pg11

R_W_Itvpg11

XTAL2_Tpg5

XTAL1_Tpg5

1 1

XTAL1tvpg11

A

R_W_Itv
XTAL2_T

1
3

J5

HDR103

XTAL1_I

2

ICE MCU

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

D

Date: Sheet

411Tuesday, August 15, 2000

E

A

of

XTAL1_TXTAL1_T

XTAL1tvXTAL1tv

USER NOTE:

SELECT CLOCK SOURCE FOR ICE MCU ON DAUGHTER BOARD.

JUMPER PIN 1 & 2 => CLOCK FOR DAUGHTER BOA RD ICE MCU TO COME FROM

TARGET SYSTEM.

JUMPER PIN 2 & 3 => DAUGHTER BOARD ICE MCU WILL USES OSCILLATOR

RESIDING ON DAUGHTER BOARD.

B

C

UM005100-IRR0400 Schematic 4

A

(L99 PORT5)

P5_I[0..7]pg4,7

P6_I[0..7]pg4,7

P4_I[0..7]pg4,7

P2_I[0..7]pg4,7

VCC_I

VCC_I

VCC_I

VCC_I

1

RN1

RES_BUS9_680K

1

RN2

1

RN3

1

RN4

4 4

3 3

2 2

1 1

P5_I[0..7]

(L99 PORT6)

P6_I[0..7]

(L99 PORT4)

P4_I[0..7]

P5PU_I0
P5PU_I1
P5PU_I2
P5PU_I3
P5PU_I4
P5PU_I5
P5PU_I6
P5PU_I7

P6PU_I0
P6PU_I1
P6PU_I2
P6PU_I3
P6PU_I4
P6PU_I5
P6PU_I6
P6PU_I7

P4PU_I0
P4PU_I1
P4PU_I2
P4PU_I3
P4PU_I4
P4PU_I5
P4PU_I6
P4PU_I7

(L99 PORT2)

S2
1
2
3
4
5
6
7
8

SW DIP-8

S4
1
2
3
4
5
6
7
8

SW DIP-8

S5
1
2
3
4
5
6
7
8

SW DIP-8

1
2
3
4
5
6
7
8

S6

SW DIP-8

P2_I[0..7]

TURN SWITCH TO ON POSITION
TO ENABL E RESISTOR PULL UP
ON PORT PINS.

P2PU_I0

2

P2PU_I1

3

P2PU_I2

4

P2PU_I3

5

P2PU_I4

6

P2PU_I5

7

P2PU_I6

8

P2PU_I7

9
10

TURN SWITCH TO ON POSITION
TO ENABLE RESISTOR PULL UP
ON PORT PINS.

2
3
4
5
6
7
8
9
10

RES_BUS9_680K

TURN SWITCH TO ON POSITION
TO ENABLE RESISTOR PULL UP
ON PORT PINS.

2
3
4
5
6
7
8
9
10

RES_BUS9_680K

TURN SWITCH TO ON POSITION
TO ENABLE RESISTOR PULL UP
ON PORT PINS.

2
3
4
5
6
7
8
9
10

RES_BUS9_680K

P2_I0

16

P2_I1

15

P2_I2

14

P2_I3

13

P2_I4

12

P2_I5

11

P2_I6

10

P2_I7

9

P5_I0

16

P5_I1

15

P5_I2

14

P5_I3

13

P5_I4

12

P5_I5

11

P5_I6

10

P5_I7

9

P6_I0

16

P6_I1

15

P6_I2

14

P6_I3

13

P6_I4

12

P6_I5

11

P6_I6

10

P6_I7

9

P4_I0

16

P4_I1

15

P4_I2

14

P4_I3

13

P4_I4

12

P4_I5

11

P4_I6

10

P4_I7

9

FOR USER"S MANUAL ONLY

A

B

TARGET CONNECTORS PLACE SWITCH IN OPEN

P5

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80

P6

2

4

6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

B

P6_I2

1

P6_I1

3

P6_I3

5

P6_I0

7

P2_I5

9

P2_I4

11

P2_I6

13

P2_I3

15

P2_I7

17

P2_I2

19

AGND

21

P2_I1

23

L99Vref-

25

P2_I0

27

P4DA_I4

29

P4DA_J3

31

P4DA_I5

33

GND

35

P4DA_I6

37

P4DA_I2

39

P4DA_I7

41

P4DA_I1

43

L99Vref+

45

P4DA_I0

47

AVDD

49

P5DA_I0

51

VCC_Itar

53

P5DA_I6

55

XTAL2_T

57

P5DA_I7

59

XTAL1_T

61

P5DA_I5

63

P5DA_I1

65

P6_I7

67

P5DA_I2

69

P6_I6

71

P5DA_I3

73

P6_I5

75

P5DA_I4

77

P6_I4

79

P2_I5

1

P2_I4

3

P2_I6

5

P2_I3

7

P2_I7

9

P2_I2

11

P4DA_I4

13

P2_I1

15

P4DA_I5

17

P2_I0

19

P4DA_I6

21

P4DA_J3

23

P4DA_I7

25

GND

27

VCC_Itar

29

P3DA_I2

31

XTAL2_T

33

P3DA_I1

35

XTAL1_T

37

P4DA_I0

39

P5DA_I1

41

P5DA_I0

43

P5DA_I2

45

P5DA_I6

47

P5DA_I3

49

P5DA_I7

51

P5DA_I4

53

P5DA_I5

55

GND

57

GND

59

AGND pg4
L99Vref- pg4

L99Vref+ pg4

AVDD pg4
VCC_Itar
XTAL2_T pg4
XTAL1_T pg4

VCC_Itar
XTAL2_T pg4
XTAL1_T pg4

C

J8

CON2

C

D

POSITION WHEN USING PORT
PIN FOR ANALOG FUNCTION.

P5_I5 P5DA_I5

P4_I0

P4DA_I0

P4_I1

P4DA_I1

P4_I2

P4DA_I2
P4DA_I3P4_I3

P4_I4
P4_I5
P4_I6
P4_I7

1
2

P4DA_I3

VCC_Itar

P5_I6 P5DA_I6

P5_I0

1

P5_I1

2

P5_I2

3

P5_I3

4
5
6
7
8

J7

1
2

CON2

D

S1

SW DIP-8

IR LED OUTPUT

E

P5DA_I4P5_I4

P5DA_I7P5_I7

P5DA_I0

16

P5DA_I1

15

P5DA_I2

14

P5DA_I3

13

P4DA_I4

12

P4DA_I5

11

P4DA_I6

10

P4DA_I7

9

ICE MCU

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

Date: Sheet

P5DA_I[0..7]

P4DA_I[0..7]

P5DA_I[0..7] pg4,7

P4DA_I[0..7] pg4,7

511Tuesday, August 15, 2000

E

A

of

UM005100-IRR0400 Schematic 5

A

B

C

D

E

4 4

3 3

TARGET
CONNECTOR

2 2

L99 MODE:

- SET ROM_SIZE_RG = 16K.

- T3 IS TRI-STATED.

- WHEN DS_I IS ASSERTED:
IF (FG/BG && OUTSIDE_ROM)
TR-STATE T1.
ELSE IF (FG/BG && !OUTSIDE_ROM)
ENABLE T1.
ELSE IF (!FG/BG)
IF (C_JAM_P1)
TRI-STATE T1.
ELSE
ENABLE T1.

NOTE: ZDS MUST NOT SET D_MEMFLAG REGISTER
DMF_DATA BIT WHEN ACCESSING EXECUTABLE
RAM.

BUFFER
TRANSLATER

P1_I[0..7]

0-5V

P1_I[0..7] AD_Itv[7..0]
0-5V

3

T3

ICE

P1_M[0..7]

5V

0-5V

MCU

BUFFER
TRANSLATER
1

T1

AD_I[7..0]

5V

MOTHERBOARD
INTERFACE

1 1

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

A

B

C

D

Date: Sheet of

611Monday, August 14, 2000

E

A

UM005100-IRR0400 Schematic 6

A

SIGNAL BUFFER

SIGNAL
TRANSLATION

A

AD_I[7..0]

A_I[15..8]

P2_I[0..7]

P6_I[0..7]

VCC

P5_I[0..7]

SIGNAL
TRANSLATION

P4_I[0..7]

U8

AD_I0

47

AD_I1

46

AD_I2

44

AD_I3

43

AD_I4

41

AD_I5

40

AD_I6

38

AD_I7

37

A_I8

36

A_I9

35

A_I10

33

A_I11

32

A_I12

30

A_I13

29

A_I14

27

A_I15

26

1
48
25
24

4
10
15
21

P2_I0

47

P2_I1

46

P2_I2

44

P2_I3

43

P2_I4

41

P2_I5

40

P2_I6

38

P2_I7

37

P6_I0

36

P6_I1

35

P6_I2

33

P6_I3

32

P6_I4

30

P6_I5

29

P6_I6

27

P6_I7

26
48

1
25
24

4
10
15
21

P5_I0
P5_I1
P5_I2
P5_I3
P5_I4
P5_I5
P5_I6
P5_I7
P4_I0
P4_I1
P4_I2
P4_I3
P4_I4
P4_I5
P4_I6
P4_I7 P47

VCC

1Y1

1A1

1Y2

1A2

1Y3

1A3
1A4

1Y4

2A1

2Y1

2A2

2Y2

2A3

2Y3

2A4

2Y4

3A1

3Y1

3A2

3Y2

3A3

3Y3

3A4

3Y4

4A1

4Y1

4A2

4Y2

4A3

4Y3

4A4

4Y4

VCC7

1OE
2OE

VCC18
VCC31

3OE
4OE

VCC42

GND4

GND28

GND10

GND34

GND15

GND39

GND21

GND45

IDT74FCT16244ATPA

U10

1B1

1A1

1B2

1A2
1A3

1B3

1A4

1B4

1A5

1B5

1A6

1B6

1A7

1B7

1A8

1B8

2A1

2B1

2A2

2B2

2A3

2B3

2A4

2B4

2A5

2B5

2A6

2B6

2A7

2B7

2A8

2B8

VCCB1

1OE
1DIR

VCCB2

2OE

VCCA1

2DIR

VCCA2

GND4

GND28

GND10

GND34

GND15

GND39

GND21

GND45

IDT74FCT164245TPA

U12

47

1A1

46

1A2

44

1A3

43

1A4

41

1A5

40

1A6

38

1A7

37

1A8

36

2A1

35

2A2

33

2A3

32

2A4

30

2A5

29

2A6

27

2A7

26

2A8

48

1OE

1

1DIR

25

2OE

24

2DIR

4

GND4

10

GND10

15

GND15

21

GND21

IDT74FCT164245TPA

AD_I[7..0]pg8,11

4 4

A_I[15..8]pg11

P2_I[0..7]pg4,5

3 3

P6_I[0..7]pg4,5

2 2

P5_I[0..7]pg4,5

1 1

P4_I[0..7]pg4,5

2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23

7
18
31
42

28
34
39
45

2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23

7
18
31
42

28
34
39
45

VCCB1
VCCB2

GND28
GND34
GND39
GND45

1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8

VCCA1
VCCA2

B

MAD0
MAD1
MAD2
MAD3
MAD4
MAD5
MAD6
MAD7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15

P20
P21
P22
P23
P24
P25
P26
P27
P60
P61
P62
P63
P64
P65
P66
P67

B

VCC

VCC
VCC_I

2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23

7
18
31
42

28
34
39
45

P50
P51
P52
P53
P54
P55
P56
P57
P40
P41
P42
P43
P44
P45
P46

VCC
VCC_I

(L99 PORT2)

(L99 PORT6)

(L99 PORT5)

(L99 PORT4)

C

P6[0..7]
P2[0..7]

LOGIC ANALYZER CONNE CTOR

MA[15..8]
MAD[7..0]

P3

MAD0

1

MAD2

3

MAD4

5

MAD6

7

MA8

9

MA10

11

MA12

13
15

nAS

17
19
21
23

LG_32_64

LG_SCLK

LG_SCLK
LG_AD_M0

LG_AD_M2
LG_AD_M4
LG_AD_M6
LG_PTBD3
LG_PTBD1
LG_P_CLR
LG_WR_RD
LG_CTCLK

25
27

nMAS

29

R_W

31
33

nRESET

35

nDS

37
39

P20

41

P22

43

P24

45

P26

47

P60

49

P62 P63

51

P64

53

P66

55
57
59

P50

61

P52

63

P54

65

P56

67

P40

69

P42

71

P44

73

P46

75
77
79
81
83
85
87
89
91
93
95
97
99

LG_AD_M[7..0]
P4[0..7] P4[0..7]
P5[0..7] P5[0..7]

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100

MAD1
MAD3
MAD5
MAD7

MA9
MA11
MA13
MA15MA14

GND

nMDS
nLG_SYNC
nLG_IACK
LG_FG_BG
LG_nXROF

GND
P21
P23
P25
P27
P61

P65
P67

GND
P51
P53
P55
P57
P41
P43
P45
P47

GND
LG_AD_M1
LG_AD_M3
LG_AD_M5
LG_AD_M7
LG_PTBD2
LG_P_CLK
LG_nPGM
LG_CLKCE

GND

LG_CTCLK

FOR USER"S MANUAL ONLY

C

D

SIGNAL BUFFER

U9

nAS
nMAS

R_W

nRESET

nDS

nMDS

LG_AD_M0
LG_AD_M1
LG_AD_M2
LG_AD_M3
LG_AD_M4
LG_AD_M5
LG_AD_M6
LG_AD_M7

VCC

D

2
3
5
6
8

9
11
12
13
14
16
17
19
20
22
23

7
18
31
42

28
34
39
45

IDT74FCT16244ATPA

2
3
5
6
8

9
11
12
13
14
16
17
19
20
22
23

7
18
31
42

28
34
39
45

LG_32_64

nLG_SYNC
nLG_IACK
LG_FG_BG
LG_SCLK
LG_nXROF nEXR_OFF

VCC

LG_PTBD2
LG_PTBD1
LG_P_CLK
LG_P_CLR
LG_nPGM

LG_CLKCE

1A1

1Y1

1A2

1Y2

1A3

1Y3

1A4

1Y4

2A1

2Y1

2A2

2Y2

2A3

2Y3

2A4

2Y4

3A1

3Y1

3A2

3Y2

3A3

3Y3

3A4

3Y4

4A1

4Y1

4A2

4Y2

4A3

4Y3

4A4

4Y4

1OE

VCC7

2OE

VCC18

3OE

VCC31

4OE

VCC42

GND4

GND28

GND10

GND34

GND15

GND39

GND21

GND45

SIGNAL BUFFER

U11

1A1

1Y1

1A2

1Y2

1A3

1Y3

1A4

1Y4

2A1

2Y1

2A2

2Y2

2A3

2Y3

2A4

2Y4

3A1

3Y1

3A2

3Y2

3A3

3Y3

3A4

3Y4

4A1

4Y1

4A2

4Y2

4A3

4Y3

4A4

4Y4

1OE

VCC7

2OE

VCC18

3OE

VCC31

4OE

VCC42

GND4

GND28

GND10

GND34

GND15

GND39

GND21

GND45

IDT74FCT16244ATPA

LOGIC ANALYZER CONNECTOR

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

Date: Sheet

E

nAS_I

47

R32_64

46

nMAS_I

44

R_W_I

43
41

nRST_frI

40

nMDS_I

38

nDS_I

37

nSYNC

36

nIRQ_ACK

35

FG_BG

33

SCLK

32
30
29
27

P_CT_CLK

26
1

48
25
24

4
10
15
21

P2[0..7]

AD_M[7..0]

AD_M0

47

AD_M1

46

AD_M2

44

AD_M3

43

AD_M4

41

AD_M5

40

AD_M6

38

AD_M7

37

P_TBD3LG_PTBD3

36

P_TBD2

35

P_TBD1

33

P_CLK

32

P_CLR

30

nP_PGM

29

P_WR_RDLG_WR_RD

27

P_CLK_CE

26
1

48
25
24

4
10
15
21

R29

10K

nAS_I pg11
R32_64 pg3
nMAS_I pg11
R_W_I pg11

nRST_frI pg11
nMDS_I pg11
nDS_I pg11
nSYNC pg11
nIRQ_ACK pg11
FG_BG pg8
SCLK pg11
nEXR_OFF pg3,11

P_CT_CLK pg8

P2[0..7] pg8

AD_M[7..0] pg8

P_TBD3 pg3
P_TBD2 pg3
P_TBD1 pg3
P_CLK pg3
P_CLR pg3
nP_PGM pg3
P_WR_RD pg3
P_CLK_CE pg3

P4[0..7] pg8
P5[0..7] pg 8

711Monday, August 14, 2000

E

A

of

UM005100-IRR0400 Schematic 7

A

4 4

B

C

D

E

A_M[15..8]pg3

nRST_frMpg3

C_DR_ADIpg3

R_W_Mpg3

nRST_CTpg3

nAS_Mpg3
nDS_Mpg3

AD_M[7..0]pg3,7,9,10

3 3

D_P[7..0]pg10

nDS_frIpg3

2 2

nWR_DACpg9

P_CT_CLKpg3,7
P_AL_CLKpg10

P_AH_CLKpg10

P_WR_RDpg3

P_CLK_CEpg3

A_M[15..8]

AD_M[7..0]

D_P[7..0]

MB INTERFACE CONNECTOR 1

(nM_AS)

nAS_M

(nM_DS)

nDS_M

(M_R/W)

R_W_M

(nRESET2)

nRST_CT

(M_D0)

AD_M0

(M_D1)

AD_M1

(M_D2)

AD_M2

(M_D3)

AD_M3

(M_D4)

AD_M4

(M_D5)

AD_M5

(M_D6)

AD_M6

(M_D7)

AD_M7

(D0)

D_P0

(D1)

D_P1

(D2)

D_P2

(D3)

D_P3

(D4)

D_P4

(D5)

D_P5

(D6)

D_P6

(D7)

D_P7

(nCS)

(P_TBD0)

(VPP)

(P_TBD1)

(EPM)

(P_TBD2)

(VCC_CT)

(P_TBD3)

(nU_M_DS)

nDS_frI

(14V)

(57EX=>6D6X)

P1

1

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64

(TRACE)
(CH_DIR)

C_DR_ADI

(TRIGGER)
(M_P25)

nRST_frM

(M_A8)

A_M8

(M_A9)

A_M9

(M_A10)

A_M10

(M_A11)

A_M11

(M_A12)

A_M12

(M_A13)

A_M13

(M_A14)

A_M14

(M_A15)

A_M15

(SIZE0)
(SIZE1)
(SIZE2)
(SIZE3)
(SIZE4)
(M_P31)

(nCS_RD)
(nD_E)
(6D0X=>6D0X)
(6D2X=>6D1X)
(6D4X=>6D2X)
(6D6X=>6D3X)
(6D8X=>6D4X)
(6DAX=>6D5X)

(57FX=>6D7X)

P_CLK_CE
P_WR_RD

P_AH_CLK
P_AL_CLK
P_CT_CLK

LED_CLK
P_BUF_WR_CLK

nWR_DAC

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63

nIRQ_ACK

C_JAM_P1

nMAS_I

FG_BG

P50
P51
P52
P53
P54
P55
P56
P57

nDM

MB INTERFACE CONNECTOR 2

P2

1

(nIACK)
(nU_AS)

(ICRAM)

(UD0)
(UD1)
(UD2)
(UD3)
(UD4)
(UD5)
(UD6)
(UD7)

(UA8)
(UA9)
(UA10)
(UA11)
(UA12)
(UA13)
(UA14)
(UA15)

3
5
7

9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63

(nCS_U245)

AD_I0
AD_I1
AD_I2
AD_I3
AD_I4
AD_I5
AD_I6
AD_I7

(U_P50)
(U_P51)
(U_P52)
(U_P53)
(U_P54)
(U_P55)
(U_P56)
(U_P57)

A_I8
A_I9
A_I10
A_I11
A_I12
A_I13
A_I14
A_I15

(nBRPDRAM)
(nBRP_OFF)

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64

(U_PXX)
(U_P35)

nSYNC
SCLK

(U_P10)
(U_P11)
(U_P12)
(U_P13)
(U_P14)
(U_P15)
(U_P16)
(U_P17)

(U_P40)
(U_P41)
(U_P42)
(U_P43)
(U_P44)
(U_P45)
(U_P46)
(U_P47)
(U_P20)
(U_P21)
(U_P22)
(U_P23)
(U_P24)
(U_P25)
(U_P26)
(U_P27)
(nBRPPRAM)
(nBRP_ROM)

AD_I[7..0]

VCCVCC

R_W_I

P40
P41
P42
P43
P44
P45
P46
P47
P20
P21
P22
P23
P24
P25
P26
P27

A_I[15..8]

nDM

AD_I[7..0] pg7,11
FG_BG pg3,7,11
nMAS_I pg11
C_JAM_P1 pg3
nIRQ_ACK pg11

R_W_I pg11
nSYNC pg11

SCLK pg11

P4[0..7] pg7

P2[0..7] pg7

nDM pg3
A_I[15..8] pg11
P5[0..7] pg7

1 1

FOR USER"S MANUAL ONLY

A

MOTHERBOARD INTERFACE

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

B

C

D

Date: Sheet

811Monday, August 14, 2000

E

A

of

UM005100-IRR0400 Schematic 8

A

B

C

D

E

15V OUTPUT ISR

VCC

VCC

4 4

3 3

+

C73
10uF

U19
LT1086CM

3

VIN

2

VOUT

ADJ

1

R30

R31

R32

121

73.2

200

+

C74
22uF

2V - 4V
Adjustable
Power

C75

0.1UF

VCC_reg

POWER OP-AMP
CIRCUIT

C1

1UF

R2

2K_1%

DAC IC

A_M_LO[1..0]

2
4
6
8

AD_M[7..0]

A_M_LO0
A_M_LO1

nWR_DAC

USER NOTE:
SELECT VOLTAGE SOURCE FOR EMULATION SYSTEM.

VCC_regVCC_reg
VCC_Itar
VCC_Itar
VCC_IintVCC_Iint

U6

AD_M0

14

D0

13
12
11
10

9
8
7

17
16

15

D1
D2
D3
D4
D5
D6
D7

A0
A1

WR

MAX506

VOUTA
VOUTB
VOUTC
VOUTD

DGND

AD_M1
AD_M2
AD_M3
AD_M4
AD_M5
AD_M6
AD_M7

1) ICE = VCC_reg 1-3

2) ICE = VCC_reg TARGET = VCC_reg 1-3 , 2-4

3) ICE = VCC_lint 5-7

4) ICE = VCC_lint TARGET = VCC_lint 5-7 , 6-8

5) ICE = VCC_reg TARGET = VCC_lint 1-3 , 6-8

6) ICE = VCC_lint TARGET = VCC_reg 5-7 , 2-4

7) ICE = TARGET 3-4

VDD

VSS

AGND

VREF

DAC_V0

2

DAC_V1

1

DAC_V2

20

DAC_V3

19
18

3
6
5
4

VCC

2.5V REFERENCE

U7

1

Vin

Vo_2.5

4

NC3

NC1

5

NC4

NC2

3

GND

NC5

MC1403D

DAC_VREF

2
6
7
8

R6

2K_1%

R10

2K_1%

R14

2K_1%

AD_M[7..0]pg8

A_M_LO[1..0]pg3

2 2

1 1

nWR_DACpg8

LAYOUT NOTE:
USE THICK TRACES FOR THESE POWER
SOURCES.

J6

VCC_I
VCC_I

1
3
5
7

CON8A

FOR USER"S MANUAL ONLY

A

B

U4

PT5042

1 3

VIN VOUT

GND

2

R1

3

2K_1%

2

R5

5

2K_1%

6

R9

12

2K_1%

11

R13

14

2K_1%

15

C

413

+

-

R4

2K_1%

413

+

-

R8

2K_1%

413

+

-

R12

2K_1%

413

+

-

R16

2K_1%

VCC_15V

U5A

1

LT1014DS

R3

10K_1%

VCC_15V

U5B

7

LT1014DS

R7

10K_1%

VCC_15V

U5C

10

LT1014DS

R11

10K_1%

VCC_15V

U5D

16

LT1014DS

R15

2K_1%

VCC_15V

R41

500

C2

1UF

C4

0.1UF

VCC_VV

C5

0.1UF

C6

0.1UF

1

C7

0.1UF

+

C3
100uF16V

(0-14V)

(0-14V)

(0-14V)

VCC_EPM

R40

3 2

(0 - 5.0V)

VCC_Iint

+

C76
22uF

VCC_VPP

200 1W

Q4
FZT849

D

VCC_Iint

VCC_VV

VCC_VPP

VCC_EPM

POWER LOGIC

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

Date: Sheet

911Monday, August 14, 2000

E

of

A

UM005100-IRR0400 Schematic 9

A

4 4

3 3

D_P[7..0]pg8

P_CLK_CEpg3

P_WR_RDpg3

nP_PGMpg3

P_CLRpg3

P_CLKpg3
P_TBD1pg3
P_TBD2pg3
P_TBD3pg3

P_RD_WRpg3

D_P[7..0]

CONTROL SIGNAL FOR OTP
PROGRAMMING

B

HIGH TO LOW & LOW TO HIGH
VOLTAGE TRANSLATION

D_P0
D_P1
D_P2
D_P3
D_P4
D_P5 D_Ptv5
D_P6

D_P7
P_CLK_CE
P_WR_RD
nP_PGM
P_CLR
P_CLK
P_TBD1
P_TBD2
P_TBD3

VCC

VCC_I

U1

2

1B1

3

1B2

5

1B3

6

1B4

8

1B5

9

1B6

11

1B7

12

1B8

13

2B1

14

2B2

16

2B3

17

2B4

19

2B5

20

2B6

22

2B7

23

2B8

7

VCCB1

18

VCCB2

31

VCCA1

42

VCCA2

28

GND28

34
39
45

GND10

GND34

GND15

GND39

GND21

GND45

IDT74FCT164245TPA

1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8

1OE

1DIR

2OE

2DIR

GND4

C

D_Ptv0

47

D_Ptv1

46

D_Ptv2

44

D_Ptv3

43

D_Ptv4

41
40

D_Ptv6

38

D_Ptv7

37

nP_tvCE

36

nP_tvOE

35

nP_tvPGM

33

P_tvCLR P_tvCLR

32

P_tvCLK P_tvCLK

30

P_tvTBD1

29

P_tvTBD2 P_tvTBD2

27
26

48

P_RD_WR

1
25
24

4
10
15
21

D_Ptv[7..0]

HEADERS FOR OTP
PROGRAMMING SOCKET
ADAPTE R

D_Ptv0
D_Ptv2
D_Ptv4
D_Ptv6

P_tvTBD3P_tvTBD3

D

J1
1 2
3 4
5 6
7 8
9 10

11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30

HDR15X2

D_Ptv1
D_Ptv3
D_Ptv5
D_Ptv7

E

HIGH TO LOW VOLTAGE TRANSLATION OTP REGISTER FOR MSB

2 2

nP_tvCE
nP_tvOE
nP_tvPGM
P_tvTBD1

1 1

FOR USER"S MANUAL ONLY

A

A_Ptv[15..0] AD_M[7..0]

HEADERS FOR OTP
PROGRAMMING SOCKET
ADAPTE R

A_Ptv0
A_Ptv2
A_Ptv4
A_Ptv6
A_Ptv8
A_Ptv10
A_Ptv12
A_Ptv14

B

J2
1 2
3 4
5 6
7 8
9 10

11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30

HDR15X2

A_Ptv1
A_Ptv3
A_Ptv5

A_Ptv9
A_Ptv11
A_Ptv13
A_Ptv15

VCC_VPP
VCC_EPM
VCC_VV

VCC_I

A_Ptv0
A_Ptv1
A_Ptv2
A_Ptv3
A_Ptv4
A_Ptv5
A_Ptv6
A_Ptv7
A_Ptv8
A_Ptv9A_Ptv7 A_P9
A_Ptv10
A_Ptv11
A_Ptv12
A_Ptv13
A_Ptv14
A_Ptv15

U2

47

1A1

46

1A2

44

1A3

43

1A4

41

1A5

40

1A6

38

1A7

37

1A8

36

2A1

35

2A2

33

2A3

32

2A4

30

2A5

29

2A6

27

2A7

26

2A8

48

1OE

1

1DIR

25

2OE

24

2DIR

4

GND4

10

GND10

15

GND15

21

GND21

IDT74FCT164245TPA

C

1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8

VCCB1
VCCB2
VCCA1
VCCA2

GND28
GND34
GND39
GND45

2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23

7
18
31
42

28
34
39
45

& LSB OF ADDRESS

A_P0 AD_M0
A_P1
A_P2
A_P3
A_P4
A_P5
A_P6
A_P7
A_P8

A_P10
A_P11
A_P12
A_P13
A_P14
A_P15

VCC

VCC_I

U3

2

1O1

3

1O2

5

1O3

6

1O4

8

1O5

9

1O6

11

1O7

12

1O8

13

2O1

14

2O2

16

2O3

17

2O4

19

2O5

20

2O6

22

2O7

23

2O8

7
18
31
42

28
34
39
45

1CLK

VCC7
VCC18

2CLK

VCC31
VCC42

GND4

GND28

GND10

GND34

GND15

GND39

GND21

GND45

IDT74FCT162374ATPV

1D1
1D2
1D3
1D4
1D5
1D6
1D7
1D8
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2D8

1OE
2OE

47

AD_M1

46

AD_M2

44

AD_M3

43

AD_M4

41

AD_M5

40

AD_M6

38

AD_M7

37

AD_M0

36

AD_M1

35

AD_M2

33

AD_M3

32

AD_M4

30

AD_M5

29

AD_M6

27

AD_M7

26

P_AL_CLK

48

P_CLK_CE

1

P_AH_CLK

25

P_CLK_CE

24
4

10
15
21

D

AD_M[7..0] pg8

P_AL_CLK pg8
P_AH_CLK pg8

PROGRAMMING LOGIC

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

Date: Sheet

10 11Monday, August 14, 2000

E

of

A

UM005100-IRR0400 Schematic 10

A

nIRQ_ACKpg7,8

nRST_frIpg3,7

nAS_Ipg3,7
SCLKpg3,7,8

nSYNCpg3,7,8

P34_nDMpg3

nMAS_Ipg3,7,8

4 4

3 3

R_W_Ipg3,7,8

nDS_Ipg3,7
nMDS_Ipg3,7
nRST_Tpg3

nRST_Ttvpg4
nMDS_Itvpg4

nDS_Itvpg4
R_W_Itvpg4

nMAS_Itvpg4

P34tvpg4

nSYNCtvpg4

SCLKtvpg4
nAS_Itvpg4

nRST_Itvpg3,4

nIACKtvpg4

VCC_I

LOW TO HIGH VOLTAGE TRANSLATION

nRST_Ttv
nMDS_Itv

nDS_Itv
R_W_Itv

nMAS_Itv

P34tv

nSYNCtv

SCLKtv
nAS_Itv
nRST_Itv
nIACKtv

nXROFFtv nEXR_OFF

R24 10K

VCC

U15

47

1A1

46

1A2

44

1A3

43

1A4

41

1A5

40

1A6

38

1A7

37

1A8

36

2A1

35

2A2

33

2A3

32

2A4

30

2A5

29

2A6

27

2A7

26

2A8

48

1OE

1

1DIR

25

2OE

24

2DIR

4

GND4

10

GND10

15

GND15

21

GND21

IDT74FCT164245TPA

VCCB1
VCCB2
VCCA1
VCCA2

GND28
GND34
GND39
GND45

1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8

B

nRST_T

2

nMDS_I

3

nDS_I

5

R_W_I

6

nMAS_I

8

P34_nDM

9

nSYNC

11

SCLK

12

nAS_I

13

nRST_frI

14

nIRQ_ACK

16
17
19
20
22
23

7
18
31
42

28
34
39
45

VCC

VCC_I

C

U14D

VCC_I

nEXR_OFF pg7nXROFFtvpg4

FG_BG

XTAL1_EM

12
13

9

10

4
5

1
2

74LVC08A
U14C

74LVC08A
U14B

74LVC08A
U14A

74LVC08A

D

11

8

6

3

nDTMRtv

XTAL1tv

E

nDTMRtv pg4

XTAL1tv pg4

LOW TO HIGH VOLTAGE TRANSLATION

FG_BG pg8

AD_I[7..0]pg7,8

A_I[15..8]pg3,7,8

2 2

1 1

A_Itv[15..8]pg4

AD_Itv[7..0]pg4

nAD_I_OEpg3

I_WR_RDpg3

A

A_Itv[15..8]

AD_Itv[7..0]

AD_I[7..0]
A_I[15..8]

nAD_I_OE
I_WR_RD

A_Itv8
A_Itv9
A_Itv10
A_Itv11
A_Itv12
A_Itv13

A_Itv15
AD_Itv0
AD_Itv1
AD_Itv2
AD_Itv3
AD_Itv4
AD_Itv5
AD_Itv6
AD_Itv7

U16

47

1A1

46

1A2

44

1A3

43

1A4

41

1A5

40

1A6

38

1A7

37

1A8

36

2A1

35

2A2

33

2A3

32

2A4

30

2A5

29

2A6

27

2A7

26

2A8

48

1OE

1

1DIR

25

2OE

24

2DIR

4

GND4

10

GND10

15

GND15

21

GND21

IDT74FCT164245TPA

B

1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8

VCCB1
VCCB2
VCCA1
VCCA2

GND28
GND34
GND39
GND45

A_I8

2

A_I9

3

A_I10

5

A_I11

6

A_I12

8

A_I13

9

A_I14A_Itv14

11

A_I15

12

AD_I0

13

AD_I1

14

AD_I2

16

AD_I3

17

AD_I4

19

AD_I5

20

AD_I6

22

AD_I7

23
7

18
31
42

28
34
39
45

VCCVCC

VCC_I

FOR USER"S MANUAL ONLY

SOCKET FOR ICE
MCU
OSCILLATOR

C

Y1

1 14

NC VCC

OUT1GND1

OUT2GND2

8MHZ_FS

VCC

54

87

VOLTAGE TRANSLATOR

Title

SCHEMATIC, Z86L99 EMULATION DAUGHTER BOARD

Size Document Number Rev

B

D

Date: Sheet

11 11Monday, August 14, 2000

E

A

of

UM005100-IRR0400 Schematic 11