ZILOG Z86L7808PSC, Z86L7808SSC Datasheet
DS97LVO0701 2-1
1
P
RODUCT
S
PECIFICATION
Z86L78
1
IR/L
OW
-V
OLTAGE
M
ICROCONTROLLER
FEATURES
■
Low Power Consumption: 40 mW (Typical)
■
Three Standby Modes (Typical)
– STOP - 2 µ A
– HALT - 0.8 mA
– Low V oltage (<V
Lv
)
■
Programmable Watch-Dog/Power-On Reset Circuits
■
All Digital Inputs are CMOS Levels
■
Five Priority Interrupts
– Three External
– Two Assigned to Counter/Timers
■
Two Independent Comparators with Programmable
Interrupt Polarity
■
On-Chip Oscillator that Accepts a Crystal, Ceramic
Resonator, LC, RC (Mask Selectable), or External Clock
Drive
■
Mask Selectable Option to Enable 32 kHz Crystal
Operation
■
Special Architecture to Automate Both Generation and
Reception of Complex Pulses or Signals:
– One Programmable 8-Bit Counter/Timer with Two
Capture Registers
– One Programmable 16-Bit Counter/Timer with
One Capture Register
– Programmable Input Glitch Filter for Pulse
Reception
■
Mask-Selectable 200 KOhm Pull-Ups on Ports 0, 2, 3:
– All Eight Port 2 Bits Individually Selected
– Pull-Ups Automatically Disabled Upon Selecting
an Output.
GENERAL DESCRIPTION
Zilog's Z86L78 is a low-voltage microcontroller, a member
of the IR (Infrared) Family, with 16 KB of ROM and 493
bytes of general-purpose RAM. Manufactured in CMOS
technology and offered in 20-pin DIP or SOIC styles packages, this cost-effective, low power consumption ROMbased device offers fast execution, efficient use of memory, sophisticated interrupts, input/output bit manipulation
capabilities, automated pulse generation/reception, and
easy hardware/software system expansion.
The Z86L78 architecture is based on Zilog's 8-bit microcontroller core, with an Expanded Register File to allow access to register mapped peripherals, I/O circuits, and powerful counter/timer circuitry. The Z86L78 offers a flexible
I/O scheme, an efficient register and address space structure, and a number of ancillary features that are useful in
many consumer, automotive, computer peripheral, and
battery operated hand-held applications.
For applications demanding powerful I/O capabilities, the
Z86L78 provides 16 pins dedicated to input and output.
These lines are grouped into three ports, which are configurable under software control to provide timing, status signals and parallel I/O.
There are four basic address spaces available to support a
wide range of configurations: Program Memory, Register
File, Expanded Register File, and Extended Data RAM.
Par t
ROM
(KB)
RAM*
(Bytes) I/O
Voltage
Range
Z86L78 16 493 16 2.0V to 3.9V
Note: *General-Purpose
Z86L78
IR/Low-Voltage Microcontroller Zilog
2-2 DS97LVO0701
GENERAL DESCRIPTION (Continued)
The Register File is composed of 256 bytes of RAM, and it
includes four I/O port registers, 16 control and status registers and the rest are General-Purpose registers. The Extended Data RAM adds 256 bytes of usable general-purpose registers. The Expanded Register File consists of
two additional register groups (F and D).
To unburden the system from coping with real-time tasks,
such as generating complex waveforms or receiving and
demodulating complex waveform/pulses, the Z86L78 offers an innovative intelligent counter/timer architecture
with 8-bit and 16-bit counter/timers (Figure 1). Additionally,
the Z86L78 features a large number of user-selectable
modes, and two on-board comparators to process analog
signals with separate reference voltages (Figure 2).
Notes: Signals with a preceding front slash, "/", are active
Low, for example, B//W (WORD is active Low); /B/W
(BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection Circuit Device
Power V
CC
V
DD
Ground GND V
SS
Figure 1. Counter/Timer Block Diagram
HI16
LO16
16-Bit
T16
TC16H
TC16L
HI8 LO8
And/Or
Logic
Clock
Divider
Glitch
Filter
Edge
Detect
Circuit
8-Bit
T8
TC8H
TC8L
8
8
16
8
Input
SCLK
1
2
48
Timer 16
Timer 8/16
Timer 8
8
8
8
8
8
Z86L78
Zilog IR/Low-Voltage Microcontroller
DS97LVO0701 2-3
1
Figure 2. Functional Block Diagram
Port 0
P00
P07
P20
P21
P22
P23
P24
P25
P26
P27
P31
P32
P33
Port 3
Port 2
Register File
256 x 8-Bit
ROM
16K x 8
Z8 Core
Register Bus
Internal
Address Bus
Internal Data Bus
Extended
Register
File
Extended
Register Bus
Counter/Timer 8
8-Bit
Counter/Timer 16
16-Bit
Machine
Timing
&
Instruction
Control
Power
XTAL2
VDD
VSS
P34
P35
P36
256 x 8-Bit
I/O Bit
Programmable
Extended Data RAM
Two Analog
Comparators
Interrupt Control
XTAL1
Z86L78
IR/Low-Voltage Microcontroller Zilog
2-4 DS97LVO0701
PIN DESCRIPTION
Figure 3. 20-Pin DIP/SOIC Pin Assignments
P24
P25
P26
P27
VDD
XTAL2
XTAL1
P31
P32
P00
P23
P22
P21
P20
VSS
P36
P35
P34
P33
P07
11
Z86L78
DIP/SOIC
1
10 20
Table 1. 20-Pin DIP and SOIC Pin Identification
Pin No. Symbol Direction Description
10 P00 Input/Output Port 0 is Nibble
Programmable.
11 P07 Input/Output
17 P20 Input/Output Port 2 pins are individually
configurable as input or
output
18 P21 Input/Output
19 P22 Input/Output
20 P23 Input/Output
1 P24 Input/Output
2 P25 Input/Output
3 P26 Input/Output
4 P27 Input/Output
8 P31 Input IRQ2/Modulator input
9 P32 Input IRQ0
12 P33 Input IRQ1
13 P34 Output T8 output
14 P35 Output T16 output
15 P36 Output T8/T16 output
7 XTAL1 Input Crystal, Oscillator Clock
6 XTAL2 Output Crystal, Oscillator Clock
5V
DD
Power Supply
16 V
SS
Ground
Z86L78
Zilog IR/Low-Voltage Microcontroller
DS97LVO0701 2-5
1
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; operation of the device at
any condition above those indicated in the operational sections of these specifications is not implied. Exposure to absolute maximum rating conditions for an extended period
may affect device reliability.
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to
Ground. Positive current flows into the referenced pin (Figure 4).
CAPACITANCE
T
A
= 25 ° C, V
CC
= GND = 0V, f = 1.0 MHz, unmeasured pins returned to Ground.
Symbol Description Min Max Units
V
CC
Supply V oltage (*) –0.3 +7.0 V
T
STG
Storage Temp. –65 ° +150 ° C
T
A
Oper. Ambient
Temp.
†C
Note:
* Voltage on all pins with respect to Ground.
† See Ordering Information.
Figure 4. Test Load Diagram
From Output
Under Test
150 pFI
Parameter Min Max
Input capacitance 0 12 pF
Output capacitance 0 12 pF
I/O capacitance 0 12 pF
Z86L78
IR/Low-Voltage Microcontroller Zilog
2-6 DS97LVO0701
DC ELECTRICAL CHARACTERISTICS
Preliminary
T
A
= 0 ° C to +70 ° C
Typical
Sym Parameter
V
CC
Min Max @ 25 ° C Units Conditions Notes
Max Input
Voltage
2.0V
3.9V
7
7
VVI
IN
250 µ A
I
IN
250 µ A
V
CH
Clock Input
High V oltage
2.0V
3.9V
0.9 V
CC
0.9 V
CC
V
CC
+ 0.3
V
CC
+ 0.3
VVDriven by External
Clock Generator
Driven by External
Clock Generator
V
CL
Clock Input
Low V oltage
2.0V
3.9V
V
SS
-0.3
V
SS
-0.3
0.2 V
CC
0.2 V
CC
VVDriven by External
Clock Generator
Driven by External
Clock Generator
V
IH
Input High
Voltage
2.0V
3.9V
0.7 V
CC
0.7 V
CC
V
CC
+ 0.3
V
CC
+ 0.3
1.3
2.5
V
V
V
IL
Input Low Voltage 2.0V
3.9V
V
SS
– 0.3
V
SS
– 0.3
0.2 V
CC
0.2 V
CC
0.5
0.9
V
V
V
OH1
Output High
Voltage
2.0V
3.9V
V
CC
– 0.4
V
CC
– 0.4
1.7
3.7
VVI
OH
= –0.5 mA
V
OH2
Output High
Voltage (P36,
P37)
2.0V
3.9V
0.7
0.7
VVI
OH
= –7 mA
V
OL1
Output Low
Voltage
2.0V
3.9V
0.4
0.4
0.2
0.1
VVI
OL
= 1.0 mA
I
OL
= <4.0 mA
V
OL2
Output Low
Voltage
2.0V
3.9V
0.8
0.8
0.3
0.5
VVI
OL
= 2.0 mA
3 Pin Max
V
RH
Reset Input
High V oltage
2.0V
3.9V
0.8 V
CC
0.8 V
CC
V
CC
V
CC
1.5
3.0
V
V
V
Rl
Reset Input
Low V oltage
2.0V
3.9V
VSS - 0.3
V
SS
- 0.3
0.2 V
CC
0.2 V
CC
0.5
0.9
V
OFFSET
Comparator
Input Offset
Voltage
2.0V
3.9V
25
25
10
10
mV
mV
I
IL
Input Leakage 2.0V
3.9V
-1
-1
1
1
<1
<1
µAµAVIN = OV, V
CC
VIN = OV, V
CC
I
OL
Output Leakage 2.0V
3.9V
-1
-1
1
1
<1
<1
µAµAVIN = OV, V
CC
VIN = OV, V
CC
I
IR
Reset Input
Current
2.0V
3.9V
-45
-55
-20
-30
µA
µA
I
CC
Supply Current
(WDT Off)
2.0V
3.9V
2.0V
3.9V
10
15
100
300
4
10
10
10
mA
mA
mA
mA
@ 8.0 MHz
@ 8.0 MHz
@ 32 kHz
@ 32 kHz
4,5
Z86L78
Zilog IR/Low-Voltage Microcontroller
DS97LVO0701 2-7
1
TA = 0°C to +70°C
Typical
Sym Parameter
V
CC
Min Max @ 25°C Units Conditions Notes
I
CC1
Standby
Current
(WDT OFF)
2.0V
3.9V
2.0V
3.9V
3
5
2
4
1
4
0.8
2.5
mA
mA
mA
mA
HALT Mode
VIN=0V, V
CC
@ 8.0 MHz
HALT Mode
VIN=0V, V
CC
@ 8.0 MHz
Clock Divide-by-16
@ 8.0 MHz
Clock Divide-by-16
@ 8.0 MHz
1,2
I
CC2
Standby
Current
(WDT Off)
2.0V
3.9V
2.0V
3.9V
8
10
500
800
2
3
310
600
µA
µA
µA
µA
STOP Mode
VIN = 0V, V
CC
WDT is not Running
STOP Mode
VIN = 0V, V
CC
WDT is not Running
STOP Mode
VIN = 0V, V
CC
WDT is not Running
STOP Mode
VIN = 0V, V
CC
WDT is not Running
3,5
3,5
3,5
3,5
V
ICR
Input Common
Mode V oltage
Range
2.0V
3.9V
0
0
VCC - 1.0V
V
CC
- 1.0V
V
V
11
T
POR
Power-On
Reset
2.0V
3.9V
7.5
2.5
75
20
13
7
ms
ms
V
rf1
Voltage
Reference
1.8 2.0 V 8 MHz max 4
Notes:
1. GND = 0V
2. 2.0V to 3.9V
3. All outputs unloaded, I/O pins floating, inputs at rail.
4. CL1 = CL2 = 100 pF
5. Same as note [4] except inputs at V
CC
.
6. The Vrf1 increases as the temperature decreases.
7. Oscillator stopped
8. Two outputs at a time, independent to other outputs.
9. One at a time
10. 32 kHz clock driver input
11. For analog comparator, inputs when analog comparators are enabled.
Z86L78
IR/Low-Voltage Microcontroller Zilog
2-8 DS97LVO0701
AC CHARACTERISTICS
External I/O or Memory Read and Write Timing Diagram
Figure 5. External I/O or Memory Read/Write Timing
R//W
9
12
18
3
16
13
4
5
8 11
6
17
10
15
7
14
21
Port 0, /DM
Port 1
/AS
/DS
(Read)
Port 1
/DS
(Write)
A7 - A0 D7 - D0 IN
D7 - D0 OUTA7 - A0
19
20
Z86L78
Zilog IR/Low-Voltage Microcontroller
DS97LVO0701 2-9
1
AC CHARACTERISTICS
Preliminary
External I/O or Memory Read and Write Timing Table
T
A
= 0°C to +70°C
No Sym Parameter
V
CC
MIn Max Units Notes
1 TdA(AS) Address V alid to
/AS Rising Delay
2.0V
3.9V
55
55
ns
ns
2
2 TdAS(A) /AS Rising to Address
Float Delay
2.0V
3.9V
70
70
ns
ns
2
3 TdAS(DR) /AS Rising to Read
Data Required Valid
2.0V
3.9V
400
400
ns
ns
1,2
4 TwAS /AS Low Width 2.0V
3.9V
80
80
ns
ns
2
5 Td Address Float to /DS
Falling
2.0V
3.9V
0
0
ns
ns
6 TwDSR /DS (Read) Low Width 2.0V
3.9V
300
300
ns
ns
1,2
7 TwDSW /DS (Write) Low Width 2.0V
3.9V
165
165
ns
ns
1,2
8 TdDSR(DR) /DS Falling to Read
Data Required Valid
2.0V
3.9V
260
260
ns
ns
1,2
9 ThDR(DS) Read Data to
/DS Rising Hold Time
2.0V
3.9V
0
0
ns
ns
2
10 TdDS(A) /DS Rising to Address
Active Delay
2.0V
3.9V
85
95
ns
ns
2
11 TdDS(AS) /DS Rising to /AS
Falling Delay
2.0V
3.9V
60
70
ns
ns
2
12 TdR/W(AS) R//W Valid to /AS
Rising Delay
2.0V
3.9V
70
70
ns
ns
2
13 TdDS(R/W) /DS Rising to
R//W Not Valid
2.0V
3.9V
70
70
ns
ns
2
14 TdDW(DSW) Write Data Valid to /DS
Falling (Write) Delay
2.0V
3.9V
80
80
ns
ns
2
15 TdDS(DW) /DS Rising to Write
Data Not Valid Delay
2.0V
3.9V
70
80
ns
ns
2
16 TdA(DR) Address Valid to Read
Data Required Valid
2.0V
3.9V
475
475
ns
ns
1,2
17 TdAS(DS) /AS Rising to /DS Falling
Delay
2.0V
3.9V
100
100
ns
ns
2
18 TdDM(AS) /DM Valid to /AS
Falling Delay
2.0V
3.9V
55
55
ns
ns
2
19 TdDS(DM) /DS Rise to
/DM V alid Delay
2.0V
3.9V
70
70
ns
ns
20 ThDS(A) /DS Rise to Address
Valid Hold Time
2.0V
3.9V
70
70
ns
ns
Notes:
1. When using extended memory timing add 2 TpC.
2. Timing numbers given are for minimum TpC.
Standard Test Load
All timing references use 0.9 V
CC
for a logic 1 and 0.1 VCC for a logic 0.
Z86L78
IR/Low-Voltage Microcontroller Zilog
2-10 DS97LVO0701
AC CHARACTERISTICS
Additional Timing Diagram
Figure 6. Additional Timing
Clock
1
3
4
8
2 2 3
T
IRQ
IN
N
6
5
7 7
Clock
Setup
10
9
Stop
Mode
Recovery
Source
11
Z86L78
Zilog IR/Low-Voltage Microcontroller
DS97LVO0701 2-11
1
AC CHARACTERISTICS
Preliminary
Additional Timing Table
TA = 0°C to +70°C
8.0 MHz
No Symbol Parameter
V
CC
Min Max Units Notes
1 TpC Input Clock Period 2.0V
3.9V
121
121
DC
DC
ns
ns
1
1
2 TrC,TfC Clock Input Rise
and Fall Times
2.0V
3.9V
25
25
ns
ns
1
1
3 TwC Input Clock Width 2.0V
3.9V
37
37
ns
ns
1
1
4 TwTinL Timer Input
Low Width
2.0V
3.9V
100
70
ns
ns
1
1
5 TwTinH Timer Input
High Width
2.0V
3.9V
3TpC
3TpC
1
1
6 TpTin Timer Input Period 2.0V
3.9V
8TpC
8TpC
1
1
7 TrTin,TfTin Timer Input Rise
and Fall Timers
2.0V
3.9V
100
100
ns
ns
1
1
8A TwIL Interrupt Request
Low Time
2.0V
3.9V
100
70
ns
ns
1,2
1,2
8B TwIL Int. Request
Low Time
2.0V
3.9V
5TpC
5TpC
1,3
1,3
9 TwIH Interrupt Request
Input High Time
2.0V
3.9V
5TpC
5TpC
1,2
1,2
10 Twsm Stop-Mode Recovery Width
Spec
2.0V
3.9V
2.0V
3.9V
12
12
5TpC
5TpC
ns
ns
ns
ns
5
5
4
4
11 Tost Oscillator Start-up Time 2.0V
3.9V
5TpC
5TpC
4
4
12 Twdt Watch-Dog Timer (5 ms)
Delay Time
2.0V
3.9V
10
5
75
20
ms
ms
(10 ms) 2.0V
3.9V
30
10
150
40
ms
ms
(15 ms) 2.0V
3.9V
50
20
300
80
ms
ms
(80 ms) 2.0V
3.9V
200
80
1200
320
ms
ms
Notes:
1. Timing Reference uses 0.9 V
CC
for a logic 1 and 0.1 VCC for a logic 0.
2. Interrupt request through Port 3 (P33-P31).
3. Interrupt request through Port 3 (P30).
4. SMR – D5 = 0
5. SMR – D5 =1
Z86L78
IR/Low-Voltage Microcontroller Zilog
2-12 DS97LVO0701
AC CHARACTERISTICS
Handshake Timing Diagrams
Figure 7. Input Handshake Timing
Data In
1
3
4
5 6
/DAV
(Input)
RDY
(Output)
Next Data In Valid
Delayed RDY
Delayed DAV
Data In Valid
2
Figure 8. Output Handshake Timing
Data Out
/DAV
(Output)
RDY
(Input)
Next Data Out Valid
Delayed RDY
Delayed DAV
Data Out Valid
7
8 9
10
11
Z86L78
Zilog IR/Low-Voltage Microcontroller
DS97LVO0701 2-13
1
AC CHARACTERISTICS
Preliminary
Handshake Timing Table
TA = 0°C to +70°C
8 MHz Data
No Symbol Parameter
V
CC
Min Max Direction
1 TsDI(DAV) Data In Setup Time 2.0V
3.9V
0
0
IN
IN
2 ThDI(DAV) Data In Hold Time 2.0V
3.9V
160
115
IN
IN
3 TwDAV Data Available Width 2.0V
3.9V
155
110
IN
IN
4 TdDAVI(RDY) DAV Falling to RDY
Falling Delay
2.0V
3.9V
160
115
IN
IN
5 TdDAVId(RDY) DAV Rising to RDY
Falling Delay
2.0V
3.9V
120
80
IN
IN
6 TdRDYO(DAV) RDY Rising to DAV
Falling Delay
2.0V
3.9V
0
0
IN
IN
7 TdDO(DAV) Data Out to DAV
Falling Delay
2.0V
3.9V
63
63
OUT
OUT
8 TdDAV0(RDY) DAV Falling to RDY
Falling Delay
2.0V
3.9V
0
0
OUT
OUT
9 TdRDY0(DAV) RDY Falling to DAV
Rising Delay
2.0V
3.9V
160
115
OUT
OUT
10 TwRD Y RDY Width 2.0V
3.9V
110
80
OUT
OUT
11 TdRDY0d(DAV) RDY Rising to DAV
Falling Delay
2.0V
3.9V
110
80
OUT
OUT
Notes:
Writing or reading the Extended Data RAM is accomplished by using LDE instruction only.
Z86L78
IR/Low-Voltage Microcontroller Zilog
2-14 DS97LVO0701
PIN FUNCTIONS
XTAL1 Crystal 1 (time-based input). This pin connects a
parallel-resonant crystal, ceramic resonator, LC, or RC
network or an external single-phase clock to the on-chip
oscillator input.
XTAL2 Crystal 2 (time-based output). This pin connects a
parallel-resonant, crystal, ceramic resonant, LC, or RC
network to the on-chip oscillator output.
Port 0 (P07 and 00). Port 0 is an 2-bit, bidirectional,
CMOS-compatible port. These two I/O lines are configured
under software control, and the output drivers are pushpull.
If one or both bits are needed for I/O operation, they must
be configured by writing to the Port 0 mode register. After
a hardware reset, Port 0 is configured as an input port.
An optional 200 KOhm pull-up is available as a mask option on P07 and P00.
These pull-ups are disabled when configured (bit by
bit) as outputs.
Figure 9. Port 0 Configuration
Z86L78
MCU
1
1
Port 0
OEN
Out
In
PAD
200 kΩ
Mask
Option
Z86L78
Zilog IR/Low-Voltage Microcontroller
DS97LVO0701 2-15
1
Port 2 (P27-P20). Port 2 is an 8-bit, bidirectional, CMOS-
compatible I/O port. These eight I/O lines can be independently configured under software control as inputs or outputs. Port 2 is always available for I/O operation. A mask
option is available to connect eight 200 KOhm (±50%) pullup resistors on this port. Bits programmed as outputs are
globally programmed as either push-pull or open-drain.
The Z86L78 wakes up with the eight bits of Port 2 configured as inputs with open-drain outputs.
Port 2 also has an 8-bit input OR and an AND gate which
can be used to wake up the part (Figure 33). P20 can be
programmed to access the edge selection circuitry (Figure
10).
Figure 10. Port 2 Configuration
Open-Drain
OEN
Out
In
Pad
VCC
200 kΩ
Mask
Option
Z86L78
MCU
Port 2 (I/O)
Z86L78
IR/Low-Voltage Microcontroller Zilog
2-16 DS97LVO0701
PIN FUNCTIONS (Continued)
Port 3 (P37-P31). Port 3 is a 6-bit, CMOS-compatible
three fixed input and four fixed output port. Port 3 and can
be configured under software control for Input/Output, Interrupt, and output from the counter/timers. P31, P32, and
P33 are standard CMOS inputs. Outputs P34, P35 are
push-pull or open-drain depending on P3M D0. P36 is
push-pull.
Two on-board comparators process analog signals on P31
and P32 with reference to the voltage on P33. The analog
function is enabled by programming the Port 3 Mode Register (bit 1). P31 and P32 are programmable as rising, falling, or both edge triggered interrupts (IRQ register bits 6
and 7). P33 is the comparator reference voltage inputs.
Access to the edge detection circuit is through P31 or P20.
P33 will be in common to both comparators.
Port 3 provides output for each of the counter/timers and
the AND/OR Logic. Control is performed by programming
bits D5-D4 of CTRI, bit 0 of CTR0 and bit 0 of CTR2.
Comparator Inputs. In Analog Mode, Port 3, P31 and P32
have a comparator front end. The comparator reference
voltages are on P33. The internal P33 register and its corresponding IRQ1 is connected to the Stop-Mode Recovery
source selected by the SMR. In this mode, any of the StopMode Recovery sources can be used to toggle the P33 bit
or generate IRQ1. In digital mode, P33 can be used as a
Port 3 register input or IRQ1 for P33 (Figure 9).
Notes: Comparators are powered down by entering STOP
Mode. For P33-P31 to be used as a STOP-mode recovery
source, these inputs must be placed into digital mode.
Comparator Outputs. Comparator output of COMP1 can
be programmed to output on P34 through the PCON register (Figure 8).
/RESET (Input, active Low). Initializes the MCU. Reset is
accomplished either through Power-On, Watch-Dog Timer; Stop-Mode Recovery, and Low Voltage detection. During Power-On Reset and Watch-Dog Timer Reset, the internally generated reset drives the internal reset Low for
the POR time.
Table 2. Port 3 Pin Assignments
Pin I/O C/T Comp. Int. P0 HS P1 HS P2 HS Ext
Pref1 IN RF1
P31 IN ISP AN1 IRQ2 D/R
P32 IN AN2 D/R
P33 IN RF2 IRQ1 D/R
P34 OUT T8 A01 R/D DM
P35 OUT T16 R/D
P36 OUT T8/16 R/D
P00 I/O
Notes:
HS = Handshake Signals
D = /DAV
R = RDY
Z86L78
Zilog IR/Low-Voltage Microcontroller
DS97LVO0701 2-17
1
Figure 11. Port 3 Configuration
P34 OUT
**P37
P32
+
-
P33
0 = P34, P37 Standard Output
1 = P34, P37 Comparator Output
PCON
D0
P31
+
-
P33
**P37
PAD
P34
PAD
*
T8
P34 OUT
0 Normal Control
1 8-bit Timer output active
CTR0
D0
Counter/Timer
Notes:
* Reset condition.
** Available only on 40-pin versions of the L7X family.
P34 OUT
Z86L78
IR/Low-Voltage Microcontroller Zilog
2-18 DS97LVO0701
PIN FUNCTIONS (Continued)
Program execution begins at location 000CH, 5-10 TpC
cycles after the RST is asserted. For Power-On Reset, the
typical reset output time is 5 ms.
Note: The Z86L78 does not reset WDTMR, SMR, P2M,
or P3M registers on a Stop-Mode Recovery operation.
Figure 12. Port 3 Configuration
Port 3
(I/O or Handshake)
Z86LXX
MCU
Pref1
P31
P32
P33
P34
P35
P36
P37
Note:
P31, 32, 33 have a 200 KΩ
mask option called Mask
option 3 similar to Mask
options 1 and 2.
200 KΩ
Mask
Option
D1
R247 = P3M
P31 (AN1)
P32 (AN2)
P33 (REF2)
From Stop-Mode
Recovery Source
1 = Analog
0 = Digital
IRQ2, TIN, P31 Data Latch
IRQ0, P32 Data Latch
IRQ1, P33 Data Latch
DIG.
AN.
-
+
-
+
Pref1*
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