ZILOG Z86127 Datasheet
GENERAL DESCRIPTION
C
USTOMER PROCUREMENT SPECIFICATION
Z86127
LOW-COST DIGITAL
TELEVISION CONTROLLER (LDTC)
The Z86127 Low-Cost Digital Television Controller (LDTC)
introduces a new level of sophistication to single-chip
architecture. The Z86127 is a member of the Z8® singlechip microcontroller family with 8 Kbytes of ROM and 236
bytes of RAM. The device is housed in a 64-pin DIP
package, in which only 52 are active, and are CMOS
compatible. The LDTC offers mask programmed ROM
which enables the Z8 microcontroller to be used in a high
volume production application device embedded with a
custom program (customer supplied program).
Zilog’s LDTC offers fast execution, efficient use of memory,
sophisticated interrupts, input/output bit manipulation
capabilities, and easy hardware/software system expansion
along with low cost and low power consumption. The
device provides an ideal performance and reliability solution
for consumer and industrial television applications.
The Z86127 architecture is characterized by utilizing Zilog’s
advanced Superintegration™ design methodology. The
device has an 8-bit internal data path controlled by a Z8
microcontroller and On Screen Display (OSD) logic circuits/
Pulse Width Modulators (PWM). On-chip peripherals
include two register mapped I/O ports (Ports 2 and Port 3),
interrupt control logic (one software, two external and three
internal interrupts) and a standby mode recovery input
port (Port 3, pin P30).
The OSD control circuits support 8 rows by 20 columns of
characters. The character color is specified by row. One of
the eight rows is assigned to show two kinds of colors for
bar type displays such as volume control. The OSD is
capable of displaying either low resolution (5x7 dot pattern)
or high resolution (11x15 dot pattern) characters. The
Z86C97 currently supports high resolution characters only.
A 14-bit PWM port provides enough voltage resolution for
a voltage synthesizer tuning system. Three 6-bit PWM
ports are used for controlling audio signal levels. Five 8-bit
PWM ports are used to vary picture levels.
The LDTC applications demand powerful I/O capabilities.
The Z86127 fulfills this with 27 I/O pins dedicated to input
and output. These lines are grouped into four ports, and
are configurable under software control to provide timing,
status signals, parallel I/O and an address/data bus for
interfacing to external memory.
There are three basic address spaces available to support
this wide range of configurations: Program Memory, Video
RAM, and Register File. The Register File is composed of
236 bytes of general purpose registers, two I/O Port
registers, 15 control and status registers and three reserved
registers.
To unburden the program from coping with the real-time
problems such as counting/timing and data communication,
the LDTC offers two on-chip counter/timers with a large
number of user selectable modes (Functional Block
Diagram).
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection Circuit Device
Power V
Ground GND V
CC
V
DD
SS
DC-4063-00 (10-16-91)
1
GENERAL DESCRIPTION (Continued)
g
p
g
play
XTAL1
XTAL2
/RESET
P30
P31
P34
P35
P36
P50( P00 )
P51( P01 )
P52( P02 )
P53( P03 )
P54( P04 )
P55( P05 )
P56( P06 )
P57( P07 )
P60( /AS )
P61( /DS )
P62( R//W )
P63( SCLK )
P64( P66 )*
P65( P67 )*
AFCIN
RESET
Oscillator
WDT
Counter
Timer
Counter
Timer
Port 3/
Interru
Port 5
(Port 0)
Port 6
(Control)
8 KByte
ram ROM
Pro
Port 2
Z8 CPU
Core
t
PWM 1
256 Byte
ister File
Re
Port 0
A8:15 AD0:7
160 Byte
Character RAM
4 KByte
Character ROM
Port 1
14 -bit
PWM 6
to
PWM 8
6-bit
PWM 9
to
PWM 13
8-bit
On Screen
Dis
P27
P26
P25
P24
P23
P22
P21
P20
PWM 1
PWM 6
PWM 7
PWM 8
PWM 9
PWM 10
PWM 11
PWM 12
PWM 13
OSCIN
OSCOUT
HSYNC
VSYNC
VRED
VGREEN
VBLUE
VBLANK
Functional Block Diagram
2
PIN CONFIGURATION
T
N/C
N/C
N/C
N/C
PWM1
P35
P36
P34
P31
P30
XTAL1
XTAL2
/RESE
P60
GND
P61
P62
VCC
P63
P64
P65
AFCIN
P50
P51
P52
P53
P54
P55
P56
P57
OSCIN
OSCOUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Z86127
(LDTC)
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PWM6
PWM7
PWM8
PWM9
PWM10
PWM11
PWM12
PWM13
P27
P26
P25
P24
P23
GND
P22
P21
VCC
P20
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
VBLANK
VBLUE
VGREEN
VRED
VSYNC
HSYNC
64-Pin Mask-ROM Plastic DIP
3
Loading...