Zilog Z80195 User Manual
Z80185/195 Development Kit
User's Manual
About This Manual
We recommend that you read and understand everything in this manual before setting up and using
the product. However, we recognize that users have different styles of learning: some will want to set
up and use this kit while they read about it; others will open these pages only as a “last resort” to check
on a particular specification. Therefore, we have designed this manual to be used either as a “how
to” procedural manual or a reference guide to important data.
Additional assistance is provided in the following ways:
■ The User Interface features a help facility that provides brief messages on keyboard commands.
■ The complete Schematic Diagram is included at the back of this user's manual.
Please fill out and return the enclosed Zilog Registration Card as soon as possible so we can advise
you of updates and improvements to your Zilog Development Kit .
© 1997 by Zilog, Inc. All rights reserved. No part of this
document may be copied or reproduced in any form or by
any means without the prior written consent of Zilog, Inc.
The information in this document is subject to change
without notice. Devices sold by Zilog, Inc. are covered by
warranty and patent indemnification provisions appearing
in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc.
makes no warranty, express, statutory, implied or by
description, regarding the information set forth herein or
regarding the freedom of the described devices from
intellectual property infringement. Zilog, Inc. makes no
warranty of merchantability or fitness for any purpose.
Zilog, Inc. shall not be responsible for any errors that may
appear in this document. Zilog, Inc. makes no commitment to update or keep current the information contained
in this document.
UM951800100
Zilog’s products are not authorized for use as critical
components in life support devices or systems unless a
specific written agreement pertaining to such intended
use is executed between the customer and Zilog prior to
use. Life support devices or systems are those which are
intended for surgical implantation into the body, or which
sustains life whose failure to perform, when properly used
in accordance with instructions for use provided in the
labeling, can be reasonably expected to result in significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
Telex 910-338-7621
FAX 408 370-8056
Internet: http://www.zilog.com
I-1
:
Electrical
Safeguards
WARNING
Follow the precautions listed below to avoid permanent damage to hardware.
I. Always use a grounding strap to prevent damage resulting from electrostatic
discharge (ESD).
II. Power-Up Precautions
1. Power-up the PC (or dumb terminal) and ensure that it is running properly.
2. Load the Z80185 Source Diskette.
3. Apply power through connector P1 on the 185/195 board.
III. Power-Down Precautions
When powering down, follow this procedure in the precise order shown below:
1. Quit the monitor program.
2. Power-down the PC.
3. Remove power from the 185/195 board.
UM951800100
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
TABLE OF CONTENTS
TITLE PAGE
HAPTER 1: INTRODUCTION
C
OVERVIEW ....................................................................................................................... 1-1
EY FEATURES OF THE Z80185/195 DEVELOPMENT KIT ....................................................... 1-1
K
UPPORTED ZILOG DEVICES .............................................................................................. 1-1
S
ARDWARE SPECIFICATIONS .............................................................................................. 1-2
H
Z80185/195 D
UPPORT PRODUCTS PACKAGE CONTENTS .......................................................................... 1-3
S
EQUIREMENTS AND RESTRICTIONS .................................................................................... 1-4
R
HAPTER 2: SETUP AND INSTALLATION
C
INTRODUCTION ................................................................................................................. 2-1
NSTALLING THE SOFTWARE ............................................................................................... 2-1
I
REATING TZ PROGRAM ICON (WINDOWS)....................................................................... 2-2
C
ZASM-C
ETTING UP THE HARDWARE ............................................................................................. 2-3
S
ETTING UP THE SERIAL CHANNELS ................................................................................. 2-3
S
ETTING UP THE PARALLEL CHANNEL (OPTIONAL) ............................................................. 2-8
S
THER JUMPER OPTIONS ............................................................................................... 2-8
O
ONNECTING TO A POWER SUPPLY .................................................................................. 2-10
C
Z80185/195 D
NITIAL CHECKOUT/SAMPLE SESSION ................................................................................ 2-11
I
EVELOPMENT KIT FUNCTIONAL BLOCK DIAGRAM ............................................ 1-2
ROSS ASSEMBLER/MOBJ-OBJECT UTILITY INSTALLATION (OPTIONAL) .................... 2-2
EVELOPMENT BOARD-TO-PC HOOKUP DIAGRAM ....................................... 2-10
C
HAPTER 3: USING THE MONITOR PROGRAM
INTRODUCTION ................................................................................................................. 3-1
ETTING STARTED ........................................................................................................... 3-2
G
TARTING UP THE TZ PROGRAM ..................................................................................... 3-2
S
XITING THE TZ PROGRAM ............................................................................................. 3-2
E
ROGRAM RESTRICTIONS........................................................................................... 3-3
TZ P
ODELS/SERIAL BAUD RATES ................................................................................... 3-3
PC M
ROGRAM COMMANDS...................................................................................................... 3-4
P
THER FEATURES .......................................................................................................... 3-15
O
NMI .......................................................................................................................... 3-15
RAP ......................................................................................................................... 3-15
T
RST 20H S
C
HAPTER 4: REFERENCE
ERVICES ....................................................................................................... 3-16
MEMORY CONFIGURATIONS AND JUMPER SETTINGS .............................................................. 4-1
EBUG MONITOR MEMORY MAP ........................................................................................ 4-6
D
Z80185/195 D
UM951800100
EVELOPMENT BOARD SCHEMATIC ................................................................. 4-7
TABLE OF CONTENTS
(Continued)
TITLE PAGE
A
PPENDIX A: DEVICE DRIVERS OVERVIEW .............................................................................. A-1
PPENDIX B: HOW TO ACCESS THE ZBBS............................................................................. B-1
A
PPENDIX C: PROBLEM / SUGGESTION REPORT FORM ............................................................. C-1
A
UM951800100
ZILOG
U
SER'S MANUAL
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
CHAPTER 1
I
NTRODUCTION
OVERVIEW
The Z80185/195 Development Kit (Z8018500ZCO) provides all the necessary hardware, software,
and documentation to properly evaluate and begin design development using the Z80185/195 Smart
Peripheral Controller. The kit includes a monitor program shipped in EPROM and a software monitor
program (TZ.EXE) that runs on a PC. The monitor program enables you to do the following: download
and run programs from a PC—with or without breakpoints, display and fill memory locations, compare
contents of memory, and read/write from the I/O Ports. The kit also comes with P1284 IEEE Centronics
and ASCI UART device drivers and some working sample codes. A full schematic of the board is also
included in this manual.
The Z80185/195 Development Kit is carefully engineered to provide the best balance between
reasonable cost and useful features to shorten your development time for products using the Z80185/
195 (see Figure 1-1 for Functional Block Diagram). The Z80185/195 Development Board is an
excellent hardware example of how to design with the Z80185/195 Smart Peripheral Controller.
KEY FEATURES OF THE Z80185/195 DEVELOPMENT KIT
■ Complete Start-Up Kit Capabilities for Developers.
■ Provides Hands-On Access to the Z80185/195 Smart Peripheral Controller.
■ Serves as a Developmental Platform for Trial Implementation of a Specific Application.
■ Configured to Operate as a Standalone Unit.
■ Includes All Necessary Cabling for Power Supply Connection.
SUPPORTED ZILOG DEVICES
Device Packaging
Z80185/195 100-Pin QFP
UM951800100
1-1
ZILOG
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
HARDWARE SPECIFICATIONS
Dimensions 8.8 in. H x 5.9 in W
Oscillator Frequency (OSC) 18.432 MHz
Host Interface RS-232 (EIA-232) or RS-422 (EIA-530) Serial Link
Serial Baud Rate 115,200 bps (RS-232); Up to OSC/64 (RS-422/485)
Power Supply Voltage +5 VDC ±5%
Power Supply Current Less than 1A
Operating Temperature 20 degrees C, ±10 degrees C
Operating Humidity 10-90% RH (non-condensing)
Push Button
ROM
512K
Z80185/
Z80195
Parallel
Connectors (3)
RAM
128K
18.432
MHz
Power/GND
Connectors (2)
Drivers and Receivers
Drivers and Receivers
Reset NMI
RS-232
Serial
Connectors (6)
RS-422
Figure 1-1. Z80185/195 Development Kit
Functional Block Diagram
1-2 UM951800100
ZILOG
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
SUPPORT PRODUCTS PACKAGE CONTENTS
Hardware
Zilog Z80185 Evaluation Board, including:
Z80195 Smart Peripheral Controller
EPROM (Contains Debug Monitor)
128Kx8 25ns RAM
RS-232 Line Drivers and Receivers
RS-422 Line Drivers and Receivers
(5) EIA-570 DB-25 Connectors (for the three serial ports: ASCI0, ASCI1, and EMSCC)
DIN-8 LocalTalk Connector
Standard DB-25 Parallel Port Connector
Standard 36-Pin “Centronics” Connector
Miniaturized 36-Pin Connector (recommended for new designs by IEEE P1284 specifications.)
Berg Headers (surrounding the Z80185/195 location for all the CPU signals)
NMI and Reset Buttons
Power Cable with Banana Plugs
Software
Z80185 Sample Files and Monitor Source Diskette
ZASM-Cross Assembler Diskette/MOBJ-Object Utility Diskette
Device Drivers Diskette
Description of Z80185 Sample Files and Monitor Source Diskette
MAKE.BAT Assembly Macro
FIXLSTG.EXE Listing-Fixer Executable
TZ.EXE Terminal Emulator Executable
185MACRO.LIB Z80185 Assembler Macros
185MON.HEX Z80185 Debug Monitor (Intel hex format)
185MON.S Z80185 Debug Monitor Source
DISTEST.HEX Test for Monitor Disassembly (Intel hex format)
DISTEST.S Test for Monitor Disassembly Source
FVT0.HEX Z80185 ASCI0 FVT (Intel hex format)
FVT0.S Z80185 ASCI0 FVT Source
FVT1.HEX Z80185 ASCI1 FVT (Intel hex format)
FVT1.S Z80185 ASCI1 FVT Source
HOST.HEX Z80185 Host FVT (Intel hex format)
HOST.S Z80185 Host FVT Source
PERIF.HEX Z80185 Peripheral FVT (Intel hex format)
PERIF.S Z80185 Peripheral FVT Source
TSTRST20.HEX Test Program for Monitor Services (Intel hex format)
TSTRST20.S Test Program for Monitor Services Source
TZ96COM1.PIF Windows Startup File for TZ on COM1
TZ96COM2.PIF Windows Startup File for TZ on COM2
Publications
Z80185/195 Development Kit User's Manual
asm S800, Z800 Cross Assembler User's Guide
UM951800100
Zilog Universal Object File Utilities User's Guide
Z80185/195 Software Dev. Kit User's Manual
1-3
ZILOG
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
REQUIREMENTS AND RESTRICTIONS
Minimum Hardware
The Z80185/195 Development Board can be used with a dumb terminal and a power supply;
however, a PC is recommended to take full advantage of the development kit's software downloading
and development capabilities.
If Using a PC
Any IBM PC (or 100-percent compatible) that can run MS-DOS V.5.0. We recommend an IBM PC (or
100-percent compatible) 386-based machine at 20 MHz with 4 MB RAM, hard disk drive (with 1 MB
available), and a 3.5 floppy disk drive (see "Notes" that follow).
Minimum Software Operating Systems
MS-DOS V.5.0 (see "Notes" that follow)
Additional Items Not Supplied with the Support Package
A source of power (+5 VDC ±10%) can be used in place of the PC. This can be a laboratory power
supply with supply current of 1.0A.
Notes:
1. Debug Monitor with a Dumb Terminal. Two Debug Monitor commands (“L” for loading a hex file
and “N” for changing the Serial Data Rate) will not properly function when running on a dumb terminal
(refer to Chapter 3: Using the Debug Monitor, “TZ Program Restrictions”).
2. TZ Terminal Emulation Program. The TZ Program, which is included on the Z80185 Sample
Files and Monitor Source Diskette, was developed to run with MS-DOS V.5.0; however, the program
may run on earlier versions. One (or more) copies of the TZ Program will run under Windows 3.1 (and
also may run under earlier versions). The kit includes .PIF files on the Z80185 Sample Files and
Monitor Source Diskette to help start the TZ program in the Windows environment.
3. PC Models/Serial Baud Rates. The maximum serial rate that can be used between a PC and the
development kit board is dependent upon which PC model and configuration that is used. If the baud
rate is too fast for the PC, characters will be lost during lengthy display sequences initiated by the
monitor program D, U, or F commands. Also, downloading may fail if the serial rate is too high.
General Guidelines:
PC Configuration Maximum Baud Rate (bps)
286 or 386 (slower) 19,200
386 (faster), 486, Pentium 57,600
486 (faster) and later generation 115,200
machines with serial drivers and
receivers rated for higher baud rates.
1-4 UM951800100
ZILOG
U
SER'S MANUAL
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
CHAPTER 2
S
ETUP AND INSTALLATION
INTRODUCTION
This chapter describes the various steps necessary to start development using the Z80185/195
evaluation board. The sections covered in this chapter are as follows:
■ Installing the Software
■ Setting Up the Hardware
– Serial Channels
– Parallel Channel
– Other Jumper Options
■ Connecting to Power
■ Initial Checkout/Sample Session
INSTALLING THE SOFT WARE
Software for the Z80185/195 Development Kit is stored on two diskettes:
1. Z80185 Sample Files and Monitor Source Code Diskette
2. Zilog ZASM Cross Assembler/Zilog MOBJ Object File Util. diskette
Z80185 Source Diskette Installation
1. Select the “Run” command from the “File” menu under Microsoft Windows “Program Manager”.
2. Insert the diskette labeled “Z80185 Sample Files and Monitor Source” into drive A (or drive B, if
appropriate).
3. Type “a:\setup” and press ENTER. (Type “b:setup” if drive B is used.)
A dialog box will now prompt you for the directory into which the software will be installed (default
is C:\185). The setup program will copy the files into the target directory, creating an icon in the
Windows environment. After the installation is finished, you can move the icon into any program
group of your choice.
Note: The icon will be created in the window that is currently selected.
4. Remove diskette and store in a safe place when done.
UM951800100
2-1
ZILOG
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
INSTALLING THE SOFTWARE (Continued)
Creating TZ Program (TZ.EXE) Icon Using Windows Program Manager
This kit includes a software monitor program that runs on a PC. If you choose to create a TZ icon from
which you can run the TZ program, perform the following steps:
1. Select “New” from the Program Manager’s “File” menu and select “OK” or press ENTER on the
keyboard.
2. Type the designated name (such as “tz 9600 com1”) in the Program Manager window.
3. Type the full path and filename of (one of) the .PIF files you copied from the 185 Source Diskette,
such as “C:\WINDOWS\TZ96COM1.PIF”.
4. Type the full path of the directory you created (such as “C:\185”), then press ENTER.
The program item icon should then be created and ready to use. If you want to run copies of TZ on
both COM1 and COM2, repeat Steps 1–4.
Notes:
1. Modification of the “win.ini”, “autoexec.bat”, or “config.sys” files is not required.
2. Consult MS-Windows documentation if you need additional information about alternate install
procedures.
3. Refer to the README files on diskettes. (The README files are easily accessed via the Microsoft
Windows "Notepad" program.)
ZASM-Cross Assembler/MOBJ-Object Utility Installation (Optional)
If you are using the ZASM Cross Assembler/MOBJ-Object File Utility, install the appropriate diskette
before installing the GUI diskette. (You may choose to use a different assembler.)
1. Select the "Run" command from the "File" menu under Microsoft Windows "Program Manager".
2. Insert the diskette labeled "Zilog ZASM Cross Assembler/Zilog MOBJ Object File Util." into drive
A (or drive B, if appropriate).
3. Type "a:\setup" and press ENTER. (Type "b:setup" if drive B is used.)
A screen now appears listing various installation options.
4. Select the desired installation option ("Full Installation" is the default selection; however, only Z8
installation is required.)
5. Press ENTER and follow on-screen instructions.
6. Remove diskette and store in a safe place when done.
Note: The installation procedure can be run before creating the installation directory.
2-2
UM951800100
ZILOG
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
SETTING UP THE SERIAL CHANNELS
The Z80185/195 includes three serial channels called ASCI0, ASCI1, and the ESCC channel. The
board is shipped ready to use ASCI1 as the user interface for the Debug Monitor, with RS-232 DCE
pinning on ASCI1 connector J9.
Using the ASCI1 User Interface (Default). If you will be using ASCI1, and you don’t need to configure
ASCI0 or the ESCC channel, perform the following steps:
1. Connect a DB-9 to DB-25 serial cable between one of the COM ports of your PC and J9 on the
board.
2. Skip to the “Setting Up the Parallel Channel” section, which follows.
Otherwise, read the applicable sections that follow.
Selecting the Serial Channel for the Monitor
The Debug Monitor in the EPROM on the board can use ASCI0, ASCI1, or the ESCC channel for its
user interface. On this 185/195 board, this choice is controlled by jumpers on J14-2 and J14-5, which
are connected to the 185’s /INT1 and /INT2 pins respectively. You will want to connect a DB-9 to DB25 serial cable between a COM port of your PC and the female DB-25 DCE connector for the selected
channel.
Function Jumper Connections
ASCI1 for the Monitor interface J14-2 and J14-5 open, connect the serial cable to J9.
ASCI0 for the Monitor interface Ground J14-2, J14-5 open, connect the serial cable to
J13.
ESCC channel for the Monitor J14-2 open, ground J14-5, connect the serial cable
interface to J11.
Ground pins to J14-2 or J14-5 J8-6, J10-7, J12-7, J15-4, J15-6, and the following pins
around the Z80195 processor:
Pin Connector Pin
18 P2-20
40 P3-10
59 P4-22
63 P4-18
92 P5-9
ESCC LocalTalk/AppleTalk on J16
Pins 1-3 of J15 determine whether the ESCC channel takes its receive data from the LocalTalk/
AppleTalk connector J16, or one of the DB25 connectors J10 or J11.
UM951800100
2-3
ZILOG
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
SET TING UP THE HARDWARE (Continued)
Function Jumper Connections
LocalTalk/AppleTalk connector J15-1 to J15-2
from J16
J10 or J11 J15-2 to J15-3
Note: This board has no provision for “clock” or “handshake” input or output on the J16 LocalTalk/
AppleTalk connector.
RS-232 or RS-422/485 for ASCI0 and ESCC Channel
Pins 4-7 of J15 determine whether the board uses RS-232 “unbalanced” signaling, or RS-422/485
“balanced” or “differential” signaling on the DB-25 connectors for ASCI0 and the ESCC channel. RS232 is more common but is limited up to 115,200 bits/second, and cables up to about 25 feet long.
RS-422/485 can handle higher serial rates and longer cables.
Function Jumper Connections
RS-232 for ESCC on J10 or J11 Leave open J15-5.
RS-422/485 on J10 or J11 Jumper J15-4 to J15-4.
RS-232 for ASCI0 on J12 or J13 Leave open J15-7 open.
RS-422/485 on J12 or J13 Jumper J15-7 to J15-6 to use.
DCE or DTE Pinning for ASCI0 and the ESCC Channel
The RS-232 and EIA-570 standards define connection between a piece of Data Terminal Equipment
(DTE) such as a dumb terminal or a computer system, and a piece of Data Communications
Equipment (DCE) such as a modem. The 185/195 board can act as either a DTE or DCE device. For
ASCI0 and the ESCC channel this choice depends on which connector you use.
Male DB-25 J10. Provides DTE pinning for the ESCC channel, and is suitable for connecting to a
modem via a “straight-through” cable, or to a computer via a “null modem” cable.
Female DB-25 J11. Provides DCE pinning for the ESCC channel, and is suitable for connecting to
a computer via a straight through cable, or to a modem via a null modem cable.
Male DB-25 J12. Provides DTE pinning for ASCI0, and is suitable for connecting to a modem via a
straight-through cable, or to a computer via a null modem cable.
Female DB-25 J13. Provides DCE pinning for ASCI0, and is suitable for connecting to a computer
via a straight-through cable, or to a modem via a null modem” cable.
Note: Signal names, which are shown on the board schematic in this manual with an over bar to
indicate an active low signal, are shown in the following sections with a slash before the name, for
example “/DSR”.
2-4
UM951800100
ZILOG
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
ESCC DTE Pinning on J10
Since the ESCC channel signals on the Z80185 are named appropriately for the DTE role, the
following signals on J10 are driven from (or received into) the pins of the same name on the ESCC
channel: TxD, RxD, RTS, CTS, DCD, DTR, and RxC.
DSR on J10 is received onto J14-8 (/DSR on the schematic). It can be jumpered to the 185’s PIA15
pin on J14-7, or PIA14 on J14-9.
TxC (DCE source) on J10 is received onto J7-1 (/TXCI on the schematic). It can be jumpered to ESCC
/TRXC on J7-2, in which case /TRXC should be programmed as an input.
The signal on J7-3 (/TXCO on the schematic) drives TxC (DTE source) on J10. It can be jumpered
from ESCC /TRXC on J7-2, in which case /TRXC should be programmed as an output.
ESCC DCE Pinning on J11
The ESCC signals on the Z80185 are named appropriately for the DTE role, so the connections on
J11 are backward:
The ESCC TxD output drives RxD on J11.
The ESCC RxD input is taken from TxD on J11.
The ESCC RTS output drives CTS on J11.
The ESCC CTS input is taken from RTS on J11.
The ESCC DTR output drives DSR on J11.
DTR on J11 is received onto J14-8 (/DSR on the schematic). It can be jumpered to the 185’s PIA15
pin on J14-7, or PIA14 on J14-9.
The signal on J14-10 (/DCDO on the schematic) drives DCD on J11. It can be jumpered from the 185’s
PIA14 pin on J14-9, or PIA12 on J14-11.
The ESCC RTXC input is taken from TxC (DTE source) on J11.
The signal on J7-3 (/TXCO on the schematic) drives both RxC and TxC (DCE source) on J11. It can
be jumpered from ESCC TRXC on J7-2.
UM951800100
2-5
ZILOG
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
SET TING UP THE HARDWARE (Continued)
ASCI0 DTE Pinning on J12
TXA0 drives TxD on J12.
RxD on J12 is received into RXA0.
/RTS0 drives RTS on J12
CTS on J12 is received onto J7-10 (/CTS0 on the schematic). It can be jumpered to the 185’s
/CTS0/RxS pin on J7-9, in which case this pin should be programmed for the /CTS0 function.
The signal on J14-12 (/DTR0 on the schematic) drives DTR on J12. It can be jumpered from the
185’s PIA13 pin on J14-11, or PIA12 on J14-13.
DSR on J12 is received onto J14-14 (/DSR0 on the schematic). It can be jumpered to the 185’s
PIA12 pin on J14-13, or PIA11 on J14-15.
DCD on J12 is received onto J7-8 (/DCD0I on the schematic). It can be jumpered to the 185’s
/DCD0/CKA1 pin on J7-7, in which case this pin should be programmed for the /DCD0 function. A
pull-up resistor is included on DCD from J12 so that it will appear asserted if the remote system doesn’t
drive DCD, as required by ASCI0.
RxC on J12 is received onto J7-4 (CK0I on the schematic). It can be jumpered to the 185’s CKA0/
CKS pin on J7-5, in which case this pin should be programmed for the CKA0 function, and CKA0
should be programmed as a 1X clock input.
The signal on J7-6 (CKOO on the schematic) drives TxC (DTE source) on J12. It can be jumpered
from the 185’s CKA0/CKS pin on J7-5, in which case this pin should be programmed for the CKA0
function and CKA0 should be programmed as a 1X clock output.
ASCI0 DCE Pinning on J13
The ASCI0 signals on the Z80185 are named appropriately for the DTE role, so the connections on
J13 are backward:
The ASCI0 TXA0 output drives RxD on J13.
The ASCI0 RXA0 input is taken from TxD on J13.
The ASCI0 RTS0 output drives CTS on J13.
The ASCI0 CTS0 input is taken from RTS on J13.
The signal on J14-12 (/DTR0 on the schematic) drives DSR on J13. It can be jumpered from the
185’s PIA13 pin on J14-11, or PIA12 on J14-13.
2-6
UM951800100
ZILOG
Z80185/195 DEVELOPMENT KIT
USER'S MANUAL
ASCI0 DCE Pinning on J13 (Continued)
DTR on J13 is received onto J14-14 (/DSR0 on the schematic). It can be jumpered to the 185’s
PIA12 pin on J14-13, or PIA11 on J14-15.
The signal on J14-16 (/DCD0O on the schematic) drives DCD on J13. It can be jumpered from the
185’s PIA11 pin on J14-15, or PIA10 on J14-17.
The signal on J7-6 (CK0O on the schematic) drives both RxC and TxC (DCE source) on J13. It
can be jumpered from the 185’s CKA0/CKS pin on J7-5, in which case the pin should be programmed
for the CKA0 function, and CKA0 should be programmed as a 1X clock output. In this case, ASCI0
will be able to receive data correctly only if the remote transmitter actually uses TxC (DCE source)
to clock data onto TxD.
TxC (DTE source) on J13 is received onto J7-4 (CK0I on the schematic). It can be jumpered to
the 185’s CKA0/CKS pin on J7-5, in which case the pin should be programmed for the CKA0 function,
and CKA0 should be programmed as a 1X clock input.
No signal on J13 is received to the 185’s /DCD0/CKA1 pin, which is connected to J7-7. A pullup resistor, on the DCD0 receivers used with J12, ensures that the signal at J7-8 will be asserted Low,
as required for ASCI0 reception if J7-7 is jumpered to J7-8 and software programs /DCD0/CKA1 for
the /DCD0 function.
ASCI1 and J9
Only one connector is provided for ASCI1, the DB-25 female J9. It includes only transmit and receive
data, no “modem control” or status signals. The jumper header J8 controls both the pinning of J9 (DTE
versus DCE) and the signaling type (RS-232 versus differential):
Function Jumper Connections
RS-232 DCE pinning J8-4 to J8-6, J8-7 to J8-8, and J8-9 to J8-10
RS-232 DTE pinning J8-4 to J8-6, J8-7 to J8-9, and J8-8 to J8-10.
Differential DCE pinning J8-1 to J8-2, J8-3 to J8-4, J8-7 to J8-8. and J8-9 to J8-10.
For differential DTE pinning J8-1 to J8-3, J8-2 to J8-4, J8-7 to J8-9, and J8-8 to J8-10.
Differential receiving is compatible with RS-422 and RS-485. For ASCI1 and J9, differential
transmission differs from RS-422 and RS-485 in that it uses ±5V swings. This is because it uses part
of the 26LS30 driver U17 that is used for LocalTalk/ AppleTalk on J16. However, this differential output
is compatible with most differential receivers as long as they can tolerate a voltage differential up to
10V without damage.
UM951800100
2-7
Loading...