Zilog eZ80F92 User Manual
eZ80F92 Development Kit
User Manual
UM013911-0607
Copyright ©2007 by ZiLOG, Inc. All rights reserved.
www.zilog.com
eZ80F92 Development Kit
User Manual
ii
Safeguards
The following precautions must be observed when working with the
devices described in this document.
Caution:
Always use a grounding strap to prevent damage resulting from
electrostatic discharge (ESD).
Safeguards UM013911-0607
Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Kit Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Hardware Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
eZ80F92 Development Board Revision History . . . . . . . . . . . . . . . .3
eZ80Acclaim!
eZ80Acclaim!
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Operational Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
eZ80F92 Flash Module Interface . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Application Module Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
I/O Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Embedded Modem Socket Interface . . . . . . . . . . . . . . . . . . . . . . . .29
eZ80Acclaim!
LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Push Buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Console . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Modem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
2
I
C Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
eZ80F92 Flash Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Operational Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
eZ80F92 Flash Module Memory . . . . . . . . . . . . . . . . . . . . . . . . . . .49
Reset Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
IrDA Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
®
Development Platform Overview . . . . . . . . . . . . . . . . .4
®
Development Platform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
®
Development Platform Memory . . . . . . . . . . . . . .31
eZ80F92 Development Kit
User Manual
iii
UM013911-0607 Table of Contents
eZ80F92 Development Kit
User Manual
iv
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Flash Loader Utility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Mounting the Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Changing the Power Supply Plug . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
ZPAK II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
ZDI Target Interface Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Application Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
ZDS II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Cannot Download Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
No Output on Console Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
IrDA Port Not Working . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Appendix A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
General Array Logic Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
eZ80Acclaim!
®
Development Platform . . . . . . . . . . . . . . . . . . . . . 61
eZ80F92 Flash Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
U10 Address Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
U15 Address Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table of Contents UM013911-0607
Introduction
The eZ80F92 Development Kit provides a general-purpose platform for
evaluating the capabilities and operation of ZiLOG’s eZ80F92 microcontroller. The eZ80F92 is a member of ZiLOG’s eZ80Acclaim!
line, which offers on-chip Flash capability. The eZ80F92 Development
Kit features two primary boards: the eZ80Acclaim!
form and the eZ80F92 Flash Module. This arrangement provides a full
development platform when using both boards. It can also provide a
smaller-sized reference platform with the eZ80F92 Flash Module as a
stand-alone development tool.
Kit Features
eZ80F92 Development Kit
User Manual
1
®
product
®
Development Plat-
1
The key features of the eZ80F92 Development Kit are:
•
eZ80Acclaim!® Development Platform:
– Up to 2 MB fast SRAM (12 ns access time; 1 MB factory-
installed, with 512 KB on module, 512 KB on platform)
– Embedded modem socket with a U.S. telephone line interface
2
C EEPROM
–I
2
C configuration register
–I
– GPIO, logic circuit, and memory headers
– Supported by ZiLOG Developer Studio II and the eZ80Acclaim!
C-Compiler
– LEDs, including a 7 x 5 LED matrix
– Platform configuration jumpers
1. Other members of the eZ80Acclaim!® product line include the eZ80F91 and eZ80F93 microcontrollers. A scaled-down eZ80F92 Ethernet Module is also available. Contact your local ZiLOG
Sales Office for more information.
UM013911-0607 Introduction
®
eZ80F92 Development Kit
User Manual
2
– Two RS232 connectors—console, modem
– RS485 connector with cable assembly
– ZiLOG Debug Interface (ZDI)
– JTAG Debug Interface
– 9 VDC power connector
– Telephone jack
•
eZ80F92 Flash Module:
– eZ80F92 microcontroller
– 512 KB off-chip SRAM
– Real-Time Clock with Battery Back-Up
•
ZPAK II Debug Interface
2
operating at 20 MHz, with
128 KB + 256 bytes internal Flash and 8 KB internal SRAM
•
eZ80F92 Development Kit Software and Documentation CD-ROM
Hardware Specifications
Table 1 lists the specifications of the eZ80Acclaim!® Development Platform.
Table 1. eZ80Acclaim!
Hardware Specifications
Operating Temperature: 20ºC ±5ºC
Operating Voltage: 9 VDC
2. Also available is the eZ80F93 microcontroller, which features 64 KB of internal Flash memory
and 4 KB of internal SRAM. Please contact your local ZiLOG Sales Office
Introduction UM013911-0607
®
Development Platform
for details.
eZ80F92 Development Kit
eZ80F92 Development Board Revision History
99C0858-001 Rev C or later:
10/20/03 - Updated layout and added reset fix.
05/30/06 - The following components are not populated on the board:
– U11: Triac, SCR Phone Line D0-214
– U26 and U27: IC RS485, XCVR, Low PWR, 8-SOIC
– C3 and C4: CAP 1000pF Ceramic Disc 1KV
– D1 and D3: Diode LED Amber 0805 SMT
– T1: Inductor Ferrite Bead, 2x15 Turns
– J1: Conn HDR/Pin 1x32 2mm socket
– J5: Conn HDR/Pin 1x2 2mm socket
– J9: Conn HDR/Pin 1x9 2mm socket
– P4: Conn RJ14 Jack 6-Pos 4-CKT
– P5: Conn 9-CKT Cir rt-angl PC Mount
User Manual
3
UM013911-0607 Kit Features
eZ80F92 Development Kit
User Manual
4
eZ80Acclaim!® Development Platform Overview
The purpose of the eZ80Acclaim!® Development Platform is to provide
the developer with a set of tools for evaluating the features of the
eZ80Acclaim!
cation before building application hardware.
®
family of devices, and to be able to develop a new appli-
The eZ80F92 Development Kit features two primary boards: the
eZ80Acclaim!
®
Development Platform and the eZ80F92 Flash Module.
This arrangement provides a full development platform when using both
boards. It can also provide a smaller-sized reference platform with the
eZ80F92 Flash Module as a stand-alone development tool.
The eZ80Acclaim!
ber of application-specific modules and Z8- and eZ80Acclaim!
®
Development Platform is designed to accept a num-
®
-based
add-on modules, including the eZ80F92 Flash Module, which features a
real-time clock, an IrDA transceiver, and the eZ80F92 microcontroller.
®
The eZ80Acclaim!
Development Platform, together with its plugged-in
eZ80F92 Flash Module, can operate in stand-alone mode with Flash
memory, or interface via the ZPAK II emulator to a host PC running
ZiLOG Developer Studio II Integrated Development Environment (ZDS
IDE) software.
The address bus, data bus, and all eZ80F92 Flash Module control signals
are buffered on the eZ80Acclaim!
®
Development Platform to provide suf-
ficient drive capability.
Introduction UM013911-0607
eZ80F92 Development Kit
User Manual
A block diagram of the eZ80Acclaim!® Development Platform and the
eZ80F92 Flash Module is shown in Figure 1.
5
eZ80F92
SRAM
(512 KB)
Battery &
Oscillator
for RTC
IrDA
Transceiver
Peripheral Device Signals
Address Bus
Data Bus
eZ80“
Flash MPU
Module
Interface
Peripheral Device Signals
Address Bus
Data Bus
SRAM
(512 KB
up to 2 MB)
GPIO
and
Address
Decoder
Application Module Headers
Figure 1. eZ80Acclaim!® Development Platform Block Diagram
with eZ80F92 Flash Module
RS232-0
(Console)
RS485
RS232-1
(Modem)
Embedded
Modem
LED
(7x5 matrix)
Push-
buttons
2
I C
EEPROM
2
I C
Register
UM013911-0607 eZ80Acclaim!® Development Platform Overview
eZ80F92 Development Kit
User Manual
6
Figure 2 is a photographic representation of the eZ80Acclaim!® Development Platform segmented into its key blocks, as shown in the legend for
the figure.
C
Note: Key to blocks A–E.
A. Power and serial communications.
B. eZ80F92 Flash Module interface.
C. Debug interface.
Figure 2. The eZ80Acclaim!® Development Platform
A
B
D
E
D. Application module interfaces.
E. GPIO and LED with Address Decoder.
Introduction UM013911-0607
eZ80F92 Development Kit
User Manual
Figure 3 is a photographic representation of the eZ80F92 Flash Module
segmented into its key blocks, as shown in the legend for the figure.
7
Note: Key to blocks A–C.
A. eZ80F92 Flash Module interfaces.
B. CPU.
C. IrDA transceiver.
Figure 3. The eZ80F92 Flash Module
The structures of the eZ80Acclaim!
eZ80F92 Flash Module are illustrated in the Schematic Diagrams
®
Development Platform and the
starting
on page 61.
UM013911-0607 eZ80Acclaim!® Development Platform Overview
eZ80F92 Development Kit
User Manual
8
eZ80Acclaim!® Development Platform
This section describes the eZ80Acclaim!® Development Platform hardware, its key components and its interfaces, including detailed programmer interface information such as memory maps, register definitions, and
interrupt usage.
Functional Description
The eZ80Acclaim!® Development Platform consists of seven major hardware blocks. These blocks, listed below, are diagrammed in Figure 4.
•
eZ80F92 Flash Module interface (2 female headers)
•
Power supply for the eZ80Acclaim!® Development Platform, the
eZ80F92 Flash Module, and application modules
•
Application Module interface (2 male headers)
•
GPIO and LED matrix
•
RS232 serial communications ports
•
Embedded modem interface
•
I2C devices
eZ80Acclaim!® Development Platform UM013911-0607
Peripheral Device Signals
eZ80F92 Development Kit
User Manual
9
eZ80“
Flash MPU
Module
Interface
Address Bus
Data Bus
SRAM
(512 KB
up to 2 MB)
GPIO
and
Address
Decoder
RS232-0
(Console)
RS485
RS232-1
(Modem)
Embedded
Modem
LED
(7x5 matrix)
Push-
buttons
2
I C
EEPROM
2
I C
Register
Application Module Headers
Figure 4. Basic eZ80Acclaim!® Development Platform Block Diagram
UM013911-0607 Functional Description
eZ80F92 Development Kit
User Manual
10
Physical Dimensions
The dimensions of the eZ80Acclaim!® Development Platform PCB is
177.8 mm x 182.9 mm. The overall height is 38.1 mm. See Figure 5.
175.3 mm
43.2 mm
96.5 mm 55.9 mm
114.3 mm
157.5 mm
167.6 mm
5.1 mm
165.1 mm
5.1 mm
Figure 5. Physical Dimensions of the eZ80Acclaim!® Development Platform
eZ80Acclaim!® Development Platform UM013911-0607
Operational Description
eZ80F92 Development Kit
User Manual
11
The eZ80Acclaim!® Development Platform can accept any
®
eZ80Acclaim!
correctly to the eZ80Acclaim!
the eZ80Acclaim!
-core-based modules, provided that the module interfaces
®
®
Development Platform is to provide the application
Development Platform. The purpose of
developer with a tool to evaluate the features of the eZ80F92 Flash MCU,
and to develop an application without building additional hardware.
eZ80F92 Flash Module Interface
The eZ80F92 Flash Module interface provides easy connection of the
eZ80F92 Flash Module. It also provides easy connection for any
eZ80Acclaim!
modules using future eZ80Acclaim!
ules using current eZ80Acclaim!
The eZ80F92 Flash Module interface consists of two 50-pin receptacles,
JP1 and JP2.
Peripheral Bus Connector
Figure 6 illustrates the pin layout of the Peripheral Bus Connector in the
50-pin header, located at position JP1 on the eZ80Acclaim!
ment Platform. Table 2 describes the pins and their functions.
®
-based module designed to this interface. This includes
®
devices.
®
devices, and user-developed mod-
®
Develop-
UM013911-0607 Operational Description
eZ80F92 Development Kit
User Manual
12
A6
A10
GND_EXT
A8
A13
A15
A18 A1 6
A19
A2
A11
A4
A5
DIS_ETH
A21
A22
CS0
CS2
D1
D3
D5
D7
MREQ
GND_EXT
WR
BUSACK
JP1
12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
HEADER 25X2
IDC50
A0
A3
V3.3_EXT
A7
A9
A14
GND_EXT
A1
A12
A20
A17
DIS_FLASH
V3.3_EXT
A23
CS1
D0
D2
D4
GND_EXT
D6
IOREQ
RD
INSTRD
BUSREQ
Figure 6. eZ80Acclaim!® Development Platform
Peripheral Bus Connector Pin Configuration—JP1
eZ80Acclaim!® Development Platform UM013911-0607
eZ80F92 Development Kit
Table 2. eZ80Acclaim!® Development Platform
Peripheral Bus Connector Identification—JP1*
User Manual
13
Pin # Symbol Signal Direction Active Level eZ80F92 Signal
1 A6 Bidirectional Yes
2 A0 Bidirectional Yes
3 A10 Bidirectional Yes
4 A3 Bidirectional Yes
5GND
6V
DD
7 A8 Bidirectional Yes
8 A7 Bidirectional Yes
9 A13 Bidirectional Yes
10 A9 Bidirectional Yes
11 A15 Bidirectional Yes
12 A14 Bidirectional Yes
13 A18 Bidirectional Yes
14 A16 Bidirectional Yes
15 A19 Bidirectional Yes
2
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80F92 Module Schematics on pages 65
through 67.
2. The Power and Ground nets are connected directly to the eZ80F92 device.
3. External capacitive loads on RD
to satisfy the timing requirements for the eZ80
either V
reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in
the eZ80F92’s Peripheral Power-Down Register.
or GND, depending on their inactive levels to reduce power consumption and to
DD
, WR, IORQ, MREQ, D0–D7 and A0–A23 should be below 10 pF
®
CPU. All unused inputs should be pulled to
UM013911-0607 Operational Description
eZ80F92 Development Kit
User Manual
14
Table 2. eZ80Acclaim!
®
Development Platform
Peripheral Bus Connector Identification—JP1* (Continued)
Pin # Symbol Signal Direction Active Level eZ80F92 Signal
16 GND
17 A2 Bidirectional Yes
18 A1 Bidirectional Yes
19 A11 Bidirectional Yes
20 A12 Bidirectional Yes
21 A4 Bidirectional Yes
22 A20 Bidirectional Yes
23 A5 Bidirectional Yes
24 A17 Bidirectional Yes
25 DIS_ETH
26 EN_FLASH
Output Low No
Output Low No
27 A21 Bidirectional Yes
28 V
DD
29 A22 Bidirectional Yes
2
30 A23 Bidirectional Yes
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80F92 Module Schematics on pages 65
through 67.
2. The Power and Ground nets are connected directly to the eZ80F92 device.
3. External capacitive loads on RD
to satisfy the timing requirements for the eZ80
either V
reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in
the eZ80F92’s Peripheral Power-Down Register.
or GND, depending on their inactive levels to reduce power consumption and to
DD
, WR, IORQ, MREQ, D0–D7 and A0–A23 should be below 10 pF
®
CPU. All unused inputs should be pulled to
eZ80Acclaim!® Development Platform UM013911-0607
eZ80F92 Development Kit
User Manual
15
Table 2. eZ80Acclaim!
®
Development Platform
Peripheral Bus Connector Identification—JP1* (Continued)
Pin # Symbol Signal Direction Active Level eZ80F92 Signal
31 CS0 Input Low Yes
32 CS1 Input Low Yes
33 CS2 Input Low Yes
34 D0 Bidirectional Yes
35 D1 Bidirectional Yes
36 D2 Bidirectional No
37 D3 Bidirectional Yes
38 D4 Bidirectional Yes
39 D5 Bidirectional Yes
40 GND
41 D7 Bidirectional Yes
42 D6 Bidirectional Yes
43 MREQ
Bidirectional Low Yes
2
44 IORQ
Bidirectional Low Yes
45 GND
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80F92 Module Schematics on pages 65
through 67.
2. The Power and Ground nets are connected directly to the eZ80F92 device.
3. External capacitive loads on RD
to satisfy the timing requirements for the eZ80
either V
reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in
the eZ80F92’s Peripheral Power-Down Register.
or GND, depending on their inactive levels to reduce power consumption and to
DD
, WR, IORQ, MREQ, D0–D7 and A0–A23 should be below 10 pF
®
CPU. All unused inputs should be pulled to
UM013911-0607 Operational Description
eZ80F92 Development Kit
User Manual
16
Peripheral Bus Connector Identification—JP1* (Continued)
Table 2. eZ80Acclaim!
®
Development Platform
Pin # Symbol Signal Direction Active Level eZ80F92 Signal
2
46 RD Bidirectional Low Yes
47 WR
48 INSTRD
49 BUSACK
50 BUSREQ
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80F92 Module Schematics on pages 65
through 67.
2. The Power and Ground nets are connected directly to the eZ80F92 device.
3. External capacitive loads on RD
to satisfy the timing requirements for the eZ80® CPU. All unused inputs should be pulled to
either V
reduce noise sensitivity. To prevent EMI, the EZ80CLK output can be deactivated via software in
the eZ80F92’s Peripheral Power-Down Register.
or GND, depending on their inactive levels to reduce power consumption and to
DD
Bidirectional Low Yes
Input Low Yes
Input Pull-Up 10 KΩ; Low Yes
Output Pull-Up 10 KΩ; Low Yes
, WR, IORQ, MREQ, D0–D7 and A0–A23 should be below 10 pF
eZ80Acclaim!® Development Platform UM013911-0607
I/O Connector
eZ80F92 Development Kit
User Manual
17
Figure 7 illustrates the pin layout of the I/O Connector in the 50-pin
header, located at position JP2 on the eZ80Acclaim!
®
Development Plat-
form. Table 3 describes the pins and their functions.
PB7
PB5
PB3
PB1
GND_EXT
PC6
PC4
PC2
PC0
PD6
PD5
PD3
PD1
GND_EXT
TCK TMS
RTC_VDD
IICSCL
IICSDA
FLASHWE
CS3
RESET
V3.3_EXT
HALT_SLP
V3.3_EXT
JP2
12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
HEADER 25X2
IDC50
PB6
PB4
PB2
PB0
PC7
PC5
PC3
PC1
PD7
GND_EXT
PD4
PD2
PD0
TDITDO
TRIGOUT
EZ80CLK
GND_EXT
DIS_IRDA
WAIT
GND_EXT
NMI
Figure 7. eZ80Acclaim!® Development Platform
I/O Connector Pin Configuration—JP2
UM013911-0607 Operational Description
eZ80F92 Development Kit
User Manual
18
Table 3. eZ80Acclaim!® Development Platform
I/O Connector Identification—JP2*
Pin # Symbol Signal Direction Active Level eZ80F92 Signal
1 PB7 Bidirectional Yes
2 PB6 Bidirectional Yes
3 PB5 Bidirectional Yes
4 PB4 Bidirectional Yes
5 PB3 Bidirectional Yes
6 PB2 Bidirectional Yes
7 PB1 Bidirectional Yes
8 PB0 Bidirectional Yes
9GND
10 PC7 Bidirectional Yes
11 PC6 Bidirectional Yes
12 PC5 Bidirectional Yes
13 PC4 Bidirectional Yes
14 PC3 Bidirectional Yes
15 PC2 Bidirectional Yes
2
16 PC1 Bidirectional Yes
17 PC0 Bidirectional Yes
18 PD7 Bidirectional Yes
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80F92 Module Schematics on pages 65
through 67.
2. The Power and Ground nets are connected directly to the eZ80F92 device.
eZ80Acclaim!® Development Platform UM013911-0607
eZ80F92 Development Kit
User Manual
19
Table 3. eZ80Acclaim!
®
Development Platform
I/O Connector Identification—JP2* (Continued)
Pin # Symbol Signal Direction Active Level eZ80F92 Signal
19 PD6 Bidirectional
20 GND
21 PD5 Bidirectional Yes
22 PD4 Bidirectional Yes
23 PD3 Bidirectional Yes
24 PD2 Bidirectional Yes
25 PD1 Bidirectional Yes
26 PD0 Bidirectional Yes
27 TDO Input Yes
28 TDI/ZDA Output Yes
29 GND
30 TRIGOUT Input High
31 TCK/ZCL Output Yes
2
32 TMS Output High Yes
33 RTC_V
DD
34 EZ80CLK Input Yes
35 SCL Bidirectional Yes
36 GND
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80F92 Module Schematics on pages 65
through 67.
2. The Power and Ground nets are connected directly to the eZ80F92 device.
UM013911-0607 Operational Description
eZ80F92 Development Kit
User Manual
20
Table 3. eZ80Acclaim!
®
Development Platform
I/O Connector Identification—JP2* (Continued)
Pin # Symbol Signal Direction Active Level eZ80F92 Signal
37 SDA Bidirectional Yes
38 GND
39 FlashWE
Output Low No
40 GND
41 CS3
42 DIS_IrDA
43 RESET
44 WAIT
45 V
DD
Input Low Yes
Output Low No
Bidirectional Low Yes
Output Pull-Up 10 KΩ; Low Yes
46 GND
47 HALT_SLP
48
49 V
NMI
DD
Input Low Yes
Output Low Yes
50 Reserved
2
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The entire interface is represented in the eZ80F92 Module Schematics on pages 65
through 67.
2. The Power and Ground nets are connected directly to the eZ80F92 device.
Almost all of the connectors’ signals are received directly from the CPU.
Three input signals, in particular, offer options to the application developer by disabling certain functions of the eZ80F92 Flash Module.
eZ80Acclaim!® Development Platform UM013911-0607
These three inputs are:
•
Enable Flash (EN_FLASH)*
•
Flash Write Enable (FlashWE)*
•
Disable IrDA (DIS_IrDA)
These three signals are described below.
Enable Flash*
eZ80F92 Development Kit
User Manual
21
When active Low, the EN_FLASH
the eZ80F92 Flash Module.
Flash Write Enable*
When active Low, the FlashWE
the Flash boot block of the eZ80F92 Flash Module.
Disable IrDA
When the DIS_IrDA
input signal is pulled Low, the IrDA transceiver,
located on the eZ80F92 Flash Module, is disabled. As a result, UART0
can be used with the RS232 or the RS485 interfaces on the
®
Development Platform.
Note:
eZ80Acclaim!
*These inputs are only used if external Flash is present on the eZ80F92
Flash Module (as shipped from the factory, external Flash is not
installed).
Application Module Interface
An Application Module Interface is provided to allow the user to add an
application-specific module to the eZ80Acclaim!
form. ZiLOG’s Thermostat Application Module (not provided in the kit)
is an example application-specific module that demonstrates an HVAC
control system. Implementing an application module with the Application
Module Interface requires that the eZ80F92 Flash Module also be
input signal enables the Flash chip on
input signal enables Write operations on
®
Development Plat-
UM013911-0607 Operational Description
eZ80F92 Development Kit
User Manual
22
mounted on the eZ80Acclaim!® Development Platform, because the
eZ80F92 Flash Module features the eZ80F92 microcontroller. To mount
an application module, use the two male headers J6 and J8.
Jumper J6 carries the General Purpose Input/Output ports (GPIO), and
jumper J8 carries memory and control signals. To design an application
module, the user should be familiar with the architecture and features of
the eZ80F92 Flash Module currently installed. Tables 4 and 5 list the signals and functions related to each of these jumpers by pin. Power and
ground signals are omitted for the sake of simplicity.
Table 4. GPIO Connector J6*
Signal Pin # Function Direction Notes
SCL 5 I
SDA 7 I
2
C Clock Bidirectional
2
C Data Bidirectional
MOD_DIS 9 Modem Disable Input If a shunt is installed between
pins 6 and 9, the modem
function on the eZ80Acclaim!
Development Platform is
disabled.
MWAIT 13 Wait signal for the
CPU
EM_D0 15 Emulated Port A,
Bit 0
CS3 17 Chip Select 3 of
the CPU
EM_D[7:1] 21,23,25,
27,29,31,
33
Reserved 35
Note: *All of the signals are driven directly by the CPU.
eZ80Acclaim!® Development Platform UM013911-0607
Emulated Port A,
Bit [7:1]
Input
Bidirectional
Output This signal is also present on
the J8.
Bidirectional
®
eZ80F92 Development Kit
Table 4. GPIO Connector J6* (Continued)
Signal Pin # Function Direction Notes
User Manual
23
PC[7:0] 39,41,43,
Port C, Bit [7:0] Bidirectional
45,47,49,
51,53
®
ID_[2:0] 6,8,10 eZ80Acclaim!
Output
Development
Platform ID
CON_DIS 12 Console Disable Input If a shunt is installed between
pins 12 and 14, the Console
function on the eZ80Acclaim!
Development Platform is
disabled.
Reserved 16,18
PD[7:0] 22,24,26,
Port D, Bit[7:0] Bidirectional
28,30,32,
34,36
PB[7:0] 40,42,44,
Port B, Bit[7:0] Bidirectional
46,48,50,
52,54
Note: *All of the signals are driven directly by the CPU.
®
UM013911-0607 Operational Description
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