Yamaha DVDS-1700 Service manual

DVD AUDIO/VIDEO SA-CD PLAYER

DVD-S1700

SERVICE MANUAL

IMPORTANT NOTICE

This manual has been provided for the use of authorized YAMAHA Retailers and their service personnel. It has been assumed that basic service procedures inherent to the industry, and more specifically YAMAHA Products, are already known and understood by the users, and have therefore not been restated.

WARNING: Failure to follow appropriate service and safety procedures when servicing this product may result in personal

IMPORTANT: The presentation or sale of this manual to any individual or firm does not constitute authorization, certification or

The data provided is believed to be accurate and applicable to the unit(s) indicated on the cover. The research, engineering, and service departments of YAMAHA are continually striving to improve YAMAHA products. Modifications are, therefore, inevitable and specifications are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, please contact the distributor's Service Division.

WARNING: Static discharges can destroy expensive components. Discharge any static electricity your body may have

IMPORTANT: Turn the unit OFF during disassembly and part replacement. Recheck all work before you apply power to the unit.

injury, destruction of expensive components, and failure of the product to perform as specified. For these reasons, we advise all YAMAHA product owners that any service required should be performed by an authorized YAMAHA Retailer or the appointed service representative.

recognition of any applicable technical capabilities, or establish a principle-agent relationship of any form.

accumulated by grounding yourself to the ground buss in the unit (heavy gauge black wires connect to this buss).

■ CONTENTS

TO SERVICE PERSONNEL ...................................... 2–4

PREVENTION OF ELECTROSTATIC DISCHARGE .... 4

LOCALE MANAGEMENT INFORMATION ................... 4

FRONT PANEL .............................................................. 5

REAR PANELS .......................................................... 5–6

REMOTE CONTROL PANEL ........................................ 7

SPECIFICATIONS / 参考仕様 ........................................ 7

INTERNAL VIEW ........................................................... 8

TRADE MODE / トレードモード ................................... 8

ERROR MESSAGE / エラーメッセージ ........................ 8

101037

This manual is copyrighted by YAMAHA and may not be copied or

redistributed either in print or electronically without permission.

DVD-S1700

TROUBLESHOOTING / トラブルシュート ................... 8

DISASSEMBLY PROCEDURES / 分解手順.................. 9

DISPLAY DATA ........................................................... 10

IC DATA ................................................................. 12–30

BLOCK DIAGRAM ....................................................... 31

WIRING DIAGRAM ...................................................... 32

PRINTED CIRCUIT BOARDS................................ 33–36

SCHEMATIC DIAGRAMS ...................................... 37–42

REPLACEMENT PARTS LIST .............................. 43–45

REMOTE CONTROL .................................................... 46

P.O.Box 1, Hamamatsu, Japan

'06.12

DVD-S1700

■ TO SERVICE PERSONNEL

1. Critical Components Information Components having special characteristics are marked s and must be replaced with parts having specifications equal to those originally installed.

2. Leakage Current Measurement (For 120V Models Only) When service has been completed, it is imperative to verify that all exposed conductive surfaces are properly insulated from supply circuits.

● Meter impedance should be equivalent to 1500 ohms

shunted by 0.15µF.

WALL

OUTLET

● Leakage current must not exceed 0.5mA.

● Be sure to test for leakage with the AC plug in both

polarities.

EQUIPMENT

UNDER TEST

INSULATING

TABLE

AC LEAKAGE

TESTER OR

EQUIVALENT

WARNING: CHEMICAL CONTENT NOTICE!

The solder used in the production of this product contains LEAD. In addition, other electrical/electronic and/or plastic (where applicable) components may also contain traces of chemicals found by the California Health and Welfare Agency (and possibly other entities) to cause cancer and/or birth defects or other reproductive harm.

DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHATSOEVER!

Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose eyes to solder/flux vapor!

If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handling food.

About lead free solder / 無鉛ハンダについて

All of the P.C.B.s installed in this unit and solder joints are soldered using the lead free solder.

Among some types of lead free solder currently available, it is recommended to use one of the following types for the repair work.

• Sn + Ag + Cu (tin + silver + copper)

• Sn + Cu (tin + copper)

• Sn + Zn + Bi (tin + zinc + bismuth)

DVD-S1700

Caution:

As the melting point temperature of the lead free solder is about 30°C to 40°C (50°F to 70°F) higher than that of the lead solder, be sure to use a soldering iron suitable to each solder.

WARNING: Laser Safety

This product contains a laser beam component. This component may emit invisible, as well as visible radiation, which may cause eye damage. To protect your eyes and skin from laser radiation, the following precautions must be used during servicing of the unit.

1) When testing and/or repairing any component within the product, keep your eyes and skin more than 30 cm away from

the laser pick-up unit at all times. Do not stare at the laser beam at any time.

2) Do not attempt to readjust, disassemble or repair the laser pick-up, unless noted elsewhere in this manual.

3) CAUTION : Use of controls, adjustments or performance of procedures other than those specified herein may result in

hazardous radiation exposure.

本機に搭載されているすべての基板およびハンダ付けによる接合部は無鉛ハンダでハンダ付けされています。

無鉛ハンダにはいくつかの種類がありますが、修理時には下記のような無鉛ハンダの使用を推奨します。

・Sn+Ag+Cu（錫+銀+銅）・Sn+Cu（錫+銅）・Sn+Zn+Bi（錫+亜鉛+ビスマス）

注意：

無鉛ハンダの融点温度は通常の鉛入りハンダに比べ30〜40℃ 程度高くなっていますので、それぞれのハンダに合ったハンダごてをご使用ください。

2

DVD-S1700

Laser Emitting conditions:

1) When the Top Cover is removed, and the STANDBY/ON SW is turned to the "ON" position, the laser component will emit a beam for several seconds to detect if a disc is present. During this time (5-10 sec.) the laser may radiate through the lens of the laser pick-up unit. Do not attempt any servicing during this period! If no disc is detected, the laser will stop emitting the beam. When a disc is loaded, you will not be exposed to any laser emissions.

2) The laser power level can be adjusted with the VR on the pick-up PWB, however, this level has been set by the factory prior to shipping from the factory. Do not adjust this laser level control unless instruction is provided elsewhere in this manual. Adjustment of this control can increase the laser emission level from the device.

Laser Diode Properties

Type: Semiconductor laser GaAlAs Wave length: 650 nm (DVD)

790 nm (VCD/CD)

Output Power: 1.45 mW (DVD)

1.13 mW (VCD/CD)

Beam divergence: 60 degrees

VARO! : AVATTAESSA JA SUOJALUKITUS

OHITETTAESSA OLET ALTTIINA NÄKYMÄTTÖMÄLLE LASERSÄTEILYLLE. ÄLÄ KATSO SÄTEESEEN.

VARNING! : OSYNLIG LASERSTRÅLNING NÄR

DENNA DEL ÄR ÖPPNAD OCH SPÄRREN ÄR URKOPPLAD. BETRAKTA EJ STRÅLEN.

DVD-S1700

3

DVD-S1700

Warning for power supply

The primary side of the power supply carries live mains voltage when the player is connected to the mains even when the player is switched off !

This primary area is not shielded so it is possible to touch copper tracks and/or components when servicing the player. Service personnel have to take precautions to prevent touching this area or components in this area.

Note:

The screws on the DVD mechanism may never be touched, removed or re-adjusted. Handle the DVD mechanism with care when the unit has to be exchanged! The DVD mechanism is very sensitive for dropping or giving shocks.

■ PREVENTION OF ELECTROSTATIC DISCHARGE

The laser diode in the DVD mechanism may be damaged due to static electricity from clothes or the human body. Use caution to prevent electrostatic damage when servicing or handling the DVD-mechanism.

1. Grounding for electrostatic damage prevention

Some devices, such as the DVD player, use an optical pickup (laser diode) that will be damaged by static electricity in the working environment. Only attempt service after ensuring that all grounding procedures have been completed.

1. Worktable grounding Put a grounded conductive material (sheet) or iron sheet on the area where the optical pickup is placed.

2. Human body grounding Use an anti-static wrist strap to discharge the static electricity from your body.

2. Handling Precautions for DVD mechanism

1. Handle the DVD mechanism gently, as it is an extremely high-precision assembly.

2. The flexible cable lines may break if an excessive force is applied to it. Use caution when handling the cable.

3. The semi-fixed resistor for laser power adjustment should not be adjusted. Do not turn the resistor.

DVD-S1700

■ LOCALE MANAGEMENT INFORMATION

Locale Management Information : This DVD player is designed and manufactured to respond to the Locale Management Information that is recorded on a DVD disc. If the Locale number described on the DVD disc does not correspond to the Locale number of this DVD player, this DVD player cannot play this disc.

This product incorporates copyright protection technology that is protected by method claims of certain U.S. patents and other intellectual property rights owned by Macrovision Corporation and other rights owners. Use of this copyright protection technology must be authorized by Macrovision Corporation, and is intended for home and other limited viewing uses only unless otherwise authorized by Macrovision Corporation. Reverse engineering or disassembly is prohibited.

Anti-static wrist strap

1M-ohms

Conductive material (sheet) or steel sheet

5

2

1

4

2

5

6

3

2

4

■ FRONT PANEL

U, T, K, A, G, L, J models

DVD-S1700

■ REAR PANELS

U model

T model

K model

DVD-S1700

5

DVD-S1700

A model

G model

L model

J model

DVD-S1700

6

■ REMOTE CONTROL PANEL

DVD-S1700

■ SPECIFICATIONS / 参考仕様

PLAYBACK SYSTEM / 対応ディスク

DVD-video DVD-audio DVD-R, DVD-RW DVD+R, DVD+RW, DVD+R DL Video CD, SVCD SA-CD multi-channel and SA-CD stereo CD Picture CD CD-R, CD-RW

VIDEO PERFORMANCE / ビデオ部

Video (CVBS) output 1 Vpp into 75 ohms S-video output Y: 1 Vpp into 75 ohms

C: 0.3 Vpp into 75 ohms

D1/D2 output (J model) Y: 1 Vpp into 75 ohms

B/CB, PR/CR: 0.7 Vpp into 75 ohms

P

Component video output (U, T, K, A, G, L models)

Y: 1 Vpp into 75 ohms PB/CB, PR/CR: 0.7 Vpp into 75 ohms

RGB (SCART) output (G model)

0.7 Vpp into 75 ohms

Black level shift (U model)

On/Off

AUDIO FORMAT / オーディオフォーマット

Digital Dolby Digital/DTS/MPEG

Compressed Digital

PCM 16, 20, 24 bits

fs 44.1, 48, 88.2, 96 kHz

MP3 (ISO 9660) 32 kbps to 320 kbps

fs 16, 22.05, 24, 32, 44.1, 48 kHz

WMA 64 kbps to 320 kbps

mono, stereo

Full decoding of Dolby Digital and DTS multi-channel sound

Analog stereo sound

Dolby surround compatible downmix from Dolby Digital multichannel sound

AUDIO PERFORMANCE / オーディオ特性

DA converter 24 bits, 192 kHz Signal to noise (1 kHz) 115 dB Dynamic range (1 kHz) 105 dB DVD fs 96 kHz 2 Hz to 44 kHz

fs 48 kHz 2 Hz to 22 kHz

SVCD fs 48 kHz 2 Hz to 22 kHz

fs 44.1 kHz 2 Hz to 20 kHz CD/VCD fs 44.1 kHz 2 Hz to 20 kHz Distortion and noise (1 kHz)

0.002 %

TV STANDARD (PAL: 50 Hz) (NTSC: 60 Hz)

Number of lines 625 525 Playback Multistandard (PAL/NTSC)

CONNECTIONS / 接続端子

Video output Cinch (yellow) x 1 S-video output Mini DIN, 4 pins x 1 D1/D2 output (J model) 1 Component video output

Y output Cinch (green) x 1 PB/CB output Cinch (blue) x 1

PR/CR output Cinch (red) x 1 SCART (G model) Euroconnector x 1 Digital output Coaxial x 1

Optical x 1 IEC60958 for CDDA/LPCM, IEC61937 for MPEG 1/2,

Dolby Digital and DTS HDMI Type A x 1 Audio output

2 channel analog output

MIXED 2CH L/R Cinch (white/red) x 1 pair

Multi channel analog output

FRONT L/R Cinch (white/red) x 1 pair SURROUND L/R Cinch (white/red) x 1 pair CENTER Cinch (black) x 1 SUBWOOFER Cinch (black) x 1

GENERAL / 一般

Dimensions (W x H x D) / 435 x 87 x 284.5 mm 寸法（幅 x 高さ x 奥行き） (17-1/8" x 3-7/16" x 11-3/16") Weight / 質量 3.3 Kg (7 lbs. 4 oz) Finish / 仕上げ Gold color (K, J models)

Black color (U, A, G models) Titanium color (T, G, L models)

Power supply / 電源電圧 AC 120 V, 60 Hz (U model)

AC 100-240 V, 50 Hz (T model) AC 100-240 V, 50/60 Hz

(K, A, L models) AC 230 V, 50 Hz (G model) AC 100 V, 50/60 Hz (J model)

Power consumption / 消費電力 Approx. 21 W Standby power consumption / < 0.5 W

待機時消費電力

ACCESSORIES / 付属品

Remote control x 1

Battery (AAA, R03, UM-4) x 2

Power cable (2 m) x 1 (U, T, A, G, L, J models)

Power cable (2 m) x 2 (K model)

Video pin cable (1 m) x 1 Audio pin cable (1 m) x 1

* Specifications are subject to change without prior notice.

※参考仕様および外観は予告なく変更されることがあります。

U ........ U.S.A. model T ........ Chinese model

K ........ Korean model A ........ Australian model

G ........ European model L ........ Singapore model

J ......... Japanese model

Manufactured under license from Dolby Laboratories. “Dolby” and the double-D symbol are trademarks of Dolby Laboratories.

ドルビーラボラトリーズからの実施権により製造されています。「ドルビー」およびダブルD記号は、ドルビーラボラトリーズの商標です。

“DTS” and “DTS Digital Surround” are registered trademarks of Digital Theater Systems, Inc.

DTSおよびDTSDigitalSurroundはデジタルシアターシステムズの登録商標です。

DivX, DivX Certified, and associated logos are trademarks of DivX, Inc. and are used under license.

DivX、DivXCertified、および関連するロゴは、 DivX,Inc.の商標です。これらの商標は、DivX,Inc. の使用許諾を得て使用しています。

“DCDi” is a trademark of Faroudja, a division of Genesis Microchip, Inc.

DCDiは、GenesisMicrochipInc.の事業部門である Faroudjaの商標です。

“HDMI”, the “HDMI” logo and “High Definition Multimedia Interface” are trademarks or registered trademark of HDMI Licensing LLC.

HDMI、HDMIロゴおよびH igh - D e fini t i o n MultimediaInterfaceは、HDMILicensingLLCの商標または、登録商標です。

This product incorporates copyright protection technology that is protected by method claims of certain U.S. patents and other intellectual property rights owned by Macrovision Corporation and other rights owners. Use of this copyright protection technology must be authorized by Macrovision Corporation, and is intended for home and other limited viewing uses only unless otherwise authorized by Macrovision Corporation. Reverse engineering or disassembly is prohibited.

本製品は、著作権保護技術を採用しており、マクロビジョン社及びその他の著作権利者が保有する米国特許及びその他の知的財産権によって保護されています。この著作権保護技術の使用は、マクロビジョン社の許可が必要で、またマクロビジョン社の特別な許可がない限り家庭用及びその他の一部の視聴用の使用に制限されています。分解したり、改造することも禁じられています。

• DIMENSIONS

7

(1/4")

284.5 (11-3/16")

4

(3/16")

87 (3-7/16")

70 (2-3/4") 273.5 (10-3/4")

435 (17-1/8")

Unit: mm (inch)

単位：mm（インチ）

17

(11/16")

7

DVD-S1700

■ INTERNAL VIEW

123 4

56

■ TRADE MODE / トレードモード

In the TRADE mode, the tray open/close function is stopped temporarily.

• Setting TRADE mode

1. Connect the power cable of the main unit to the AC outlet.

2. Press the “STANDBY/ON” key of the main unit or remote controller to turn on the power.

3. Press the “OPEN/CLOSE” key of the main unit to open the tray.

4. Place a disc in the tray and open the “OPEN/CLOSE” key of the main unit to close the tray.

5. While pressing the “SKIP+/SEARCH+” key of the main unit and press the “STOP” key for 3 seconds or longer.

6. When the TRADE mode is set, [TRADE ON] is displayed which then returns to the normal display.

Note: Even after the TRADE mode is set, all func-

tions remain the same as normal except the “OPEN/ CLOSE” key.

Press the “OPEN/CLOSE” key, and [TRAY LOCKED] is displayed.

1

POWER SUPPLY UNIT

2

DVD MECHANISM UNIT

3

MAIN (1) P.C.B.

4

MAIN (4) P.C.B. (G model)

5

MAIN (2) P.C.B.

6

MAIN (3) P.C.B.

トレードモードは、トレイのOPEN/CLOSE機能を一時的に停止する機能です。



・トレードモードの起動

1. 本機の電源コードをACコンセントに接続します。

2. 本機またはリモコンのSTANDBY/ONキーを押し、電源を入れます。

3. 本機のOPEN/CLOSEキーを押し、トレイを開きます。

4. トレイにディスクをセットし、本機のOPEN/CLOSE キーを押しトレイを閉じます。

5. 本機のSKIP+/SEARCH+キーを押しながら次に

STOPキーを3秒間以上押し続けます。

6. トレードモードが起動し「TRADEON」と表示した後、通常の表示に戻ります。

注：トレードモード起動後、OPEN/CLOSEキー以

外の操作は通常通り行うことができます。

OPEN/CLOSEキーを押すと「TRAYLOCKED」

と表示されます。

■ ERROR MESSAGE / エラーメッセージ

Display / 表示 Cause / 原因

NO DISC

UNKNOWN DISC

When no disc is loaded in the tray. /

When a disc which cannot be played or recognized is loaded in the tray. /

再生できない、または認識できないディスクがトレイにセットされている場合。

ディスクがトレイにセットされていない場合。

■ TROUBLESHOOTING / トラブルシュート

• HDMI Reset

When no picture is displayed even though the main unit and TV monitor are connected with the HDMI cable

1. Press the “STOP” key of the main unit or on the remote control twice.

2. While pressing the “STOP” key of the main unit, press the “PLAY/PAUSE” key for 3 seconds or longer.

3. [HDMI RESE] is displayed of the main unit which then returns to the normal display.

• VIDEO Reset

When no picture is displayed or picture is displayed but not properly even though the main unit and TV monitor are connected with the video pin cable or the like

1. Press the “EJECT” key to open the tray.

2. Press the “CLEAR” key on the remote control.

3. Press the “2”, “5”, “8” and “0” keys on the remote control.

4. Press the “AUDIO” key on the remote control.

Main unit / 本機

・ HDMIリセット

本機とTVモニターをHDMIケーブルで接続しても映像が表示されない場合

1. 本機のSTOPキーまたは、リモコンのSTOPキーを2

2. 本機のSTOPキーを押しながらPLAY/PAUSEキーを

3.本機のディスプレイに「HDMIRESET」と表示した後、通

・ビデオリセット

本機とTVモニターを映像ピンケーブルなどで接続しても映像が表示されない、または映像が正しく表示されない場合

1. 本機のEJECTキーを押してトレイを開きます。

2. リモコンのCLEARキーを押します。

3. リモコンの2、5、8、0キーを押します。

4. リモコンのAUDIOキーを押します。

回押します。

3秒間以上押し続けます。

常の表示に戻ります。

Remote control / リモコン

"STOP" key"EJECT" keyTr ay

• Canceling TRADE mode

1. With a disc set in the tray, while pressing the “SKIP+/ SEARCH+” key of the main unit and press the “STOP” key for 3 seconds or longer.

2. When the TRADE mode is cancelled, [TRADE OFF] is displayed which then returns to the normal display.

8

・トレードモードの解除

1. トレイにディスクがセットされている状態で、本機の SKIP+/SEARCH+キーを押しながら次にSTOPキー

を3秒間以上押し続けます。

2. トレードモードが解除され「TRADEOFF」と表示した後、

通常の表示に戻ります。

"PLAY/PAUSE" key

DVD-S1700

Solder

CN11

CN12

CN13

CX41

MAIN (1) P.C.B.

DVD mechanism unit

DVDメカユニット

■ DISASSEMBLY PROCEDURES/分解手順

(Remove parts in disassembly order as numbered.)

Disconnect the power cable from the AC outlet.

1. Removal of Top Cabinet

a. Remove 6 screws (1). (Fig. 1)

b. Lift up the rear side of the top cover, then remove rear-

ward. (Fig. 1)

DVD mechanism unit

DVDメカユニット

Tray lid

トレイリッド

3

5

Hook

フック

2

（番号順に部品を取り外してください。）

AC電源コンセントから、電源コードを抜いてください。

1. トップカバーの外し方

a.1のネジ6本を外します。（Fig.1） b. トップカバーの後ろを持ち上げ、後方へ取り外します。（Fig.1）

1

トップカバー

Top cover

e. Remove CN11, CN12 and CN13. (Fig. 2)

f. Lift up the rear side of the DVD mechanism unit, then

remove 2 hooks and remove rearward. (Fig. 1)

1

e. CN11、CN12、CN13を外します。（Fig.2） f. DVDメカユニットの後ろを持ち上げ、フック2箇所を外し、

後方へ取り外します。（Fig.1）

Fig. 2

4

5

Hook

Front panel ass'y

フロントパネルASS'Y

2. Removal of DVD Mechanism Unit

a. Eject the tray. (See “How to manually eject the tray”.)

フック

b. Remove the tray lid and close the tray. (Fig. 1)

c. Remove 2 screws (2). (Fig. 1)

d. Solder the lands in the P.C.B. of the DVD mechanism

unit with the anti-static soldering iron. (Fig. 2)

Note

• After you have finished repairing , connect the

flexible flat cable to CN11 in advance and then re-

move the solder from the short-circuit location

with the anti-static soldering iron.

1

Hook

フック

Front Front

Front panel ass'y

フロントパネルASS'Y

Front panel ass'y

フロントパネルASS'Y

DVD mechanism unit

DVDメカユニット

フック

Fig. 1

2. DVDメカユニットの外し方

a. トレイを開きます。（手動でトレイを開く方法を参照） b. トレイリッドを外し、トレイを閉じます。（Fig.1） c.2のネジ2本を外します。（Fig.1） d. DVDメカユニットの基板上の端子間を静電気対策はんだこて

を使用してショートします。（Fig.2）

注意・修理終了時は、先にカード電線をCN11に接続し、次に静電

気対策はんだこてを使用してショート箇所からはんだを除去します。

Hook

3. Removal of Front Panel Ass’y

a. Remove 3 screws (3) and 4 screws (4). (Fig. 1) b. Remove 2 screws (5). (Fig. 1)

c. Remove CX41. (Fig. 2)

d. Remove 2 hooks and then remove the front panel ass’y

3. フロントパネルASSYの外し方

a.3のネジ3本、4のネジ4本を外します。（Fig.1） b.5のネジ2本を外します。（Fig.1） c. CX41を外します。（Fig.2） d. フック2箇所を外し、フロントパネルASSYを前方へ取り外

forward. (Fig. 1)

• How to manually eject the tray / 手動でトレイを開く方法

a. Turn the unit bottom up. b. Turn the loading gear in the direction indicated with a

flatblade screwdriver until the tray is ejected.

c. Gently pull the tray out.

Flatblade screwdriver

マイナスドライバー

Tr ay

トレイ

a. 本機を上下反転します。 b. トレイが出てくるまで、マイナスドライバーでローディングギ

c. トレイをそっと引き出します。

します。（Fig.1）

アを図に示す矢印の方向に回転します。

Loading gear

ローディングギア

Tr ay

トレイ

9

DVD-S1700

■ DISPLAY DATA

● F401 : HCA14SM16 (AAX80850)

j1

PATTERN AREA

● PIN CONNECTION

Pin No.

Connection50F249F248NP47NP46NX45NX44NX43NX NX NX NX NX NX NX NX NX NX NX NX NX NX NX NX NX NX

Pin No.

Connection25NX

Note : 1) F1, F2 ..... Filament pin 2) NP ..... No pin 3) NC ..... No connection 4) NX ..... No extended pin

24NX23NX22NX21NX20NX19NX18NX17NX161G15NC14

● GRID ASSIGNMENT

42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26

12

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9

GR113V

12G13G14G

12345

678910

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10G11G

1G

DD

DIN

CLKB

CSB

RSTB8OSCO7OSCI

6

V

EE

5

GND

4NP3NP2F11

3G 2G4G5G6G7G8G9G

F1

● ANODE CONNECTION

GR14

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14G

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3G

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GR1

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31 32 33 34 35

(2G-14G)

MEMO

DVD-S1700

MEMO

DVD-S1700

11

DVD-S1700

■ IC DATA

IC11: ZR36778 (MAIN P.C.B.)

MPEG decoder

TRAY

SPINDLE

SLED

OPU

Disc loader

vvvvv

v

IR-RC

Receiver

SERVO

AFE

ADP DSP

Audio

ADC

DAC

Front Panel

Concentrator

MICROPROCESSOR

Vaddis

778

MCU

SPI/I2C/GPIO/DDC

PLL

VPU

v

8/16 Mbits

NOR

Flash

27 MHz

RESET

32/64/128

Mbits

SDRAM

RF amp

Servo amp

DVD-S1700

S/PDIF

Stereo

Mics

2 to 8

Speakers

TV

Monitor

12

1

2

3

4,5

6

7

8

9

10

11

12 13

14

15

16

17

18-19

20

21 22

23

24

25 26

27

28

29 30

31 32 33

34 35

36

37

38

Pin Functions Direction DescriptionNo.

SSCRXD

GPCI/O[17]

PM[15]

MEMCS[1]#

GPCI/O[18]

VDDP

MEMAD

[15,16]

SYSIND[1,0]

MEMAD[14]

GCLKSEL

MEMAD[13]

FCUIF[29]

MEMAD[12]

PLLCFGA

MEMDA[15]

FCUIF[28]

MEMAD[11]

PLLCFGP

MEMDA[7]

FCUIF[9]

GNDP

MEMAD[10]

FCUIF[20]

MEMDA[14]

FCUIF[27]

MEMAD[9]

FCUIF[19]

MEMDA[6]

FCUIF[8]

MEMAD[8]

FCUIF[18]

MEMDA[13,5]

FCUIF[26,7] MEMAD[20] MEMCS[2]#

GPCI/O[19]

VDDP

MEMDA[12]

FCUIF[25] MEMWR#

FCUIF[0]

MEMDA[4]

FCUIF[6]

VDDC

MEMDA[11]

FCUIF[24]

MEMDA[3]

FCUIF[5]

MEMAD[19]

PLLSEL

GNDC

MEMDA[10]

FCUIF[23]

MEMAD[18]

GNDP

MEMDA[2]

FCUIF[4]

MEMAD[17]

MEMDA[9]

FCUIF[22]

MEMAD[7]

FCUIF[17]

MEMDA[1]

FCUIF[3]

MEMAD[6]

I

SSC data input

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SW

O

Probe mux data output

O

PNVM/SRAM chip select (active low) output

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

S

3.3 V digital periphery power supply

O

PNVM/SRAM address bus outputs

I

General purpose system configuration indication input / Level sampled during RESET

O

PNVM/SRAM address bus output

I

GCLKPOUT or GCLKA function selection / Level sampled during RESET

O

PNVM/SRAM address bus output

O

Flash card interface unit output signal

O

PNVM/SRAM address bus output

I

Audio PLL configuration input / Level sampled during RESET / In normal operation the pin must be low during RESET

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signal

O

PNVM/SRAM address bus output

I

Process PLL configuration input / Level sampled during RESET / In normal operation the pin must be low during RESET

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signals

S

Digital periphery ground of 3.3 V supply

O

PNVM/SRAM address bus output

O

Flash card interface unit output signal

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signal

O

PNVM/SRAM address bus outputs

O

Flash card interface unit output signal

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signals

O

PNVM/SRAM address bus outputs

O

Flash card interface unit output signal

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signals

O

PNVM/SRAM address bus outputs

O

PNVM/SRAM chip select (active low) output

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

S

3.3 V digital periphery power supply

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signal

O

PNVM/SRAM write enable (active low) output

O

Flash card interface unit output signal

I/O

PNVM/SRAM bi-directional data bus

O

Flash card interface unit output signal

S

1.8 V digital core power supply

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signal

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signals

O

PNVM/SRAM address bus outputs

I

PLL frequency selection -108 MHz (low) or 135 MHz (high) / Level sampled during RESET

S

Digital core ground of 1.8 V supply

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signal

O

PNVM/SRAM address bus output

S

Digital periphery ground of 3.3 V supply

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signals

O

PNVM/SRAM address bus output

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signal

O

PNVM/SRAM address bus outputs

O

Flash card interface unit output signal

I/O

PNVM/SRAM bi-directional data bus

I/O

Flash card interface unit I/O signals

O

PNVM/SRAM address bus outputs

DVD-S1700

13

DVD-S1700

No.

39

40

41 42

43

44

45-46

47 48

49

50 51 52

53-57

58

59-61

62 63 64 65 66 67

DVD-S1700

68 69 70

71 72 73 74 75 76 77 78 79 80 81 82 83

84-86

87

88-90

91

14

Pin Functions Direction

FCUIF[16]

MEMDA[8]

FCUIF[21]

MEMAD[5]

FCUIF[15]

VDDP

MEMDA[0]

FCUIF[2]

MEMAD[4]

FCUIF[14]

MEMRD#

FCUIF[1]

MEMAD[3, 2]

FCUIF[13, 12]

MEMCS[0]#

MEMAD[1]

FCUIF[11]

BOOTSEL[2]

MEMAD[0]

FCUIF[10]

BOOTSEL[1]

GNDP

VDD-IP

VDDP

RAMADD

[4, 3, 5, 2, 6]

VDDP

RAMADD

[1, 7, 0]

GNDP

RAMADD[8]

VDDC

RAMADD[10]

GNDC

RAMADD[9]

VDDP

RAMADD[11]

RAMCS[0]#

RAMBA[1] RAMBA[0]

GNDP

RAMCS[1]#

RAMRAS# RAMCAS#

VDDP

RAMWE#

RAMDQM

GNDPCLK

PCLK

VDDPCLK

RAMDAT[8]

GNDP

RAMDAT

[7, 9, 6]

VDDP

RAMDAT

[10, 5, 11]

GNDP

O I/O I/O

O

S I/O

O I/O

O

O I/O

O

I

O

I

S

O

S

O

S

O

S

O

S

O

S

O

S

O

S

O

S

O

S I/O

S

Description

Flash card interface unit output signal PNVM/SRAM bi-directional data bus Flash card interface unit I/O signal PNVM/SRAM address bus outputs Flash card interface unit output signal

3.3 V digital periphery power supply PNVM/SRAM bi-directional data bus Flash card interface unit output signal PNVM/SRAM address bus outputs Flash card interface unit output signal PNVM/SRAM read enable (active low) output Flash card interface unit I/O signal PNVM/SRAM address bus outputs Flash card interface unit output signal PNVM/SRAM chip select (active low) output PNVM/SRAM address bus outputs Flash card interface unit output signals Microprocessor SW boot (and execute) source selection: (high, high) - For production testing; (high, low) - Flash+SRAM (for debug monitor); (low, high) - First debug UART (low, low) - Flash (low) or Level sampled during RESET PNVM/SRAM address bus outputs Flash card interface unit output signals Microprocessor SW boot (and execute) source selection: (high, high) - For production testing; (high, low) - Flash+SRAM (for debug monitor); (low, high) - First debug UART (low, low) - Flash (low) or Level sampled during RESET Digital periphery ground of 3.3 V supply

3.3 V periphery reference voltage

3.3 V digital periphery power supply SDRAM address bus output

Digital periphery ground of 3.3 V supply SDRAM address bus output

1.8 V digital core power supply SDRAM address bus output Digital core ground of 1.8 V supply SDRAM address bus output

3.3 V digital periphery power supply SDRAM address bus output SDRAM chip select (active low) SDRAM bank select output SDRAM bank select output Digital periphery ground of 3.3 V supply SDRAM chip select (active low) output SDRAM row select (active low) output SDRAM column select (active low) output

3.3 V digital periphery power supply SDRAM write enable (active low) output SDRAM data masking (active high) output Digital ground of filtered 3.3 V supply for PCLK SDRAM clock output (same as internal processing clock)

3.3 V filtered digital power supply for PCLK SDRAM bi-directional data bus Digital periphery ground of 3.3 V supply SDRAM bi-directional data bus

3.3 V digital periphery power supply SDRAM bi-directional data bus

Digital periphery ground of 3.3 V supply

92 93 94 95 96 97

98-100

101

102-104

105 106

107 108

109

110

111

112

113

114

115 116

117 118 119 120

121 122

123 124

125 126

Pin Functions Direction DescriptionNo.

RAMDAT[4]

VDDC

RAMDAT[12]

GNDC

RAMDAT[3]

VDDP

RAMDAT

[13, 2, 14]

GNDP

RAMDAT

[1, 15, 0]

VDDP

GPCI/O[20]

CPUNMI

SDATA[0]

PM[0]

GNDP

ICGPCI/O[0]

AOUT[3]

SDATA[1]

PM[1]

IDGPCI/O[0]

RAMCKE

SDATA[2]

PM[2]

S/PDIFOUT

SDATA[3]

PM[3]

AOUT[2]

GPCI/O[21]

SDATA[4]

PM[4]

AOUT[1]

GPCI/O[22]

PM[5]

AOUT[0]

SDATA[6]

PM[6]

GPAI/O

AOUT[3]

IDGPCI/O[0]

PM[7]

ALRCLK

ABCLK

GNDP-A2

AMCLK

VDDP-A2

AIN

GPCI/O[23]

PM[8]

GNDC

VSYNC#

HDFI

GPI/O[24]

DACTEST[9]

PM[9]

VDDC

HSYNC#

HDHS

GPCI/O[25]

GNDP

VCLKx2

I/O

SDRAM bi-directional data bus

S

1.8 V digital core power supply

I/O

SDRAM bi-directional data bus

S

Digital core ground of 1.8 V supply

I/O

SDRAM bi-directional data bus

S

3.3 V digital periphery power supply

I/O

SDRAM bi-directional data bus

S

Digital periphery ground of 3.3 V supply

I/O

SDRAM bi-directional data bus

S

3.3 V digital periphery power supply

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I

Microprocessor non-maskable interrupt input

I

SERVO channel sample data input for AFE by-pass

O

Probe mux data output

S

Digital periphery ground of 3.3 V supply

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the microprocessor

O

Serial output of digital stereo audio

I

SERVO channel sample data input for AFE by-pass

O

Probe mux data output

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the DSP

O

Clock enable signal to the SDRAM (for power down)

I

SERVO channel sample data input for AFE by-pass

O

Probe mux data output

O

S/PDIF transmitter output for digital coded or reconstructed audio data

I

SERVO channel sample data input for AFE by-pass

O

Probe mux data output

O

Serial outputs of digital stereo audio

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I

SERVO channel sample data inputs for AFE by-pass

O

Probe mux data outputs

O

Serial output of digital stereo audio

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

Probe mux data outputs

O

Serial output of digital stereo audio

I

SERVO channel sample data input for AFE by-pass

O

Probe mux data outputs

I/O

General purpose I/O, monitored/controlled by the ADP SW

O

Serial output of digital stereo audio

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the DSP

O

Probe mux data output

O

Digital audio left/right select output for the audio port / Square wave, at the sampling frequency / Programmable polarity

O

Digital audio bit-clock output / Data on AOUT and AIN is output or latched, respectively, with the rising or falling (programmable) edge of this clock

S

Digital ground filtered 3.3 V supply for AMCLK

I/O

Audio master clock I/O / 128, 192, 256 or 384 times the sampling frequency (programmable)

S

3.3 V filtered digital power supply for AMCLK

I

Serial input of digital stereo audio

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

Probe mux data output

S

Digital core ground of 1.8 V supply

O

SD digital video vertical sync output signal

I

HD digital video field index input signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I

DACs test input

O

Probe mux data output

S

1.8 V digital core power supply

O

SD digital video horizontal sync output signal

I

HD digital video horizontal sync input signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

S

Digital periphery ground of 3.3 V supply

O

Digital video clock output / 27,000 (for SD interlaced), 54,000 (SD progressive) or 135,000 (for HD) MHz

DVD-S1700

15

DVD-S1700

127 128

129

130

131 132

133

134

135 136

137

138 139 140 141 142

143 144

145 146

147

DVD-S1700

148

149

150

151 152

153

154 155

156

157 158

159

16

Pin Functions Direction DescriptionNo.

COSYNC

ICGPCI/O[1]

VDDP VID[7]

GPCI/O[26]

VID[6]

ICGPCI/O[2]

VID[5]

IDGPCI[1]

GNDP VID[4]

GPCI/O[27]

VID[3]

GPCI/O[28]

SERVOCLK

VID[2]

GPCI/O[29]

SSEL[0]

VDDP VID[1]

GPCI/O[30]

SSEL[1]

VID[0]

ICGPCI/O[3]

GNDP GNDA

RESET#

VDDA

XO

GCLKP GCLKA

GPCI/O[31]

GCLKPOUT

VDDP

ICGPCI/O[4]

S/PDIFIN[0]

GPCI/O[33]

ICGPCI/O[5]

S/PDIFIN[1]

GPCI/O[34]

IDGPCI/O[3]

FCUIF[33]

GNDP

DUPRD0

GPCI/O[35]

DUPTD0

GPCI/O[36]

VDD-IP

DUPRD1

GPCI/O[37]

DUPTD1 GPCI/O[38] GNDDACD

CVBS/G/Y

(DAC A)

CVBS/C

(DAC D)

O

Composite sync output / Active only when component analog output is selected

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the microprocessor

S

3.3 V digital periphery power supply

O

Digital 4: 2: 2 video luma/chroma output, interleaved U, Y V Y

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

Digital 4: 2: 2 video luma/chroma output, interleaved U, Y V Y

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the microprocessor

O

Digital 4: 2: 2 video luma/chroma output, interleaved U, Y V Y

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the DSP

S

Digital periphery ground of 3.3 V supply

O

Digital 4: 2: 2 video luma/chroma output, interleaved U, Y V Y

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

Digital 4: 2: 2 video luma/chroma output, interleaved U, Y V Y

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

SERVO channel clock output for AFE by-pass

O

Digital 4: 2: 2 video luma/chroma output, interleaved U, Y V Y

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

SERVO channel select output for AFE by-pass

S

3.3 V digital periphery power supply

O

Digital 4: 2: 2 video luma/chroma output, interleaved U, Y V Y

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

SERVO channel output for AFE by-pass

O

Digital 4: 2: 2 video luma/chroma output, interleaved U, Y V Y

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the microprocessor

S

Digital periphery ground of 3.3 V supply

S

Ground plane of internal PLL circuit

ID

Reset input (active low)

S

1.8 V power supply for internal PLL circuit

AO

Output to a crystal that is connected to GCLKP If a crystal is not used at GCLKP, XO must be left not connected.

ID

27.000MHz clock or crystal input for main processing clock generation.

ID

27.000MHz clock input for audio master clock generation.

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

GCLKP output

S

3.3 V digital periphery power supply

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the microprocessor

I

S/PDIF receiver input for digital coded or reconstructed audio data

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the microprocessor

I

S/PDIF receiver input for digital coded or reconstructed audio data

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the DSP

I

Flash card interface unit input signal

S

Digital periphery ground of 3.3 V supply

I

First debug UART data input

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

First debug UART data output

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

S

3.3 V periphery reference voltage

I

Second debug UART data output

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

Second debug UART data output

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

S

Ground for the video DACs 3.3 V analog power supply

AO

When the Vaddis 778 outputs composite (SCART or non-SCART) video, this line is CVBS output When the Vaddis 778 outputs RGB, this line is the Green output When the Vaddis 778 outputs YUV, this line is the Y output

AO

When the other Vaddis 778 output are not SCART video, the output on this line can be either CVBS or C / the selection is independent of the specific selection of the other three DACs

160 161

162

163 164 165 166 167 168 169 170 171 172

173

174 175 176

177 178-183 184,185

186

187

188

189

190

191

192

193

194

195

196

197

198

Pin Functions Direction DescriptionNo.

VDDDAC

Y/R/V

(DAC B)

C/B/U

(DAC C)

RSET

GNDDACP GNDDABS2 GNDDACPS

DACDRIVE[0]

VDDDACS

DACDRIVE[1]

GNDDACDS

VDDAFERF

RFINP

RFINN

GNDAFERF

VDDAFES

ADCIN[7] ADCIN[6]

ADCIN[5-0]

VBIASS[0, 1]

GNDAFES PWMACT[0]

GPCI/O[39] DVDDAT[0]

NRZDATA PWMACT[1]

GPCI/O[40] DVDDAT[1]

NRZCLK PWMCO[0] GPCI/O[41] DVDDAT[2]

NRZLOCK

GNDC PWMCO[1] GPCI/O[42] DVDDAT[3]

NRZDFCT

VDDC PWMCO[2] GPCI/O[43]

FCUIF[34] DVDDAT[4] PWMCO[3]

GPCI[44]

FCUIF[35]

IDGPCI/O[2]

DVDDAT[5]

GNDPWMS

PWMCO[4] GPCI/O[45] DVDDAT[6]

VDDPWMS

PWMCO[5] GPCI/O[46]

FCUIF[36] DVDDAT[7]

When the Vaddis 778 outputs composite SCART video, this line is the Y output

S

3.3 V analog power supply for the video DACs

AO

When the Vaddis 778 outputs composite non-SCART video, this line is Y output When the Vaddis 778 output RGB, this line is the Red output When the Vaddis 778 outputs YUV, this line is the V output When the Vaddis 778 outputs composite SCART video, this line is the C output

AO

When the Vaddis 778 outputs composite (SCART or non-SCART) video, this line is C output When the Vaddis 778 outputs RGB, this line is the Blue output When the Vaddis 778 outputs YUV, this line is the U output

AI

Resistive load for gain adjustment of the DACs

S

Ground for the video DACs 3.3 V analog power supply

S

Common ground for the video and SERVO DACs

S

Ground for the SERVO DAC 3.3 V analog power

AO

Drive DACs output signal

S

3.3 V SERVO DACs power supply

AO

Drive DACs output signal

S

Ground for the SERVO DAC 3.3 V analog power supply

S

3.3 V analog RF (AFE) power supply

AI

RF positive input signal (differential input) // RF input signal (single ended)

AI

RF negative input signal (differential input) // RF reference input signal

S

Analog RF (AFE) ground of 3.3 V supply

S

3.3 V analog SERVO (AFE) power supply

AI

SERVO ADC input signal (e.g. from RF amplifier)

AI

SERVO ADC input signal from RF amplifier

AI

SERVO ADC input signal (e.g. from RF amplifier)

AI

Servo analog signal reference voltage inputs

S

Analog SERVO (AFE) ground of 3.3 V supply

O

PWM0 output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SW

I

AV data input for FE by-pass

I

NRZ data input for AFE and DRC by-pass

O

PWM1 output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SW

I

AV data input for FE by-pass

I

NRZ clock input for AFE and DRC by-pass

O

PWM2 output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I

AV data input for FE by-pass

I

NRZ lock input for AFE and DRC by-pass

S

Digital core ground of 1.8 V supply

O

PWM3 output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I

AV data input for FE by-pass

I

NRZ defect input for AFE and DRC by-pass

S

1.8 V digital core power supply

O

PWM4 output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

O

Flash card interface unit input signal

I

AV data input for FE by-pass

O

PWM5 output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I/O

Flash card interface unit I/O signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the DSP

I

AV data input for FE by-pass

S

SERVO PWMs ground of 3.3 V supply

O

PWM6 output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I

AV data input for FE by-pass

S

3.3 V SERVO PWM power supply

O

PWM7 output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

I/O

Flash card interface unit I/O signal

I

AV data input for FE by-pass

DVD-S1700

17

DVD-S1700

Pin Functions Direction DescriptionNo.

199

200

201

202 203

204 205

SLEDPULSE

206

SPIND LEPULSE

207

208

PWMCO[6]

IDGPCI/O[4]

FCUIF[32]

DVDSTRB

RFDAT[4]

DEFFCT

IDGPCI/O[5]

FCUIF[37]

DVDREQ

ICGPI/O[6]

DVDVALID

GNDP

ICGPI/O[7]

DVDERR

VDDP

IDGPCI/O[6]

FCUIF[30]

DVDSOS

IDGPCI/O[7]

FCUIF[31]

SSCCLK

GPCI/O[47]

SSCTXD

GPCI/O[16]

O

PMW8 output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the DSP

I/O

Flash card interface unit I/O signal

I

AV data input for FE by-pass

I

RF channel sample data inputs for AFE by-pass

I/O

Disc defect input or output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the DSP

I/O

Flash card interface unit I/O signal

O

AV data request output for FE by-pass / Programmable polarity

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SW When input, the pin can be used as general purpose external interrupt to the microprocessor

I

AV data valid input for FE by-pass / Programmable polarity

S

Digital periphery ground of 3.3 V supply

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SW When input, the pin can be used as general purpose external interrupt to the microprocessor

I

AV error input for FE by-pass / Programmable polarity

S

3.3 V digital periphery power supply

I

Sled optical encoder input

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the DSP

I

Flash card interface unit output signal

I

AV start of sector indication input for FE by-pass / Programmable polarity

I

Spindle optical encoder input

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW When input, the pin can be used as general purpose external interrupt to the DSP

I/O

Flash card interface unit I/O signal

I/O

SSC clock input signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SW

O

SSC data output signal

I/O

General purpose I/O, monitored/controlled by the microprocessor or DSP SW

DVD-S1700

18

IC20: SAA7893HLC2 (MAIN P.C.B.)

DSD decoder

DVD-S1700

to host

host_sel

FRONT-

END

INTERFACE

HF

data-bus

H_DQ[15] H_DQ[14] GND_IO1 H_DQ[13] H_DQ[12] H_DQ[11] H_DQ[10]

VCC_IO1

GND_IO2 H_procclock VCC_Core1 GND_Core1

PCM_dclk_in

PCM_wclk_in

VCC_IO7

GND_IO7

H_A[1]

H_DQ[9]

H_DQ[8] H_DQ[7] H_DQ[6] H_DQ[5] H_DQ[4] H_DQ[3]

sys_clk H_DQ[2] H_DQ[1]

H_CSn H_DQ[0]

H_RWn

H_WAIT

H_IRQn

aud_clk

VDDA

VSSA

biasin Agcinp Adcrefl

ADCAGC

PSP-KEY

DECODER

DECRYPTION/

SECTOR

PROCESSOR

PI-BUS

CONTROL

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

HOST

controlkey

H_A[2]

128

INTERFACE

H_A[3]

H_A[4]

127

126

SDRAM

to 64 Mbit

SDRAM

H_A[5]

H_A[6]

125

124

PI-bus

H_A_sel

123

MEMORY

MANAGER

DEMUX

SACD

AUDIO

INTERFACE

27-35 MHz

RESETn

DSD_PCM_11

DSD_PCM_9

122

121

120

sys_clk

DSD_PCM_10

VCC_IO6

DSD_PCM_8

119

118

117

REGISTER

HOST

INTERFACE

2, 5 or 6-channel

LOSSLESS

DECODER

aud_clk

256/384/512/768*fs

DSD_PCM_7

DSD_PCM_6

DSD_PCM_5

116

115

114

SPEAKER SETUP

VOLUME CONTROL

DSD_PCM_4

GND_IO6

DSD_PCM_3

DSD_PCM_2

111

113

112

110

8-CHANNEL

DSD2PCM

CONVERSION

DELAY

DSD_PCM_1

DSD_PCM_0

D_DQ[15]

109

108

107

106

external PCM

VCC_IO5

SAA7893HL

39404142434445464748495051525354555657585960616263

TDI

TDO

VCC_IO2

TCK

PCM_LeRi_in

PCM_CeLf_in

PCM_LsRs_in

B_FLAG/SERR

B_SYNC/Sync

B_WCLK/SENB

B_BCLK/SDCLK

B_DATA/Be_dat(0)

UDE_req

Data_req

Be_dat(1)

Be_dat(2)

Be_dat(3)

Be_dat(4)

Be_dat(5)

TRST

Be_dat(6)

Be_dat(7)

TMS

SAA7893HL

D_DQ[0]

D_DQ[14]

D_DQ[1]

105

104

103

64

H_sel[0]

H_sel[1]

D_ADDR[3]

102

101

100

99

98

97

96

95

94

93

92

91

90

89

88

87

86

85

84

83

82

81

80

79

78

77

76

75

74

73

72

71

70

69

68

67

66

65

SWITCH MATRIX

D_DQ[13] D_DQ[2] D_DQ[12] GND_IO5 D_DQ[3] D_DQ[11] D_DQ[4] D_DQ[10] D_DQ[9] D_DQ[6] VCC_IO4 D_DQ[8] D_DQ[7] D_LDQM D_UDQM D_DQ[5] D_clk VCC_Core2 GND_Core2 GND_IO4 D_CASn D_RASn D_Wen D_ADDR[11] D_ADDR[12] D_ADDR[9] VCC_IO3 D_ADDR[13] D_ADDR[8] D_ADDR[10] D_ADDR[7] D_ADDR[0] D_ADDR[6] GND_IO3 D_ADDR[1] D_ADDR[5] D_ADDR[2] D_ADDR[4]

MBL615

to DSD/PCM DAC

DVD-S1700

19

DVD-S1700

Pin.

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33

34 35 36 37 38 39 40 41 42 43 44

45

B_DATA/Be_dat(0)

46

B_BCLK/SDCLK

DVD-S1700

47

48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

63

Symbol

H_A[1] H_DQ[15] H_DQ[14] GND_IO1 H_DQ[13] H_DQ[12] H_DQ[11] H_DQ[10]

H_DQ[9]

VCC_IO1

H_DQ[8] H_DQ[7] H_DQ[6] H_DQ[5] H_DQ[4] H_DQ[3]

GND_IO2

H_procclock

VCC_Core1

GND_Core1

sys_clk H_DQ[2] H_DQ[1]

H_CSn H_DQ[0]

H_RWn H_WAIT

H_IRQn aud_clk

PCM_dclk_in

PCM_wclk_in

VDDA VSSA

biasin Agcinp Adcrefl

VCC_IO7

GND_IO7 PCM_CeLf_in PCM_LeRi_in

PCM_LsRs_in

B_FLAG/SERR

B_SYNC/Sync

B_WCLK/SENB

UDE_req

Data_req Be_dat(1) Be_dat(2) Be_dat(3) Be_dat(4) Be_dat(5) Be_dat(6) Be_dat(7)

TRST

TMS

VCC_IO2

TDO

TDI

TCK

H_sel[0]

H_sel[1]

[1]

Type

IN I/O10 I/O10

GND_IO

I/O10 I/O10 I/O10 I/O10 I/O10

VCC_IO1

I/O10 I/O10 I/O10 I/O10 I/O10 I/O10

GND_IO

IN

VCC_core GND_core

IN I/O10 I/O10

IN I/O10

IN

O10 O10

IN

VDDCO VSSCO

APIO APIO APIO

VCC_IO GND_IO

IN

O10

IN

IN1 IN1

VCC_IO

O10

IN1

IN

Description

Address bus Data bus Data bus GND I/O pads Data bus Data bus Data bus Data bus Data bus Vcc_I/O pads Data bus Data bus Data bus Data bus Data bus Data bus GND I/O pads Host processor EMI interface clock Core supply voltage Core ground System clock Data bus Data bus Host chip select; active LOW Data bus Read = 1; Write = 0 Wait signal Interrupt request; active LOW DSD audio clock PCM data clock PCM word clock VDD of ADC VSS of AGC and ADC; Connected to substrate Bias current input AGC positive input signal; HF in ADC decoupling VCC I/O pads GND I/O pads PCM data center or LFE PCM data left or right PCM data left or right surround I2S-bus flag (EDC flag) Sector sync or absolute time sync I2S-bus word clock or UDE data sense from host I2S-bus data or LSB data of parallel interface I2S-bus bit clock Host request data from front-end; routed via the SAA7893HL Data request for UDE Front-end parallel data interface Front-end parallel data interface Front-end parallel data interface Front-end parallel data interface Front-end parallel data interface Front-end parallel data interface Front-end parallel data interface Boundary scan reset Boundary scan mode select VCC I/O pads Output Boundary scan data input Boundary scan clock Host select signals: SAD16, MAD16 and SAD08 Host select signals: SAD16, MAD16 and SAD08

64

D_ADDR[3]

65

D_ADDR[4]

66

D_ADDR[2]

67

D_ADDR[5]

68

D_ADDR[1]

69

GND_IO3

70

D_ADDR[6]

71

D_ADDR[0]

72

D_ADDR[7]

73

D_ADDR[10]

74

D_ADDR[8]

75

D_ADDR[13]

76

VCC_IO3

77

D_ADDR[9]

78

D_ADDR[12]

79

D_ADDR[11] 80 81 82 83

GND_IO4

84

GND_Core2

85

VCC_Core2 86 87 88

D_UDQM

89

D_LDQM 90 91 92

VCC_IO4 93 94 95

D_DQ[10] 96 97

D_DQ[11] 98 99

GND_IO5

100

D_DQ[12]

101 102

D_DQ[13]

103 104

D_DQ[14]

105 106

VCC_IO5

107

D_DQ[15]

108

DSD_PCM_0

109

DSD_PCM_1

110

DSD_PCM_2

111

DSD_PCM_3

112

GND_IO6

113

DSD_PCM_4

114

DSD_PCM_5

115

DSD_PCM_6

116

DSD_PCM_7

117

DSD_PCM_8

118

VCC_IO6

119

DSD_PCM_10

120

DSD_PCM_9

121

DSD_PCM_11 122 123 124 125 126 127 128

Symbol Description

D_Wen D_RASn D_CASn

D_clk

D_DQ[5]

D_DQ[7] D_DQ[8]

D_DQ[6] D_DQ[9]

D_DQ[4]

D_DQ[3]

D_DQ[2]

D_DQ[1]

D_DQ[0]

RESETn H_A_sel

H_A[6] H_A[5] H_A[4] H_A[3] H_A[2]

Type[1]

O10 O10 O10 O10 O10

GND_IO

O10 O10 O10 O10 O10 O10

VCC_IO

O10 O10 O10 O10 O10 O10

GND_IO GND_core VCC_core

O10

I/O10

O10

O10 I/O10 I/O10

VCC_IO

I/O10 I/O10 I/O10 I/O10 I/O10 I/O10

GND_IO

I/O10 I/O10 I/O10 I/O10 I/O10 I/O10

VCC_IO

I/O10

O10

GND_IO

O10

VCC_IO

O10

IN IN IN IN IN IN IN

SDRAM address bus SDRAM address bus SDRAM address bus SDRAM address bus SDRAM address bus GND I/O pads SDRAM address bus SDRAM address bus SDRAM address bus SDRAM address bus SDRAM address bus SDRAM address bus Vcc I/O pads SDRAM address bus SDRAM address bus SDRAM address bus Read or write Row address select; active LOW Column address select; active LOW GND I/O pads Core ground Core supply voltage Clock signal needed for SDRAM Data bus DQ mask enable (upper) DQ mask enable (lower) Data bus Data bus Vcc I/O pads Data bus Data bus Data bus Data bus Data bus Data bus GND I/O pads Data bus Data bus Data bus Data bus Data bus Data bus Vcc_IO pads Data bus 6-channel data output 6-channel data output 6-channel data output 6-channel data output GND I/O pads 6-channel data output 6-channel data output 6-channel data output 6-channel data output 2-channel data output VCC I/O pads 2-channel data output 2-channel clock or control 2-channel data output Asynchronous reset; active LOW Address select Address bus Address bus Address bus Address bus Address bus

20

IC41: ST72F321R (MAIN P.C.B.)

Microprocessor

* No replacement part available.

サービス部品供給なし

DVD-S1700

Device Block Diagram

RESET

V

TLI

V

SS

V

DD

EVD

OSC1 OSC2

PF7:0

(8-bits)

PE7:0 (8-bits)

PD7:0

(8-bits)

V

AREF

V

SSA

8-BIT CORE

ALU

PP

CONTROL

PROGRAM

MEMORY

(16K - 60K Bytes)

RAM

(512 - 2048 Bytes)

LVD

AVD

OSC

MCC/RTC/BEEP

ADDRESS AND DATA BUS

WATCHDOG

I2C

PA7:0

(8-bits)

PORT A

PORT F

TIMER A

BEEP

PORT E

SCI

PORT B

PWM ART

PORT C

TIMER B

SPI

PB7:0

(8-bits)

PC7:0

(8-bits)

PORT D

10-BIT ADC

(HS) PE4 (HS) PE5 (HS) PE6

(HS) PE7 PWM3 / PB0 PWM2 / PB1 PWM1 / PB2

PWM0 /PB3

ARTCLK /(HS) PB4

ARTIC1 / PB5 ARTIC2 / PB6

PB7 AIN0 / PD0 AIN1 / PD1 AIN2 / PD2 AIN3 / PD3

PE3

PE2

PE1 / RDI

ei2

ei3

AIN4 / PD4

AIN5 / PD5

AIN6 / PD6

_2

DD

OSC1

OSC2

PE0 / TDO

V

ST72F321R

TOP VIEW

_3

SSA

AREF

V

DD

V

AIN7 / PD7

_2

SS

TLI

V

ei1

_3

SS

V

MCO / AIN8 / PF0

/ ICCSEL

PP

EVD

RESET

V

(HS) PF2

BEEP / (HS) PF1

OCMP2_A / AIN9 / PF3

PA7 (HS) / SCLI

PA6 (HS) / SDAI

PA5 (HS)

PA4 (HS)

ei0

ICAP1_A / (HS) PF6

EXTCLK_A / (HS) PF7

ICAP2_A / AIN11 / PF5

OCMP1_A / AIN10 / PF4

V

SS

_1

V

DD

_1 PA3 (HS) PA2 PA1 PA0 PC7 / SS / AIN15 PC6 / SCK / ICCCLK PC5 / MOSI / AIN14 PC4 / MISO / ICCDATA PC3 (HS) / ICAP1_B PC2 (HS) / ICAP2_B PC1 / OCMP1_B / AIN13 PC0 / OCMP2_B / AIN12 V

SS_0

VDD_

0

DVD-S1700

21

DVD-S1700

Pin no.

TQFP64

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

42 43

DVD-S1700

44 45 46 47 48 49 50 51 52 53

54 55 56 57 58 59 60 61 62 63 64

Pin Name

TQFP44

-

RS-232C_RTS

-

RS-232C_CTS

-

VFD_RESET

-

N.C.

2

REMOTE_IN/OUT

3

N.C.

4

N.C.

5

GND

6

GND

-

HDMI_DET.

-

HDMI_INT.

-

N.C.

7

KEY#1

8

KEY#2

9

N.C.

10

N.C.

11

PWR_CTL

12

A_MUTE

-

AVMUTE

-

INT/EXT_SEL

13

VAREF

14

VSSA

-

VDD_3

-

VSS_3

15

REMOTE/BUS_IN

16

REMOTE_OUT

17

N.C.

-

HDMI_RESET

18

FL_OFF_LED

-

HDMI_ON_LED

19

HDMI_LINK_LED

20

N.C.

21

VDD_0

22

VSS_0

23

N.C.

24

N.C.

25

N.C.

26

N.C.

27

DSP&DAC_IN

28

DSP&DAC_OUT

29

ICCCLK

30

-

DSP_FINTREQ.

-

PMCLK&DMCLK_SEL

-

MREQ

31

KEY W/U

32

MRESET

33

VDD_1

34

VSS_1

35

F_REQ

36

GND

37

I2C_DATA

38

I2C_CLK

39

RS232(+12V)

-

RESET

-

N.C.

40

N.C.

41

VSS_2

42

OSC2

43

OSC1

44

VDD_2

1

RS-232C_TX

-

RS-232C_RX

-

GND

-

N.C.

/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O

S S

S I/O I/O I/O I/O I/O I/O I/O I/O

S

S I/O I/O I/O I/O I/O I/O I/O

I/O I/O I/O I/O I/O

S

S I/O I/O I/O I/O

I/O

S I/O

S I/O I/O I/O I/O

Type

I

Level

Input

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

T

C

Output

HS HS HS HS

HS

HS HS

HS

HS HS HS HS

Port

Input Output

int

wpu

float

X

ei2

X

ei2

X

ei2 X X X X X X X X X X X X X

X X X X X X X X

X X X X X X X

X X X X X

X X

ei2 ei3 ei3 ei3

ei3

X X X X X X X X

ei1 ei1

ei1

X X X X X

X X X X X X X

X

ei0 ei0 ei0

ei0

X

X X X

X

X X

X

X X

X

X X X X X X X X

X

X X X

X X

X

ana

Main function (

afterreset

)

PP

OD

X

X X X X X X X X X X X X X X X X X X X X

Port E4 Port E5 Port E6 Port E7 Port B0 Port B1 Port B2 Port B3 Port B4 Port B5 Port B6 Port B7 Port D0 Port D1 Port D2 Port D3 Port D4 Port D5 Port D6 Port D7

PWM output 3 PWM output 2 PWM output 1 PWM output 0 PWM-ART external clock PWM-ART input capture 1 PWM-ART input capture 2

ADC analog input 0 ADC analog input 1 ADC analog input 2 ADC analog input 3 ADC analog input 4 ADC analog input 5 ADC analog input 6 ADC analog input 7

X X X X X X X X X X X X X X X X X X X

Alternate function

Analog reference voltage for ADC Analog ground voltage Digital main supply voltage Digital ground voltage

X

Port F0 X X X X X X X

Port F1

Port F2

Port F3

Port F4

Port F5

Port F6

Port F7

X X X X X X

Main clock out (fOSC/2)

ADC analog input 8

Beep signal output

Timer A output compare 2 Timer A output compare 1 Timer A input capture 2

ADC analog input 9 ADC analog input 10

ADC analog input 11 Timer A input capture 1 Timer A external clock source

Digital main supply voltage Digital ground voltage

X

Port C0 X X X X X X

X X X X X

Port C1

Port C2

Port C3

Port C4

Port C5

Port C6

Port C7

Port A0

Port A1

Port A2

Port A3

X X X X X

Timer B output compare 2 Timer B output compare 1

ADC analog input 12

ADC analog input 13 Timer B input capture 2 Timer B input capture 1 SPI master in/slave out data SPI master out/slave in data SPI serial clock

SPI slave select (active low)

ICC data input

ADC analog input 14

ICC clock output

ADC analog input 15

Digital main supply voltage Digital ground voltage

X

X X

Port A4 Port A5 Port A6 Port A7

I2C data I2C clock

1)

X T T

Must be tied low. In flash programming mode, this pin acts as the programming voltage input VPP. See section 12.9.2 for more details. High voltage must not be applied to ROM devices. Top priority non maskable interrupt External voltage detector Top level interrupt input pin Digital ground voltage Resonator oscillator inverter output External clock input or resonator oscillator inverter input Digital main supply voltage

X

Port E0

X

Port E1

SCI transmit data out SCI receive data in

Port E2

X

Port E3

22

IC51: ADV7320KSTZ (MAIN P.C.B.)

Video encoder

DVD-S1700

HD PIXEL

INPUT

CLKIN_B

P_HSYNC P_VSYNC P_BLANK

S_HSYNC S_VSYNC S_BLANK

CLKIN_A

SD PIXEL

INPUT

DEINTERLEAVE

DEINTERLEA VE

CR

CB

CR

Y

TEST

PATTERN

GENERATOR

TEST

PATTERN

Y9–Y0 C9–C0 S9–S0

HSYNC VSYNC BLANK

CLKIN_A CLKIN_B

SHARPNESS

TIMING

GAMMA

STANDARD DEFINITION

CONTROL BLOCK

COLOR CONTROL

BRIGHTNESS

PROGRAMMABLE

SD TEST PATTERN

D E M U X

TIMING

GENERATOR

PLL

PROGRAMMABLE

RGB MATRIX

HIGH DEFINITION

CONTROL BLOCK

HD TEST PATTERN

COLOR CONTROL

ADAPTIVE FILTER CTRL

SHARPNESS FILTER

Simplified Functional Block Diagram

AND

ADAPTIVE

FILTER

CONTROL

DNR

Y COLOR CR COLOR CB COLOR

COLOR

CONTROL

CLOCK

CONTROL

AND PLL

SYNC

INSERTION

Detailed Functional Block Diagram

DNR

GAMMA

FILTERS

4:2:2

TO

4:4:4

U

UV SSAF

V

LUMA

AND

CHROMA

FILTERS

ADV7320/ ADV7321

12-BIT

DAC

12-BIT

O

DAC

V E R

12-BIT

S

DAC

A

M

12-BIT

P

DAC

L

I

N

12-BIT

G

DAC

12-BIT

DAC

I2C

INTERFACE

2 uOVER-

SAMPL ING

RGB

MATRIX

05067-001

F

MODU-

LATION

DAC

PS 8 u

HDTV 2u

DAC

SD 16 u

DAC

SC

CGMS

WSS

DAC

05067-002

DVD-S1700

VDD_

DGND

GND_IO

CLKIN_BS9S8S7S6S5DGND

IO

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

DD

V

Y8

Y9

C0

C1

C2

ADV7320/ADV7321

(Not to Scale)

C

2

C3

C4

I

SDA

ALSB

TOP VIEW

SCLK

P_VSYNC

P_HSYNC

VDDS4S3S2S1S0

C5C6C7C8C9

P_BLANK

S_HSYNC

S_VSYNC

CLKIN_A

RTC_SCR_TR

S_BLANK

SET1

R

V

REF

COMP1

DAC A

DAC B

DAC C

AA

V

AGND

DAC D

DAC E

DAC F

COMP2

SET2

R

EXT_LF

RESET

23

DVD-S1700

Pin No

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

DVD-S1700

23

24

25

26

27

28

29

30

31

32

33

34

Mnemonic

VDD_IO

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

VDD

DGND

Y8

Y9

C0

C1

C2

C3

C4

XSPI/I2C

ALSB_SO

SDA_CLKSP

SCLK_SI

XP_HSYNC

XP_VSYNC

P_BLANK

C5

C6

C7

C8

C9

RTC_SCR_TR

CLKIN_A

RESET

EXT_LF

Input/Output

P

I

P

G

I

I/O

I

Description

Power supply for digital inputs and outputs.

SD or progressive scan/HDTV input port for Y data. Input port for interleaved progressive scan

data. The LSB is set up on pin Y0. For 8-bit data input, LSB is set up on Y2.