White Electronic Designs WE512K16-150G4I, WE512K16-150G4CA, WE512K16-150G4C, WE512K16-140G4QA, WE512K16-140G4Q Datasheet

512Kx16 CMOS EEPROM MODULE

FEATURES

■ Access Time of 140, 150, 200ns

■ Packaging:

• 68 lead, 40mm Hermetic CQFP (Package 501)

■ Organized as 4 banks of 128Kx16

■ Write Endurance 10,000 Cycles

■ Data Retention Ten Years Minimum

■ Military Temperature Range

■ Low Power CMOS

FIG. 1 PIN CONFIGURATION

TOP VIEW

CC

60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44

I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O

GND

I/O

I/O
I/O
I/O
I/O
I/O
I/O
I/O

NC

A0A1A2A3A4A5CS1GNDCS3WE

9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61

0

10

1

11

2

12

3

13

4

14

5

15

6

16

7

17
18

8

19

9

20

10

21

11

22

12

23

13

24

14

25

15

26

27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43

2

CC

A11A12A13A14A15A

V

16

CS

4

OE

CS

A6A7A8A9A10V

NC

NC

NCNCNCNCNC

WE512K16-XG4X

HI-RELIABILITY PRODUCT

■ Automatic Page Write Operation

■ Page Write Cycle Time: 10ms Max

■ Data Polling for End of Write Detection

■ Hardware and Software Data Protection

■ TTL Compatible Inputs and Outputs

■ 5 Volt Power Supply

■ 8 Built-in Decoupling Caps and Multiple Ground Pins for Low

Noise Operation

■ Weight - 20 grams typical

PIN DESCRIPTION

I/O0-15 Data Inputs/Outputs

A0-16 Address Inputs

WE Write Enable

NC
NC
INC
NC
NC
NC
NC
NC
GND
NC
NC
NC
NC
NC
NC
NC
NC

BLOCK DIAGRAM

CS

1

CS2 CS

A

0-16

OE
WE

128K x 8

128K x 8 128K x 8

128K x 8

128K x 8 128K x 8

CS1-4 Chip Selects

OE Output Enable

VCC Power Supply

GND Ground

NC Not Connected

3

CS

4

128K x 8

128K x 8

April 1999 Rev. 2

I/O

I/O

NOTE:

1-4 are used as bank selects. During reads, only one CSx can be

CS
active at one time.

1

White Electronic Designs Corporation • Phoenix, AZ • [phone]

0-7

8-15

ABSOLUTE MAXIMUM RATINGS TRUTH TABLE

Parameter Symbol Unit

Operating Temperature TA -55 to +125 °C

Storage Temperature TSTG -65 to +150 °C

Signal Voltage Relative to GND VG -0.6 to +6.25 V

Voltage on OE and A9 -0.6 to +13.5 V

NOTE:

Stresses above those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect
device reliability.

RECOMMENDED OPERATING CONDITIONS

Parameter Symbol Min Max Unit

Supply Voltage VCC 4.5 5.5 V

Input High Voltage VIH 2.0 Vcc + 0.3 V

Input Low Voltage VIL -0.3 +0.8 V

Operating Temp. (Mil.) T

A -55 +125 °C

DC CHARACTERISTICS

CC = 5.0V, GND = 0V, TA = -55°C to +125°C)

(V

WE512K16-XG4X

CS OE WE Mode Data I/O

H X X Standby High Z
L L H Read Data Out
L H L Write Data In
X H X Out Disable High Z/Data Out
X X H Write
X L X Inhibit

CAPACITANCE

A = +25°C)

(T

Parameter

OE capacitance COE
WE capacitance CWE
CS1-4 capacitance CCS
Data I/O capacitance CI/O
Address input capacitance C

This parameter is guaranteed by design but not tested.

Symbol

ADVIN

Conditions Max Unit

VIN = 0 V, f = 1.0 MHz
VIN = 0 V, f = 1.0 MHz
VIN = 0 V, f = 1.0 MHz
V

I/O

= 0 V, f = 1.0 MHz
= 0 V, f = 1.0 MHz

50 pF
50 pF
25 pF
40 pF
70 pF

Parameter Symbol Conditions Min Max Unit

Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 µA
Output Leakage Current ILO CS = VIH, OE = VIH, VOUT = GND to VCC 10 µA
Operating Supply Current (x16) ICCx16 CS1 = VIL, OE = CS2-4 = VIH, f = 5MHz, VCC = 5.5 160 mA
Chip Erase Current ICC1 CS = VIL, OE = VIH, f = 5MHz, VCC = 5.5 250 mA
Standby Current (CMOS) ISB CS = VIH, OE = VIH, f = 5MHz, VCC = 5.5 5 mA
Output Low Voltage VOL IOL = 2.1mA, VCC = 4.5V 0.45 V
Output High Voltage V

NOTE: DC test conditions: V

IH = VCC -0.3V, VIL = 0.3V

FIG. 2

AC TEST CIRCUIT

Current Source

OH IOH = -400µA, VCC = 4.5V 2.4 V

AC TEST CONDITIONS

I

OL

Parameter Typ Unit

Input Pulse Levels VIL = 0, VIH = 3.0 V
Input Rise and Fall 5 ns
Input and Output Reference Level 1.5 V

D.U.T.

C = 50 pf

eff

I

Current Source

White Electronic Designs Corporation • Phoenix, AZ • [phone]

OH

V ≈ 1.5V

Z

(Bipolar Supply)

2

Output Timing Reference Level 1.5 V

NOTES:

V

Z is programmable from -2V to +7V.

OL & IOH programmable from 0 to 16mA.

I
Tester Impedance Z
V

Z is typically the midpoint of VOH and VOL.

OL & IOH

are adjusted to simulate a typical resistive load circuit.

I
ATE tester includes jig capacitance.

0 = 75 Ω.

WE512K16-XG4X

WRITE

A write cycle is initiated when OE is high and a low pulse is on WE
or CS with CS or WE low. The address is latched on the falling
edge of CS or WE whichever occurs last. The data is latched by
the rising edge of CS or WE, whichever occurs first. A word write
operation will automatically continue to completion.

WRITE CYCLE TIMING

Figures 3 and 4 show the write cycle timing relationships. A
write cycle begins with address application, write enable and
chip select. Chip select is accomplished by placing the CS line
low. Write enable consists of setting the WE line low. The
write cycle begins when the last of either CS or WE goes low.

The WE line transition from high to low also initiates an
internal 150 µsec delay timer to permit page mode operation.
Each subsequent WE transition from high to low that occurs
before the completion of the 150 µsec time out will restart the
timer from zero. The operation of the timer is the same as a
retriggerable one-shot.

AC WRITE CHARACTERISTICS

CC

= 5.0V, GND = 0V, TA = -55°C to +125°C)

(V

Write Cycle Parameter Symbol Min Max Unit

Write Cycle Time, TYP = 6ms tWC 10 ms
Address Set-up Time tAS 10 ns
Write Pulse Width (WE or CS) tWP 120 ns
Chip Select Set-up Time tCS 0ns
Address Hold Time tAH 100 ns
Data Hold Time tDH 10 ns
Chip Select Hold Time tCSH 0ns
Data Set-up Time tDS 100 ns
Output Enable Set-up Time tOES 10 ns
Output Enable Hold Time tOEH 10 ns
Write Pulse Width High t

WPH 50 ns

3

White Electronic Designs Corporation • Phoenix, AZ • [phone]