UTRON UT6164BJC-8, UT6164BJC-15, UT6164BJC-12, UT6164BJC-10 Datasheet

A
Rev. 1.1
UTRON
8K X 8 BIT HIGH SPEED CMOS SRAM
UT6164B
FEATURES
Access time : 8/10/12/15ns (max.)
Low power operating consumption:
80 mA (typical.)
Single 5V power supply
All inputs and outputs are TTL compatible
Fully static operation
Three state outputs
Package : 28-pin 300 mil SOJ
FUNCTIONAL BLOCK DIAGRAM
A4
A3
A12 A7
6
A5
A8
I/O1
.
.
.
I/O8
CE
WE
OE
DECODER
.
.
.
CONTROL
CONTROL
ROW
LOGI C
I/O
.
.
128 ROWS × 512 COLUMNS
.
. . .
COLUMN DECODER
A10
A9 A2 A1 A0
MEMORY ARRAY
. .
.
COLUMN I/O
A11
V
CC
V
SS
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A12 Address Inputs
I/O1 - I/O8 Data Inputs/Outputs
CE
WE
OE
Chip Enable Input
Write Enable Input
Output Enable Input
VCC Power Supply VSS Ground NC No Connection
UTRON TECHNOLOGY INC. P80022 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
GENERAL DESCRIPTION
The UT6164B is a 65536-bit high speed CMOS static random access memory organized as 8192 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology.
The UT6164B is designed for high-speed system application. It is particularly suited for use in high-speed high-density system applications.
The UT6164B operates from a signal 5V power supply and all inputs and outputs are fully TTL compatible
PIN CONFIGURATION
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
UT6164B
5
6
7
8
9
10
11
12
13
14
SOJ
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
Vcc
WE
NC
A8
A9
A11
OE
A10
CE
I/O8
I/O7
I/O6
I/O5
I/O4
Rev. 1.1
UTRON
8K X 8 BIT HIGH SPEED CMOS SRAM
UT6164B
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT
Terminal Voltage with Respect to VSS V Operating Temperature TA 0 to +70 Storage Temperature T Power Dissipation PD 1 W DC Output Current I Soldering Temperature (under 10 sec) Tsolder 260
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device
reliability.
TRUTH TABLE
MODE
Standby H X X High - Z ISB, ISB1
Output Disable L H H High - Z ICC
Read L L H D Write L X L DIN I
Note: H = VIH, L=VIL, X = Don't care.
CE
DC ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL TEST CONDITION MIN. MAX. UNIT
Input High Voltage VIH 2.2 VCC+0.5 V Input Low Voltage VIL - 0.5 0.8 V Input Leakage Current ILI
Output Leakage Current
Output High Voltage VOH IOH= - 4mA 2.4 - V Output Low Voltage VOL IOL= 8mA - 0.4 V Operating Power
Supply Current
Standby Power Supply Current
ILO
ICC
ISB
I
SB1
*
-0.5 to +7.0 V
TERM
-65 to +150
STG
50 mA
OUT
OE
WE
(VCC = 5V±10%, TA = 0℃ to 70℃)
V
≦VIN ≦VCC
SS
V
≦V
SS
CE
CE
I
= 0mA ,Cycle=Min.
I/O
CE
CE
=V
= V
=V
V
≦V
I/O
or
IH
,
IL
IH
-0.2V
CC
OE
CC
=V
℃ ℃
I/O OPERATION SUPPLY CURRENT
I
OUT
CC
CC
- 1 1
- 1 1
or
IH
WE
= VIL
- 8 - 190 mA
- 10 - 180 mA
- 12 - 160 mA
- 15 - 140 mA
- 30 mA
- 5 mA
A
µ
A
µ
UTRON TECHNOLOGY INC. P80022 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
2
Rev. 1.1
CAPACITANCE
PARAMETER SYMBOL MIN. MAX UNIT
Input Capacitance C Input/Output Capacitance C
Note : These parameters are guaranteed by device characterization, but not production tested.
UTRON
(TA=25℃, f=1.0MHz)
8K X 8 BIT HIGH SPEED CMOS SRAM
I/O
IN
-
-
UT6164B
8 pF
10 pF
AC TEST CONDITIONS
Input Pulse Levels 0V to 3.0V Input Rise and Fall Times 3ns Input and Output Timing Reference Levels 1.5V Output Load CL = 30pF, IOH/IOL = -4mA/8mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change
(2) WRITE CYCLE PARAMETER
Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High Z
*These parameters are guaranteed by device characterization, but not production tested.
SYMBOL UT6164B
tRC tAA t
ACE
tOE t
CLZ*
t
OLZ*
t
CHZ*
t
OHZ*
tOH
SYMBOL UT6164B
tWC tAW tCW tAS tWP tWR tDW tDH t
OW*
t
WHZ*
(VCC = 5V±10% , TA = 0℃ to 70℃)
UT6164B
-8
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
8 - 10 - 12 - 15 - ns
- 8 - 10 - 12 - 15 ns
- 8 - 10 - 12 - 15 ns
- 4 - 5 - 6 - 7 ns 2 - 2 - 3 - 4 - ns 0 - 0 - 0 - 0 - ns
- 4 - 5 - 6 - 7 ns
- 4 - 5 - 6 - 7 ns 3 - 3 - 3 - 3 - ns
-8
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
8 - 10 - 12 - 15 - ns
6.5 - 8 - 12 - 15 - ns
6.5 - 8 - 12 - 15 - ns 0 - 0 - 0 - 0 - ns
6.5 - 8 - 9 - 10 - ns 0 - 0 - 0 - 0 - ns 5 - 6 - 7 - 8 - ns 0 - 0 - 0 - 0 - ns
1.5 - 2 - 3 - 4 - ns
- 5 - 6 - 7 - 8 ns
-10
UT6164B
-10
UT6164B
UT6164B
-12
-12
UT6164B
-15
UT6164B
-15
UNIT
UNIT
UTRON TECHNOLOGY INC. P80022 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
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