SECTION V
MODE DISCRIMINATING CIRCUIT AND SYNC SIGNAL PROCESSING CIRCUIT
SECTION VI
SYNC SEPARATION CIRCUIT OF TV MODE
SECTION VII
HORIZONTAL AND VERTICAL OSCILLATION CIRCUIT
SECTION VIII
VERTICAL DEFLECTION CIRCUIT
SECTION IX
HORIZONTAL DEFLECTION CIRCUIT
SECTION X
PROTECTION CIRCUIT
SECTION XI
OSD STABILIZATION CIRCUIT
SECTION XII
PICTURE TUBE
SECTION XIII
POWER SUPPLY CIRCUIT
SECTION XIV
FAILURE DIAGNOSIS PROCEDURES
SECTION I OUTLINE
1. OUTLINE OF N5MM1 CHASSIS
(MM20E45)
This model is a 20” color TV with 181 channel tuner and built
in VGA and Mac II capability. The hybrid design of this
model allows it to serve several purposes. Television
reception, a monitor running Multimedia, PC applications,
or for playback of video games. The 20” FST picture tube
features a stripe pitch 0.58mm, providing a favourable
comparisons to conventional designs which generally measure
0.75 to 0.9mm.
2. PC BOARD CONFIGURATION
(1) Power/V.C.D.PB5226
PB5226-1 Power
PB5226-2 V.C.D.
(2) DeflectionPB5227
(3) Signal/VideoPB5228
PB5228-1 Signal
PB5228-2 Video
PB5228-3 D-SUB
1-1
Converter trans
Front keys
Power LED
Remote control
receiver
3. CONSTRUCTION OF CHASSIS
Choke coils
V out radiator
Choke trnas
Video unit
Flyback trans
D-sub unit
1-2
Power unit
Converter trans
Rectifier
Power radiator
Stand by trans
Sound out radiator
Def unit
V/C/D unit
Tuner
Jack board
S-VIDEO
H out radiator
Signal unit
D-sub connector
4. LOCATION OF CONTROLS
4-1 TV Set
RGB/
TV/VIDEO
button
MENU button
ADV button
VOLUME
CHANNEL
POWER indicator
REMOTE senser
POWER button
1-3
4-2 Remote Control
T
s
This Remote Control allows you to control the functions of your TV set from 16 feet (5m) away. The “*” marked function buttons
do not have duplicate locations on your TV set. They can be controlled only by the Remote Control.
Aim at the TV set
TIMER button*
RECALL button*
V/VIDEO button
Channel Number
buttons*
CH RTN (Channel Return)
button*
PIC (Picture)* button
RESET button*
AUD (Audio) button*
MTS button*
POWER button
MUTE button
VOLUME buttons
CHANNEL button
SET UP button*
-/+ buttons
OPTION button*
1-4
4-3 Monitor Panel
This TV set is equipped with RGB INPUT connector, RGB AUDIO INPUT jacks, S-VIDEO INPUT jack, VIDEO/AUDIO
INPUT jacks and VARIABLE AUDIO OUTPUT jacks of connecting your desired personal computer and video/audio
equipment.
TV Rear
3
4
5
2
1
RGB INPUT Connector – provide for direct connection of a personal computer.
RGB AUDIO INPUT Jacks – provide for direct connection of a personal computer with audio output terminals.
S-VIDEO INPUT Jack – provide for direct S-video connection from an S VHS VCR or a video disc player.
VIDEO/AUDIO INPUT Jacks – provide for direct connection of video devices (VCR, video disc player, camcorder, etc.)
with video/audio outputs.
VARIABLE AUDIO OUTPUT Jacks – feed volume-controlled stereo audio out from whatever displayed on the screen,
allows connection of audio amplifier and lets you adjust sound level with TV’s remote.
1-5
5. MM20E45 BLOCK DIAGRAM
EH
VAR. OUT
VIDEO
(VERT)
(+15V)
(HEATER)
capacitor
switching
Resonance
Drive
switching
output
Horizontal
Signal
switching
AN5862K
RGB
TA7730
Signal switching
RGB
FBT
G-output
B-output
R-output
output
Horizontal
OSD
LA7837
Vertical output
R-Y G-Y B-Y-Y
Horizontal drive
V/C/D
TA8801
Linear coil
switching
S-shape
capacitor
switching
DPC
TA8859AP
High voltage
control chopper
H
Horizontal/vertical
oscillation LA7860
V
capacitor
switching
Resonance
Drive
switching
F/V conversion
Horizontal drive
control chopper
Horizontal amplitude
IR9331
20VMMTV BLOCK DIAGRAM
D.L
TC4053BP
Signal switching
RGB
Tuner/IF module
RF
VIDEO
L
Band
pass
R
TA8200AH
Audio output
L
R
CXA1774S
Audio control
L
R
1-6
C. CAP slicer
Micro-computer
Mode distinction
TA75339AP
TC74HC86AP
TC4514P
TA75902
Synchronizing signal
process M52346SP
H.Sync
DAC
Memory
V.Sync
Syncon G
TC40538P
Synchronizing
signal switching
+15V
HEATER
Power unit
To be added
for MM
TV & MM
AUDIO
VERT.
+100V
Model change
( ) For MM
6. SPECIFICATIONS
SPECIFICATIONS
GENERAL
10 Local Keys8key
11 Front Surround–
SOUND
PICTURE
OTHER
TERM
CABINET
12 Sub Bass System
13 Audio Output5W x 2
14 Speaker Size & Nbr80 x 120 x 2
15 Comb Filter(GLS)
16 Black Level Expand–
17 Horizontal Resolution500
18 Parental-Ch Lock
19 Channel Caption–
20 Off Timer (180min)
21 Channel Search–
22 S-Video In-Term(1)
23 Audio, Video In-Term(1)
24 Variable Audio Out(RCA Jack)
25 RGB Audio (L, R)
26 Mini D-Sub 15pin
27 Rod-Ant/Adapter–/–
MODEL No.
1 Picture TubeD/T Invar
2 Channel Capacity181ch
3 C. Caption
4 MTS with dbx
5 Bass, Treble, Balance
6 Sub Audio Program
7 Remote hand unitRegu.
8 Nbr of RMT Button29key
9 LED Indicators(P)
MM20E45
NEW
1-7
MM20E45 PC BOARD CONSTRUCTION
p
ITEMMM20E45NEW MODELCIRCUITNOTE
DEF
PB5227
POWER/VCD
PB5226
249 x 330
249 x 330
POWER
dro
V/C/D
V-CUT LINE
Hole drawing: New
drop
Hole drawing: New
Hole drawing: New
Hole drawing: New
Def.
PB5227
(249.0 x 330.0)
Power/Audio
PB5226-1
(153.0 x 317.0)
Video/Chroma/Def
PB5226-2
(96.0 x 160.0)
Printed wiring board
part code
P/P-M/P:
23534680B
Printed wiring board
part code
P/P-M/P:
23534679B
SIGNAL/
VIDEO
PB5228
249 x 330
SIGNAL
VIDEO
-
drop
D-SUB
Hole drawing: New
Hole drawing: New
Signal
PB5228-1
(110.0 x 330.0)
Video (CRT/D)
PB5228-2
(119.0 x 210.0)
D-Sub
PB5228-3
(28.5 x 41.5)
Printed wiring board
part code
P/P: 23534681B
M/P: 23534681C
1-8
SECTION II CHANNEL SELECTION CIRCUIT
1. OUTLINE OF CHANNEL SELECTION
SYSTEM
The channel selection circuit in the N5MM1 chassis employs
a bus system which performs a central control by connecting
a channel selection microcomputer to a control IC in each
circuit block through control lines called a bus.
In the bus system which controls each IC, the I2C-bus system
(two line bus system) promoted by Philips Co., Ltd. in the
Netherlands has been employed.
The ICs controlled by the I2C-bus control system are: ICG01
for audio system process, ICA02 for non-volatile memory,
H001 for main U/V tuners, IC302 for deflection distortion
corrections.
2. OPERATION OF THE CHANNEL
SELECTION CIRCUIT
2-1 Channel Selection Control Microcomputer
(ICA01 Toshiba TMP87CM34N-3101)
8 bit microcomputer, TLCS-870 series for TV receivers,
TMP87CM34N (42 pins, built-in CCD) developed by Toshiba
is employed. With this microcomputer each IC and circuit
shown below are controlled.
2-1-1 Non-volatile Memory IC
(ICA02 NEC µPD672CX)
(1) Memorizes data for video and audio signal adjustment
values, sound volume, woofer adjustment value, external
input status, etc.
(2) Memorizes adjustment data for white balance (RGB cut
off, GB drive), sub-brightness, sub color, sub-tint, etc.
(3) Memorizes deflection distortion correction value data
adjusted for each unit.
2-1-2 U/V Tuner Unit
(H001 Toshiba EL911L)
(1) A desired station can be received by transferring a
channel selection frequency data (division data) to the
I2C-bus type frequency synthesizer provided in the
tuner and by setting a band switch data which selects the
UHF or VHF band.
2-1-3 Deflection Distortion Correction IC
(IC302 Toshiba TA8859AP)
(1) Sets adjustment memory values for vertical amplitude,
linearity, horizontal amplitude, parabola, corner, pedestal
distortion, etc.
2-1-4 Audio System Process IC
(ICG01, SONY CXA1784S)
2-1
3. SYSTEM BLOCK DIAGRAM
VIDEO SIGNAL
PROCESS CIRCUIT
A/V DSP UNIT
25
24
23
22
10
QA01
TMP87CM34N-3101
Y
B
G
R
EXIT A
STB
CLK
DATA
AFT
SCL
SDA
37
38
DAC1
5
6
7
DAC2
9
PICTURE
CONTROL
AUDIO
CONTROL
TUNER/IF
MEMORY
µPD6272CX
QA02
KEY SWITCH
RGB MODE
DISCRIMINATION
RELAY DRIVE
SYNC SEPA.
REMOTE
CONTROLLER LIGHT
ERCEPTION UNIT
13
KEY A
14
KEY B
15MODE
1
RELAY
35
SYNC
RMT
36
HD
VD
OSC1
OSC0
X1
X0
RST
HOLD
VDD
VSS
26
28
31
33
27
29
32
34
42
21
DPG
MTS
H. PULSE
V. PULSE
6.13 MHz
TRF1147T
8MHz CLOCK
TCR1056
RESET
CIRCUIT,
5V
GND
2-2
3-1 Microcomputer Terminal Name and Operation Logic
Terminal No.Terminal nameI/O control resistor
1RELAYPositive logic
2P.B
3
4MUTEPositive logic
5STBT BUS PERIOD
6CLKT BUS CLOCK
7DATAT BUS DATA
8I-CSTOPNegative logic
9AFT
10EXTATV: HVIDEO/RGB: L
11SPKOFFNegative logic
12LINE21
13KEY1Local key input 0~5V
14KEY2Local key input 0~5V
15MODERGB MODE input 0~5V
16
17Y IN
18B IN
19G IN
20R IN
21VSSGND
22R
23G
24B
25Y
26HDH sync pulse input
27VDV sync pulse input
28OSC1
29OSC0
30TESTFor microcomputer shipping test. Fixed low level
31X IN
32X OUT
33RESETNegative logic
34STOPNegative logic
35RMTRemote controller signal det. Negative logic
36SYNCSync pulse signal input
37SCLI2C BUS CLOCK
38SDAI2C BUS DATA
39TC1GND
40CSIN
41VIN
42VDDMicrocomputer power supply
Oscillation connection terminal for OSD circuit
6.13MHz TRF1147T
High frequency oscillation connection terminal
Part for caption
2-3
3-2 DAC Terminal Name and Operation Logic
(1) DAC (QX01)
Terminal No.Terminal nameFunctionI/OLogic
1VDDINTERFACE POWER SUPPLY
2DATT-BUS DATA INPUT TERMINALI
3CLKT-BUS CLOCK INPUT TERMINALI
4PRDT-BUS PERIOD INPUT TERMINALI
5RESET
6SUB-ADDRESS CHANGEOVER TERMINALO
7RGB CONTRGB CONTRASTO0~5V
8VSSGND
9SBSSUB BASS SYSTEMOON: LOFF: H
Detection method of Local Key in N4ES chassis is analogue way to detect what voltage appears at local key input terminals
(pins 13, 14) of Micom when the key is pressed.
By this method, key detections of a maximum of 7 keys can be done, using local key input terminal (pin 13). As seen in the Local
key circuit below, when one of key among S13-1 to S13-7 is pressed, the VIN which corresponds to the switch is applied to input
terminal (pin 13). Judgement of key-input is done by measuring what voltage VIN is at the pin. Voltage measuring and key
judgement are performed by A/D converter in Micom and by the software.
KEY No.Function
S13-1POWER
S13-2CH UP
S13-3CH DN
S13-4VOL UP
S13-5VOL DN
S13-6ADV
S13-7MENU
S14-1RGB/TV/VIDEO
LOCAL KEY Assignment table
33K
7.5K
7.5K
11K
16K
30K
68K
KEY1
33K
1314
S13-1S14-1
S13-2
S13-3
S13-4
S13-5
S13-6
S13-7
KEY2
2-6
4. I2C BUS INTERFACE OPERATION TIMING
p
As an example of I2C Bus interface operation timings,
control for a memory IC will be shown below.
4-1 Write Mode (1 Byte)
DA
CL
Start bit issue
4-2 Read Mode
SDA
SCL
Start bit issue
1
0
15243
Slave address
R/W command input
Slave address
1
1
0
1
0
Slave address
R/W command input
R/W
2
1
A
0
A
6789
1
ACK signal
output
R/W
A
A
2
1
00
5243
789
6
ACK signal
output
ACK(OUT)
WA7WA6WA5WA4WA3WA2WA1WA
00
Word address
input
ACK(OUT)
WA7WA6WA5WA4WA3WA2WA1WA
Word address
input
Fig. 2-1
0
ININ
Start bit issue
ACK signal
input
ACK(OUT)
D7D6D5D4D3D2D1D
0
ACK signal
output
Word address
update
Stop bit issue
After completion of write operation
word address becomes the write
address +1 and held at that value.
R/W
ACK(OUT)
2
1
A
0
A
6789
1
1
00
15243
IN
Slave address
R/W command input
ACK signal
out
ut
0
INININ
Write data
input
D7D6D5D4D3D2D1D
ACK signal
output
OUT
Read data
output
ACK signal
input
ACK(OUT)
ACK(IN)
0
IN
Stop bit issue
Fig. 2-1
2-7
4-2-1 Generation of Start/stop Status
SCL terminal
DA termianl
SCL terminal
SDA termianl
4-3 I2C Bus Data Format
(1) Memory IC
* Write mode
Start
condition
152637489
D7D6D5D4D3D2D1D0
Data transmission
Acknowledge
signal
Stop
condition
Fig. 2-3
S
Slave address
8 bits
A0H (WRITE)
* Read mode
S
Slave address
8 bits
(2) DPC IC
S
Slave address
8 bits
8CH
RWAC
AC
RW
RWAC
Word address
8 bits
Word address
8 bits
Sub-address
8 bits
AC
AC
AC
Data 8 bits
Slave address
8 bits
Data 8 bits
ACST
AC
ACST
Data 8 bits
ACST
2-8
(3) U/V tuner unit
S
Slave address
8 bits
RWACACST
FM
8 bits
AC
Main screen tuner: COH
FM: Variable divider control byte
FL: Variable divider control byte
CO: Charge pump sensitivity switching bit and test mode bit
BA: Band switching bit
FL
8 bits
ACAC
CO
8 bits
BA
8 bits
2-9
5. SERVICE ADJUSTMENT MODE
1. Entering to Service Adjustment mode
Press MUTE key on the remote control unit once.
Press again the MUTE key, and keep pressing it.
Keep pressing the MUTE key, press MUTE key on TV set.
120H 8DH
Adjusting picture of NTSC mode
2. Switch-over of Service Adjustment mode
Every pressing of MENU key makes main address switch
over.
161H 1E2H 120H 114H
Address
161HVideo section sub-adjustment
1E2HOSD horizontal starting position
120HDeflection section sub-adjustment
Adjustment contents
120H 8DH
RGB 350
Adjusting picture of RGB mode
4. Adjusting method of data
Pressing ADJUST UP/DOWN key on remote control
unit changes the data value ranging from 00H to FFH.
5. Cancellation method of Service mode
The operation of key that accompanies display of
other than from 1 to 4 makes the mode cancel.
During servicing in RGB mode, changing of the
mode of RGB causes cancellation.
Address, Data
Mode display of RGB
114HMulti-sound adjustment
3. Switch-over within Service Adjustment mode
Pressing of VOL UP key on remote control unit or on TV
set makes address switch over cyclically, and VOL DN
key switches over in reverse direction.
a) 161H 107H 163H 108H
b) 1E2H
c) 120H 121H 122H 123H 125H 126H
127H 128H 12AH 111H 112H
d) 114H 115H 116H 116H 117H 118H
119H
6. Other service function
MUTE key: Shipping-out preset
RECALL key: Initializing of memory
2-10
ADDRESS OF SERVICE MODE
a) Video section sub-adjustment
Address
161HSUB BRIGHT
107HSUB COLOR
163HSUB TINT
108HSUB CONTRAST
128HKEYSTONE
12AHV-CORRECTION
111HHORIZ POSITION
112HVERT POSITION
2-11
SECTION III RGB SIGNAL PROCESSING CIRCUIT
1. OUTLINE
The signal flow is explained as follows. RGB signal is input
to D-SUB 15P and is processed to be output at CRT Drive
circuit.
2. OPERATION AND FLOW OF RGB
SIGNAL
Fig. 1 shows flow chart of RGB signal.
3. CIRCUIT OPERATION
(1) RGB signal input at D-SUB 15P is supplied to pins 2, 6,
10 of RGB signal processing IC M52327SP respectively.
(2) The signal which is input to RGB signal processing IC,
is processed in four steps ; 1) Amplification, 2) Contrast
control, 3) Brightness control, 4) Black level clamp.
After that, the signal is output at pins 28, 24, 20 and then
is input to pins 1, 2, 3 of Signal switching IC AN5862K.
(3) In TV reception, R-Y, G-Y and B-Y outputs of IC501
TA8801AN are selected by IC216 AN5862K and ICR03
AN5862K, and are output at pins 5, 6, 8 of ICR03
AN5862K.
(4) TV/RGB switching pulse output from ICX001
TB1203AP, OSD switching pulse output from
microcomputer and blanking pulse are input to OR gate
circuit. And output from OR gate is input to pin 4 of
ICR03 AN5862K.
These operations function as following 3 items.
In TV mode, output from ICR03 AN5862K is
turned over to TV.
In RGB mode, OSD signal is made by OSD
switching pulse from OR gate.
In RGB mode, blanking is performed.
A8801AN
R-Y, G-Y, B-Y
utput
MICOM
OSD output
MICOM
Y output
(1)
RGB input
62
10
13 12 11
(3)
ICR02
RGB AMP
M52327SP
1) SIGNAL AMP
2) CONTRAST
3) BRIGHTNESS
4) CLAMP
321
IC216
SIGNAL
SWITCHING
AN5862K
4
3
ICX001
SWITCHING
SIGNAL
GENERATOR
TB1203AP
28 24 20
13 12 11
7
(2)
865
321
ICR03
SIGNAL
SWITCHING
AN5862K
4
(4)
OR
GATE
865
Signal
output
Blanking pulse
Fig. 1
3-1
SECTION IV CRT DRIVE CIRCUIT
1. OUTLINE
CRT Drive circuit is designed with its output load resistance
decreased, to obtain wide frequency band, and heat-sink of
output transistor is enlarged in size. Cut-off control and
Drive control of TV signal are adjusted with variable resistors
on CRT drive circuit, otherwise RGB signals are adjusted by
bias control and gain control of RGB AMP ICR03 M52327SP.
2. CIRCUIT OPERATION
For example, Green axis circuit is explained as follows.
(1) G signal which is output at pin 6 of AN5862K, is
supplied to the base of Q904, and is amplified in wide
band by Q903 and Q904. Then it is input to cathode of
CRT.
(2) The level of pin 7 of ICX001 TA1203AP becomes (L)
in RGB and (H) in TV. Utilizing this level change,
emitter bias level of Q904 is changed over RGB mode
and TV mode.
(3) The MUTE signal is generated at pin 9 of ICX001 in
POWER ON/OFF, CH selecting, MODE changing.
This signal turns Q903 to cut-off to prevent disorder of
picture from displayed on screen.
(4) Cut-off and Drive controls can be adjusted with R952
and R954.
+200V
+12V
RR25
DR08
RR26
L905
QR05
L904
R922, R923, R924
R925
R921
L906
R920
R926
KG
ICX001 TA1203AP
TV/RGB
Pin7
R209
Q206
+12V
R207
R941
ICR03
Pin6
R943
R942
Q907
ICX001 TA1203AP
MUTE Pin9
C909
C910
R944
R946
R964
R945
D904
Q908
RR24
CR13
R947
D905
Q904
Fig. 1
R961
DEF Circuit
R948
-Y
QR04
R927
R954
SERVICE
SWITCH
R914
C904
R918
R949
Q903
C907
R915
Q904
D902
R918
R952
4-1
SECTION VMODE DISCRIMINATION CIRCUIT AND SYNC
SIGNAL PROCESSING CIRCUIT
Mode discriminating circuit performs to discriminate the kind of signals ; the signal which is input to D-SUB connector, is VGA,
or is Macintosh signal.
Sync signal processing circuit performs to process sync signals into shape which can be utilized in horizontal and vertical osc
circuits, because the signals which are input to D-SUB connector from a personal computer have various figures.
1.OUTLINE OF MODE DISCRIMINATING CIRCUIT
This model, for the simplification, reduces discriminating functions than CRT monitor for computer. The functions are those:
to identify VGA signal or not; horizontal scanning frequency is higher or lower than 28kHz; the signal is input or not.
NO SIGNAL
DISCRIMINATION
ICH01, QH06
No signal
Hor. sync
Vert. sync
POLARITY
DISCRIMINATION
ICH01
FREQUENCY
DISCRIMINATION
ICH04, ICH05
DECODER
ICH02
VGA480
VGA400
VGA350
Low frequency
Fig. 1
VGA has three modes by number of vertical line. These are made to be able identify by polarity of horizontal and vertical sync
signal. The difference of VGA mode signal is described in Table-1.
KindNo. of Ver. linefHfVHor. Sync polarityVer. Sync polarity
VGA48048031.5kHz60HzNegativeNegative
VGA40040031.5kHz70HzNegativePositive
VGA35035031.5kHz70HzPositiveNegative
Table-1
The above discriminated output is supplied to Ch. selection IC ICA01, and to be used as a sign to switch operations of related
circuit.
5-1
2. OUTLINE OF SYNC SIGNAL PROCESSING CIRCUIT
As mentioned above, signal input at D-SUB connector from personal computer, sometimes shows various shape of sync signal.
Representative signals are described in Table-2.
Macintosh 13Ó640 x 48035.0kHz67HzSync on Green or Composite Sync
VESA VGA640 x 48037.9kHz72HzNegativeNegative
Table-2
Roughly classified, they are of two shapes; one is, like Macintosh, SYNC ON GREEN which is imposed on video signal, and
the other is the output in TTL level separated from video signal. The TTL level method is classified to Composite Sync which
combines horizontal and vertical sync, and to Separate Sync which separates respectively.
And besides, in Separate Sync method, polarity is different by kind of signal.
Even though these various sync signal are input, always positive polarity of hor and ver sync signal is supplied to horizontal
and vertical sync osc circuit. This is the role of this circuit.
5-2
3. MODE DISCRIMINATING CIRCUIT OPERATION
h
The circuit which discriminates three modes of VGA, is as follows.
DH31
1918
ICH01
M52346SP
13121110
BCDA
ICH02
TC4028BP
fH > 28KHz/Hig
FREQUENCY
DISCRIMINATION
2
Hor. sync
Vert. sync
68467
VGA350
VGA400
VGA480
Fig. 2
Mode discrimination of VGA is done by the circuit in Fig. 2. ICH01 M52346SP also performs process of sync signal, and the
logic output is shown in Table-3. ICH02 is Decoder IC TC4028BP, and the truth table is shown in Table-4.
Input at pin 6
H. COMP.
H. COMP. (POS.)
H. COMP. (POS.)
H. COMP. (POS.)
H. COMP. (NEG.)
H. COMP. (NEG.)
H. COMP. (NEG.)
NON
NON
NON
Input at pin 8
V.
NON
V. (POS.)
V. (NEG.)
NON
V. (POS.)
V. (NEG.)
NON
V. (POS.)
V. (NEG.)
Output pin
121819
H
L
L
H
H
H
H
H
H
L
L
L
L
H
L
L
H
H
H
H
H
L
L
H
L
H
L
L
L
H
L
L
H
L
L
H
Table-3. Logic output of M52346SPTable-4. Truth table of TC4028BP
When Macintosh signal is input in form of negative composite sync, diode DH31 prevents confusion between Macintosh signal
and VGA400.
5-3
The outputs of VGA three modes are tabled as in Table-5.
ICH01 M52346SPICH02 TC4028BP
Kind
pin 6pin 8pin 18pin 19
pin 11
(D)
pin 12
(C)
pin 13
(B)
pin 10
(A)
output
(High)
VGA480NegaNegaHHLHHHpin 4
VGA400NegaPosiHLLHLHpin 6
VGA350PosiNegaLHLHHLpin 7
Table-5
As shown in table above, since the result of frequency discrimination is input to pin 12 (c) of decoder ICH02, in case that
frequency of input signal is lower than 28kHz, the mode is discriminated as not VGA mode even though polarity of sync signal
is same combination as VGA.
Operation of frequency discriminating circuit is explained as follows, and configuration is shown in Fig. 3.
+12V
RH90
27K
RH64
33K
RH48
22K
CK24
M0.015
Hori. Sync
RH09
QH03
2SC752Y
DH03
1SS176
or
1SS133
12K
CH12
SL100P
RH10
QK11
2SC1815Y
or 2SC17405,Q
or 2SC1685Q
18K
CH14
M2.2
RH12
10K
RH13
10K
RH11
15K
RH14
10K
7
8
ICH04
IR9331
F/V CONVERTER
2
1
RH16
RH18
1/4W4.7KF
1/4W
82KF
3
2
1
F/V ADJ
H. OSC
Def. circuit
6
3
RH17
2KB
5
4
RH15
5.6K
CH13
T1200
CH15
16V47
2
RH19
68K
RH21
1/4W11KF
RH75
8.2K
RH24
1/4W3.3KF
1
RH52
10K
3
RH26
1/4W1.8KF
RH20
1/4W
47KF
13
14
2
1
RH28 580K
+5V
DH04
1SS176
or
1SS133
RH23
1.8KG
11
12
ICH05
TA75902P
or LM2902N
3
4
RH27 680
QH10
2SC1815Y
or 0
DH06
RD5.1ESAB1
or UZ5,1BSA
RH22
560KG
RK59
10
5
RK58
33KG
12KG
98
6
RH29
1/4W
13KF
RH30
1/4W
8.2KF
DK17
1SS176
1SS133
7
H.Size
or
CK17
M680
F/V
LOW FREQ
QH09
RN1202
Fig. 3
ICH04, F/V (Frequency-Voltage) converter, produces the voltage proportional to hor. scan frequency of input signal.
This voltage is amplified in ope. amp ICH05. The comparator which is consisted of ICH05, compares frequency to operate
so that emitter voltage of OH10 becomes HIGH level when the frequency is high.
5-4
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