Texas Instruments TPS6735EVM, TPS6735IDR, TPS6735IP, TPS6735ID Datasheet
TPS6735
FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER
SLVS141A – JULY 1996 – REVISED JANUARY 1997
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Negative 5-V 200-mA Output (VCC ≥ 4.5 V)
D
4-V to 6.2-V Input Operating Range
D
78% Typical Efficiency
D
160-kHz Fixed-Frequency Current-Mode
PWM Controller
D
EN Input Inhibits Operation and Reduces
Supply Current to 1 µA
D
Soft Start
D
8-Pin SOIC and DIP Packages
D
–40°C to 85°C Free-Air Temperature Range
D
Pin-for-Pin Compatible with MAX735
description
The TPS6735 is a fixed negative 5-V output inverting dc/dc converter capable of delivering 200 mA from inputs
as low as 4.5 V . The only external components required are an inductor , an output filter capacitor , an input filter
capacitor, a reference filter capacitor, and a Schottky rectifier. An enable input is provided to shut down the
inverter when a –5-V output is not needed. The typical supply current is 1.9 mA at no-load and is further reduced
to 1-µA when the enable input is low.
The TPS6735 is a 160-kHz current-mode pulse-width-modulation (PWM) controller with a p-channel MOSFET
power switch. The gate drive uses the –5-V output to reduce the die area needed to realize the 0.4-Ω MOSFET .
Soft start is accomplished with the addition of one small capacitor at SS. A 1.22-V reference is available for
external loads up to 125 µA.
The TPS6735 is attractive for board-level dc/dc conversion in computer peripherals and in battery-powered
equipment requiring high efficiency and low supply current.
The TPS6735 is available in 8-pin DIP and SOIC packages and operates over a free-air temperature range of
–40°C to 85°C.
EN
REF
SS
COMP
V
CC
OUT
GND
FB
TPS6735
1
2
3
4
8
7
6
5
1 µF
+
47 µF
+
82 pF
†
10 µF
10 µH
1N5817
100 µF
+
– 5 V
V
I
4 V to 6.2 V
ENABLE
†
Not required for loads of 100 mA or less
Figure 1. Typical Circuit
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
8
7
6
5
EN
REF
SS
COMP
V
CC
OUT
GND
FB
D OR P PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1997, Texas Instruments Incorporated
TPS6735
FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER
SLVS141A – JULY 1996 – REVISED JANUARY 1997
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
SMALL OUTLINE
(D)
PLASTIC DIP
(P)
CHIP FORM
(Y)
–40°C to 85°C TPS6735ID TPS6735IP TPS6735Y
The D package is also available taped and reeled (TPS6735IDR).
functional block diagram
EN
EN
1
EN
_
+
5
4
Error
Amplifier
Voltage
Reference
6
2
x3
SS Clamp
1.2 MΩ
x3
R
S
Q
160-kHz
Oscillator
PWM
Comparator
Σ
Driver
FB
Power Switch PMOS
UVLO
V
CC
REF
Overcurrent
Comparator
7
8
V
CC
OUT
FB
COMP
GND
REF
3
SS
Current-
Sense Amplifier
Drive Latch
TPS6735
FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER
SLVS141A – JULY 1996 – REVISED JANUARY 1997
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
chip information
These chips, when properly assembled, display characteristics similar to the TPS6735. Thermal compression
or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with
conductive epoxy or a gold-silicon preform.
75
82
8881
2
3
455
TPS6735Y
(1)
(2)
(3)
(8)
(7)
(6)
EN
REF
SS
OUT
FB
V
CC
GND
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJ max = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
6
7
7
(4)
(5)
COMP
Terminal Functions
TERMINAL
NAME NO.
DESCRIPTION
EN 1 Enable. EN > 2 V turns on the TPS6735. EN ≤ 0.4 V turns it off.
REF 2 1.22-V reference voltage output. REF can source 125 µA for external loads.
SS 3 Soft start. A capacitor between SS and GND brings the output voltage up slowly.
COMP 4 Compensation. A capacitor to ground stabilizes the feedback loop.
FB 5 Feedback. FB connects to the dc/dc converter output.
GND 6 Ground
OUT 7 Power MOSFET drain connection
V
CC
8 Supply-voltage input
TPS6735
FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER
SLVS141A – JULY 1996 – REVISED JANUARY 1997
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
detailed description
The following descriptions refer to the functional block diagram.
current-sense amplifier
The current-sense amplifier, which has a fixed gain of 3, amplifies the slope-compensated current-sense
voltage (a summation of the voltage on the current-sense resistor and the oscillator ramp) and feeds it to the
PWM comparator.
driver latch
The latch, which consists of a set/reset flip-flop and associated logic, controls the state of the power switch by
turning the driver on and off. A high output from the latch turns the switch on; a low output turns it off. In normal
operation the flip-flop is set high during the clock pulse, but gating keeps the latch output low until the clock pulse
is over. The latch is reset when the PWM comparator output goes high.
enable (EN)
A logic low on EN puts the TPS6735 in shutdown mode. In shutdown, the output power switch, voltage
reference, and other functions shut off and the supply current is reduced to 1-µA maximum. The soft-start
capacitor is discharged through a 1.2-MΩ resistance and the output falls to zero volts.
error amplifier
The error amplifier is a high-gain differential amplifier used to regulate the converter output voltage. The
amplifier generates an error signal, which is fed to the PWM comparator, by comparing a sample of the output
voltage to the reference and amplifying the difference. The output sample is obtained from a resistive divider
connected between FB and REF. FB is connected externally to the converter output, and the divider output is
connected to the error-amplifier input. An 82-pF capacitor connected between COMP and GND is required to
stabilize the control loop for loads greater than 100 mA.
oscillator and ramp generator
The oscillator circuit provides a 160-kHz clock to set the converter operating frequency , and a timing ramp for
slope compensation. The clock waveform is a pulse, a few hundred nanoseconds in duration, that is used to
limit the maximum power switch duty cycle to 95%. The timing ramp is summed with the current-sense signal
at the input to the current-sense amplifier.
overcurrent comparator
The overcurrent comparator monitors the current in the power switch. The comparator trips and initiates a
soft-start cycle if the power-switch current exceeds 2 A peak.
power switch
The power switch is a 0.4-Ω p-channel MOSFET with current sensing. The drain is connected to OUT and the
current sense is connected to a resistor. The voltage across the resistor is proportional to current in the power
switch and is tied to the overcurrent comparator and the current-sense amplifier. In normal operation, the power
switch is turned on at the start of each clock cycle and turned off when the PWM comparator resets the drive
latch.
PWM comparator
The comparator resets the drive latch and turns off the power switch whenever the slope-compensated
current-sense signal from the current-sense amplifier exceeds the error signal.
reference
The 1.22-V reference is brought out on REF and can source 125-µA maximum to external loads. A 10-µF
capacitor connected between REF and GND is recommended to minimize noise pickup.
TPS6735
FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER
SLVS141A – JULY 1996 – REVISED JANUARY 1997
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SS clamp
The SS clamp circuit limits the signal level on error-amplifier output during start-up. The voltage on SS is
amplified and used to override the error-amplifier output until it rises above that output, at which point the error
amplifier takes over. This prevents the input to the PWM comparator from exceeding its common-mode range
(i.e., error amplifier output too high to be reached by the current ramp) by limiting the maximum voltage on the
error-amplifier output during start-up.
Soft start causes the output voltage to increase to the regulation point at the controlled rate. The voltage on the
charging soft-start capacitor gradually raises the clamp on the error amplifier output voltage, limiting surge
currents at power up by increasing the current limit threshold on a cycle-by-cycle basis. A soft-start cycle is
initiated when either the enable (EN) signal is switched high or an overcurrent fault condition triggers the
discharge of the soft-start capacitor.
undervoltage lockout (UVLO)
The supply voltage is fed through a voltage divider to the input of the UVLO and compared to a reference. The
undervoltage-lockout logic prevents the MOSFET from turning on while the supply voltage is below the
undervoltage-lockout voltage threshold, and once the supply voltage on V
CC
is above the threshold, an SS cycle
is initiated.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
D 725 mW 5.8 mW/°C 464 mW 377 mW
P 1175 mW 9.4 mW/°C 752 mW 611 mW
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Pin voltages: V
CC
(see Note 1) –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
OUT to V
CC
12.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
FB (see Note 1) 25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SS, COMP, EN voltage range (see Note 1) –0.3 V to V
CC
+0.3 V. . . . . . . . . . . . . . . . . . . .
Peak switch current 2 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference current 2.5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6mm (1/16 inch) from case for 10 s 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network terminal ground.
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage 4 6.2 V
Decoupling capacitor 1 µF
Input capacitor 47 µF
Reference capacitor 10 µF
Output capacitor 100 µF
Compensation capacitor 82 pF
Inductor 10 µH
TPS6735
FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER
SLVS141A – JULY 1996 – REVISED JANUARY 1997
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, V
CC
= 5 V,
I
O
= 0, EN = 5 V, typical values are at T
A =
25°C (unless otherwise noted) (refer to Figure 15)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
Supply current 1.9 mA
Standby current EN = 0.4 V 1 10 µA
High-level input threshold voltage, EN 2 V
Low-level input threshold voltage, EN 0.4 V
Input current, EN –1 1 µA
Compensation pin impedance 7.5 kΩ
Oscillator frequency 160 kHz
Reference voltage I
O(ref) ≤ 125 µA
1.22 V
Reference drift 50 ppm/°C
Undervoltage lockout 3.7 V
On resistance, OUT 0.4 Ω
Leakage current, OUT 20 nA
performance characteristics over recommended operating free-air temperature range, typical
values at T
A
= 25°C (unless otherwise noted) (refer to Figure 15)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
Output voltage VCC = 4.5 V to 6.2 V
IO = 0 mA to 200 mA
–4.75 –5 –5.25 V
Load current VCC = 4.5 V to 6.2 V 200 270 mA
Line regulation VCC = 4.5 V to 6.2 V 0.2%
Load regulation IO = 25 mA to 200 mA 0.2%
Efficiency IO =100 mA 78%
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