TEXAS INSTRUMENTS TPS6735 Technical data

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TPS6735

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

Negative 5-V 200-mA Output (VCC ≥ 4.5 V)

4-V to 6.2-V Input Operating Range

78% Typical Efficiency

160-kHz Fixed-Frequency Current-Mode PWM Controller

EN Input Inhibits Operation and Reduces

D OR P PACKAGE

(TOP VIEW)

REF

COMP

1 2 3 4

OUT

GND

6 5

Supply Current to 1 µA

Soft Start

8-Pin SOIC and DIP Packages

–40°C to 85°C Free-Air Temperature Range

Pin-for-Pin Compatible with MAX735

description

The TPS6735 is a fixed negative 5-V output inverting dc/dc converter capable of delivering 200 mA from inputs as low as 4.5 V . The only external components required are an inductor , an output filter capacitor , an input filter capacitor, a reference filter capacitor, and a Schottky rectifier. An enable input is provided to shut down the inverter when a –5-V output is not needed. The typical supply current is 1.9 mA at no-load and is further reduced to 1-µA when the enable input is low.

The TPS6735 is a 160-kHz current-mode pulse-width-modulation (PWM) controller with a p-channel MOSFET power switch. The gate drive uses the –5-V output to reduce the die area needed to realize the 0.4-Ω MOSFET . Soft start is accomplished with the addition of one small capacitor at SS. A 1.22-V reference is available for external loads up to 125 µA.

The TPS6735 is attractive for board-level dc/dc conversion in computer peripherals and in battery-powered equipment requiring high efficiency and low supply current.

The TPS6735 is available in 8-pin DIP and SOIC packages and operates over a free-air temperature range of –40°C to 85°C.

4 V to 6.2 V

ENABLE

†

Not required for loads of 100 mA or less

10 µF

82 pF

47 µF

†

1 2

3 4

TPS6735

REF SS COMP

OUT

GND

1N5817

6 5

1 µF

10 µH

– 5 V

100 µF

Figure 1. Typical Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS6735

CHIP FORM

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

AVAILABLE OPTIONS

PACKAGED DEVICES

–40°C to 85°C TPS6735ID TPS6735IP TPS6735Y

The D package is also available taped and reeled (TPS6735IDR).

functional block diagram

SMALL OUTLINE

(D)

PLASTIC DIP

(P)

(Y)

COMP

GND

REF

Error Amplifier

Voltage

Reference

1.2 MΩ

SS Clamp

Current-

Sense Amplifier

Drive Latch

PWM Comparator

160-kHz

Oscillator

CC Overcurrent Comparator

Driver

OUT

UVLO

REF

Power Switch PMOS

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DESCRIPTION

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

chip information

These chips, when properly assembled, display characteristics similar to the TPS6735. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform.

BONDING PAD ASSIGNMENTS

8881

TPS6735

(1)

REF

COMP

(2)

TPS6735Y

(3)

(4)

CHIP THICKNESS: 15 TYPICAL BONDING PADS: 4 × 4 MINIMUM TJ max = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS.

7 7

455

Terminal Functions

TERMINAL

NAME NO.

EN 1 Enable. EN > 2 V turns on the TPS6735. EN ≤ 0.4 V turns it off. REF 2 1.22-V reference voltage output. REF can source 125 µA for external loads. SS 3 Soft start. A capacitor between SS and GND brings the output voltage up slowly. COMP 4 Compensation. A capacitor to ground stabilizes the feedback loop. FB 5 Feedback. FB connects to the dc/dc converter output. GND 6 Ground OUT 7 Power MOSFET drain connection V

8 Supply-voltage input

(8) (7) (6) (5)

CC OUT GND

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS6735 FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

detailed description

The following descriptions refer to the functional block diagram.

current-sense amplifier

The current-sense amplifier, which has a fixed gain of 3, amplifies the slope-compensated current-sense voltage (a summation of the voltage on the current-sense resistor and the oscillator ramp) and feeds it to the PWM comparator.

driver latch

The latch, which consists of a set/reset flip-flop and associated logic, controls the state of the power switch by turning the driver on and off. A high output from the latch turns the switch on; a low output turns it off. In normal operation the flip-flop is set high during the clock pulse, but gating keeps the latch output low until the clock pulse is over. The latch is reset when the PWM comparator output goes high.

enable (EN)

A logic low on EN puts the TPS6735 in shutdown mode. In shutdown, the output power switch, voltage reference, and other functions shut off and the supply current is reduced to 1-µA maximum. The soft-start capacitor is discharged through a 1.2-MΩ resistance and the output falls to zero volts.

error amplifier

The error amplifier is a high-gain differential amplifier used to regulate the converter output voltage. The amplifier generates an error signal, which is fed to the PWM comparator, by comparing a sample of the output voltage to the reference and amplifying the difference. The output sample is obtained from a resistive divider connected between FB and REF. FB is connected externally to the converter output, and the divider output is connected to the error-amplifier input. An 82-pF capacitor connected between COMP and GND is required to stabilize the control loop for loads greater than 100 mA.

oscillator and ramp generator

The oscillator circuit provides a 160-kHz clock to set the converter operating frequency , and a timing ramp for slope compensation. The clock waveform is a pulse, a few hundred nanoseconds in duration, that is used to limit the maximum power switch duty cycle to 95%. The timing ramp is summed with the current-sense signal at the input to the current-sense amplifier.

overcurrent comparator

The overcurrent comparator monitors the current in the power switch. The comparator trips and initiates a soft-start cycle if the power-switch current exceeds 2 A peak.

power switch

The power switch is a 0.4-Ω p-channel MOSFET with current sensing. The drain is connected to OUT and the current sense is connected to a resistor. The voltage across the resistor is proportional to current in the power switch and is tied to the overcurrent comparator and the current-sense amplifier. In normal operation, the power switch is turned on at the start of each clock cycle and turned off when the PWM comparator resets the drive latch.

PWM comparator

The comparator resets the drive latch and turns off the power switch whenever the slope-compensated current-sense signal from the current-sense amplifier exceeds the error signal.

reference

The 1.22-V reference is brought out on REF and can source 125-µA maximum to external loads. A 10-µF capacitor connected between REF and GND is recommended to minimize noise pickup.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

SS clamp

The SS clamp circuit limits the signal level on error-amplifier output during start-up. The voltage on SS is amplified and used to override the error-amplifier output until it rises above that output, at which point the error amplifier takes over. This prevents the input to the PWM comparator from exceeding its common-mode range (i.e., error amplifier output too high to be reached by the current ramp) by limiting the maximum voltage on the error-amplifier output during start-up.

Soft start causes the output voltage to increase to the regulation point at the controlled rate. The voltage on the charging soft-start capacitor gradually raises the clamp on the error amplifier output voltage, limiting surge currents at power up by increasing the current limit threshold on a cycle-by-cycle basis. A soft-start cycle is initiated when either the enable (EN) signal is switched high or an overcurrent fault condition triggers the discharge of the soft-start capacitor.

undervoltage lockout (UVLO)

The supply voltage is fed through a voltage divider to the input of the UVLO and compared to a reference. The undervoltage-lockout logic prevents the MOSFET from turning on while the supply voltage is below the undervoltage-lockout voltage threshold, and once the supply voltage on V is initiated.

DISSIPATION RATING TABLE

PACKAGE

D 725 mW 5.8 mW/°C 464 mW 377 mW P 1175 mW 9.4 mW/°C 752 mW 611 mW

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

is above the threshold, an SS cycle

TA = 85°C

POWER RATING

TPS6735

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Pin voltages: V

Peak switch current 2 A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Reference current 2.5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range, T Storage temperature range, T

Lead temperature 1,6mm (1/16 inch) from case for 10 s 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to network terminal ground.

(see Note 1) –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

OUT to V

12.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

FB (see Note 1) 25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SS, COMP, EN voltage range (see Note 1) –0.3 V to V

–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

+0.3 V. . . . . . . . . . . . . . . . . . . .

recommended operating conditions

MIN NOM MAX UNIT

Supply voltage 4 6.2 V Decoupling capacitor 1 µF Input capacitor 47 µF Reference capacitor 10 µF Output capacitor 100 µF Compensation capacitor 82 pF Inductor 10 µH

†

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS6735 FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

electrical characteristics over recommended operating free-air temperature range, V

= 0, EN = 5 V, typical values are at T

PARAMETER TEST CONDITION MIN TYP MAX UNIT

Supply current 1.9 mA Standby current EN = 0.4 V 1 10 µA High-level input threshold voltage, EN 2 V Low-level input threshold voltage, EN 0.4 V Input current, EN –1 1 µA Compensation pin impedance 7.5 kΩ Oscillator frequency 160 kHz Reference voltage I Reference drift 50 ppm/°C Undervoltage lockout 3.7 V On resistance, OUT 0.4 Ω Leakage current, OUT 20 nA

25°C (unless otherwise noted) (refer to Figure 15)

A =

O(ref) ≤ 125 µA

1.22 V

= 5 V,

performance characteristics over recommended operating free-air temperature range, typical

= 25°C (unless otherwise noted) (refer to Figure 15)

values at T

PARAMETER TEST CONDITION MIN TYP MAX UNIT

Output voltage VCC = 4.5 V to 6.2 V

IO = 0 mA to 200 mA Load current VCC = 4.5 V to 6.2 V 200 270 mA Line regulation VCC = 4.5 V to 6.2 V 0.2% Load regulation IO = 25 mA to 200 mA 0.2% Efficiency IO =100 mA 78%

–4.75 –5 –5.25 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS6735

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

APPLICATION INFORMATION

– 5

Voltage at Out – V

VI = 5 V VO = – 5 V IO = 100 mA

0.5

I – Inductor Current – A

2.5 µs/div

t – Time – s

Figure 2. Switching Waveforms

VI = 5 V VO = – 5 V IO = 100 mA

0.5

I – Inductor Current – A

–50

Output Voltage – mV

2.5 µs/div

t – Time – s

Figure 3. Output Voltage Ripple

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS6735 FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

APPLICATION INFORMATION

VI = 5 V VO = – 5 V IO = 0 mA to 200 mA

200

– Load Current – mAI

100

2 ms/div

–50

Output Voltage Ripple – mV

– Input Voltage – V

VI = 4.5 V to 6 V VO = – 5 V IO = 100 mA

t – Time – s

Figure 4. Load Transient Response

– 10

2 ms/div

Output Voltage Ripple – mV

t – Time – s

Figure 5. Line Transient Response

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS6735

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

APPLICATION INFORMATION

Voltage at EN – V

VI = 5 V VO = –5 V IO = 100 mA

– 2

– 4

– 6

– Output Voltage – V

system typical characteristics

EFFICIENCY

LOAD CURRENT

TA = 25°C (see Figure 15)

Efficiency – %

2.5 ms/div

t – Time – s

Figure 6. Enable Response Time

1.8 VI = 5 V

1.6 (see Figure 15)

VI = 6 V

VI = 5 V

VI = 4 V

1.4

1.2

0.8

0.6

Peak Inductor Current – A

0.4

0.2

PEAK INDUCTOR CURRENT

LOAD CURRENT

50 100 150 200

IL – Load Current – mA

Figure 7

250 300

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0 50 100 150 200

250 300 350

IL – Load Current – mA

Figure 8

TPS6735 FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

APPLICATION INFORMATION

system typical characteristics (continued)

NO-LOAD SUPPLY CURRENT

SUPPLY VOLTAGE

IO = 0 A

1.8

(see Figure 15)

1.6

1.4

1.2

0.8

0.6

No-Load Supply Current – mA

0.4

0.2 0

0.5 1 1.5 2 2.5 3 4 Supply Voltage – V

Figure 9

4.5 5 6 6.53.5 5.5

MAXIMUM LOAD CURRENT

SUPPLY VOLTAGE

400

(see Figure 15)

350

300

250

200

150

100

Maximum Load Current – mA

3.75 4 4.25 4.5 4.75 5 5.25 Supply Voltage – V

Figure 10

5.75 6 6.25 6.5

5.5

OSCILLATOR FREQUENCY

TEMPERATURE

172

170

168

166

164

162

160

– Oscillator Frequency – kHz

158

osc

156 154

– 40 – 20 0

20 40

T – Temperature – °C

Figure 11

VI = 4 V

VI = 5 V

VI = 6 V

60 80 100 120 140

SWITCH CURRENT LIMIT

SOFT-START VOLTAGE

1.8

1.6

1.4

1.2

0.8

0.6

Switch Current Limit – A

0.4

0.2

VI = 6 V

200 400 600 800

Soft-Start Voltage – mV

VI = 5 V

VI = 4 V

R1 and R2 Varied (see Figure 15)

1000 1200

Figure 12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

APPLICATION INFORMATION

system typical characteristics (continued)

TPS6735

SLVS141A – JULY 1996 – REVISED JANUARY 1997

SOFT-START DELAY

CAPACITANCE

C6 varied (see Figure 7)

Soft-Start Delay – ms

0.1 0.2 0.3 0.5 0.6 0.7 0.9

C – Capacitance – µF

VI = 5 V

Figure 13

VI = 4 V

VI = 6 V

1 1.1 1.2 1.40.4 0.8 1.3

DRAIN-SOURCE ON-STATE RESISTANCE

TEMPERATURE

0.7

Ω

0.6 VI = 6 V

0.5

0.4

VI = 5 V

0.3

0.2

– Drain-Source On-State Resistance –

0.1

DS(on)

– 40 – 20 0 20 40

T – Temperature – °C

VI = 4 V

60 80 100 120 140

Figure 14

The TPS6735 operates in the voltage-inverting circuit, shown in Figure 15, which can generate a –5-V output. The circuit is ideal for applications that require a negative polarity voltage on the output with respect to the input ground, and for energy management systems. The TPS6735 can be placed in a shutdown mode (1-µA quiescent current) by forcing EN low.

soft start

The soft-start capacitor provides an orderly start-up of the converter by slowly increasing the switch current limit during power-up. The soft-start timing is controlled by the SS capacitance (see Figure 13 for the capacitance value corresponding to the desired delay time). The switch current limit is proportional to the voltage applied to SS, which is internally pulled to REF by a 1.2-MΩ resistor. SS can be externally pulled lower than REF to limit the switch current. A UVLO condition or an overcurrent condition initiates an SS cycle by discharging the SS capacitor to ground through an internal transistor. A minimum of a 10-nF capacitor must be connected to SS to current limit correctly.

inductor selection

The standard 10-µH inductor required by the TPS6735 must have a saturation current greater than the peak switch current at the desired maximum load. Operation over the full voltage range and current range is assured by the 10-µH inductor. To determine the required inductor staturation level, refer to the typical operating characteristics graph for peak inductor current versus load current (see Figure 8).

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS6735 FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

APPLICATION INFORMATION

output filter capacitor

A low equivalent series resistance (ESR) output filter capacitor is necessary to minimize the output-ripple voltage. An ESR of 100 mΩ limits the output ripple to 90 mV or less for output loads up to 200 mA.

rectifier

A Schottky diode or high-speed silicon rectifier should be used with a maximum continuous current rating of 1 A for operation up to full load (200 mA).

output ripple filtering

A low-pass filter may be added to the converter output to reduce the output voltage ripple (see Figure 15). The LC filter has a cutoff frequency of 7.2 kHz. The inductor filter must have a low resistance to avoid large output voltage drops. The output voltage ripple is reduced to 5 mV when the LC output filter is used. FB must be connected to the output node before the connection for the low-pass filter.

printed circuit board layout

A ground plane is recommended in a printed circuit board (PCB) layout to ensure quiet operation. Attention should be given to minimizing the lengths of the switching loops. Bypass capacitors should be placed as close to the TPS6735 as possible to prevent instability and noise pickup. V

and GND should be bypassed directly

with a 1-µF ceramic capacitor and a large bypass capacitor (e.g. 47 µF) to maximize noise immunity. The TPS6735 should not be used with IC sockets, wire-wrap prototype boards, or other constructions that are susceptible to noise pick-up.

Optional

Low-Pass Output Filter

ENABLE

0.1 µF

10 kΩ

300 kΩ

47 µF

130 kΩ

10 µF

TPS6735ID

REF

COMP

C4 82 pF

OUT

GND

1 µF

10 µH

22 µH

1N5817

1 A, 20 V

22 µF

100 µF/10 V

Figure 15. Application Circuit

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS6735

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

APPLICATION INFORMATION

Table 1. Bill of Materials

QTY DESCRIPTION

1 IC Power supply –5 V U1 TPS6735ID Texas Instruments 1 Diode Schottky D1 1N5817GI General Instrument

1 Inductor 10 µH L1

1 Capacitor 47 µF tantalum 16 V 7343 C1

1 Capacitor 100 µF tantalum 10 V 7343 C2

1 Capacitor 10 µF tantalum 10 V 3528 C3 1 Capacitor 82 pF ceramic 50 V 0805 C4

1 Capacitor 1 µF ceramic 16 V 1206 C5 1 Capacitor 0.1 µF ceramic 50 V 0805 C6 1 Resistor 130 kΩ 0805 R1 1 Resistor 300 kΩ 0805 R2 1 Resistor 10 kΩ 0805 R3

REF DES

MANUFACTURER

PART NO.

DO1608C-103 CD54-100

593D476X9016D2W TPSD476K016R0100

593D107X9010D2W TPSD107D016R0100

293D106X0010B2W 267E 1002 106

MANUFACTURER

Coilcraft, Sumida

Sprague, AVX

Sprague, MATSUO

TEXAS INSTRUMENTS

R1 C6

SLVP095

K D1

TPS6735 EVALUATION BOARD

SILK SCREEN TOP

Figure 16. Component Placement

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TPS6735 FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

APPLICATION INFORMATION

TEXAS INSTRUMENTS

TPS6735 EVALUATION BOARD

SOLDER PASTE MASK

Figure 17. Solder Paste Mask

SLVP095

COMPONENT SIDE

Figure 18. PC Component Side

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TPS6735

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

APPLICATION INFORMATION

Figure 19. PC Wiring Side (Viewed From Component Side)

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TPS6735 FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

MECHANICAL DATA

D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

0.069 (1,75) MAX

0.050 (1,27)

0.020 (0,51)

0.014 (0,35)

0.010 (0,25)

0.004 (0,10)

0.010 (0,25)

0.157 (4,00)

0.150 (3,81)

0.244 (6,20)

0.228 (5,80)

Seating Plane

0.004 (0,10)

PINS **

DIM

A MAX

A MIN

0.008 (0,20) NOM

Gage Plane

0°–8°

0.197

(5,00)

0.189

(4,80)

0.344 (8,75)

0.337 (8,55)

0.010 (0,25)

0.044 (1,12)

0.016 (0,40)

4040047/B 03/95

0.394

(10,00)

0.386

(9,80)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Four center pins are connected to die mount pad. E. Falls within JEDEC MS-012

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TPS6735

FIXED NEGATIVE 5-V 200-mA INVERTING DC/DC CONVERTER

SLVS141A – JULY 1996 – REVISED JANUARY 1997

MECHANICAL DATA

P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE

0.400 (10,60)

0.355 (9,02)

0.260 (6,60)

0.240 (6,10)

0.070 (1,78) MAX

0.020 (0,51) MIN

0.200 (5,08) MAX

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.015 (0,38)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

0.010 (0,25)

0.310 (7,87)

0.290 (7,37)

Seating Plane

0°–15°

0.010 (0,25) NOM

4040082/B 03/95

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

8-Aug-2005

PACKAGING INFORMATION

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

TPS6735ID ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

TPS6735IDG4 ACTIVE SOIC D 8 75 Green (RoHS &

no Sb/Br)

TPS6735IDR ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

TPS6735IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

no Sb/Br)

TPS6735IP ACTIVE PDIP P 8 50 Pb-Free

TPS6735IPE4 ACTIVE PDIP P 8 50 Pb-Free

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU Level-NC-NC-NC

(3)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

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(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

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TEXAS INSTRUMENTS TPS6735 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual