V
I
GND
ENSWFB
C1
4.7 µF
L1
10 µH
C2
10 µF
TPS62202
V
I
2.5 V − 6 V
V
O
1.8 V / 300 mA
1
5
2
3
4
40
45
50
55
60
65
70
75
80
85
90
95
100
0.010 0.100 1
10 100 1000
Efficiency − %
EFFICIENCY
vs
LOAD CURRENT
IL −Load Current − mA
VO = 1.8 V
VI = 2.7 V
VI = 3.7 V
VI = 5 V
HIGH-EFFICIENCY, SOT23
STEP-DOWN, DC-DC CONVERTER
TPS62200 , , TPS62201
TPS62202 , TPS62203 , TPS62207
TPS62204 , TPS62205 , TPS62208
SLVS417E – MARCH 2002 – REVISED MAY 2006
FEATURES
• High Efficiency Synchronous Step-Down
Converter With up to 95% Efficiency
• 2.5-V to 6-V Input Voltage Range
• Adjustable Output Voltage Range From 0.7 V
to V
I
• Fixed Output Voltage Options Available
• Up to 300 mA Output Current
• 1-MHz Fixed Frequency PWM Operation
• Highest Efficiency Over Wide Load Current
Range Due to Power Save Mode
• 15-µA Typical Quiescent Current
• Soft Start
• 100% Duty Cycle Low-Dropout Operation
• Dynamic Output-Voltage Positioning
• Available in a 5-Pin SOT23 Package
APPLICATIONS
• PDAs and Pocket PC
• Cellular Phones, Smart Phones
• Low Power DSP Supply
• Digital Cameras
• Portable Media Players
• Portable Equipment
DESCRIPTION
The TPS6220x devices are a family of high-efficiency
synchronous step-down converters ideally suited for
portable systems powered by 1-cell Li-Ion or 3-cell
NiMH/NiCd batteries. The devices are also suitable
to operate from a standard 3.3-V or 5-V voltage rail.
With an output voltage range of 6 V down to 0.7 V
and up to 300 mA output current, the devices are
ideal to power low voltage DSPs and processors
used in PDAs, pocket PCs, and smart phones.
Under nominal load current, the devices operate with
a fixed switching frequency of typically 1 MHz. At
light load currents, the part enters the power save
mode operation; the switching frequency is reduced
and the quiescent current is typically only 15 µA;
therefore, it achieves the highest efficiency over the
entire load current range. The TPS6220x needs only
three small external components. Together with the
SOT23 package, a minimum system solution size is
achieved. An advanced fast response voltage mode
control scheme achieves superior line and load
regulation with small ceramic input and output
capacitors.
Figure 1. Typical Application
(Fixed Output Voltage Version)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2002–2006, Texas Instruments Incorporated
3
2
4
5
DBV PACKAGE
(TOP VIEW)
1
V
I
GND
EN
SW
FB
TPS62200 , , TPS62201
TPS62202 , TPS62203 , TPS62207
TPS62204 , TPS62205 , TPS62208
SLVS417E – MARCH 2002 – REVISED MAY 2006
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION
T
A
-40°C to 85°C
(1) The DBV package is available in tape and reel. Add R suffix (DBVR) to order quantities of 3000 parts.
Add T suffix (DBVT) to order quantities of 250 parts
OUTPUT VOLTAGE SOT23 PACKAGE SYMBOL
Adjustable TPS62200DBV PHKI
1.2 V TPS62207DBV PJGI
1.5 V TPS62201DBV PHLI
1.6 V TPS62204DBV PHSI
1.8 V TPS62202DBV PHMI
1.875 V TPS62208DBV ALW
2.5 V TPS62205DBV PHTI
3.3 V TPS62203DBV PHNI
(1)
Terminal Functions
TERMINAL
NAME NO.
EN 3 I
FB 4 I used. For the adjustable version an external resistor divider is connected to this pin. The internal voltage divider
GND 2 Ground
SW 5 I/O Connect the inductor to this pin. This pin is the switch pin and is connected to the internal MOSFET switches.
V
I
I/O DESCRIPTION
This is the enable pin of the device. Pulling this pin to ground forces the device into shutdown mode. Pulling this
pin to Vin enables the device. This pin must not be left floating and must be terminated.
This is the feedback pin of the device. Connect this pin directly to the output if the fixed output voltage version is
is disabled for the adjustable version.
1 I Supply voltage pin
2
Submit Documentation Feedback
_
+
_
+
_
+
_
+
_
+
REF
REF
Load Comparator
Skip Comparator
Current Limit Comparator
P-Channel
Power MOSFET
Driver
Shoot-Through
Logic
Control
Logic
Soft Start
1 MHz
Oscillator
Comparator
S
R
N-Channel
Power MOSFET
Comparator High
Comparator Low
Comparator Low 2
V
(COMP)
Sawtooth
Generator
V
I
Undervoltage
Lockout
Bias Supply
_
+
Comparator High
Comparator Low
Comparator Low 2
Compensation
V
REF
= 0.5 V
R2
See Note
R1
V
I
EN
SW
FB GND
Gm
FUNCTIONAL BLOCK DIAGRAM
TPS62200 , , TPS62201
TPS62202 , TPS62203 , TPS62207
TPS62204 , TPS62205 , TPS62208
SLVS417E – MARCH 2002 – REVISED MAY 2006
For the adjustable version (TPS62200) the internal feedback divider is disabled and the FB pin is directly connected
OPERATION
The TPS6220x is a synchronous step-down converter operating with typically 1-MHz fixed frequency pulse width
modulation (PWM) at moderate to heavy load currents and in power save mode operating with pulse frequency
modulation (PFM) at light load currents.
During PWM operation the converter uses a unique fast response, voltage mode, controller scheme with input
voltage feed forward. This achieves good line and load regulation and allows the use of small ceramic input and
to the internal GM amplifier
output capacitors. At the beginning of each clock cycle initiated by the clock signal (S), the P-channel MOSFET
switch is turned on, and the inductor current ramps up until the comparator trips and the control logic turns off
the switch. The current limit comparator also turns off the switch in case the current limit of the P-channel switch
is exceeded. Then the N-channel rectifier switch is turned on and the inductor current ramps down. The next
cycle is initiated by the clock signal again turning off the N-channel rectifier and turning on the P-channel switch.
DETAILED DESCRIPTION
Submit Documentation Feedback
3
I
skip
v 66 mA )
Vin
160 W
I
peak
+ 66 mA )
Vin
80 W
PFM Mode at Light Load
Comparator High
Comparator Low
Comparator Low 2
PWM Mode at Medium to Full Load
1.6%
0.8%
V
O
TPS62200 , , TPS62201
TPS62202 , TPS62203 , TPS62207
TPS62204 , TPS62205 , TPS62208
SLVS417E – MARCH 2002 – REVISED MAY 2006
DETAILED DESCRIPTION (continued)
The GM amplifier and input voltage determines the rise time of the Sawtooth generator; therefore any change in
input voltage or output voltage directly controls the duty cycle of the converter. This gives a very good line and
load transient regulation.
POWER SAVE MODE OPERATION
As the load current decreases, the converter enters the power save mode operation. During power save mode,
the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current to
maintain high efficiency.
Two conditions allow the converter to enter the power save mode operation. One is when the converter detects
the discontinuous conduction mode. The other is when the peak switch current in the P-channel switch goes
below the skip current limit. The typical skip current limit can be calculated as
During the power save mode the output voltage is monitored with the comparator by the thresholds comp low
and comp high. As the output voltage falls below the comp low threshold set to typically 0.8% above Vout
nominal, the P-channel switch turns on. The P-channel switch is turned off as the peak switch current is
reached. The typical peak switch current can be calculated:
The N-channel rectifier is turned on and the inductor current ramps down. As the inductor current approaches
zero the N-channel rectifier is turned off and the P-channel switch is turned on again, starting the next pulse.
The converter continues these pulses until the comp high threshold (set to typically 1.6% above Vout nominal) is
reached. The converter enters a sleep mode, reducing the quiescent current to a minimum. The converter
wakes up again as the output voltage falls below the comp low threshold again. This control method reduces the
quiescent current typically to 15 µA and reduces the switching frequency to a minimum, thereby achieving the
high converter efficiency. Setting the skip current thresholds to typically 0.8% and 1.6% above the nominal
output voltage at light load current results in a dynamic output voltage achieving lower absolute voltage drops
during heavy load transient changes. This allows the converter to operate with a small output capacitor of just 10
µF and still have a low absolute voltage drop during heavy load transient changes. Refer to Figure 2 for detailed
operation of the power save mode.
Figure 2. Power Save Mode Thresholds and Dynamic Voltage Positioning
The converter enters the fixed frequency PWM mode again as soon as the output voltage falls below the comp
low 2 threshold.
4
Submit Documentation Feedback
Vin
min
+ Vout
max
) Iout
max
ǒ
rds(ON)
max
) R
L
Ǔ
Iout
max
= maximum output current plus inductor ripple current
rds(ON)
max
= maximum P-channel switch rds(ON)
RL = DC resistance of the inductor
Vout
max
= nominal output voltage plus maximum output voltage tolerance
TPS62200 , , TPS62201
TPS62202 , TPS62203 , TPS62207
TPS62204 , TPS62205 , TPS62208
SLVS417E – MARCH 2002 – REVISED MAY 2006
DETAILED DESCRIPTION (continued)
DYNAMIC VOLTAGE POSITIONING
As described in the power save mode operation sections and as detailed in Figure 2 , the output voltage is
typically 0.8% above the nominal output voltage at light load currents, as the device is in power save mode. This
gives additional headroom for the voltage drop during a load transient from light load to full load. During a load
transient from full load to light load, the voltage overshoot is also minimized due to active regulation turning on
the N-channel rectifier switch.
SOFT START
The TPS6220x has an internal soft start circuit that limits the inrush current during start-up. This prevents
possible voltage drops of the input voltage in case a battery or a high impedance power source is connected to
the input of the TPS6220x.
The soft start is implemented as a digital circuit increasing the switch current in steps of typically 60 mA,120 mA,
240 mA and then the typical switch current limit of 480 mA. Therefore the start-up time mainly depends on the
output capacitor and load current. Typical start-up time with 10 µF output capacitor and 200 mA load current is
800 µs.
LOW DROPOUT OPERATION 100% DUTY CYCLE
The TPS6220x offers a low input to output voltage difference, while still maintaining operation with the 100%
duty cycle mode. In this mode, the P-channel switch is constantly turned on. This is particularly useful in battery
powered applications to achieve longest operation time by taking full advantage of the whole battery voltage
range. The minimum input voltage to maintain regulation, depending on the load current and output voltage, can
be calculated as
ENABLE
Pulling the enable low forces the part into shutdown, with a shutdown quiescent current of typically 0.1 µA. In
this mode, the P-channel switch and N-channel rectifier are turned off, the internal resistor feedback divider is
disconnected, and the whole device is in shutdown mode. If an output voltage, which could be an external
voltage source or super cap, is present during shutdown, the reverse leakage current is specified under
electrical characteristics. For proper operation the enable pin must be terminated and must not be left floating.
Pulling the enable high starts up the TPS6220x with the soft start as previously described.
UNDERVOLTAGE LOCKOUT
The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the
converter from turning on the switch or rectifier MOSFET under undefined conditions.
Submit Documentation Feedback
5
TPS62200 , , TPS62201
TPS62202 , TPS62203 , TPS62207
TPS62204 , TPS62205 , TPS62208
SLVS417E – MARCH 2002 – REVISED MAY 2006
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature (unless otherwise noted)
Supply voltages, V
Voltages on pins SW, EN, FB
Continuous power dissipation, P
Operating junction temperature range, T
Storage temperature, T
Lead temperature (soldering, 10 sec) 260°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(2)
I
(2)
D
J
stg
DISSIPATION RATING TABLE
PACKAGE R
DBV 250°/W 400 mW 220 mW 160 mW
θ JA
(1)
-0.3 V to 7.0 V
-0.3 V to V
See Dissipation Rating Table
-40°C to 150°C
-65°C to 150°C
TA≤ 25°C TA= 70°C TA= 85°C
POWER RATING POWER RATING POWER RATING
UNIT
+0.3 V
CC
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
Supply voltage, V
I
Output voltage range for adjustable output voltage version, V
Output current, I
Inductor, L
Input capacitor, C
Output capacitor, C
Operating ambient temperature, T
Operating junction temperature, T
O
(1)
(1)
I
(1)
O
A
J
O
2.5 6.0 V
0.7 V
4.7 10 µH
4.7 µF
10 µF
40 85 °C
40 125 °C
(1) See the application section for further information.
ELECTRICAL CHARACTERISTICS
VI= 3.6 V, VO= 1.8 V, IO= 200 mA, EN = VIN, TA= -40 °C to 85 °C, typical values are at TA= 25 °C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
V
I
I
Q
ENABLE
V
(EN)
I
(EN)
POWER SWITCH
rds(ON)
I
lkg_(P)
Input voltage range 2.5 6.0 V
Operating quiescent current IO= 0 mA, Device is not switching 15 30 µA
Shutdown supply current EN = GND 0.1 1 µA
Undervoltage lockout threshold 1.5 2.0 V
EN high level input voltage 1.3 V
EN low level input voltage 0.4 V
EN input bias current EN = GND or VIN 0.01 0.1 µA
P-channel MOSFET on-resistance m Ω
N-channel MOSFET on-resistance m Ω
P-channel leakage current V
VIN= V
VIN= V
VIN= V
VIN= V
DS
= 3.6 V 530 690
GS
= 2.5 V 670 850
GS
= 3.6 V 430 540
GS
= 2.5 V 530 660
GS
= 6.0 V 0.1 1 µA
300 mA
V
I
6
Submit Documentation Feedback
TPS62200 , , TPS62201
TPS62202 , TPS62203 , TPS62207
TPS62204 , TPS62205 , TPS62208
SLVS417E – MARCH 2002 – REVISED MAY 2006
ELECTRICAL CHARACTERISTICS (continued)
VI= 3.6 V, VO= 1.8 V, IO= 200 mA, EN = VIN, TA= -40 °C to 85 °C, typical values are at TA= 25 °C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
lkg_(N)
I
(LIM)
OSCILLATOR
f
S
OUTPUT
V
O
V
ref
V
O
I
lkg
I
lkg
N-channel leakage current V
= 6.0 V 0.1 1 µA
DS
P-channel current limit 2.5 V < Vin < 6.0 V 380 480 670 mA
Switching frequency 650 1000 1500 kHz
Adjustable output voltage
range
TPS62200 0.7 V
Reference voltage 0.5 V
Feedback voltage
(1)
TPS62200 VI= 3.6 V to 6.0 V, IO= 0 mA 0% 3%
Adjustable VI= 3.6 V to 6.0 V, 0 mA ≤ IO≤ 300 mA -3% 3%
TPS62207 VI= 2.5 V to 6.0 V, IO= 0 mA 0% 3%
1.2 V VI= 2.5 V to 6.0 V, 0 mA ≤ IO≤ 300 mA -3% 3%
TPS62201 VI= 2.5 V to 6.0 V, IO= 0 mA 0% 3%
1.5 V VI= 2.5 V to 6.0 V, 0 mA ≤ IO≤ 300 mA -3% 3%
TPS62204 VI= 2.5 V to 6.0 V, IO= 0 mA 0% 3%
1.6 V VI= 2.5 V to 6.0 V, 0 mA ≤ IO≤ 300 mA -3% 3%
Fixed output voltage
(1)
TPS62202 VI= 2.5 V to 6.0 V, IO= 0 mA 0% 3%
1.8 V VI= 2.5 V to 6.0 V, 0 mA ≤ IO≤ 300 mA -3% 3%
TPS62208 VI= 2.5 V to 6.0 V, IO= 0 mA 0% 3%
1.875 V VI= 2.5 V to 6.0 V, 0 mA ≤ IO≤ 300 mA -3% 3%
TPS62205 VI= 2.7 V to 6.0 V, IO= 0 mA 0% 3%
2.5 V VI= 2.7 V to 6.0 V, 0 mA ≤ IO≤ 300 mA -3% 3%
TPS62203 VI= 3.6 V to 6.0 V, IO= 0 mA 0% 3%
3.3 V VI= 3.6 V to 6.0 V, 0 mA ≤ IO≤ 300 mA -3% 3%
Line regulation VI= 2.5 V to 6.0 V, IO= 10 mA 0.26 %/V
Load regulation IO= 100 mA to 300 mA 0.0014 %/mA
Leakage current into SW pin Vin > Vout, 0 V ≤ Vsw ≤ Vin 0.1 1 µA
(Rev) Reverse leakage current into pin SW Vin = open, EN = GND, V
= 6.0 V 0.1 1 µA
SW
V
IN
(1) For output voltages ≤ 1.2 V a 22 µF output capacitor value is required to achieve a maximum output voltage accuracy of 3% while
operating in power save mode (PFM mode)
Submit Documentation Feedback
7