Texas Instruments TPS54362B EVM User Manual
1 Introduction
The Texas Instruments TPS54362BEVM evaluation module (EVM) helps designers evaluate the operation
and performance of the TPS54362B-Q1 switch-mode power-supply buck regulator. The device is
configurable and can be configured to switch from 200 kHz up to 2.2 MHz. This EVM is optimized for EMI
performance. For the EMI test results, see the application report Passing CISPR25 Radiated Emissions
Using TPS54362B-Q1, SLVA661.
CONVERTER IC PACKAGE
U1 TPS54362BQPWPQ1 PWP-20
EVM INPUT VOLTAGE RANGE DEFAULT OUTPUT SETTING
TPS54362BEVM VI= 3.6 V to 40 V 5 V at currents up to 3 A
User's Guide
SLVUA81–May 2014
TPS54362B EVM User’s Guide
Table 1. Device and Package Configurations
Table 2. Input and Output Summary
1.1 Performance Summary
The TPS54362BEVM is optimized to meet the CISPR25 EMC standard for automotive components.
TPS54362BEVM was tested at V
reduce emissions to levels deemed acceptable by the previously mentioned standard.
The switching frequency is externally set at a nominal 500 KHz. The compensation components are
external to the integrated circuit (IC) and have been selected to optimize the transient performance of the
device. An external divider allows for an adjustable output voltage.
Table 3 lists a summary of the TPS54362BEVM performance specifications. Specifications are given for
an input voltage of VI= 12 V and an output voltage of 5 V, unless otherwise specified. The
TPS54362BEVM is designed and tested for VI= 6 V to 48 V. The ambient temperature is 25°C for all
measurements, unless otherwise noted.
Table 3. TPS54362BEVM Performance Specification Summary
SPECIFICATION TEST CONDITION MIN TYP MAX UNIT
VIN operating voltage range 6 12 48 V
Output voltage set-point 5 V
Output current range VI= 7 V to 48 V 0 3 A
Operating frequency 500 kHz
= 12 V an output voltage of 5 V at 2 A. The layout is designed to
(BAT)
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ENA ENA
Disabled Enabled
LPM
Disabled
LPM
Enabled
LPM
Disabled with
Protection Diode
Setup
2 Setup
This section describes the jumpers and connectors on the EVM as well and how to properly connect, set
up, and use the TPS54362BEVM.
2.1 Input-Output Connector Description
J1 – Input — This jumper is the power input terminal for the converter. The terminal block provides a
power (V
harness.
J2 – Output — This jumper is the regulated output voltage for the converter. The terminal block provides
a power (VO) and ground (GND) connection to allow the user to attach the EVM to a cable harness.
J3 – Sync — This jumper is the input terminal for an optional external input clock to the converter. The
external clock can be used to synchronize the switching frequency for multiple devices. The
external clock frequency, if used, must meet the guideline as shown in Equation 1.
ƒS< ƒ
where
JP1 – LPM — This jumper is the jumper used to enable Low Power Mode. The jumper allows LPM to be
enabled or disabled. The “disabled with protection diode” selection should be used if the output
voltage is programmed for voltages greater than 5 V. The external Zener will prevent over voltage
damage to the LPM input.
) and ground (GND) connection to allow the user to attach the EVM to a cable
(BAT)
< 2 × ƒ
(EXT)
• ƒSis the switching frequency (1)
S
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JP2 – Enable—The converter is enabled when the EN pin is high and is disabled when the EN pin is low.
The jumper placement allows the converter to be enabled or disabled.
2
TPS54362B EVM User’s Guide SLVUA81–May 2014
Figure 2. Enable Jumper Settings
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Figure 1. LPM Jumper Settings
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Delay
7 ms
50 ms 150 ms 200 ms
Delay Delay Delay
SR SR SR SR
1 V, 2.5 ns
1 V, 4 ns 1 V, 6 ns
1 V, 1.2 ns
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JP3 – Slew Rate — This jumper sets the slew rate for the switch pin. The device slew rate should be set
JP4 – Delay — This jumper sets the delay time to assert the RST pin low after the supply exceeds the
Setup
between 15 ns and 200 ns. Slower slew rates can improve EMI performance, but increase
switching losses. Jumper resistors allow the slew rate to be set to four set points. The user can set
a specific slew rate by changing one of the slew rate set resistors, either R8, R9, or R10.
NOTE: The slew rate should be set to 1 V, 1.2 ns if the EVM is configured for a 2-MHz
switching frequency.
Figure 3. Slew-Rate Jumper Settings
programmed VREG_RST voltage. The delay can be programmed in the range of 7 ms to 200 ms.
Jumper capacitors allow the reset delay to be set to four set points. The user can set a specific
delay time by changing one of the delay capacitors, either C13, C14, or C15. The RST signal can
be monitored on the RST test point.
Figure 4. Reset Delay-Time Jumper Settings
2.2 Setup
The input voltage range for the converter is 3.6 V to 48 V. If the input voltage is lower than 5 V (default
setting) the output voltage will track the input voltage within the drop out proportional to the load current
and the internal FET on resistance.
2.3 Operation
For proper operation of the TPS54362B-Q1 device, JP1, JP2, JP3, and JP4 should be properly
configured. The following lists the recommended setting which uses shorting blocks:
• JP1 to enabled
• JP2 to enabled
• JP3 to 1 V, 2.5 ns
• JP4 to 200 ms
In this configuration, the device powers up when power is applied.
Setting the R6 and R7 resistors to transition the EN input low as the supply voltage drops implements
undervoltage lockout. Use Equation 2 to set the values for R6 and R7.
V
= ENTHRES × (1+ R6 / R7)
dis
where
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Board Layout
• ENTHRES is around 1 V (2)
Resistor R7 is not populated on this EVM to reduce the quiescent supply current if this feature is not
required.
3 Board Layout
Figure 5, Figure 6, Figure 7, Figure 8, and Figure 9 show the board layout for the TPS54362BEVM PWB.
The EVM offers resistors, capacitors, and jumpers to program the switch-pin slew rate and regulator turnon delay. Jumpers are also provided to enable the device and to enable the low power-mode option. The
TPS54362B-Q1 converter offers high efficiency, but dissipates power. The PowerPAD™ package offers
an exposed thermal pad to enhance thermal performance. This pad must be soldered to the copper
landing on the PCB for optimal performance. The PCB provides 2-oz copper planes on the top and bottom
to dissipate heat.
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Figure 5. Top Assembly Layer
4
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