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TPS53125EVM-599
User Manual
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Texas Instruments TPS53125EVM-599 User Manual

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User's Guide
SLVU392–July 2010

TPS53125EVM-599

The TPS53125EVM-599 Evaluation Module presents an easy-to-use reference design for a common dual output power supply using the TPS53125 controller in cost-sensitive applications. Also included are the schematic, board layout, and bill of materials.
Contents
1 Description ................................................................................................................... 2
1.2 Features ............................................................................................................. 2
2 TPS53125EVM-599 Electrical Performance Specifications ........................................................... 2
3 TPS53125EVM-599 Schematic ........................................................................................... 3
4 Connector and Test Point Descriptions .................................................................................. 4
4.1 Enable Jumpers/Switches –SW1 and SW2 .................................................................... 4
4.2 Test Point Descriptions ............................................................................................ 4
5 Test Setup ................................................................................................................... 5
5.1 Equipment ........................................................................................................... 5
5.4 Output Ripple Voltage Measurement Procedure .............................................................. 8
6 TPS53125EVM-599 Test Data ............................................................................................ 8
6.2 Line and Load Regulation ......................................................................................... 9
6.3 Output Voltage Ripple and Switching Node Waveforms .................................................... 10
6.4 Switch Node ....................................................................................................... 11
7 TPS53125EVM-599 Assembly Drawings and Layout ................................................................ 12
8 TPS53125EVM-599 Bill of Materials .................................................................................... 15
List of Figures
1 TPS53125EVM-599 Schematic........................................................................................... 3
2 TPS53125EVM-599 Recommended Test Setup ....................................................................... 7
3 TPS53125EVM-599 Efficiency vs Load Current........................................................................ 8
4 TPS53125EVM-599 Efficiency vs Load Current........................................................................ 9
5 TPS53125EVM-599 Output Voltage vs Load Current ................................................................. 9
6 TPS53125EVM-599 Output Voltage vs Load Current................................................................ 10
7 TPS53125EVM-599 Output Voltage Ripple and Switching Waveform............................................. 10
8 TPS53125EVM-599 Output Voltage Ripple............................................................................ 11
9 TPS53125EVM-599 Switching Waveforms ............................................................................ 11
10 TPS53125EVM-599 Switching Waveforms ............................................................................ 12
11 TPS53125EVM-599 Component Placement, Viewed From Top.................................................... 12
12 TPS53125EVM-599 Top Copper, Viewed From Top................................................................. 13
13 TPS53125EVM-599 Bottom Copper, Viewed From Bottom......................................................... 13
14 TPS53125EVM-599 Internal 1, X-Ray View From Top............................................................... 14
15 TPS53125EVM-599 Internal 2, X-Ray View From Top............................................................... 14
D-CAP2 is a trademark of Texas Instruments.
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
1
Description
1 TPS53125EVM-599 Electrical and Performance Specifications...................................................... 2
2 Test Point Description...................................................................................................... 4
3 TPS53125EVM-599 Bill of Materials.................................................................................... 15

1 Description

The TPS53125EVM-599 evaluation board provides the user with a convenient way to evaluate the TPS53125 Dual Synchronous Step-Down Controller in a realistic cost-sensitive application. Providing both a low core-type 1.05-V and I/O-type, 1.8-V outputs at up to 4 A from a loosely regulated 12-V (8-V to 22-V) source, the TPS53125EVM-599 includes switches and test points to assist users in evaluating the performance of the TPS53125 controller in their applications.

1.1 Applications

• Digital television
• Set-top box
• DSL and cable modems
• Cost-sensitive digital consumer products

1.2 Features

• 8-V to 22-V input
• 1.05-V and 1.8-V outputs
• Up to 4 A per channel output
• 350-kHz pseudo-fixed frequency D-CAP2™ mode control
• Independent enable switches for power-on/power-off testing
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List of Tables

2 TPS53125EVM-599 Electrical Performance Specifications

Table 1. TPS53125EVM-599 Electrical and Performance Specifications
Parameter Notes and Conditions Min Typ Max Unit
Input Characteristics
V
IN
I
IN
V
IN_UVLO
Output Characteristics
V
OUT1
V
OUT1_rip
I
OUT1
V
OUT2
V
OUT2_rip
I
OUT2
Systems Characteristics
F
SW
hpk Peak Efficiency VIN=12 – 88% – h Full Load Efficiency VIN= 12, I
Input Voltage 8 12 22 V Input Current VIN= 12 V, I No Load Input Current VIN= 12 V, I Input UVLO I
= 4 4.0 4.2 4.5 V
OUT
Output Voltage 1 VIN= 12 V, I
= 4 A, I
OUT1
= 0 A – 20 35 mA
OUT
= 2 A 1.03 1.05 1.07 V
OUT
= 4 A – 1.2 1.5 A
OUT2
Line Regulation VIN= 8 to 22 – – 1% Load Regulation I Output Voltage Ripple VIN= 12 V, I
= 0 A to 4 A – – 1%
OUT
= 4 A – – 30 mVpp
OUT
Output Current 1 VIN= 8 V to 22 V 0 4 A Output Voltage 2 VIN= 12 V, I
= 2 A 1.78 1.80 1.82 V
OUT
Line Regulation VIN= 8 V to 22 V – – 1% Load Regulation I Output Voltage Ripple VIN= 12 V, I
= 0 A to 4 A – – 1%
OUT
= 4 A – – 30 mVpp
OUT2
Output Current 2 VIN= 8 V to 22 V 0 4 A
Switching Frequency 200 350 400 kHz
= I
OUT1
= 4 A – 80% –
OUT2
2
TPS53125EVM-599 SLVU392–July 2010
Copyright © 2010, Texas Instruments Incorporated
+
+
+
+
+
www.ti.com

3 TPS53125EVM-599 Schematic

TPS53125EVM-599 Schematic
For Reference Only, See Table x: for Specific Values
Figure 1. TPS53125EVM-599 Schematic
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
3
Connector and Test Point Descriptions

4 Connector and Test Point Descriptions

4.1 Enable Jumpers/Switches –SW1 and SW2

The TPS53125EVM-599 board includes independent enable switches for each of the two outputs. When the switch is in the DIS position, the channel is disabled and discharged per the TPS53125’s internal discharge characteristics.
To enable VOUT1, place SW1 in the EN position. To enable VOUT2, place SW2 in the EN position.

4.2 Test Point Descriptions

Table 2 lists the test points, their labels, uses, and where additional information is located.
Table 2. Test Point Description
Test Point Label Use Section
TP1 TEST1 Monitor Channel 1 Soft-Start Voltage 4.2.4 TP2 TEST2 Monitor Channel 2 Soft-Start Voltage 4.2.4 TP3 GND Ground for Input Voltage 4.2.1 TP4 GND Ground for Channel 1 Output Voltage 4.2.2 TP5 SW1 Monitor Switching Node for Channel 1 4.2.5 TP6 GND Ground for Channel 2 Output Voltage 4.2.3 TP7 VO2 Monitor Output Voltage for Channel 2 4.2.3 TP8 VO1 Monitor Output Voltage for Channel 1 4.2.2 TP9 VIN Monitor Input Voltage 4.2.1 TP10 VREG5 Monitor Output of VREG5 Regulator 4.2.6 TP11 SW2 Monitor Switching Node for Channel 2 4.2.5 CN1 VOUT1 Monitor Output Voltage for Channel 1 4.2.2 CN2 VOUT2 Monitor Output Voltage for Channel 2 4.2.3
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4.2.1 Input Voltage Monitoring – TPS and TP9
The TPS53125EVM-599 provides two test points for measuring the voltage applied to the module. This allows the user to measure the actual module voltage without losses from input cables and connectors. Measure all input voltage measurements between TP9 and TP3. To use TP9 and TP3, connect a voltmeter positive terminal to TP9 and negative terminal to TP3.
4.2.2 Channel 1 Output Voltage Monitoring – TP4 and TP8 or CN1
TPS53125EVM-599 provides two test points for measuring the voltage generated at the VO1 Output by the module. This allows the user to measure the actual output voltage without losses from output cables and connectors. Measure all DC Output voltage between TP8 and TP4. To use TP8 and TP4, connect a voltmeter positive terminal to TP8 and negative terminal to TP4.
TPS53125EVM-599 also provides a shielded oscilloscope jack to allow ac measurements of the output ripple. Insert an oscilloscope probe with exposed ground barrel into CN1 for all Output 1 ripple measurements.
4.2.3 Channel 2 Output Voltage Monitoring – TP6 and TP7 or CN2
TPS53125EVM-599 provides two test points for measuring the voltage generated at the VO1 Output by the module. This allows the user to measure the actual output voltage without losses from output cables and connectors. Measure all dc output voltage measurements between TP7 and TP6. To use TP7 and TP6, connect a voltmeter positive terminal to TP7 and negative terminal to TP6.
TPS53125EVM-599 also provides a shielded oscilloscope jack to allow ac measurements of the output ripple. Insert an oscilloscope probe with exposed ground barrel into CN2. for all Output 2 ripple measurements.
4
TPS53125EVM-599 SLVU392–July 2010
Copyright © 2010, Texas Instruments Incorporated
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4.2.4 Soft-Start Voltage Monitoring – TP1, TP2, and TP3
TPS53125EVM-599 provides two test points for measuring the soft-start ramp voltages. TP1 monitors the soft-start ramp of Channel 1. TP2 monitors the soft-start ramp of Channel 2. To use TP1 or TP2, connect an oscilloscope probe between TP1 or TP2 and TP3.
4.2.5 Switching Node Monitoring – TP3, TP5, and TP11
TPS53125EVM-599 provides two test points for measuring the switching node waveform voltages. TP5 monitors the switching node of Channel 1. TP2 monitors the switching node of Channel 2. To use TP5 or TP11, connect an oscilloscope probe between TP5 or TP11 and TP3
4.2.6 5-V Regulator Output Monitoring – TP3 and TP10
TPS53125EVM-599 provides a test point for measuring the output of the internal 5-V regulator. TP10 monitors the output voltage of the internal 5-V regulator. To use TP10, connect a voltmeter positive terminal to TP10 and negative terminal to TP3.

5 Test Setup

5.1 Equipment

The following equipment is recommended for testing the TPS53125EVM-599 evaluation board.
5.1.1 Voltage Source
The input voltage source, V minimum.
, must be a 0-V to 15-V, variable dc source capable of supplying 3 Adc
VIN
Test Setup
5.1.2 Meters
A1: 0-Adc to 4-Adc ammeter V1: VIN, 0-V to 22-V voltmeter V2: VOUT1, 0-V to 2-V voltmeter V3: VOUT2, 0-V to 2-V voltmeter
5.1.3 Loads
LOAD1: One output load is an electronic load set for constant current mode capable of 0 Adc to 4 Adc at
1.05 Vdc. LOAD2: The other output load is an electronic load set for constant current mode capable of 0 Adc to 4
Adc at 1.8 Vdc.
5.1.4 Oscilloscope and Probe
The oscilloscope, analog or digital, must be set for ac-coupled measurement with a 20-MHz bandwidth limiting. Use 20 mV/division vertical resolution, 1.0 µs/division horizontal resolution for the Output Ripple Voltage Test. Set cursors at +20 mV and –20 mV.
The oscilloscope probe must be a Tektronix P6138 or equivalent oscilloscope probe with exposed conductive ground barrels.
5.1.5 Recommended Wire Gauge V
to J3 – The connection between the source voltage, V
VIN
much as 2 Adc. The minimum recommended wire size is AWG #16 with the total length of wire less than 2 feet (1-foot input, 1-foot return).
and J1 of TPS53125EVM-599 can carry as
VIN
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
5
Test Setup
J1 to LOAD1 and J2 to LOAD2 - The connection between J1 and LOAD1 and J2 and LOAD2 of TPS53125EVM-599 can carry as much as 4 Adc each. The minimum recommended wire size is AWG #14, with the total length of wire less than 2 feet (1-foot input, 1-foot return).
5.1.6 Other Test Equipment Fan – The TPS53125EVM-599 Evaluation Module includes components that can become hot to the touch.
Because this EVM is not enclosed to allow probing of circuit nodes, a small fan capable of 200-400 lfm is required to reduce component temperatures when operating.

5.2 Equipment Setup

Figure 2 shows the basic test setup that is recommended to evaluate the TPS53125EVM-599. Note that
although the return for J3 and J1 and JP2 are the same system ground, the connections must remain separate as shown in Figure 2.
5.2.1 Test Procedure
1. When working at an ESD workstation, ensure that wrist straps, bootstraps, or mats are connected
referencing the user to earth ground before power is applied to the EVM. Electrostatic smock and safety glasses are also recommended.
2. Prior to connecting the dc input source, VIN, it is advisable to limit the source current from VINto 3 Adc
maximum. Ensure that VINis initially set to 0 V and connected as shown in Figure 2.
3. Verify SW1 and SW2 are in the desired position.
4. Increase VIN from 0 V to 12 Vdc.
5. Vary VIN between 8 Vdc and 22 Vdc.
6. Vary LOAD1 between 0 A and 4 Adc.
7. Vary LOAD2 between 0 A and 4 Adc.
8. Adjust SW1 between EN and DIS.
9. Adjust SW2 between EN and DIS.
10. Set SW1 to DIS.
11. Set SW2 to DIS.
12. Decrease LOAD1 to 0 A.
13. Decrease LOAD2 to 0 A.
14. Decrease VIN to 0 V.
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6
TPS53125EVM-599 SLVU392–July 2010
Copyright © 2010, Texas Instruments Incorporated
LOAD1
1.05V @ 4A
FAN
V2
+
-
Oscilloscope
1MW, AC
20mV / div
20MHz
LOAD2
1.8V @ 4A
V3
-
+
-
+
-
+
A1
-
+
V
VIN
V1
+
-
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5.2.2 Test Setup Diagram
Test Setup
Figure 2. TPS53125EVM-599 Recommended Test Setup

5.3 Start-Up/Shutdown Procedures

Perform the start-up and shutdown procedures in the following manner.
1. Increase VINfrom 0 V to 12 Vdc.
2. Vary LOAD1 from 0 V – 4 Adc.
3. Vary LOAD2 from 0 V – 4 Adc.
4. Vary VINfrom 8 Vdc to 22 Vdc.
5. Decrease VINto 0 Vdc.
6. Decrease LOAD1 to 0 A.
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
7
0 1 2 3 4 5
I -LoadCurrent- A
LOAD
50
55
60
65
70
75
80
85
90
95
h -Efficiency-%
V =8V
I
V =12V
I
V =22V
I
TPS53125EVM-599 Test Data
7. Decrease LOAD2 to 0 A.

5.4 Output Ripple Voltage Measurement Procedure

Perform the Output Ripple Voltage Measurement procedure in the following manner.
1. Increase VINfrom 0 V to 12 Vdc.
2. Adjust LOAD1 to desired load between 0 Adc and 4 Adc.
3. Adjust LOAD2 to desired load between 0 Adc and 4 Adc.
4. Adjust VINto desired load between 8 Vdc and 22 Vdc.
5. Connect oscilloscope probe to CN1 or CN2 shown in Figure 2.
6. Measure Output Ripple.
7. Decrease VINto 0 Vdc.
8. Decrease LOAD1 to 0 A.
9. Decrease LOAD2 to 0 A.

5.5 Equipment Shutdown

Shut down the equipment in the following manner.
1. Shut down oscilloscope.
2. Shut down VIN.
3. Shut down LOAD1.
4. Shut down LOAD2.
5. Shut down FAN.
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6 TPS53125EVM-599 Test Data

Figure 3 through Figure 10 present typical performance curves for the TPS53125EVM-599. Because
actual performance data can be affected by measurement techniques and environmental variables, these curves are presented for reference and may differ from actual field measurements.

6.1 Efficiency

VIN= 8 V – 22 V, V
8
TPS53125EVM-599 SLVU392–July 2010
OUT1
= 1.05 V, I
= 0 A – 4 A
OUT1
Figure 3. TPS53125EVM-599 Efficiency vs Load Current
Copyright © 2010, Texas Instruments Incorporated
0
10
20
30
40
50
60
70
80
90
100
h -Efficiency-%
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
I -LoadCurrent- A
LOAD
V =8V
I
V =12V
I
V =22V
I
V =8V
I
V =12V
I
V =22V
I
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
I -LoadCurrent- A
LOAD
1.05
1.055
1.06
1.065
1.07
V -OutputVoltage-V
O
www.ti.com
TPS53125EVM-599 Test Data

6.2 Line and Load Regulation

VIN= 8 V – 22 V, V
VIN= 8 V – 22 V, V
OUT2
= 1.80 V, I
= 0 A – 4 A
OUT2
Figure 4. TPS53125EVM-599 Efficiency vs Load Current
OUT1
= 1.05 V, I
= 0 A – 4 A
OUT
Figure 5. TPS53125EVM-599 Output Voltage vs Load Current
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
9
1.82
1.825
1.83
1.835
1.84
1.845
1.85
1.855
1.86
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
I -LoadCurrent- A
LOAD
V -OutputVoltage-V
O
V =8V
I
V =12V
I
V =22V
I
TPS53125EVM-599 Test Data
www.ti.com
VIN= 8 V – 22 V, V
OUT1
= 1.80 V, I
= 0 A – 4 A
OUT
Figure 6. TPS53125EVM-599 Output Voltage vs Load Current

6.3 Output Voltage Ripple and Switching Node Waveforms

VIN= 12, V
OUT1
= 1.05, I
OUT1
= 4 A
Figure 7. TPS53125EVM-599 Output Voltage Ripple and Switching Waveform
10
TPS53125EVM-599 SLVU392–July 2010
Copyright © 2010, Texas Instruments Incorporated
www.ti.com
TPS53125EVM-599 Test Data
VIN= 12, V
OUT2

6.4 Switch Node

= 1.80, I
= 4 A
OUT2
Figure 8. TPS53125EVM-599 Output Voltage Ripple
tVIN= 12, V
OUT1
= 1.05, I
OUT1
= 4A,
Ch1: TP5 (SW1)
Figure 9. TPS53125EVM-599 Switching Waveforms
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
11
TPS53125EVM-599 Assembly Drawings and Layout
www.ti.com
VIN= 12, V Ch1: TP11 (SW2)
OUT2
= 1.80, I
OUT2
= 4A
Figure 10. TPS53125EVM-599 Switching Waveforms

7 TPS53125EVM-599 Assembly Drawings and Layout

The following figures (Figure 11 through Figure 15) show the design of the TPS53125EVM-599 printed-circuit board. The EVM has been designed using a 4-layer, 2-oz copper-clad circuit board 3.5 in
2.7 to allow the user to easily view, probe, and evaluate the TPS53125 control IC in a practical application. Moving components to both sides of the PCB or using additional internal layers can offer additional size reduction for space-constrained systems.
12
Figure 11. TPS53125EVM-599 Component Placement, Viewed From Top
TPS53125EVM-599 SLVU392–July 2010
Copyright © 2010, Texas Instruments Incorporated
www.ti.com
TPS53125EVM-599 Assembly Drawings and Layout
Figure 12. TPS53125EVM-599 Top Copper, Viewed From Top
Figure 13. TPS53125EVM-599 Bottom Copper, Viewed From Bottom
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
13
TPS53125EVM-599 Assembly Drawings and Layout
Figure 14. TPS53125EVM-599 Internal 1, X-Ray View From Top
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14
Figure 15. TPS53125EVM-599 Internal 2, X-Ray View From Top
TPS53125EVM-599 SLVU392–July 2010
Copyright © 2010, Texas Instruments Incorporated
www.ti.com
TPS53125EVM-599 Bill of Materials

8 TPS53125EVM-599 Bill of Materials

The Table 3 contains the bill of materials for TPS53125EVM-599. The reference designators reference the schematic in Figure 1 and assembly locations in Figure 11. The components listed with a quantity of 0 are not populated on the PCB but are provided for reference.
Table 3. TPS53125EVM-599 Bill of Materials
QTY RefDes Value Description Size Part Number MFR
0 C1 Capacitor, Aluminum, 25V, 20% 0.328 x 0.390 inch Std Std 0 C12, C19, Capacitor, Ceramic, 0603 Std Std
C20, C21 0 C14, C7 Capacitor, OS CON, 6.3V,20% 0.260 Sq inch Std Std 1 C15 4.7µF Capacitor, Ceramic, 10V, X5R, 20% 0805 Std Std 1 C16 1µF Capacitor, Ceramic, 16V, X5R, 20% 0805 Std Std 4 C9, C10, 47µF Capacitor, Ceramic, 6.3V, X5R, 20% 1206 Std Std
C17, C18 4 C2, C3, C4, 10µF Capacitor, Ceramic, 25V, X5R, 20% 1210 Std Std
C5 2 C22, C23 4700pF Capacitor, Ceramic, Low Inductance, 0603 Std Std
2 C6, C11 0.1µF Capacitor, Ceramic, 50V, X7R, 10% 0603 Std Std 0 C8, C13 330µF Capacitor, PXE, 330-µF, 4.0-V, 15-mΩ, 7343 (D) APXE4R0ARA331MF61G NIPPON CHEMI-CON
2 CN1, CN2 131-5031-00 Adaptor, 3.5-mm probe clip ( or 0.2 131-4244-00 Tektronix
0 D1, D2 Diode, Schottky, 1-A, 30-V SMA Std Std 3 J1, J2, J3 ED120/2DS Terminal Block, 2-pin, 15-A, 5.1mm 0.40 x 0.35 inch ED120/2DS OST 2 L1, L2 3.3µH Inductor, SMT, 5.6A, 29.7 mΩ 0.256 x 0.280 inch SPM6530T-3R3M TDK 2 Q1, Q3 FDS8876 MOSFET, N-ch, 30-V, 10.2-A, 14-mΩ SO8 FDS8876 Fairchild 2 Q2, Q4 FDS8690 MOSFET, N-ch, 30-V, 11.4-A, 11.4-mΩ SO8 FDS8690 Fairchild 1 R1 1.82K Resistor, Chip, 1/16W, 1% 0603 Std Std 2 R11, R12 10 Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R13 430 Resistor, Chip, 1/16W, 1% 0603 Std Std 0 R2, R7, R9 Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R3 3.32K Resistor, Chip, 1/16W, 1% 0603 Std Std 2 R4, R6 10.0K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R5 12.1K Resistor, Chip, 1/16W, 1% 0603 Std Std 2 R8, R10 5.62K Resistor, Chip, 1/16W, 1% 0603 Std Std 2 SW1, SW2 G12AP-R0 Switch, ON-ON Mini Toggle 0.28 x 0.18" G12AP-R0 Nikkai 4 TP1, TP2, 5012 Test Point, White, Thru Hole 0.125 x 0.125 inch 5012 Keystone
TP5, TP11 1 TP10 5013 Test Point, Orange, Thru Hole 0.125 x 0.125 inch 5013 Keystone 3 TP3, TP4, 5011 Test Point, Black, Thru Hole 0.125 x 0.125 inch 5011 Keystone
TP6 2 TP7, TP8 5014 Test Point, Yellow, Thru Hole 0.125 x 0.125 inch 5014 Keystone 1 TP9 5010 Test Point, Red, Thru Hole 0.125 x 0.125 inch 5010 Keystone 1 U1 TPS53125PW IC, Dual Synchronous Step-Down TSSOP TPS53125PW TI
16V, X7R, 20%
20%
131-5031-00)
Controller For Low-Voltage Power Rails
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
15
Evaluation Board/Kit Important Notice
Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of
patents or services described herein.
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI’s environmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used.
FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and
can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.
EVM Warnings and Restrictions
It is important to operate this EVM within the input voltage range of 8 V to 22 V and the output voltage range of 0.8 V to 5.5 V . Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 60° C. The EVM is designed to operate properly with certain components above 60° C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch.
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