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TPS53125EVM-599
User Manual
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Texas Instruments TPS53125EVM-599 User Manual

User's Guide
SLVU392–July 2010

TPS53125EVM-599

The TPS53125EVM-599 Evaluation Module presents an easy-to-use reference design for a common dual output power supply using the TPS53125 controller in cost-sensitive applications. Also included are the schematic, board layout, and bill of materials.
Contents
1 Description ................................................................................................................... 2
1.2 Features ............................................................................................................. 2
2 TPS53125EVM-599 Electrical Performance Specifications ........................................................... 2
3 TPS53125EVM-599 Schematic ........................................................................................... 3
4 Connector and Test Point Descriptions .................................................................................. 4
4.1 Enable Jumpers/Switches –SW1 and SW2 .................................................................... 4
4.2 Test Point Descriptions ............................................................................................ 4
5 Test Setup ................................................................................................................... 5
5.1 Equipment ........................................................................................................... 5
5.4 Output Ripple Voltage Measurement Procedure .............................................................. 8
6 TPS53125EVM-599 Test Data ............................................................................................ 8
6.2 Line and Load Regulation ......................................................................................... 9
6.3 Output Voltage Ripple and Switching Node Waveforms .................................................... 10
6.4 Switch Node ....................................................................................................... 11
7 TPS53125EVM-599 Assembly Drawings and Layout ................................................................ 12
8 TPS53125EVM-599 Bill of Materials .................................................................................... 15
List of Figures
1 TPS53125EVM-599 Schematic........................................................................................... 3
2 TPS53125EVM-599 Recommended Test Setup ....................................................................... 7
3 TPS53125EVM-599 Efficiency vs Load Current........................................................................ 8
4 TPS53125EVM-599 Efficiency vs Load Current........................................................................ 9
5 TPS53125EVM-599 Output Voltage vs Load Current ................................................................. 9
6 TPS53125EVM-599 Output Voltage vs Load Current................................................................ 10
7 TPS53125EVM-599 Output Voltage Ripple and Switching Waveform............................................. 10
8 TPS53125EVM-599 Output Voltage Ripple............................................................................ 11
9 TPS53125EVM-599 Switching Waveforms ............................................................................ 11
10 TPS53125EVM-599 Switching Waveforms ............................................................................ 12
11 TPS53125EVM-599 Component Placement, Viewed From Top.................................................... 12
12 TPS53125EVM-599 Top Copper, Viewed From Top................................................................. 13
13 TPS53125EVM-599 Bottom Copper, Viewed From Bottom......................................................... 13
14 TPS53125EVM-599 Internal 1, X-Ray View From Top............................................................... 14
15 TPS53125EVM-599 Internal 2, X-Ray View From Top............................................................... 14
D-CAP2 is a trademark of Texas Instruments.
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
1
Description
1 TPS53125EVM-599 Electrical and Performance Specifications...................................................... 2
2 Test Point Description...................................................................................................... 4
3 TPS53125EVM-599 Bill of Materials.................................................................................... 15

1 Description

The TPS53125EVM-599 evaluation board provides the user with a convenient way to evaluate the TPS53125 Dual Synchronous Step-Down Controller in a realistic cost-sensitive application. Providing both a low core-type 1.05-V and I/O-type, 1.8-V outputs at up to 4 A from a loosely regulated 12-V (8-V to 22-V) source, the TPS53125EVM-599 includes switches and test points to assist users in evaluating the performance of the TPS53125 controller in their applications.

1.1 Applications

• Digital television
• Set-top box
• DSL and cable modems
• Cost-sensitive digital consumer products

1.2 Features

• 8-V to 22-V input
• 1.05-V and 1.8-V outputs
• Up to 4 A per channel output
• 350-kHz pseudo-fixed frequency D-CAP2™ mode control
• Independent enable switches for power-on/power-off testing
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List of Tables

2 TPS53125EVM-599 Electrical Performance Specifications

Table 1. TPS53125EVM-599 Electrical and Performance Specifications
Parameter Notes and Conditions Min Typ Max Unit
Input Characteristics
V
IN
I
IN
V
IN_UVLO
Output Characteristics
V
OUT1
V
OUT1_rip
I
OUT1
V
OUT2
V
OUT2_rip
I
OUT2
Systems Characteristics
F
SW
hpk Peak Efficiency VIN=12 – 88% – h Full Load Efficiency VIN= 12, I
Input Voltage 8 12 22 V Input Current VIN= 12 V, I No Load Input Current VIN= 12 V, I Input UVLO I
= 4 4.0 4.2 4.5 V
OUT
Output Voltage 1 VIN= 12 V, I
= 4 A, I
OUT1
= 0 A – 20 35 mA
OUT
= 2 A 1.03 1.05 1.07 V
OUT
= 4 A – 1.2 1.5 A
OUT2
Line Regulation VIN= 8 to 22 – – 1% Load Regulation I Output Voltage Ripple VIN= 12 V, I
= 0 A to 4 A – – 1%
OUT
= 4 A – – 30 mVpp
OUT
Output Current 1 VIN= 8 V to 22 V 0 4 A Output Voltage 2 VIN= 12 V, I
= 2 A 1.78 1.80 1.82 V
OUT
Line Regulation VIN= 8 V to 22 V – – 1% Load Regulation I Output Voltage Ripple VIN= 12 V, I
= 0 A to 4 A – – 1%
OUT
= 4 A – – 30 mVpp
OUT2
Output Current 2 VIN= 8 V to 22 V 0 4 A
Switching Frequency 200 350 400 kHz
= I
OUT1
= 4 A – 80% –
OUT2
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TPS53125EVM-599 SLVU392–July 2010
Copyright © 2010, Texas Instruments Incorporated
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3 TPS53125EVM-599 Schematic

TPS53125EVM-599 Schematic
For Reference Only, See Table x: for Specific Values
Figure 1. TPS53125EVM-599 Schematic
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
3
Connector and Test Point Descriptions

4 Connector and Test Point Descriptions

4.1 Enable Jumpers/Switches –SW1 and SW2

The TPS53125EVM-599 board includes independent enable switches for each of the two outputs. When the switch is in the DIS position, the channel is disabled and discharged per the TPS53125’s internal discharge characteristics.
To enable VOUT1, place SW1 in the EN position. To enable VOUT2, place SW2 in the EN position.

4.2 Test Point Descriptions

Table 2 lists the test points, their labels, uses, and where additional information is located.
Table 2. Test Point Description
Test Point Label Use Section
TP1 TEST1 Monitor Channel 1 Soft-Start Voltage 4.2.4 TP2 TEST2 Monitor Channel 2 Soft-Start Voltage 4.2.4 TP3 GND Ground for Input Voltage 4.2.1 TP4 GND Ground for Channel 1 Output Voltage 4.2.2 TP5 SW1 Monitor Switching Node for Channel 1 4.2.5 TP6 GND Ground for Channel 2 Output Voltage 4.2.3 TP7 VO2 Monitor Output Voltage for Channel 2 4.2.3 TP8 VO1 Monitor Output Voltage for Channel 1 4.2.2 TP9 VIN Monitor Input Voltage 4.2.1 TP10 VREG5 Monitor Output of VREG5 Regulator 4.2.6 TP11 SW2 Monitor Switching Node for Channel 2 4.2.5 CN1 VOUT1 Monitor Output Voltage for Channel 1 4.2.2 CN2 VOUT2 Monitor Output Voltage for Channel 2 4.2.3
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4.2.1 Input Voltage Monitoring – TPS and TP9
The TPS53125EVM-599 provides two test points for measuring the voltage applied to the module. This allows the user to measure the actual module voltage without losses from input cables and connectors. Measure all input voltage measurements between TP9 and TP3. To use TP9 and TP3, connect a voltmeter positive terminal to TP9 and negative terminal to TP3.
4.2.2 Channel 1 Output Voltage Monitoring – TP4 and TP8 or CN1
TPS53125EVM-599 provides two test points for measuring the voltage generated at the VO1 Output by the module. This allows the user to measure the actual output voltage without losses from output cables and connectors. Measure all DC Output voltage between TP8 and TP4. To use TP8 and TP4, connect a voltmeter positive terminal to TP8 and negative terminal to TP4.
TPS53125EVM-599 also provides a shielded oscilloscope jack to allow ac measurements of the output ripple. Insert an oscilloscope probe with exposed ground barrel into CN1 for all Output 1 ripple measurements.
4.2.3 Channel 2 Output Voltage Monitoring – TP6 and TP7 or CN2
TPS53125EVM-599 provides two test points for measuring the voltage generated at the VO1 Output by the module. This allows the user to measure the actual output voltage without losses from output cables and connectors. Measure all dc output voltage measurements between TP7 and TP6. To use TP7 and TP6, connect a voltmeter positive terminal to TP7 and negative terminal to TP6.
TPS53125EVM-599 also provides a shielded oscilloscope jack to allow ac measurements of the output ripple. Insert an oscilloscope probe with exposed ground barrel into CN2. for all Output 2 ripple measurements.
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TPS53125EVM-599 SLVU392–July 2010
Copyright © 2010, Texas Instruments Incorporated
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4.2.4 Soft-Start Voltage Monitoring – TP1, TP2, and TP3
TPS53125EVM-599 provides two test points for measuring the soft-start ramp voltages. TP1 monitors the soft-start ramp of Channel 1. TP2 monitors the soft-start ramp of Channel 2. To use TP1 or TP2, connect an oscilloscope probe between TP1 or TP2 and TP3.
4.2.5 Switching Node Monitoring – TP3, TP5, and TP11
TPS53125EVM-599 provides two test points for measuring the switching node waveform voltages. TP5 monitors the switching node of Channel 1. TP2 monitors the switching node of Channel 2. To use TP5 or TP11, connect an oscilloscope probe between TP5 or TP11 and TP3
4.2.6 5-V Regulator Output Monitoring – TP3 and TP10
TPS53125EVM-599 provides a test point for measuring the output of the internal 5-V regulator. TP10 monitors the output voltage of the internal 5-V regulator. To use TP10, connect a voltmeter positive terminal to TP10 and negative terminal to TP3.

5 Test Setup

5.1 Equipment

The following equipment is recommended for testing the TPS53125EVM-599 evaluation board.
5.1.1 Voltage Source
The input voltage source, V minimum.
, must be a 0-V to 15-V, variable dc source capable of supplying 3 Adc
VIN
Test Setup
5.1.2 Meters
A1: 0-Adc to 4-Adc ammeter V1: VIN, 0-V to 22-V voltmeter V2: VOUT1, 0-V to 2-V voltmeter V3: VOUT2, 0-V to 2-V voltmeter
5.1.3 Loads
LOAD1: One output load is an electronic load set for constant current mode capable of 0 Adc to 4 Adc at
1.05 Vdc. LOAD2: The other output load is an electronic load set for constant current mode capable of 0 Adc to 4
Adc at 1.8 Vdc.
5.1.4 Oscilloscope and Probe
The oscilloscope, analog or digital, must be set for ac-coupled measurement with a 20-MHz bandwidth limiting. Use 20 mV/division vertical resolution, 1.0 µs/division horizontal resolution for the Output Ripple Voltage Test. Set cursors at +20 mV and –20 mV.
The oscilloscope probe must be a Tektronix P6138 or equivalent oscilloscope probe with exposed conductive ground barrels.
5.1.5 Recommended Wire Gauge V
to J3 – The connection between the source voltage, V
VIN
much as 2 Adc. The minimum recommended wire size is AWG #16 with the total length of wire less than 2 feet (1-foot input, 1-foot return).
and J1 of TPS53125EVM-599 can carry as
VIN
SLVU392–July 2010 TPS53125EVM-599
Copyright © 2010, Texas Instruments Incorporated
5
Test Setup
J1 to LOAD1 and J2 to LOAD2 - The connection between J1 and LOAD1 and J2 and LOAD2 of TPS53125EVM-599 can carry as much as 4 Adc each. The minimum recommended wire size is AWG #14, with the total length of wire less than 2 feet (1-foot input, 1-foot return).
5.1.6 Other Test Equipment Fan – The TPS53125EVM-599 Evaluation Module includes components that can become hot to the touch.
Because this EVM is not enclosed to allow probing of circuit nodes, a small fan capable of 200-400 lfm is required to reduce component temperatures when operating.

5.2 Equipment Setup

Figure 2 shows the basic test setup that is recommended to evaluate the TPS53125EVM-599. Note that
although the return for J3 and J1 and JP2 are the same system ground, the connections must remain separate as shown in Figure 2.
5.2.1 Test Procedure
1. When working at an ESD workstation, ensure that wrist straps, bootstraps, or mats are connected
referencing the user to earth ground before power is applied to the EVM. Electrostatic smock and safety glasses are also recommended.
2. Prior to connecting the dc input source, VIN, it is advisable to limit the source current from VINto 3 Adc
maximum. Ensure that VINis initially set to 0 V and connected as shown in Figure 2.
3. Verify SW1 and SW2 are in the desired position.
4. Increase VIN from 0 V to 12 Vdc.
5. Vary VIN between 8 Vdc and 22 Vdc.
6. Vary LOAD1 between 0 A and 4 Adc.
7. Vary LOAD2 between 0 A and 4 Adc.
8. Adjust SW1 between EN and DIS.
9. Adjust SW2 between EN and DIS.
10. Set SW1 to DIS.
11. Set SW2 to DIS.
12. Decrease LOAD1 to 0 A.
13. Decrease LOAD2 to 0 A.
14. Decrease VIN to 0 V.
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TPS53125EVM-599 SLVU392–July 2010
Copyright © 2010, Texas Instruments Incorporated
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