Texas Instruments TPS2062AD, TPS2062ADRBR, TPS2066AD, TPS2066ADRBR Schematic [ru]
1
2
3
4
5
6
OUT2
OC1
OUT 1
EN1
GND
IN
TPS2062A/TPS2066A
DPACKAGE
(TOP VIEW)
7
8
EN2 OC2
5
6
TPS2062A/TPS2066A
DRBPACKAGE
(TOP VIEW)
7
8
PAD
1
2
3
4
EN1
GND
IN
EN2
OUT2
OC1
OUT1
OC2
Enableinputsareactivelowforall TPS2062A
andactivehighforall TPS2066A
TPS2014600mA
TPS20151 A
TPS2041B500mA
TPS2051B500mA
TPS2045A 250mA
TPS2049100mA
TPS2055A 250mA
TPS20611 A
TPS20651 A
TPS20681.5 A
TPS20691.5 A
TPS201xA 0.2 A -2A
TPS202x0.2 A -2A
TPS203x0.2 A -2A
www.ti.com
........................................................................................................................................... SLVS798F – JANUARY 2008 – REVISED NOVEMBER 2008
TWO CHANNEL, CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES
1
FEATURES APPLICATIONS
2
• 70-m Ω High-Side MOSFET
• 1-A Continuous Current
• Thermal and Short-Circuit Protection
• Accurate Current-Limit
(1.2 A min, 2 A max)
• Operating Range: 2.7 V to 5.5 V
• 0.6-ms Typical Rise Time
• Undervoltage Lockout
• Deglitched Fault Report ( OCx)
• No OCx Glitch During Power Up
• 1- µ A Maximum Standby Supply Current
• Bidirectional Switch
• Ambient Temperature Range: – 40 ° C to 85 ° C
• Built-in Soft-Start
• UL Listed -- File No. E169910, Both Single and
Ganged Channel Configuration
TPS2062A
TPS2066A
• Heavy Capacitive Loads
• Short-Circuit Protection
DESCRIPTION
The TPS206xA power-distribution switches are intended for applications where heavy capacitive loads and
short-circuits are likely to be encountered. The TPS206xA family is pin-for-pin compatible with the TPS206x
family with a tighter overcurrent tolerance. This family of devices incorporates two 70-m Ω N-channel MOSFET
power switches for power-distribution systems that require multiple power switches in a single package. Each
switch is controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to
control the power-switch rise and fall times to minimize current surges during switching. The charge pump
requires no external components and allows operation from supplies as low as 2.7 V.
Each device limits the output current to a safe level by switching into a constant-current mode when the output
load exceeds the current-limit threshold or a short is present. Individual channels indicate the presence of an
overcurrent condition by asserting its corresponding OCx output (active low). Thermal protection circuitry
disables the device during overcurrent or short-circuit events to prevent permanent damage. The device recovers
from thermal shutdown automatically once the device has cooled sufficiently. The device provides undervoltage
lockout to disable the device until the input voltage rises above 2.0 V. The TPS206xA is designed to current limit
at 1.6 A typically per channel.
1
2 PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2008, Texas Instruments Incorporated
TPS2062A
TPS2066A
SLVS798F – JANUARY 2008 – REVISED NOVEMBER 2008 ...........................................................................................................................................
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields.
These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to
MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than
maximum-rated voltages to these high-impedance circuits. During storage or handling the device leads should be shorted together
or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriate logic
voltage level, preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication
Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.
AVAILABLE OPTION AND ORDERING INFORMATION
PACKAGE
– 40 ° C to
85 ° C
RECOMMENDED
T
ENABLE SHORT-CIRCUIT
A
MAXIMUM D-8 DRB-8
CONTINUOUS LOAD (SOIC) (SON)
CURRENT
Active
low
Active
1 A 1.6 A
high
TYPICAL
LIMIT
PART # STATUS PART # STATUS
TPS2062AD AVAILABLE TPS2062ADRB AVAILABLE
TPS2066AD AVAILABLE TPS2066ADRB AVAILABLE
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
(1)
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating temperature range unless otherwise noted
V
Input voltage range IN – 0.3 to 6 V
I
V
Output voltage range OUTx – 0.3 to 6 V
O
Input voltage range ENx, ENx – 0.3 to 6 V
V
I
Voltage range OCx – 0.3 to 6 V
I
Continuous output current OUTx Internally limited
O
Continuous total power dissipation See " Dissipation Rating Table "
T
Operating junction temperature range – 40 to 125 ° C
J
T
Storage temperature range – 65 to 150 ° C
stg
Electrostatic discharge
ESD
protection
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND.
Human body model MIL-STD-883C 2 kV
Charge device model (CDM) 500 V
(1) (2)
VALUE UNIT
DISSIPATION RATING TABLE
BOARD PACKAGE
(1)
Low-K
(2)
High-K
(3)
Low-K
(5)
High-K
D-8 170 ° C/W 586 mW 5.86 mW/ ° C 320 mW 234 mW
D-8 97.5 ° C/W 1025 mW 10.26 mW/ ° C 564 mW 410 mW
(4)
DRB
(4)
DRB
THERMAL POWER FACTOR POWER POWER
RESISTANCE θ
JA
270 ° C/W 370 mW 3.71 mW/ ° C 203 mW 148 mW
60 ° C/W 1600 mW 16.67 mW/ ° C 916 mW 666 mW
(1) The JEDEC low-K (1s) board used to dervie this data was a 3in x 3in, two-layer board with 2-ounce copper traces on top of the board.
(2) The JEDEC high-K (2s2p) board used to dervive this data was a 3in x 3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
(3) Soldered PowerPAD on a standard 2-layer PCB without vias for thermal pad. See TI application note SLMA002 for further details.
(4) See Recommended Operating Conditions Table for PowePad connection guidelines to meet qualifying conditions for CB Certificate
(5) Soldered PowerPAD on a standard 4-layer PCB with vias for thermal pad. See TI application note SLMA002 for further details.
TA≤ 25 ° C DERATING TA= 70 ° C TA= 85 ° C
RATING ABOVE TA= RATING RATING
25 ° C
2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2062A TPS2066A
TPS2062A
TPS2066A
www.ti.com
........................................................................................................................................... SLVS798F – JANUARY 2008 – REVISED NOVEMBER 2008
RECOMMENDED OPERATING CONDITIONS
(1)
MIN MAX UNIT
V
I
I
O
T
J
Input voltage, IN 2.7 5.5 V
Input voltage, ENx, ENx 0 5.5 V
Continuous output current, OUTx 0 1 A
Operating virtual junction temperature – 40 125 ° C
(1) The PowePad must be connected externally to GND pin to meet qualifying conditions for CB Certificate (DRB package only)
ELECTRICAL CHARACTERISTICS
over recommended operating junction temperature range, VI= 5.5 V, IO= 1 A, V
(unless otherwise noted)
PARAMETER TEST CONDITIONS
POWER SWITCH
r
DS(on)
t
r
t
f
ENABLE INPUT EN OR EN
V
IH
V
IL
I
I
t
on
t
off
CURRENT LIMIT
I
OS
I
OC
I
OS_G
I
OC_G
SUPPLY CURRENT
I
IL
I
IH
I
lkg
Reverse leakage current VO= 5.5 V, VI= 0 V TJ= 25 ° C 0.2 µ A
UNDERVOLTAGE LOCKOUT
OVERCURRENT FLAG
V
OL
THERMAL SHUTDOWN
Thermal shutdown threshold 135 ° C
Recovery from thermal shutdown 125 ° C
Hysteresis 10 ° C
(1) Pulsed load testing used to maintain junction temperature close to ambient
(2) The thermal shutdown only reacts under overcurrent conditions.
Static drain-source on-state resistance 2.7 V ≤ VI≤ 5.5 V, IO= 1 A m Ω
Rise time, output
Fall time, output
High-level input voltage 2
Low-level input voltage 0.8
VI= 5.5 V 0.6 1.5
VI= 2.7 V 0.4 1
VI= 5.5 V 0.05 0.5
CL= 1 µ F,
RL= 5 Ω , TJ= 25 ° C
VI= 2.7 V 0.05 0.5
2.7 V ≤ VI≤ 5.5 V V
Input current -0.5 0.5 µ A
Turnon time 3
Turnoff time 3
CL= 100 µ F, RL= 5 Ω ms
Short-circuit output current per VI= 5 V, OUTx connected to GND,
channel device enabled into short-circuit
Overcurrent trip threshold VIN= 5 V I
Ganged short-circuit output current
VI= 5 V, OUT1 & OUT2 connected to
GND, device enabled into short-circuit
Ganged overcurrent trip threshold VI= 5 V, OUT1 & OUT2 tied together I
Supply current, device disabled No load on OUT µ A
Supply current, device enabled No load on OUT µ A
Leakage current, device disabled OUT connected to ground – 40 ° C ≤ TJ≤ 125 ° C 1 µ A
Low-level input voltage, IN VIrising 2 2.5 V
Hysteresis, IN VIfalling 75 mV
Output low voltage, OC I
Off-state current V
= 5 mA 0.4 V
/OCx
= 5.0 V or 3.3 V 1 µ A
/OCx
OC deglitch OCx assertion or de-assertion 4 8 15 ms
(2)
= 0 V (TPS2062A) or V
/ENx
(1)
MIN TYP MAX UNIT
= 5.5 V
ENx
TJ= 25 ° C 70 100
– 40 ° C ≤ TJ≤ 125 ° C 135
TJ= 25 ° C 1.2 1.6 2.0
– 40 ° C ≤ TJ≤ 125 ° C 1.1 1.6 2.1
2.1 2.45 A
OS
TJ= 25 ° C 2.4 3.2 4.0
– 40 ° C ≤ TJ≤ 125 ° C 2.2 3.2 4.2 A
4.2 4.9
OS_G
TJ= 25 ° C 0.5 1
– 40 ° C ≤ TJ≤ 125 ° C 0.5 5
TJ= 25 ° C 50 60
– 40 ° C ≤ TJ≤ 125 ° C 50 75
ms
A
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS2062A TPS2066A
Charge
Pump
Driver
Current
Limit
Thermal
Sense
Deglitch
IN
GND
EN2
OUT2
FAULT 2
CS
Current
Sense
CS
Driver
Current
Limit
UVLO
Charge
Pump
Thermal
Sense
Deglitch
FAULT 1
OUT1
EN1
TPS2062A
TPS2066A
SLVS798F – JANUARY 2008 – REVISED NOVEMBER 2008 ...........................................................................................................................................
DEVICE INFORMATION
Terminal Functions
TERMINAL
NAME TPS2062A TPS2066A
EN1 3 — I Enable input, logic low turns on power switch IN-OUT1
EN2 4 — I Enable input, logic low turns on power switch IN-OUT2
EN1 — 3 I Enable input, logic high turns on power switch IN-OUT1
EN2 — 4 I Enable input, logic high turns on power switch IN-OUT2
GND 1 1 Ground
IN 2 2 I Input voltage
OC1 8 8 O Channel 1 over-current indicator; the output is open-drain, active low type
OC2 5 5 O Channel 2 over-current indicator; the output is open-drain, active low type
OUT1 7 7 O Power-switch output, IN-OUT1
OUT2 6 6 O Power-switch output, IN-OUT2
PowerPAD™
(1)
PAD PAD Connect PowerPAD to GND for proper operation (DRB package only)
(1) See the Recommended Operating Conditions Table for PowePad connection guidelines to meet qualifying conditions for CB Certificate.
I/O DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
www.ti.com
A. Current sense
B. Active low ( ENx) for TPS2062A. Active high (ENx) for TPS2066A.
4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2062A TPS2066A
R
L
C
L
OUT
TEST CIRCUIT
t
r
t
f
10%
90%
10%
90%
V
OUT
t
on
t
off
10%
90%
50%50%
V
EN
V
OUT
V
EN
V
OUT
t
on
t
off
50%
50%
10%
90%
VOLTAGEWAVEFORMS
V
I(EN)
5V/div
V
O(OUT)
2V/div
RL=5W ,
CL=1 mF
T
A
=25°C
t − Time − 500 ms/div
V
I(EN)
5V/div
V
O(OUT)
2V/div
t − Time − 500 ms/div
R =5 ,
C =1 F,
T =25°C
L
L
A
W
m
TPS2062A
TPS2066A
www.ti.com
........................................................................................................................................... SLVS798F – JANUARY 2008 – REVISED NOVEMBER 2008
PARAMETER MEASUREMENT INFORMATION
Figure 1. Test Circuit and Voltage Waveforms
Figure 2. Turnon Delay and Rise Time With 1- µ F Load Figure 3. Turnoff Delay and Fall Time With 1- µ F Load
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS2062A TPS2066A
V
I(EN)
5V/div
V
O(OUT)
2V/div
t − Time − 500 ms/div
R =5 ,
C =100 F,
T =25°C
L
L
A
W
m
V
O(OUT)
2V/div
V
I(EN)
5V/div
t − Time − 500 ms/div
R =5 ,
C =100 F,
T =25°C
L
L
A
W
m
V
I(EN)
5V/div
I
O(OUT)
500mA/div
t − Time − 500 ms/div
V
I(EN)
5V/div
I
O(OUT)
500mA/div
470 mF
100 mF
220 mF
VIN=5V,
RL=5W ,
T
A
=25°C
t − Time − 1ms/div
TPS2062A
TPS2066A
SLVS798F – JANUARY 2008 – REVISED NOVEMBER 2008 ...........................................................................................................................................
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 4. Turnon Delay and Rise Time With 100- µ F Load Figure 5. Turnoff Delay and Fall Time With 100- µ F Load
www.ti.com
Figure 6. Short-Circuit Current, Figure 7. Inrush Current With Different
Device Enabled Into Short Load Capacitance
6 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2062A TPS2066A
V
O(OC)
2V/div
I
O(OUT)
1A/div
t − Time − 2ms/div
V
O(OC)
2V/div
I
O(OUT)
1A/div
t − Time − 2ms/div
IN
OC1
EN1
OC2
2
8
5
7
0.1 Fm 22 Fm
0.1 Fm 22 Fm
Load
Load
OUT1
OUT2
PowerSupply
2.7Vto5.5V
6
EN2
3
4
GND
0.1 Fm
TPS2062A
1
TPS2062A
TPS2066A
www.ti.com
........................................................................................................................................... SLVS798F – JANUARY 2008 – REVISED NOVEMBER 2008
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 8. 2- Ω Load Connected to Enabled Device Figure 9. 1- Ω Load Connected to Enabled Device
POWER-SUPPLY CONSIDERATIONS
Figure 10. Typical Application
DETAILED DESCRIPTION
OVERVIEW
The devices are current-limited, power distribution switches using N-channel MOSFETs for applications where
short-circuits or heavy capacitive loads will be encountered. These devices have a minimum fixed current-limit
threshold above 1.1 A allowing for continuous operation up to 1 A per channel. Overtemperature protection is an
addtional device shutdown feature. Each device incorporates an internal charge pump and gate drive circuitry
necessary to drive the N-channel MOSFETs. The charge pump supplies power to the driver circuit and provides
the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input
voltages as low as 2.7 V and requires little supply current. The driver controls the gate voltage of the power
switch. The driver incorporates circuitry that controls the rise and fall times of the output voltage to provide
"soft-start" and to limit large current and voltage surges.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TPS2062A TPS2066A
TPS2062A
TPS2066A
SLVS798F – JANUARY 2008 – REVISED NOVEMBER 2008 ...........................................................................................................................................
OVERCURRENT
When an overcurrent condition is detected, the device maintains a constant output current and reduces the
output voltage accordingly. Three possible overload conditions can occur.
In the first condition, the output has been shorted before the device is enabled or before voltage is applied to IN.
The device senses the short and immediately switches into a constant-current output. In the second condition, a
short or an overload occurs while the device is enabled. At the instant the overload occurs, high currents may
flow for several microseconds before the current-limit circuit can react. The device operates in constant-current
mode after the current-limit circuit has responded. In the third condition, the load is increased gradually beyond
the recommended operating current. The current is permitted to rise until the current-limit threshold is reached.
The devices are capable of delivering current up to the current-limit threshold without damage. Once the
threshold is reached, the device switches into constant-current mode.
Complete shutdown occurs only if the fault is present long enough to activate thermal limiting. The device will
remain off until the junction temperature cools approximately 10 ° C and will then re-start. The device will continue
to cycle on/off until the overcurrent condition is removed.
OCx RESPONSE
Each OCx open-drain output is asserted (active low) during an overcurrent or overtemperature condition on that
channel. The output remains asserted until the fault condition is removed. The TPS206xA eliminates false OCx
reporting by using internal delay circuitry after entering or leaving an overcurrent condition. This "deglitch" time is
approximately 8-ms. This ensures that OCx is not accidentally asserted due to normal operation such as starting
into a heavy capacitive load. Overtemperature conditions are not deglitched and assert and de-assert the OCx
signal immediately.
www.ti.com
UNDERVOLTAGE LOCKOUT (UVLO)
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO
turn-on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage drop from large
current surges.
Enable ( ENx or ENx)
The logic enable controls the power switch, bias for the charge pump, driver, and other circuits to reduce the
supply current. The supply current is reduced to less than 5 µ A when a logic high is present on ENx, or when a
logic low is present on ENx. A logic low input on ENx or a logic high input on ENx enables the driver, control
circuits, and power switch for that channel.
THERMAL SENSE
The TPS206xA monitors the operating temperature of both power distribution switches with individual thermal
sensors. The junction temperature of each channel rises during an overcurrent or short-circuit condition. When
the die temperature of a particular channel rises above a minimum of 135 ° C in an overcurrent condition, the
internal thermal sense circuitry disables the individual channel in overtemperature to prevent damage. Hysteresis
is built into the thermal sensor and re-enables the power switch individually after it has cooled approximately
10 ° C. The power switch cycles on and off until the fault is removed. This topology allows one channel to continue
normal operation even if the other channel is in an overtemperature condition. The open-drain overcurrent flag
( OCx) is asserted (active low) corresponding to the channel that is in an overtemperature or overcurrent
condition.
8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TPS2062A TPS2066A
Loading...