TEXAS INSTRUMENTS TPS2043, TPS2053 Technical data

TPS2043, TPS2053

TRIPLE POWER-DISTRIBUTION SWITCHES

SLVS191 – JANUARY 1999

IN1
EN1
EN2

IN2
EN3

NC

IN1
EN1
EN2

IN2
EN3

NC

TPS2043

D PACKAGE

(TOP VIEW)

1

16

2

15

3

14

4

13

5

12

6

11

7

10

8

D PACKAGE

(TOP VIEW)

TPS2053

1
2
3
4
5
6
7
8

9

16
15
14
13
12
11
10

9

OC1
OUT1
OUT2
OC2
OC3
OUT3
NC
NC

OC1
OUT1
OUT2
OC2
OC3
OUT3
NC
NC

D

135-mΩ -Maximum (5-V Input) High-Side
MOSFET Switch

D

500 mA Continuous Current per Channel

D

Short-Circuit and Thermal Protection With
Overcurrent Logic Output

D

Operating Range...2.7 V to 5.5 V

D

Logic-Level Enable Input

D

2.5-ms Typical Rise Time

D

Undervoltage Lockout

D

20 µA Maximum Standby Supply Current

D

Bidirectional Switch

D

Available in 16-pin SOIC Package

D

Ambient Temperature Range, –40°C to 85°C

D

2-kV Human-Body-Model, 200-V
Machine-Model ESD Protection

D

UL Listed – File No. E169910

description

The TPS2043 and TPS2053 triple power
distribution switches are intended for applications

GND1

GND2

GND1

GND2

where heavy capacitive loads and short circuits
are likely to be encountered. The TPS2043 and

NC – No internal connection

the TPS2053 incorporate in single packages three 135-mΩ N-channel MOSFET high-side power switches for
power-distribution systems that require multiple power switches. Each switch is controlled by a logic enable that
is compatible with 5-V logic and 3-V logic. Gate drive is provided by an internal charge pump that controls the
power-switch rise times and fall times to minimize current surges during switching. The charge pump, requiring
no external components, allows operation from supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the TPS2043 and TPS2053 limit
the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx
output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch
causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage.
Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry
ensures the switch remains off until valid input voltage is present.

The TPS2043 and TPS2053 are designed to limit at 0.9-A load. These power distribution switches are available
in a 16-pin small-outline integrated circuit (SOIC) package and operate over an ambient temperature range of
–40°C to 85°C.

AVAILABLE OPTIONS

RECOMMENDED MAXIMUM TYPICAL SHORT-CIRCUIT

T

A

–40°C to 85°C Active low 0.5 0.9 TPS2043D
–40°C to 85°C Active high 0.5 0.9 TPS2053D

†

The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2043DR)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

ENABLE

CONTINUOUS LOAD CURRENT

(A)

CURRENT LIMIT AT 25°C

(A)

Copyright  1999, Texas Instruments Incorporated

PACKAGED DEVICES

SOIC

†

(D)

) logic

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1

TPS2043, TPS2053
TRIPLE POWER-DISTRIBUTION SWITCHES

SLVS191 – JANUARY 1999

TPS2043 functional block diagram

OC1

GND1

EN1

IN1

EN2

Charge

Pump

Charge

Pump

UVLO

Thermal

Sense

Driver

Driver

Thermal

Sense

Current

Limit

CS

Power Switch

CS

Current

Limit

†

OUT1

†

OUT2

OC2

OC3

GND2

EN3

IN2

†

Current sense

Charge

Pump

UVLO

Thermal

Sense

Driver

Current

Limit

CS

Power Switch

†

OUT3

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

NAME

TRIPLE POWER-DISTRIBUTION SWITCHES

Terminal Functions

TERMINAL

NO.

TPS2043 TPS2053

EN1 3 – I Enable input, logic low turns on power switch, IN1-OUT1.
EN2 4 – I Enable input, logic low turns on power switch, IN1-OUT2.
EN3 7 – I Enable input, logic low turns on power switch, IN2-OUT3.
EN1 – 3 I Enable input, logic high turns on power switch, IN1-OUT1.
EN2 – 4 I Enable input, logic high turns on power switch, IN1-OUT2.
EN3 – 7 I Enable input, logic high turns on power switch, IN2-OUT3.
GND1 1 1 Ground
GND2 5 5 Ground
IN1 2 2 I Input voltage
IN2 6 6 I Input voltage
NC 8, 9, 10 8, 9, 10 No connection
OC1 16 16 O Overcurrent, logic output active low, IN1-OUT1
OC2 13 13 O Overcurrent, logic output active low, IN1-OUT2
OC3 12 12 O Overcurrent, logic output active low, IN2-OUT3
OUT1 15 15 O Power-switch output, IN1-OUT1
OUT2 14 14 O Power-switch output, IN1-OUT2
OUT3 11 11 O Power-switch output, IN2-OUT3

I/O DESCRIPTION

TPS2043, TPS2053

SLVS191 – JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3

TPS2043, TPS2053
TRIPLE POWER-DISTRIBUTION SWITCHES

SLVS191 – JANUARY 1999

detailed description

power switch

The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (V
Configured as a high-side switch, the power switch prevents current flow from OUTx to INx and INx to OUTx
when disabled. The power switch supplies a minimum of 500 mA per switch.

charge pump

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
very little supply current.

driver

The driver controls the gate voltage of the power switch. T o limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and
fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range.

enable (ENx

The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce
the supply current to less than 20 µA when a logic high is present on ENx
on ENx (TPS2053). A logic zero input on ENx
and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.

overcurrent (OCx

The OCx
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.

current sense

or ENx)

(TPS2043) or a logic low is present

or logic high on ENx restores bias to the drive and control circuits

)

open-drain output is asserted (active low) when an overcurrent or overtemperature condition is

I(INx)

= 5 V).

A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into
its saturation region, which switches the output into a constant current mode and holds the current constant
while varying the voltage on the load.

thermal sense

The TPS2043 and TPS2053 implement a dual-threshold thermal trip to allow fully independent operation of the
power distribution switches. In an overcurrent or short-circuit condition the junction temperature rises. When
the die temperature rises to approximately 140°C, the internal thermal sense circuitry checks to determine which
power switch is in an overcurrent condition and turns off that switch, thus isolating the fault without interrupting
operation of the adjacent power switch. Hysteresis is built into the thermal sense, and after the device has cooled
approximately 20 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is
removed. The (OCx

undervoltage lockout

A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V , a control
signal turns off the power switch.

) open-drain output is asserted (active low) when overtemperature or overcurrent occurs.

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

UNIT

TPS2043, TPS2053

TRIPLE POWER-DISTRIBUTION SWITCHES

SLVS191 – JANUARY 1999

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Input voltage range, V
Output voltage range, V
Input voltage range, V
Continuous output current, I

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, T
Storage temperature range, T

Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . .

Electrostatic discharge (ESD) protection: Human body model MIL-STD-883C 2 kV. . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltages are with respect to GND.

PACKAGE

D 725 mW 5.8 mW/°C 464 mW 377 mW

(see Note1) –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(INx)

O(OUTx)

I(ENx)

(see Note1) –0.3 V to V

or V

I(ENx)

O(OUTx)

J

stg

Machine model 0.2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DISSIPATION RATING TABLE

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I(INx)

–0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

recommended operating conditions

TPS2043 TPS2053

MIN MAX MIN MAX

Input voltage, V
Input voltage, V
Continuous output current, I
Operating virtual junction temperature, T

I(INx)
I(ENx)

or V

I(ENx)

O(OUTx)

J

2.7 5.5 2.7 5.5 V
0 5.5 0 5.5 V
0 500 0 500 mA

–40 125 –40 125 °C

†

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5

TPS2043, TPS2053

PARAMETER

TEST CONDITIONS

†

UNIT

r

trRise time, output

ms

tfFall time, output

ms

PARAMETER

TEST CONDITIONS

UNIT

VILLow-level input voltage

IIInput current

A

PARAMETER

TEST CONDITIONS

†

UNIT

TRIPLE POWER-DISTRIBUTION SWITCHES

SLVS191 – JANUARY 1999

electrical characteristics over recommended operating junction temperature range, V
I

= rated current, V

O

I(ENx)

= 0 V, V

= Hi (unless otherwise noted)

I(ENx)

I(IN)

= 5.5 V,

power switch

TPS2043 TPS2053

MIN TYP MAX MIN TYP MAX

V

= 5 V,

I(INx)

IO = 0.5 A

Static drain-source on-state
resistance, 5-V operation

DS(on)

Static drain-source on-state
resistance, 3.3-V operation

p

p

†

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

V

= 5 V,

I(INx)

IO = 0.5 A
V

= 5 V,

I(INx)

IO = 0.5 A
V

= 3.3 V,

I(INx)

IO = 0.5 A
V

= 3.3 V,

I(INx)

IO = 0.5 A
V

= 3.3 V,

I(INx)

IO = 0.5 A
V

= 5.5 V,

I(INx)

CL = 1 µF,
V

= 2.7 V,

I(INx)

CL = 1 µF,
V

= 5.5 V,

I(INx)

CL = 1 µF,
V

= 2.7 V,

I(INx)

CL = 1 µF,

TJ = 25°C,

TJ = 85°C,

TJ = 125°C,

TJ = 25°C,

TJ = 85°C,

TJ = 125°C,

TJ = 25°C,
RL = 10 Ω

TJ = 25°C,
RL = 10 Ω

TJ = 25°C,
RL = 10 Ω

TJ = 25°C,
RL = 10 Ω

80 95 80 95

90 120 90 120

100 135 100 135

85 105 85 105

100 135 100 135

115 150 115 150

2.5 2.5

3 3

4.4 4.4

2.5 2.5

mΩ

enable input ENx or ENx

TPS2043 TPS2053

MIN TYP MAX MIN TYP MAX

V

High-level input voltage 2.7 V ≤ V

IH

p

p

t

Turnon time CL = 100 µF, RL=10 Ω 20 20 ms

on

t

Turnoff time CL = 100 µF, RL=10 Ω 40 40

off

TPS2043 V
TPS2053 V

4.5 V ≤ V

2.7 V≤ V
I(ENx

I(ENx)

≤ 5.5 V 2 2 V

I(INx)

≤ 5.5 V 0.8 0.8 V

I(INx)

≤ 4.5 V 0.4 0.4

I(INx)

= 0 V or V

)

= V

I(INx)

I(ENx)

or V

= V

I(IN)

= 0 V –0.5 0.5

I(ENx)

–0.5 0.5

µ

current limit

TPS2043 TPS2053

MIN TYP MAX MIN TYP MAX

V

= 5 V, OUT connected to GND,

I

Short-circuit output current

OS

†

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

I(INx)

Device enable into short circuit

0.7 0.9 1.1 0.7 0.9 1.1 A

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER

TEST CONDITIONS

UNIT

Su ly

TPS2043

,

A

V

V

TPS2053

Su ly

V

V

TPS2043

,

A

V

V

TPS2053

g

d

A

leak

g

T

25°C

A

PARAMETER

TEST CONDITIONS

UNIT

PARAMETER

TEST CONDITIONS

UNIT

TPS2043, TPS2053

TRIPLE POWER-DISTRIBUTION SWITCHES

SLVS191 – JANUARY 1999

electrical characteristics over recommended operating junction temperature range, V
I

= rated current, V

O

I(ENx)

= 0 V, V

= Hi (unless otherwise noted) (continued)

I(ENx)

I(IN)

= 5.5 V,

supply current

TPS2043 TPS2053

MIN TYP MAX MIN TYP MAX

pp
current,
low-level
output

pp
current,
high-level
output

Leakage
current

Reverse

age

current

No Load
on OUTx

No Load
on OUTx

OUTx
connecte
to ground

IN = high
impedance

V

= V

I(ENx)

= 0

I(ENx)

= 0

I(ENx)

=

I(ENx)

V

= V

I(ENx)

V

= 0 V –40°C ≤ TJ ≤ 125°C TPS2053 200

I(ENx)

V

= 0 V

I(ENx

)

V

= Hi

I(ENx)

TJ = 25°C

I(INx)

–40°C ≤ TJ ≤ 125°C
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
TJ = 25°C

I(INx)

–40°C ≤ TJ ≤ 125°C
–40°C ≤ TJ ≤ 125°C TPS2043 200

I(INx)

°

=

J

TPS2043 0.3
TPS2053 0.3

0.03 2
20

0.03 2
20

160 200
200

160 200
200

undervoltage lockout

TPS2043 TPS2053

MIN TYP MAX MIN TYP MAX

Low-level input voltage 2 2.5 2 2.5 V
Hysteresis TJ = 25°C 100 100 mV

µ

µ

µ

µ

overcurrent OCx

Sink current
Output low voltage IO = 5 mA, V
Off-state current

†

Specified by design, not production tested.

†

†

VO = 5 V 10 10 mA

VO = 5 V, VO = 3.3 V 1 1 µA

OL(OCx)

TPS2043 TPS2053

MIN TYP MAX MIN TYP MAX

0.5 0.5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

7

TPS2043, TPS2053
TRIPLE POWER-DISTRIBUTION SWITCHES

SLVS191 – JANUARY 1999

PARAMETER MEASUREMENT INFORMATION

OUTx

V

I(EN)

(5 V/div)

V

I(ENx)

V

O(OUTx)

t

RL CL

V

O(OUTx)

TEST CIRCUIT

50%

t

on

50%

90%

10%

V

I(ENx)

t

off

V

O(OUTx)

VOLTAGE WAVEFORMS

r

90%

90%

10%

50%

t

on

10%

50%

90%

10%

t

f

t

off

Figure 1. Test Circuit and Voltage Waveforms

V

I(EN)

(5 V/div)

V

O(OUT)

(2 V/div)

8

V

= 5 V

I(IN)

TA = 25°C
CL = 0.1 µF

0123456

t – Time – ms

78910

Figure 2. Turnon Delay and Rise Time

with 0.1-µF Load

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

V

O(OUT)

(2 V/div)

V

= 5 V

I(IN)

TA = 25°C
CL = 0.1 µF

0 1000 2000 3000

t – Time – ms

4000 5000

Figure 3. Turnoff Delay and Fall Time

with 0.1-µF Load