Texas Instruments TMS320DM35 Series Reference Manual
TMS320DM35x Digital Media
System-on-Chip (DMSoC)
Pulse-Width Modulator (PWM)
Reference Guide
Literature Number: SPRUEE7A
May 2006 – Revised September 2007
2 SPRUEE7A – May 2006 – Revised September 2007
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Contents
Preface ............................................................................................................................... 5
1 Introduction ................................................................................................................ 8
1.1 Purpose of the Peripheral ....................................................................................... 8
1.2 Features ........................................................................................................... 8
1.3 Industry Standard(s) Compliance Statement ................................................................. 8
2 Peripheral Architecture ................................................................................................ 9
2.1 Clock Control ..................................................................................................... 9
2.2 Signal Descriptions .............................................................................................. 9
2.3 Functional Operation ........................................................................................... 10
2.4 Reset Considerations .......................................................................................... 12
2.5 Initialization ...................................................................................................... 12
2.6 Interrupt Support ................................................................................................ 12
2.7 EDMA Event Support .......................................................................................... 13
2.8 Power Management ............................................................................................ 13
2.9 Emulation Considerations ..................................................................................... 13
3 Registers .................................................................................................................. 14
3.1 Pulse Width Modulator (PWM) Peripheral Identification Register (PID) ................................. 14
3.2 Pulse Width Modulator (PWM) Peripheral Control Register (PCR) ...................................... 14
3.3 Pulse Width Modulator (PWM) Configuration Register (CFG) ............................................ 15
3.4 Pulse Width Modulator (PWM) Start Register (START) ................................................... 16
3.5 Pulse Width Modulator (PWM) Repeat Count Register (RPT) ........................................... 16
3.6 Pulse Width Modulator (PWM) Period Register (PER) .................................................... 17
3.7 Pulse Width Modulator (PWM) First-Phase Duration Register (PH1D) ................................. 17
SPRUEE7A – May 2006 – Revised September 2007 Table of Contents 3
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List of Figures
1 PWM Waveform Polarity Control (PWM_RPT = 2, for 3 periods) ..................................................... 9
2 PWM One-Shot Mode Operation (P1OUT = 1, INACTOUT = 0, EVTRIG = 0, PWM_RPT = 2) ................ 10
3 PWM Event-Triggered One-Shot Mode Operation (P1OUT = 1, INACTOUT = 0, EVTRIG = 1,
PWM_RPT = 1) ............................................................................................................. 11
4 PWM Continuous Mode Operation (P1OUT = 1, INACTOUT = 0, EVTRIG = 1, PWM_RPT = 0) .............. 12
5 Pulse Width Modulator (PWM) Peripheral Identification Register (PID) ............................................ 14
6 Pulse Width Modulator (PWM) Peripheral Control Register (PCR) .................................................. 15
7 Pulse Width Modulator (PWM) Configuration Register (CFG) ....................................................... 15
8 Pulse Width Modulator (PWM) Start Register (START) .............................................................. 16
9 Pulse Width Modulator (PWM) Repeat Count Register (RPT) ....................................................... 17
10 Pulse Width Modulator (PWM) Period Register (PER) ................................................................ 17
11 Pulse Width Modulator (PWM) First-Phase Duration Register (PH1D) ............................................. 17
List of Tables
1 Pulse Width Modulator (PWM) Registers ............................................................................... 14
2 Pulse Width Modulator (PWM) Peripheral Identification Register (PID) Field Descriptions ...................... 14
3 Pulse Width Modulator (PWM) Peripheral Control Register (PCR) Field Descriptions ........................... 15
4 Pulse Width Modulator (PWM) Configuration Register (CFG) Field Descriptions ................................. 15
5 Pulse Width Modulator (PWM) Start Register (START) Field Descriptions ........................................ 16
6 Pulse Width Modulator (PWM) Repeat Count Register (RPT) Field Descriptions ................................. 17
7 Pulse Width Modulator (PWM) Period Register (PER) Field Descriptions ......................................... 17
8 Pulse Width Modulator (PWM) First-Phase Duration Register (PH1D) Field Descriptions ....................... 18
4 List of Figures SPRUEE7A – May 2006 – Revised September 2007
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This document describes the Pulse-Width Modulator (PWM) on the TMS320DM35x Digital Media
System-on-Chip (DMSoC).
Notational Conventions
This document uses the following conventions.
• Hexadecimal numbers are shown with the suffix h. For example, the following number is 40
hexadecimal (decimal 64): 40h.
• Registers in this document are shown in figures and described in tables.
– Each register figure shows a rectangle divided into fields that represent the fields of the register.
Each field is labeled with its bit name, its beginning and ending bit numbers above, and its
read/write properties below. A legend explains the notation used for the properties.
– Reserved bits in a register figure designate a bit that is used for future device expansion.
TMS320DM355 Digital Media System-on-Chip (DMSoC)
Related Documentation From Texas Instruments
The following documents describe the TMS320DM355 Digital Media System-on-Chip (DMSoC). Copies of
these documents are available on the internet at www.ti.com. Contact your TI representative for Extranet
access.
SPRS463— TMS320DM355 Digital Media System-on-Chip (DMSoC) Data Manual This document
describes the overall TMS320DM355 system, including device architecture and features, memory
map, pin descriptions, timing characteristics and requirements, device mechanicals, etc.
Preface
SPRUEE7A – May 2006 – Revised September 2007
Read This First
SPRZ264— TMS320DM355 DMSoC Silicon Errata Describes the known exceptions to the functional
specifications for the TMS320DM355 DMSoC.
SPRUFB3— TMS320DM355 ARM Subsystem Reference Guide This document describes the ARM
Subsystem in the TMS320DM355 Digital Media System-on-Chip (DMSoC). The ARM subsystem is
designed to give the ARM926EJ-S (ARM9) master control of the device. In general, the ARM is
responsible for configuration and control of the device; including the components of the ARM
Subsystem, the peripherals, and the external memories.
SPRUED1— TMS320DM35x DMSoC Asynchronous External Memory Interface (EMIF) Reference
Guide This document describes the asynchronous external memory interface (EMIF) in the
TMS320DM35x Digital Media System-on-Chip (DMSoC). The EMIF supports a glueless interface to
a variety of external devices.
SPRUED2— TMS320DM35x DMSoC Universal Serial Bus (USB) Controller Reference Guide This
document describes the universal serial bus (USB) controller in the TMS320DM35x Digital Media
System-on-Chip (DMSoC). The USB controller supports data throughput rates up to 480 Mbps. It
provides a mechanism for data transfer between USB devices and also supports host negotiation.
SPRUED3— TMS320DM35x DMSoC Audio Serial Port (ASP) Reference Guide This document
describes the operation of the audio serial port (ASP) audio interface in the TMS320DM35x Digital
Media System-on-Chip (DMSoC). The primary audio modes that are supported by the ASP are the
AC97 and IIS modes. In addition to the primary audio modes, the ASP supports general serial port
receive and transmit operation, but is not intended to be used as a high-speed interface.
SPRUEE7A – May 2006 – Revised September 2007 Preface 5
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TMS320DM355 Digital Media System-on-Chip (DMSoC)
SPRUED4— TMS320DM35x DMSoC Serial Peripheral Interface (SPI) Reference Guide This
document describes the serial peripheral interface (SPI) in the TMS320DM35x Digital Media
System-on-Chip (DMSoC). The SPI is a high-speed synchronous serial input/output port that allows
a serial bit stream of programmed length (1 to 16 bits) to be shifted into and out of the device at a
programmed bit-transfer rate. The SPI is normally used for communication between the DMSoC
and external peripherals. Typical applications include an interface to external I/O or peripheral
expansion via devices such as shift registers, display drivers, SPI EPROMs and analog-to-digital
converters.
SPRUED9— TMS320DM35x DMSoC Universal Asynchronous Receiver/Transmitter (UART)
Reference Guide This document describes the universal asynchronous receiver/transmitter
(UART) peripheral in the TMS320DM35x Digital Media System-on-Chip (DMSoC). The UART
peripheral performs serial-to-parallel conversion on data received from a peripheral device, and
parallel-to-serial conversion on data received from the CPU.
SPRUEE0— TMS320DM35x DMSoC Inter-Integrated Circuit (I2C) Peripheral Reference Guide This
document describes the inter-integrated circuit (I2C) peripheral in the TMS320DM35x Digital Media
System-on-Chip (DMSoC). The I2C peripheral provides an interface between the DMSoC and other
devices compliant with the I2C-bus specification and connected by way of an I2C-bus. External
components attached to this 2-wire serial bus can transmit and receive up to 8-bit wide data to and
from the DMSoC through the I2C peripheral. This document assumes the reader is familiar with the
I2C-bus specification.
SPRUEE2— TMS320DM35x DMSoC Multimedia Card (MMC)/Secure Digital (SD) Card Controller
Reference Guide This document describes the multimedia card (MMC)/secure digital (SD) card
controller in the TMS320DM35x Digital Media System-on-Chip (DMSoC). The MMC/SD card is
used in a number of applications to provide removable data storage. The MMC/SD controller
provides an interface to external MMC and SD cards. The communication between the MMC/SD
controller and MMC/SD card(s) is performed by the MMC/SD protocol.
SPRUEE4— TMS320DM35x DMSoC Enhanced Direct Memory Access (EDMA) Controller Reference
Guide This document describes the operation of the enhanced direct memory access (EDMA3)
controller in the TMS320DM35x Digital Media System-on-Chip (DMSoC). The EDMA controller's
primary purpose is to service user-programmed data transfers between two memory-mapped slave
endpoints on the DMSoC.
SPRUEE5— TMS320DM35x DMSoC 64-bit Timer Reference Guide This document describes the
operation of the software-programmable 64-bit timers in the TMS320DM35x Digital Media
System-on-Chip (DMSoC). Timer 0, Timer 1, and Timer 3 are used as general-purpose (GP) timers
and can be programmed in 64-bit mode, dual 32-bit unchained mode, or dual 32-bit chained mode;
Timer 2 is used only as a watchdog timer. The GP timer modes can be used to generate periodic
interrupts or enhanced direct memory access (EDMA) synchronization events and Real Time
Output (RTO) events (Timer 3 only). The watchdog timer mode is used to provide a recovery
mechanism for the device in the event of a fault condition, such as a non-exiting code loop.
SPRUEE6— TMS320DM35x DMSoC General-Purpose Input/Output (GPIO) Reference Guide This
document describes the general-purpose input/output (GPIO) peripheral in the TMS320DM35x
Digital Media System-on-Chip (DMSoC). The GPIO peripheral provides dedicated general-purpose
pins that can be configured as either inputs or outputs. When configured as an input, you can
detect the state of the input by reading the state of an internal register. When configured as an
output, you can write to an internal register to control the state driven on the output pin.
SPRUEE7— TMS320DM35x DMSoC Pulse-Width Modulator (PWM) Reference Guide This document
describes the pulse-width modulator (PWM) peripheral in the TMS320DM35x Digital Media
System-on-Chip (DMSoC).
SPRUEH7— TMS320DM35x DMSoC DDR2/Mobile DDR (DDR2/mDDR) Memory Controller
Reference Guide This document describes the DDR2 / mobile DDR memory controller in the
TMS320DM35x Digital Media System-on-Chip (DMSoC). The DDR2 / mDDR memory controller is
used to interface with JESD79D-2A standard compliant DDR2 SDRAM and mobile DDR devices.
6 Read This First SPRUEE7A – May 2006 – Revised September 2007
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