Outstanding Combination of dc Precision
and AC Performance:
Unity-Gain Bandwidth . . . 15 MHz Typ
V
n
3.3 nV/√Hz at f = 10 Hz Typ,. . . .
2.5 nV/√Hz at f = 1 kHz Typ
V
IO
A
VD
25 µV Max. . . .
45 V/µV Typ With RL = 2 kΩ,. . .
OFFSET N1
IN –
IN +
V
CC –
19 V/µV Typ With RL = 600 Ω
D
Available in Standard-Pinout Small-Outline
Package
D
Output Features Saturation Recovery
Circuitry
D
Macromodels and Statistical information
description
The TLE20x7 and TLE20x7A contain innovative
circuit design expertise and high-quality process
control techniques to produce a level of ac
performance and dc precision previously unavailable in single operational amplifiers. Manufactured using Texas Instruments state-of-the-art
Excalibur process, these devices allow upgrades
to systems that use lower-precision devices.
In the area of dc precision, the TLE20x7 and
TLE20x7A offer maximum offset voltages of
100 µV and 25 µV, respectively, common-mode
rejection ratio of 131 dB (typ), supply voltage
rejection ratio of 144 dB (typ), and dc gain of
45 V/µV (typ).
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
–
–
†
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLE2027ACDR).
‡
Chip forms are tested at 25°C only.
VIOmax AT
25
°C
25 µV
100 µV
25 µV
100 µV
25 µV
100 µV
SMALL
OUTLINE
TLE2027ACD
TLE2037ACD
TLE2027CD
TLE2037CD
TLE2027AID
TLE2037AID
TLE2027ID
TLE2037ID
TLE2027AMD
TLE2037AMD
TLE2027MD
TLE2037MD
†
(D)
CHIP
CARRIER
(FK)
—
—
—
—
—
—
—
—
TLE2027AMFK
TLE2037AMFK
TLE2027MFK
TLE2037MFK
NC
IN–
NC
IN+
NC
CERAMIC
DIP
(JG)
—
—
—
—
—
—
—
—
TLE2027AMJG
TLE2037AMJG
TLE2027MJG
TLE2037MJG
D, JG, OR P PACKAGE
(TOP VIEW)
1
2
3
4
FK PACKAGE
(TOP VIEW)
NC
OFFSET N1
3 2 1 20 19
4
5
6
7
8
910111213
NC
CC –
V
TLE2027ACP
TLE2037ACP
TLE2027CP
TLE2037CP
TLE2027AIP
TLE2037AIP
TLE2027IP
TLE2037IP
TLE2027AMP
TLE2037AMP
TLE2027MP
TLE2037MP
OFFSET N2
8
V
7
OUT
6
NC
5
NCNCNC
OFFSET N2
18
17
16
15
14
NC
NC
PLASTIC
DIP
(P)
CC +
NC
V
CC+
NC
OUT
NC
‡
FORM
(Y)
TLE2027Y
TLE2037Y
TLE2027Y
TLE2037Y
—
—
—
—
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
The ac performance of the TLE2027 and TLE2037 is highlighted by a typical unity-gain bandwidth specification
of 15 MHz, 55° of phase margin, and noise voltage specifications of 3.3 nV/√Hz
of 10 Hz and 1 kHz respectively . The TLE2037 and TLE2037A have been decompensated for faster slew rate
(–7.5 V/µs, typical) and wider bandwidth (50 MHz). To ensure stability, the TLE2037 and TLE2037A should be
operated with a closed-loop gain of 5 or greater.
Both the TLE20x7 and TLE20x7A are available in a wide variety of packages, including the industry-standard
8-pin small-outline version for high-density system applications. The C-suffix devices are characterized for
operation from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 105°C. The
M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C.
This chip, when properly assembled, displays characteristics similar to the TLE202xC. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. The chip may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(1)
V
(6)
(4)
(7)(8)
(6)
OFFSET N1
IN+
IN–
OFFSET N2
(3)
(2)
(8)
(5)
CC+
(7)
+
–
(4)
V
CC–
(6)
OUT
90
(7)
(1)(2)(3)
(8)
73
(4)
(3)
(2)
(1)
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
Storage temperature range, T
Case temperature for 60 seconds, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package 260°C. . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package 300°C. . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
2. Differential voltages are at IN+ with respect to IN–. Excessive current flows if a differential input voltage in excess of approximately
±1.2 V is applied between the inputs unless some limiting resistance is used.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
TLE20x7M operating characteristics at specified free-air temperature, V
(unless otherwise specified)
TLE20x7MTLE20x7AM
MINTYPMAXMINTYPMAX
RL = 2 kΩ,
See Figure 1
SRSlew rate at unity gain
n
V
N(PP)
n
1
OM
m
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
NOTE 5: Measured distortion of the source used in the analysis was 0.002%.
Equivalent input noise
voltage (see Figure 2)
Peak-to-peak equivalent
input noise voltage
Equivalent input noise
current
Unity-gain bandwidthR
(see Figure 3)
Maximum output-swin
bandwidth
Phase margin at unityRL = 2 kΩ,
gain (see Figure 3)
Typical values presented in this data sheet represent the median (50% point) of device parametric performance.
initial estimates of parameter distributions
In the ongoing program of improving data sheets and supplying more information to our customers, Texas
Instruments has added an estimate of not only the typical values but also the spread around these values. These
are in the form of distribution bars that show the 95% (upper) points and the 5% (lower) points from the
characterization of the initial wafer lots of this new device type (see Figure 5). The distribution bars are shown
at the points where data was actually collected. The 95% and 5% points are used instead of ± 3 sigma since
some of the distributions are not true Gaussian distributions.
The number of units tested and the number of different wafer lots used are on all of the graphs where distribution
bars are shown. As noted in Figure 5, there were a total of 835 units from two wafer lots. In this case, there is
a good estimate for the within-lot variability and a possibly poor estimate of the lot-to-lot variability . This is always
the case on newly released products since there can only be data available from a few wafer lots.
The distribution bars are not intended to replace the minimum and maximum limits in the electrical tables. Each
distribution bar represents 90% of the total units tested at a specific temperature. While 10% of the units tested
fell outside any given distribution bar, this should not be interpreted to mean that the same individual devices
fell outside every distribution bar.
4.5
3.5
– Supply Current – mA
CC
I
2.5
SUPPLY CURRENT
FREE-AIR TEMPERATURE
5
V
= ±15 V
CC
±
VO = 0
No Load
Sample Size = 835 Units
From 2 Water Lots
The TLE2027 and TLE2037 series offers external null pins that can be used to further reduce the input offset
voltage. The circuits of Figure 55 can be connected as shown if the feature is desired. If external nulling is not
needed, the null pins may be left disconnected.
1 kΩ
10 kΩ
IN –
IN +
(a) STANDARD ADJUSTMENT(b) ADJUSTMENT WITH IMPROVED SENSITIVITY
–
+
V
CC –
V
CC +
OUT
IN –
IN +
4.7 kΩ
4.7 kΩ
–
+
V
CC –
V
CC +
OUT
Figure 55. Input Offset Voltage Nulling Circuits
voltage-follower applications
The TLE2027 circuitry includes input-protection diodes to limit the voltage across the input transistors; however,
no provision is made in the circuit to limit the current if these diodes are forward biased. This condition can occur
when the device is operated in the voltage-follower configuration and driven with a fast, large-signal pulse. It
is recommended that a feedback resistor be used to limit the current to a maximum of 1 mA to prevent
degradation of the device. Also, this feedback resistor forms a pole with the input capacitance of the device.
For feedback resistor values greater than 10 kΩ, this pole degrades the amplifier phase margin. This problem
can be alleviated by adding a capacitor (20 pF to 50 pF) in parallel with the feedback resistor (see Figure 56).
Macromodel information provided was derived using Microsim Parts, the model generation software used
with Microsim PSpice . The Boyle macromodel (see Note 6) and subcircuit in Figure 57, Figure 58, and
Figure 59 were generated using the TLE20x7 typical electrical and operating characteristics at 25°C. Using this
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
•Maximum positive output voltage swing
•Maximum negative output voltage swing
•Slew rate
•Quiescent power dissipation
•Input bias current
•Open-loop voltage amplification
NOTE 6: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
V
CC +
rc1
c1
11
13
re1re2
14
lee
4
V
IN +
IN –
CC –
rp
1
2
dp
3
rc2
12
Q2Q1
ree
cee
10
54
–+
ve
+
vc
–
53
dc
de
9
r2
6
gcm
•Gain-bandwidth product
•Common-mode rejection ratio
•Phase margin
•DC output resistance
•AC output resistance
•Short-circuit output current limit
99
vb
+
fb
–
C2
ga
7
vlim
ro2
hlim
8
OUT
90
+ dip
–
+
–
ro1
5
egnd
+
–
dln
92
91
vip
–
vin
+
+
–
Figure 57. Boyle Macromodel
PSpice and Parts are trademarks of MicroSim Corporation.
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty . Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty . Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. T o minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third–party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party , or a license from TI under the patents or other intellectual property of TI.
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Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated
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