TEXAS INSTRUMENTS TLC5923 Technical data

RHBDAP
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Input Shift
Register
DC Input
Shift
Register
7−bit DC Register
Delay
x0
Constant Current
Driver
LOD
MODE
0 1
MODE
0 1
0
15
111
0
On/Off Register
0 6
0
0
01
Temperature
Error Flag
(TEF)
LED Open Detection
(LOD)
7−bit DC Register
Delay
x1
Constant Current
Driver
LOD
On/Off Register
7
13
1
1
7−bit DC Register
Delay
x15
Constant Current
Driver
LOD
On/Off Register
105 111
15
15
BLANK
0
Max. OUTn
Current
GNDVCC SINSCLK
SOUT
IREF
XERR
XLATMODE
OUT0
OUT1
OUT15
PGND BLANK
BLANK
BLANK
16
16
112
1
16-CHANNEL LED DRIVER WITH DOT CORRECTION

FEATURES APPLICATIONS

16 Channels
Drive Capability
0 to 80 mA (Constant-Current Sink)
Constant Current Accuracy: ±1% (typical)
Serial Data Interface
Fast Switching Output: Tr/ Tf= 10ns (typical)
CMOS Level Input/Output
30 MHz Data Transfer Rate
V
Operating Temperature = –40 ° C to 85 ° C
LED Supply Voltage up to 17 V
32-pin HTSSOP( PowerPAD™) and QFN
Dot Correction
Controlled In-Rush Current
Error Information
= 3.0 V to 5.5 V
CC
Packages
7 bit (128 Steps) – individual adjustable for each channel
LOD: LED Open Detection – TEF: Thermal Error Flag
TLC5923
SLVS550A – DECEMBER 2004 – REVISED NOVEMBER 2005
Monocolor, Multicolor, Fullcolor LED Display
Monocolor, Multicolor LED Signboard
Display Backlighting

Multicolor LED lighting applications

DESCRIPTION

The TLC5923 is a 16 channel constant-current sink driver. Each channel has a On/Off state and a 128-step adjustable constant current sink (dot correction). The dot correction adjusts the brightness variations between LED, LED channels and other LED drivers. Both dot correction and On/Off state are accessible via a serial data interface. A single external resistor sets the maximum current of all 16 channels.
The TLC5923 features two error information circuits. The LED open detection (LOD) indicates a broken or disconnected LED at an output terminal. The thermal error flag (TEF) indicates an overtemperature condition.

FUNCTIONAL BLOCK DIAGRAM

PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2004–2005, Texas Instruments Incorporated
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TLC5923
SLVS550A – DECEMBER 2004 – REVISED NOVEMBER 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
(1)
(1)
T
A
–40 ° C to 85 ° C
ORDERING INFORMATION
Package Part Number
32-pin, HTSSOP, PowerPAD™ TLC5923DAP
32-pin, 5 mm x 5 mm QFN TLC4923RHB
(1) For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI website at www.ti.com .

ABSOLUTE MAXIMUM RATINGS

(1) (2)
TLC5923 UNIT
V
Supply voltage
CC
I
Output current (dc) I
O
V
Input voltage range
I
V
Output voltage range
O
ESD rating
T
Storage temperature range –40 to 150 °C
stg
(2)
(2)
(2)
L(LC)
V
, V
, V
, V
(BLANK)
V
(SOUT)
V
(OUT0)
(XLAT)
(SCLK)
, V
(XDOWN)
V
(OUT15)
, V
(SIN)
(MODE)
–0.3 to 6 V
90 mA –0.3 to V –0.3 to V
+ 0.3 V
CC
+ 0.3 V
CC
-0.3 to 18 V HBM (JEDEC JESD22-A114, Human Body Model) 2 kV CDM (JEDEC JESD22-C101, Charged Device Model) 500 V
Continuous total power dissipation at (or below) TA= 25 ° C 3.9 W Power dissipation rating at (or
above) TA= 25 ° C
(3)
HTSSOP (DAP) 42.54 mW/ ° C QFN (RHB) 27.86 mW/ ° C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. (3) See SLMA002 for more information about PowerPAD™

RECOMMENDED OPERATING CONDITIONS—DC Characteristics

MIN NOM MAX UNIT
V
Supply voltage 3 5.5 V
CC
V
Voltage applied to output, (Out0 - Out15) 17 V
O
V
High-level input voltage 0.8 VCC VCC V
IH
V
Low-level input voltage GND 0.2 VCC V
IL
I
High-level output current V
OH
I
Low-level output current V
OL
I
Constant output current OUT0 to OUT15 80 mA
OLC
T
Operating free-air temperature range -40 85 ° C
A
2
= 5 V at SOUT –1 mA
CC
= 5 V at SOUT, XDOWN 1 mA
CC
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SLVS550A – DECEMBER 2004 – REVISED NOVEMBER 2005

RECOMMENDED OPERATING CONDITIONS—AC Characteristics

V
= 3 V to 5.5 V, TA= -40°C to 85°C (unless otherwise noted)
CC
MIN TYP MAX UNIT
f
SCLK
t
wh0
t
wh1
t
su0
t
su1
t
su2
t
su3
t
h0
t
h1
t
h2
t
h3
Clock frequency SCLK 30 MHz
/t
CLK pulse duration SCLK=H/L 16 ns
wl0
XLAT pulse duration XLAT=H 20 ns
SIN - SCLK 10 ns
Setup time
SCLK -XLAT 10 ns MODE ↑ ↓ -SCLK 10 ns MODE ↑ ↓ -XLAT 10 ns SCLK -SIN 10 ns
Hold time
XLAT -SCLK 10 ns SCLK -MODE ↑ ↓ 10 ns XLAT -MODE 10 ns

ELECTRICAL CHARACTERISTICS

V
= 3 V to 5.5 V, TA= –40 ° C to 85 ° C (unless otherwise noted)
CC
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V V I
I
I I I
IIII
T V V
(1) Measured at device start-up temperature. Once the IC is operating (self heating), lower ICCvalues will be seen. See Figure 15 . (2) Not tested. Specified by design.
High-level output voltage IOH= –1 mA, SOUT VCC– 0.5 V
OH
Low-level output voltage IOL= 1 mA, SOUT 0.5 V
OL
Input current VI= V
I
No data transfer, All output OFF, VO= 1 V, R No data transfer, All output OFF, VO= 1 V, R
k
Supply current mA
CC
Data transfer 30 MHz, All output ON, VO= 1 V, R
or GND, BLANK, XLAT, SCLK, SIN, MODE –1 1 µ A
CC
= 10 k 6
(IREF)
= 1.3
(IREF)
= 1.3 k
(IREF)
Data transfer 30 MHz, All output ON, VO= 1 V, R
= 600
(IREF)
Constant output current All output ON, VO= 1 V, R
OLC
LO0
Leakage output current
LO1
Constant current error All output ON, VO= 1 V, R
OLC0
Constant current error ± 4% ± 8.5%
OLC1
Power supply rejection ratio All output ON, VO= 1 V, R
OLC2
Load regulation ± 2 ± 6 %/V
OLC3
Thermal error flag threshold Junction temperature, rising temperature
(TEF)
LED open detection threshold 0.3 0.4 V
(LOD)
Reference voltage output R
(IREF)
All output OFF, VO= 15 V, R OUT15
V
= 5.5 V, No TEF and LOD 10 µ A
XERR
device to device, averaged current from OUT0 to OUT15, R
= 600
(IREF)
All output ON, VO= 1 V to 3 V, R OUT0 to OUT15
= 600 1.20 1.24 1.28 V
(IREF)
= 600 70 80 90 mA
(IREF)
= 600 , OUT0 to
(IREF)
= 600 , OUT0 to OUT15 ± 1% ± 4%
(IREF)
= 600 , OUT0 to OUT15 ± 1 ± 4 %/V
(IREF)
= 600 ,
(IREF)
(2)
150 160 180 ° C
36 65
0.1 µ A
TLC5923
15
32
(1)
3
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
GND
BLANK
XLAT
SCLK
SIN
PGND
OUT0 OUT1
PGND
OUT2 OUT3 OUT4 OUT5
PGND
OUT6 OUT7
VCC IREF MODE XERR SOUT PGND OUT15 OUT14 PGND OUT13 OUT12 OUT11 OUT10 PGND OUT9 OUT8
THERMAL
PAD
SOUT24
PGND23
OUT1522
OUT1421
PGND20
OUT1319
OUT1218
OUT1117
OUT1016 PGND15 OUT914 OUT813 OUT712 OUT611 PGND10 OUT59
OUT4
8
OUT3
7
OUT2
6
PGND
5
OUT1
4
OUT0
3
PGND
2
SIN
1
XERR 25
MODE 26
IREF 27
VCC 28
GND 29
BLANK 30
XLAT 31
SCLK 32
RHB PACKAGE
(TOP VIEW)
(QFN)
DAP PACKAGE
(TOP VIEW)
TLC5923
SLVS550A – DECEMBER 2004 – REVISED NOVEMBER 2005

DISSIPATION RATINGS

PACKAGE
32-pin HTSSOP with PowerPAD
32-pin HTSSOP with PowerPAD
(1) The PowerPAD is soldered to the PCB with a 2 oz. copper trace. See SLMA002 for further information.
soldered
unsoldered
32-pin QFN 3482 mW 27.86 mW/ ° C 2228 mW 1811 mW

SWITCHING CHARACTERISTICS

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
r0
Rise time ns
t
r1
t
f0
Fall time ns
t
f1
t
pd0
t
pd1
t
pd2
Propagation delay time ns
t
pd3
t
pd4
t
pd5
t
Output delay time OUTn ↑ ↓ -OUT(n+1) ↑ ↓ (see
d
POWER RATING DERATING FACTOR POWER RATING POWER RATING
TA< 25 ° C ABOVE TA = 25 ° C TA= 70 ° C TA= 85 ° C
(1)
(1)
SOUT(see OUTx, V SOUT (see OUTx, V SCLK - SOUT ↑ ↓ (see MODE ↑↓ - SOUT ↑ ↓ (see BLANK - OUT0 ↑ ↓ (see XLAT - OUT0 ↑ ↓ (see OUTx ↑ ↓ -XERR ↑ ↓ (see XLAT -I
5318 mW 42.54 mW/ ° C 3403 mW 2765 mW
2820 mW 22.56 mW/ ° C 1805 mW 1466 mW
(1)
= 5 V, TA= 60 ° C, DCx = 7F (see
CC
(1)
= 5 V, TA= 60 ° C, DCx = 7F (see
CC
(dot-correction) (see
OUT
) 16
) 16
(3)
) 30
(3)
) 30
(4)
) 60
(4)
) 60
(5)
) 1000
(6)
) 1000
(4)
) 14 22 30 ns
(2)
) 10 30
(2)
) 10 30
(1) See Figure 4 . Defined as from 10% to 90% (2) See Figure 5 . Defined as from 10% to 90% (3) See Figure 4 , Figure 11 (4) See Figure 5 and Figure 11 (5) See Figure 5 , Figure 6 , and Figure 11 (6) See Figure 5
4
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VCC
INPUT
GND
400
Terminal Functions
TERMINAL
NAME
BLANK 2 30 I GND 1 29 Ground
IREF 31 27 I/O Reference current terminal MODE 30 26 I OUT0 7 3 O Constant current output
OUT1 8 4 O Constant current output OUT2 10 6 O Constant current output OUT3 11 7 O Constant current output OUT4 12 8 O Constant current output OUT5 13 9 O Constant current output OUT6 15 11 O Constant current output OUT7 16 12 O Constant current output OUT8 17 13 O Constant current output OUT9 18 14 O Constant current output OUT10 20 16 O Constant current output OUT11 21 17 O Constant current output OUT12 22 18 O Constant current output OUT13 23 19 O Constant current output OUT14 25 21 O Constant current output OUT15 26 22 O Constant current output
PGND Power ground
SCLK 4 32 I SIN 5 1 I Data input of serial I/F
SOUT 28 24 O Data output of serial I/F VCC 32 28 Power supply voltage
XERR 29 25 O
XLAT 3 31 I
TSSOP QFN
6, 9, 14, 2, 5, 10,
19, 24, 27 15, 20, 23
NO. I/O DESCRIPTION
Blank (Light OFF). When BLANK=H, All OUTx outputs are forced OFF. When BLANK=L, ON/OFF of OUTx outputs are controlled by input data.
Mode select. When MODE=L, SIN, SOUT, SCLK, XLAT are connected to ON/OFF control logic. When MODE=H, SIN, SOUT, SCLK, XLAT are connected to dot-correction logic.
Data shift clock. Note that the internal connections are switched by MODE (pin #30). At SCLK , the shift-registers selected by MODE shift the data.
Error output. XERR is open drain terminal. XERR transistions from H to L when LOD or TEF detected.
Data latch. Note that the internal connections are switched by MODE (pin #30). At XLAT , the latches selected by MODE get new data.
TLC5923
SLVS550A – DECEMBER 2004 – REVISED NOVEMBER 2005

PIN EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS

(Note: Resistor values are equivalent resistance and not tested).
Figure 1. Input Equivalent Circuit (BLANK, XLAT, SCLK, SIN, MODE)
5
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SOUT
GND
10
XERR
GND
20
SOUT
15 pF
OUTn
51
15 pF
XDOWN
470 k
TLC5923
SLVS550A – DECEMBER 2004 – REVISED NOVEMBER 2005
PIN EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS (continued)
Figure 3. Output Equivalent Circuit (XERR)

PARAMETER MEASUREMENT INFORMATION

Figure 2. Output Equivalent Circuit
Figure 4. Test Circuit for tr0, tf0, td0, t
Figure 5. Test Circuit for tr1, tf1, t
Figure 6. Test Circuit for t
d1
, t
, t
pd2
pd3
pd4
, t
pd5
pd6
6
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