The TL7770 is an integrated-circuit system supervisor designed for use as a reset controller in microcomputer
and microprocessor power-supply systems. This device contains two independent supply-voltage supervisors
that monitor the supplies for overvoltage and undervoltage conditions at the VSO and VSU terminals,
respectively . When V
(low). As VCC approaches 3.5 V , the time-delay function activates, latching RESET and RESET active (high and
low, respectively) for a time delay (td) after system voltages have achieved normal levels. Above VCC = 3.5 V,
taking RESIN low activates the time-delay function during normal system-voltage levels. To ensure that the
microcomputer system has reset, the outputs remain active until the voltage at VSU exceeds the threshold
value, V
, for a time delay, which is determined by an external timing capacitor such that:
IT+
attains the minimum voltage of 1 V during power up, the RESET output becomes active
CC
td[20
103
capacitance
where td is in seconds and capacitance is in farads.
The overvoltage-detection circuit is programmable for a wide range of designs. During an overvoltage condition,
an internal silicon-controlled rectifier (SCR) is triggered, providing 250-mA peak instantaneous current and
25-mA continuous current to the SCR gate drive terminal, which can drive an external high-current SCR gate
or an overvoltage-warning circuit.
The TL7770C series is characterized for operation from 0°C to 70°C. The TL7770I series is characterized for
operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
TL7770-5, TL7770-12
CHIP FORM
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
T
A
0°C to 70°C
–40°C to 85°CTL7770-5IDWTL7770-5IN—
DW package is available taped and reeled. Add the suffix R to the device type
(e.g., TL7770-5CDWR). Chip forms are tested at 25°C.
functional block diagram (each channel)
V
CC
V
ref
SMALL OUTLINE
TL7770-5CDW
TL7770-12CDW
AVAILABLE OPTIONS
PACKAGED DEVICES
PLASTIC DIP
(DW)
TL7770-5CN
TL7770-12CN
65 µA (TYP)
(N)
(Y)
TL7770-5Y
TL7770-12Y
CT
VSU
R1
R2
RESIN
VSO
DEVICE
TL7770-5
TL7770-12
†
The values listed are nominal.
1 VSU2 VSU
†
R1
24 kΩ
70 kΩ
R2
10 kΩ
10 kΩ
†
R1R2
Short
Short
Open
Open
RESET
RESET
SCR DRIVE
2 mA
(TYP)
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ООООООО
timing requirements
V
IT+
V
IT–
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
VSU
RESET
V
VSO
SCR DRIVE
t
d
Undefined Operation
for VCC Less Than 1 V
T
t
d
t
d
VCC = 1 V (TYP)
V
OH
V
OL
V
OH
V
OL
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Lead temperature 1,6 mm (1/16 in) from case for 10 seconds: DW or N package 260°C. . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. Maximum power dissipation is a function of TJ(max),
ambient temperature is PD = (TJ(max) – TA)/
3. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Rise time
Fall time
Rise time
Fall time
p
TEST
CONDITIONS
See Figures 1
and 3
See Figure 2a150
MINTYPMAXUNIT
270500ns
150
75
75
50
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
PARAMETER MEASUREMENT INFORMATION
5 V
511 Ω
RESET
DUT
GND
RESET OUTPUT CONFIGURATION
NOTE A: This includes jig and probe capacitance.
15 pF
(see Note A)
Figure 1. RESET and RESET Output Configurations
t
w
a) RESIN
5 V
2.5 V
0 V
WAVEFORMS
5 V
V
CC
DUT
RESET
511 Ω
RESET OUTPUT CONFIGURATION
t
w
b) VSU
15 pF
(see Note A)
VIT + 2 V
V
VIT – 2 V
IT
VSU
RESIN
RESET
RESET
Undefined
V
t
90%
t
10%
t
r
IT+
f
d
Figure 2. Input Pulse Definition
Voltage
Fault
V
IT+
t
PLH
90%
t
d
10%10%
t
PHL
10%
90%
V
IT–
t
r
t
f
0.8 V
50%
50%
2 V
0 V
V
IH
V
IL
V
OH
90%
t
d
10%
V
OL
Figure 3. Voltage Waveforms
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
APPLICATION INFORMATION
V
S
16
V
1VSU
1RESIN
1CT
ƫ
C
T
CC
1RESET
1RESET
GND
8
5
10
1
C
T
*
5
Ǔ
R
5
T
Reset Input
(from system)
R
T
(see Note B)
NOTE B: When VCC and 1VSU are connected to the same point, it is recommended that series resistance (RT) be added between the time-delay
programming capacitor (CT) and the voltage-supervisor device terminal (1CT). The suggested RT value is given by:
VI*
V
IT
110
*
*
, where VI+ǒthe lesser of 7.1 V or V
*
3
ǒ
ƪ
(
6.5E*5)
6.510
*
u
R
T
When this series resistor is used, the td calculation is as follows:
1.3
t
+
d
4
32
Ǔ
S
10 kΩ
10 kΩ
System Supply
To System Reset
To System Reset
Figure 4. System Reset Controller With Undervoltage Sensing
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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