Copyright 2000. TeraLogic, Inc. All rights reserved worldwide. TeraLogic and the TeraLogic logo are registered trademarks of TeraLogic, Inc. Janus is a
trademark of TeraLogic, Inc. All other trademarks are properties of their respective owners and are acknowledged. 11/00 - 5K
TeraLogic, Inc. 1240 Villa Street Mountain View CA 94041
tel 650.526.2000 fax 650.526.2006 www.teralogic.tv
circuits
APPLICATIONS
• Digital TV Sets
• Standard Definition Digital Set-top Boxes
• Personal Video Recorders
• High Definition Digital Set-top Boxes
SUPPORTING TERALOGIC PRODUCTS
• TL81x STB/PVR Controller ICs
• Cougar Development Platform
HIGH PERFORMANCE DIGITAL
VIDEO DECODER
• MPEG-2 decoder (Dual MP@ML or single
MP@HL)
• ATSC/DVB/ARIB/DIRECTV compliant
• Decodes 1 HD or multiple SD streams
simultaneously
ADVANCED DISPLAY PROCESSOR
• Standard definition and all 18 ATSC formats
supported
• Letterbox and pan-and-scan options for
displaying 16:9 video on 4:3 TVs
• Frame rate conversion for 3:2 pulldown
• Multiple video services displayed on the
same screen including picture-in-picture
(PIP) and picture-out-of-picture (POP) applications
• Graphics overlay plane with up to 24 bits
per pixel and 8-bit alpha channel
• Cursor plane with 32x32 pixel cursor with 4-bit
AUDIO PROCESSING
• Digital audio inputs supporting up to six
channel sources (
I
2
S compatible)
• Audio capture to memory or bypass
to output
• Audio mix, cross-fade and attenuate
between sources
• Six channel audio output
• IEC-958 formatted output supported
• Provides audio rate buffer
• Provides audio and video PTS
synchronization
MEMORY CONTROLLER
• Programmable clock generator
• Up to 64 Mbytes addressing range
• Advanced Memory Reduction (AMR)
mode supports HD decode in
8 Mbytes of memory
PROGRAMMABLE TRANSPORT
DEMULTIPLEXER
• ATSC/ARIB/DVB/DIRECTV compliant
• Transport or PES can be fed through
PCI bus or dedicated input
ACCELERATED 2-D GRAPHICS
• Hardware BLT engine
• Up to 32 bpp graphics in RGB color
space
• Full alpha blend support
• Alpha channel arithmetic engine
• Hardware color expansion and reduction
• Hardware flicker reduction for interlaced
display
PCI BUS INTERFACE
• 32-bit interface (master or slave)
• 50 MHz or 33 MHz bus clock
TECHNOLOGY
• 2.5 V core, 3.3 V I/O, 0.25µ CMOS
• 348-pin ball grid array package
index (16 colors with 8-bit alpha blending)
• Analog RGB (EIA-770) or YCrCb output
for HDTV display or SD display in downconversion mode
• 16- or 24-bit digital video output
• Programmable I to P conversion option
(requires custom support)
• Enables ARIB 5 plane graphics option
NTSC/PAL ENCODER
• Macrovision 7.1
• Supports all variations of NTSC/PAL
encoding
• Advanced trick play features including
zoom, smooth scan
FLEXIBLE FORMAT CONVERTER
• High-quality scan conversion from ATSC
source formats to output display formats
• Many nonstandard output and source
formats supported
• High quality up-conversion and downconversion of source video to selected
display format
NTSC VIDEO INTEGRATION
• Video capture port for NTSC/PAL digital
video (CCIR656 compatible)
• Supports analog VCR recording of off-air
programming
• Analog inputs upscaled to HD resolutions
TL851 Advanced
Digital TV Decoder