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MAKING TELEVISION COMPELLING AND ENGAGING
The TL750 delivers a compelling user experience due to advanced functionality. These functions include its fast response time
to display graphics-rich content and high quality graphics and video, its capability to perform seamless integration of video and
multimedia graphics content and easy navigation of menu objects. A 32-bit hardware-accelerated graphics engine performs fast
rendering of on-screen menus and internet content and supplies 32-bit color depth for true color graphics. Alpha blending (129
levels) provides transparent graphics overlay for video/studio-like effects including fading in/out. A multi-tap anti-flicker filter
creates readable text and graphics on interlaced displays. Scalable windowing enables picture-in-picture (PIP) and picture-in-
graphics (PIG) functions. A hardware cursor controls the easy navigation of menus and internet-driven push content on the TV.
GLOBAL AND SCALABLE ARCHITECTURE
The TL750 interfaces have been designed to reduce interface glue to key
components (MPEG Decoder, CPU, etc.) and keep parts count in the system to a
minimum. The TL750 offers a unified memory system allowing the CPU and the
TL750 to share the same memory system thereby driving down the amount of
memory required in the end system through this Unified Memory Architecture.
The TL750 interfaces to all existing standard definition MPEG-2 decoders and
enables seamless migration from a basic Set-Top Box to a higher-end, graphics-
rich advanced Set-Top Box or Personal Video Recorder. The TL750 is capable of
interfacing gluelessly to many RISC type CPUs (including Embedded MIPS,
StrongARM, STMicroelectronic’s ST20, Hitachi’s SH Series, Motorola 68K,
Toshiba Hawk, PowerPC and others).
Graphics processor for Personal Video Recorders, DVD, Digital STB and
Internet TV applications
TL750
Digital TV Graphics Processor
TV
VCR
Telephone
Modem
NTSC/PAL
Decoder
MPEG-2
Decoder
Unified
Memory
TL750
CPU
NTSC/PAL
Encoder
NTSC/PAL
Encoder
Analog Video
Digital Video
TL750 SYSTEM DIAGRAM
integrated circuits
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Copyright 2000. TeraLogic, Inc. All rights reserved worldwide. TeraLogic and the TeraLogic logo are registered trademarks of TeraLogic, Inc. Janus is a
trademark of TeraLogic, Inc. All other trademarks are properties of their respective owners and are acknowledged. 11/00 - 5K
TeraLogic, Inc. 1240 Villa Street Mountain View CA 94041
tel 650.526.2000 fax 650.526.2006 www.teralogic.tv
circuits
APPLICATIONS
• Personal Video Recorders
• DVD Players
• Advanced Digital Set-Top Boxes
• Digital Televisions
• Internet TVs/Appliances
ACCELERATED 2D GRAPHICS
• 1-, 4-, 8-, 16-, 24- and 32-bit
graphics support
• YCbCr and/or RGB color space
• Alpha-channel raster operations
• 256-operation BitBLT accelerator
• Color expansion
• Color reduction with dithering
• Color palette
VIDEO POST PROCESSING
• Letterbox processor with multi-line filter
• Horizontal and vertical scaling of video to
arbitrary screen position and size
GRAPHICS POST PROCESSING
• Anti-flutter filter reduces graphics flicker
• Anti-alias filter reduces out-of-band edge
effects
• Independent scaling of the graphics plane
• Independent positioning of the graphics plane
VIDEO INPUT/OUTPUT
• Two digital video inputs allow selection
between sources
• Two digital video outputs - one without
overlay graphics for VCR recording
• Direct interface to MPEG decoders and
NTSC/PAL decoders
• Direct interface to NTSC/PAL encoders
AUDIO PROCESSING
• Three stereo audio input channels
(
I
2
S compatible) and three audio
output channels
• Supports up to 96 kHz sampling frequency
• Internal PCM audio stream player
• Programmable mixer for six channels and
internal audio
• Programmable volume control (256 levels)
• Master and slave timing modes
• IEC-958 output
UNIVERSAL STB HOST INTERFACE
• 32/16-bit host interface can gluelessly
connect to Embedded MIPS,
STMicroelectronic’s ST20-TPx, LSI
Logic’s L64x08, Motorola 683xx and
ColdFire, Toshiba Hawk, Power PC (IBM
and Motorola), Hitachi SHx, and SA-110
StrongARM CPU devices
• Eight-word read and write buffers and
2 kByte cache
• Cache line fills
• Unified Memory Architecture – attached
DRAM may be used as CPU main
memory
TECHNOLOGY
• 3.3V CMOS with 5V tolerant I/O
(SDRAM interface supports 3.3V only)
• 208-pin plastic quad flat pack (PQFP)
package
COMPOSITING
• Background, video, graphics and cursor
compositing with an alpha channel
• Independent variable pixel aspect ratio on
video and graphics streams
• Square pixel graphics and non-square
video may be composited together
CURSOR AND BACKGROUND TEXTURE
• Background texture map using tiled
bitmap
• Foreground cursor/pop-up bitmap with
4 bpp
ENHANCED VBI SUPPORT
• Data services information can be captured
in vertical blanking interval
• VBI capture is independent of video
processing
HIGH-PERFORMANCE UNIFIED MEMORY
CONTROLLER
• 81 MHz SDRAM supported
• 16-bit or 32-bit interfaces
TL750 Digital TV Graphics Processor
Video Processor
• Horizontal & Vertical
Scaling
• Letterbox Processor
Unified Memory
CPU
TL750
Memory Controller
Host Interface
To TV
Video in
0
Video in
1
(3) Audio
Inputs
Aux. Video
(3) Audio
Outputs
32-Bit
Graphics
Accelerator
Display Processor
Audio
Processor/
Mixer
Graphics Processor
• Anti-flicker Filter
• Anti-alias Filter
• Graphics Scaler
• Color Reduction/Expansion
Compositing Engine
• Four Planes
• Alpha Blending
• RGB to YUV
TL750 BLOCK DIAGRAM
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