TEXAS INSTRUMENTS TL05x, TL05xA, TL05xY Technical data

CHIP
查询TL05供应商
D
D
Faster Slew Rate (20 V/µs Typ) Without Increased Power Consumption
description
The TL05x series of JFET-input operational amplifiers of fers improved dc and ac characteristics over the TL07x and TL08x families of BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision grades as low as 1.5 mV (TL051A) for greater accuracy in dc-coupled applications. T exas Instruments improved BiFET process and optimized designs also yield improved bandwidth and slew rate without increased power consumption. The TL05x devices are pin-compatible with the TL07x and TL08x and can be used to upgrade existing circuits or for optimal performance in new designs.
BiFET operational amplifiers offer the inherently higher input impedance of the JFET -input transistors, without sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with high-impedance sensors or very low-level ac signals. They also feature inherently better ac response than bipolar or CMOS devices having comparable power consumption.
The TL05x family was designed to offer higher precision and better ac response than the TL08x with the low noise floor of the TL07x. Designers requiring significantly faster ac response or ensured lower noise should consider the Excalibur TLE208x and TLE207x families of BiFET operational amplifiers.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
D
On-Chip Offset Voltage Trimming for Improved DC Performance and Precision Grades Are Available (1.5 mV, TL051A)
D
Available in TSSOP for Small Form-Factor Designs
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
0°C to 70°C
–40°C to 85°C
–55°C to 125°C
The D packages are available taped and reeled. Add R suffix to device type (e.g., TL054CDR).
Chip forms are tested at 25°C.
VIOmax AT 25°C
800 µV
1.5 mV
4 mV TL054CD TL054CN — 800 µV
1.5 mV
4 mV TL054ID TL054IN — 800 µV
1.5 mV
4 mV TL054MD TL054MFK TL054MJ TL054MN
SMALL
OUTLINE
(D)
TL051ACD TL052ACD
TL051CD TL052CD TL054ACD
TL051AID TL052AID
TL051ID TL052ID TL054AID
TL051AMD TL052AMD
TL051MD TL052MD TL054AMD
CARRIER
TL051AMFK TL052AMFK
TL051MFK TL052MFK TL054AMFK
CHIP
(FK)
TL054ACN
TL054AIN
CERAMIC
DIP
(J)
TL054AMJ
CERAMIC
DIP
(JG)
TL051AMJG TL052AMJG
TL051MJG TL052MJG
PLASTIC
DIP
(N)
TL054AMN
PLASTIC
DIP
(P)
TL051ACP TL052ACP
TL051CP TL052CP
TL051AIP TL052AIP
TL051IP TL052IP
TL051AMP TL052AMP
TL051MP TL052MP
FORM
(Y)
TL051Y TL052Y TL054Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1997, Texas Instruments Incorporated
1
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
description (continued)
Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to observe common-mode input voltage limits and output swing when operating from a single supply . DC biasing of the input signal is required and loads should be terminated to a virtual-ground node at midsupply. Texas Instruments TLE2426 integrated virtual ground generator is useful when operating BiFET amplifiers from single supplies.
The TL05x are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply systems, Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When moving from BiFET to CMOS amplifiers, particular attention should be paid to the slew rate and bandwidth requirements, and also the output loading.
D, JG, OR P PACKAGE
TL051
(TOP VIEW)
D, JG, OR P PACKAGE
TL052
(TOP VIEW)
TL054
D, J, OR N PACKAGE
(TOP VIEW)
OFFSET N1
IN–
IN+
V
CC–
NC
IN–
NC
IN+
NC
1 2 3 4
TL051
FK PACKAGE
(TOP VIEW)
NC
OFFSET N1
NC
3 2 1 20 19
4 5 6 7 8
910111213
NC
NC
CC –
V
NC
8
V
7
CC+
OUT
6
OFFSET N2
5
NC
NC
18 17 16 15 14
NC
NC V
CC+
NC OUT NC
NC
1IN –
NC
1IN+
NC
1OUT
1IN– 1IN+
V
CC –
3212019
4 5 6 7 8
NC
NC
8 7 6 5
CC +
V
2IN +
V 2OUT 2IN– 2IN+
NC
18 17 16 15 14
NC
1 2 3 4
TL052
FK PACKAGE
(TOP VIEW)
NC
1OUT
910111213
NC
CC –
V
CC+
NC 2OUT NC 2IN – NC
1IN+
V
CC+
2IN+
1OUT
1IN– 1IN+
V
CC+
2IN+ 2IN–
2OUT
NC
NC
14
1
13
2
12
3
11
4
10
5 6 7
FK PACKAGE
3212019
4 5 6 7 8
910111213
9 8
TL054
(TOP VIEW)
1IN –
1OUT
NC
NC
2IN –
2OUT
3OUT
4OUT 4IN– 4IN+ V
CC–
3IN+ 3IN– 3OUT
4IN –
4OUT
18 17 16 15 14
3IN –
4IN+ NC V
CC–
NC 3IN+
NC – No internal connection
2
OFFSET N2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
symbol (each amplifier)
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
IN–
IN+
equivalent schematic (each amplifier)
Q2
Q3
IN+ IN–
JF1 JF2
Q4
Q1
See Note A
OFFSET N1 OFFSET N2
R1
R2 R3
Q5
+
Q6
Q7
D1
C1
R4
OUT
Q8
V
CC+
Q10
Q11
R5
R6
Q9
Q12
R8
Q13
R7
R9
Q14
R10 D2
Q17
Q15
Q16
JF3
OUT
NOTE A: OFFSET N1 and OFFSET N2 are only available on the TL051x.
ACTUAL DEVICE COMPONENT COUNT
COMPONENT TL051 TL052 TL054
Transistors 20 34 62 Resistors 10 19 37 Diodes 2 3 5 Capacitors 1 2 4
These figures include all four amplifiers and all ESD, bias, and trim circuitry.
V
CC–
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051Y chip information
This chip, when properly assembled, displays characteristics similar to the TL051. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
(6)(7)
(3)
IN+
(2)
IN–
OFFSET N1 OFFSET N2
(1) (5)
CC+
(7)
+
V
(6)
(4)
CC–
OUT
63
(1)
(2)
43
(5)
(3)
(4)
CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052Y chip information
This chip, when properly assembled, displays characteristics similar to the TL052. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(7)
(6)
(5)
1IN+
1IN–
2OUT
(3)
(2)
(7)
(8)
+
V
CC–
(4)
(1)
1OUT
(5)
+
(6)
2IN+
2IN–
72
(8)
(1)
66
(2)
(4)
CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
(3)
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054 chip information
This chip, when properly assembled, displays characteristics similar to the TL054C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. These chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
+
+
V
(11)
CC–
CC+
(4)
(1)
(5)
+
(6)
(8)
(12)
+
(13)
(2)
(3)
(1)
(14)
(13)
(12)
1IN+
1IN–
2OUT
3IN+
3IN–
4OUT
(3)
(2)
(7)
(10)
(9)
(14)
1OUT
2IN+
2IN–
3OUT
4IN+
4IN–
122
(4)
(5)
(6)
(7) (8)
(6)
(7)
71
(8)
(9)
(11)
(10)
(9)
CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF THE CHIP.
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
UNIT
C
V
V
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V Supply voltage, V
Differential input voltage (see Note 2) ±30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
Input current, II (each input) ±1 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, I Total current into V Total current out of V
Duration of short-circuit current at (or below) 25°C (see Note 4) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16inch) from case for 10 seconds: D, N, or P package 260°C. . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16inch) from case for 60 seconds: J or JG package 300°C. . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded.
(see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC+
(see Note 1) –18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC–
(any input, see Notes 1 and 3) ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
(each output) ±80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
160 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC+
160 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC–
: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
and V
CC+
CC–.
PACKAGE
D–8 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW
D–14 950 mW 7.6 mW/°C 608 mW 494 mW 190 mW
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
J 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
N 1575 mW 12.6 mW/°C 1008 mW 819 mW 315 mW P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW
TA 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
recommended operating conditions
Supply voltage, V
ommon-mode input voltage,
Operating free-air temperature, T
CC±
IC
A
DISSIPATION RATING TABLE
TA = 70°C
POWER RATING
C SUFFIX I SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX
V
= ±5 V –1 4 –1 4 –1 4
CC±
V
= ±15 V
CC±
TA = 85°C
POWER RATING
±5 ±15 ±5 ±15 ±5 ±15 V
–11
11
0 70
–11
–40
TA = 125°C
POWER RATING
11
–11
85 –55 125 °C
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
7
TL05x, TL05xA, TL05xY
TL051C
VIOInput offset voltage
mV
TL051AC
V
R
S
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
k
V
V
R
2 k
R
k
V
g
V
R
k
L
diff
l
voltage am lification
C
V
V
rejection ratio
V
O
R
S
S
ratio (V
CC±
/VIO)
CCyO
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051C and TL051AC electrical characteristics at specified free-air temperature
TL051C, TL051AC
PARAMETER TEST CONDITIONS
p
= 0,
O
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
Full range is 0°C to 70°C.
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
For V
Temperature coefficient of input offset voltage
Input offset voltage long-term drift
p
p
Common-mode input voltage range
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
arge-signal
Input resistance 25°C 10 Input capacitance 25°C 10 12 pF
ommon-mode
upply-voltage rejection
Supply current VO = 0, No load
= ±5 V, VO = ±2.3 V, or for V
CC±
p
§
erentia
VIC = 0,
= 50
= 50
R
VO = 0, VIC = 0, See Figure 5
VO = 0, VIC = 0, See Figure 5
= 10
L
=
L
= 10
L
= 2
L
RL = 2 k
=
IC
= 0,
VO = 0, RS = 50
= ±15 V, VO = ±10 V.
CC±
ICR
TL051C
TL051AC
min,
= 50
T
A
25°C 0.75 3.5 0.59 1.5
Full range 4.5 2.5
25°C 0.55 2.8 0.35 0.8
Full range 3.8 1.8
25°C to
70°C
25°C to
70°C 25°C 0.04 0.04 µV/mo 25°C 4 100 5 100 pA
70°C 0.02 1 0.025 1 nA 25°C 20 200 30 200 pA 70°C 0.15 4 0.2 4 nA
25°C
Full range
25°C 3 4.2 13 13.9
Full range 3 13
25°C 2.5 3.8 11.5 12.7
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Full range –2.5 –12
25°C –2.3 –3.2 –11 –12
Full range –2.3 –11
25°C 25 59 50 105
0°C 30 65 60 129
70°C 20 46 30 85
25°C 65 85 75 93
0°C 65 84 75 92 70°C 65 84 75 91 25°C 75 99 75 99
0°C 75 98 75 98 70°C 75 97 75 97 25°C 2.6 3.2 2.7 3.2
0°C 2.7 3.2 2.8 3.2 70°C 2.6 3.2 2.7 3.2
VCC ± = ± 5 V VCC ± = ± 15 V
MIN TYP MAX MIN TYP MAX
8 8
8 8 25
–1
–1
–2.3
to
to
4
5.6
to
4
12
–11
11
–11
11
–12.3
to
to
15.6
10
to
12
UNIT
µ
V/mV
dB
dB
mA
°
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Positi
L
,
L
,
V/µs
N
ns
C
L
100 F
g
V
q V/H
C
L
See Figure 4
gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051C and TL051AC operating characteristics at specified free-air temperature
TL051C, TL051AC
PARAMETER TEST CONDITIONS
SR+
SR–
t
r
t
f
n
V
N(PP)
I
n
THD
B
1
φ
m
Full range is 0°C to 70°C.
For V
CC±
§
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
ve slew rate
§
= ±1 V; for V
I(PP)
at unity gain
egative slew rate
at unity gain
Rise time
Fall time
Overshoot factor
Equivalent input noise voltage
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
Total harmonic distortion
Unity-gain bandwidth
Phase margin at unity
= ±5 V, V
= ±5 V, VOrms = 1 V; for V
R
= 2 kΩ,C
See Figure 1
V
= ±10 mV ,
I(PP)
RL = 2 kΩ,
See Figures 1 and 2
RS = 20 Ω, See Figure 3
f = 1 kHz 25°C 0.01 0.01 RS = 1 kΩ,
f = 1 kHz
VI = 10 mV, RL = 2 kΩ,
VI = 10 mV, RL = 2 kΩ,
CC±
CC±
p
=
p
= 25 F,
= 25 F,
p
= ±15 V, V
= ±15 V, VOrms = 6 V.
= 100 pF,
,
f = 10 Hz 25°C 75 75 f = 1 kHz 25°C 18 18 30 f = 10 Hz to
10 kHz
RL = 2 kΩ,
= ±5 V.
I(PP)
T
A
25°C 16 13 20
Full
range
25°C 15 13 18
Full
range
25°C 55 56
0°C 54 55 70°C 63 63 25°C 55 57
0°C 54 56 70°C 62 64 25°C 24% 19%
0°C 24% 19% 70°C 24% 19%
25°C 4 4 µV
25°C 0.003% 0.003% 25°C 3 3.1
0°C 3.2 3.3 70°C 2.7 2.8 25°C 59° 62°
0°C 58° 62° 70°C 59° 62°
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
16.4 11 22.6
16 11 19.3
CC±
= ±15 V
UNIT
n
pA/Hz
MHz
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
9
TL05x, TL05xA, TL05xY
A
TL051I
VIOInput offset voltage
mV
TL051AI
V
0
R
S
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
k
V
V
R
k
R
k
V
g
V
R
k
L
diff
l
voltage am lification
,
C
V
IC
V
ICR
min,
rejection ratio
S
V
ratio (V
CC±
/VIO)
R
S
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051I and TL051AI electrical characteristics at specified free-air temperature
TL051I, TL051AI
PARAMETER TEST CONDITIONS
p
,
=
O
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
Full range is –40°C to 85°C
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
For V
Temperature coefficient of input offset voltage
Input offset voltage long-term drift
p
p
Common-mode input voltage range
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
arge-signal
Input resistance 25°C Input capacitance 25°C 10 12 pF
ommon-mode
upply-voltage rejection
Supply current VO = 0, No load –40°C 2.4 3.2 2.6 3.2 mA
= ±5 V, VO = ±2.3 V, or for V
CC±
§
erentia
p
VIC = 0,
= 50
= 50
R
VO = 0, VIC = 0, See Figure 5
VO = 0, VIC = 0, See Figure 5
= 10
L
= 2
L
= 10
L
= 2
L
RL = 2 k –40°C 30 74 60 145 V/mV
V
= V VO = 0, RS = 50
= 0,
O
= 50
= ±15 V, VO = ±10 V.
CC±
TL051I
TL051AI
min
T
A
25°C 0.75 3.5 0.59 1.5
Full range 5.3 3.3
25°C 0.55 2.8 0.35 0.8
Full range 4.6 2.6
25°C to
85°C
25°C to
85°C
25°C 0.04 0.04 µV/mo 25°C 4 100 5 100 pA
85°C 0.06 10 0.07 10 nA 25°C 20 200 30 200 pA 85°C 0.6 20 0.7 20 nA
25°C
Full range
25°C 3 4.2 13 13.9
Full range 3 13
25°C 2.5 3.8 11.5 12.7
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Full range –2.5 –12
25°C –2.3 –3.2 –11 –12
Full range –2.3 –11
25°C 25 59 50 105
85°C 20 43 30 76
25°C 65 85 75 93
–40°C 65 83 75 90 dB
85°C 65 84 75 93 25°C 75 99 75 99
–40°C 75 98 75 98 dB
85°C 75 99 75 99 25°C 2.6 3.2 2.7 3.2
85°C 2.5 3.2 2.6 3.2
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
7 8
8 8 25
–1
–2.3
to
to
4
5.6
–1
to
4
12
10
–11
11
–11
11
to
to
CC±
= ±15 V
–12.3
to
15.6
12
10
UNIT
µ
°
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Positi
L
,
L
,
V/µs
N
ns
()
C
L
100 F
g
g
V
q V/H
C
L
See Figure 4
gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051I and TL051AI operating characteristics at specified free-air temperature
TL051I, TL051AI
PARAMETER TEST CONDITIONS
SR+
SR–
t
r
t
f
n
V
N(PP)
I
n
THD Total harmonic distortion
B
1
φ
m
Full range is –40°C to 85°C.
For V
CC±
§
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
ve slew rate
§
= ±1 V; for V
I(PP)
at unity gain
egative slew rate
at unity gain
Rise time
Fall time
Overshoot factor
Equivalent input noise voltage
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
Unity-gain bandwidth
Phase margin at unity
= ±5 V, V
= ±5 V, VOrms = 1 V; for V
R
= 2 kΩ,C
See Figure 1
V
= ±10 mV ,
I(PP)
RL = 2 kΩ,
See Fi
RS = 20 Ω, See Figure 3
f = 1 kHz 25°C 0.01 0.01 pA/√Hz RS = 1 kΩ,
f = 1 kHz
VI = 10 mV, RL = 2 kΩ,
VI = 10 mV, RL = 2 kΩ,
CC±
CC±
p
=
ures 1 and 2
p
= 25 F,
= 25 F,
p
= ±15 V, V
= ±15 V, VOrms = 6 V.
= 100 pF,
,
f = 10 Hz 25°C 75 75 f = 1 kHz 25°C 18 18 30 f = 10 Hz to
10 kHz
RL = 2 kΩ,
= ±5 V.
I(PP)
T
A
25°C 16 13 20
Full
range
25°C 15 13 18
Full
range
25°C 55 56
–40°C 52 53
85°C 64 65 25°C 55 57
–40°C 51 53
85°C 64 65 25°C 24% 19%
–40°C 24% 19%
85°C 24% 19%
25°C 4 4 µV
25°C 0.003% 0.003% 25°C 3 3.1
–40°C 3.5 3.6
85°C 2.6 2.7 25°C 59° 62°
–40°C 58° 61°
85°C 59° 62°
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
11
11
CC±
= ±15 V
UNIT
n
MHz
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
11
TL05x, TL05xA, TL05xY
A
TL051M
VIOInput offset voltage
mV
TL051AM
V
0
R
S
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
k
V
V
R
k
R
k
V
g
V
R
k
L
diff
l
§
voltage am lification
§
,
C
V
IC
V
ICR
min,
rejection ratio
S
ratio (V
CC±
/VIO)
CCyO
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051M and TL051AM electrical characteristics at specified free-air temperature
TL051M, TL051AM
PARAMETER TEST CONDITIONS
p
,
=
O
α
A
r
i
c
CMRR
k
I
CC
Full range is –55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
Temperature coefficient of
VIO
input offset voltage
Input offset voltage long-term drift
p
p
Common-mode input
ICR
voltage range
Maximum positive peak
OM+
output voltage swing
Maximum negative peak
OM–
output voltage swing
VD
i
SVR
arge-signal
Input resistance 25°C 10 Input capacitance 25°C 10 12 pF
ommon-mode
upply-voltage rejection
Supply current VO = 0, No load
= ± 5 V, VO = ± 2.3 V, or for V
CC±
erentia
p
VIC = 0,
= 50
= 50
R
VO = 0, VIC = 0, See Figure 5
VO = 0, VIC = 0, See Figure 5
= 10
L
= 2
L
= 10
L
= 2
L
RL = 2 k
V
= V VO = 0, RS = 50
VO = 0, RS = 50
=
CC±
TL051AM
min
±15 V, V
TL051M
= ±10 V.
O
T
A
25C 0.75 3.5 0.59 1.5
Full range 6.5 4.5
25°C 0.55 2.8 0.35 0.8
Full range 5.8 3.8
25°C to
125°C
25°C to
125°C
25°C 0.04 0.04 µV/mo 25°C 4 100 5 100 pA
125°C 1 20 2 20 nA
25°C 20 200 30 200 pA
125°C 10 50 20 50 nA
25°C
Full range
25°C 3 4.2 13 13.9
Full range 3 13
25°C 2.5 3.8 11.5 12.7
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Full range –2.5 –12
25°C –2.3 –3.2 –11 –12
Full range –2.3 –11
25°C 25 59 50 105
–55°C 30 76 60 149
125°C 10 32 15 49
25°C 65 85 75 93
–55°C 65 83 75 92
125°C 65 84 75 94
25°C 75 99 75 99
–55°C 75 98 75 98
125°C 75 100 75 100
25°C 2.6 3.2 2.7 3.2
–55°C 2.3 3.2 2.4 3.2
125°C 2.4 3.2 2.5 3.2
VCC ± = ± 5 V VCC ± = ± 15 V
MIN TYP MAX MIN TYP MAX
8 8
8 8
–1
–1
–2.3
to
to
4
5.6
to
4
12
–11
to
11
–11
to
11
–12.3
15.6
12
10
to
UNIT
µ
V/mV
dB
dB
mA
°
12
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
A
SR
25°C1613
20
L
,
L
,
V/µs
SR
g
25°C1513
ns
()
C
L
100 F
g
g
V
q V/H
C
L
See Figure 4
gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051M and TL051AM operating characteristics at specified free-air temperature
TL051M, TL051AM
V
PARAMETER TEST CONDITIONS
Positive slew rate
+
at unity gain Negative slew rate
at unity gain
t
r
t
f
V
I
n
THD
B
φ
m
For V
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
For V
Rise time
Fall time
Overshoot factor
Equivalent input noise
n
voltage Peak-to-peak equivalent
N(PP)
input noise voltage Equivalent input noise
current
Total harmonic distortion
Unity-gain bandwidth
1
Phase margin at unity
= ±5 V, V
CC±
= ±5 V, VOrms = 1 V; for V
CC±
= ±1 V; for V
I(PP)
R
= 2 kΩ,C
See Figure 1
V
= ±10 mV,
I(PP)
RL = 2 kΩ,
See Fi
RS = 20 Ω, See Figure 3
f = 1 kHz 25°C 0.01 0.01 pA/√Hz RS = 1 kΩ,
§ f = 1 kHz
VI = 10 mV,
VI = 10 mV,pRL = 2 kΩ,
CC±
CC±
p
=
ures 1 and 2
= 25 F,
p
= 25 F,
= ±15 V, V
= ±15 V, VOrms = 6 V.
= 100 pF,
,
f = 10 Hz 25°C 75 75 f = 1 kHz 25°C 18 19 f = 10 Hz to
10 kHz
RL = 2kΩ,
RL = 2 kΩ,
= ±5 V.
I(PP)
T
A
MIN TYP MAX MIN TYP MAX
°
°
25°C 55 56
–55°C 51 52
125°C 68 68
25°C 55 57
–55°C 51 52
125°C 68 69
25°C 24% 19%
–55°C 25% 19%
125°C 25% 19%
25°C 4 4 µV
25°C 0.003% 0.003% 25°C 3 3.1
–55°C 3.6 3.7
125°C 2.3 2.4
25°C 59° 62°
–55°C 57° 61°
125°C 59° 62°
= ±5 V V
CC±
CC±
= ±15 V
UNIT
n
MHz
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
13
TL05x, TL05xA, TL05xY
VIOInput offset voltage
O
,
IC
,
0.75
0.59
mV
IIOInput offset current
O
,
IC
,
45pA
IIBInput bias current
O
,
IC
,
2030pA
V
g
V
V
gg
V
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051Y electrical characteristics, TA = 25°C
PARAMETER TEST CONDITIONS
V
p
p
p
V
A r
i
c CMRR Common-mode rejection ratio
k I
CC
For V
Common-mode input voltage range
ICR
Maximum positive peak output voltage
OM+
swing Maximum negative peak output voltage
OM –
swing Large-signal differential voltage
VD
amplification Input resistance 10 Input capacitance 10 12 pF
i
Supply-voltage rejection ratio
SVR
(V
CC±
Supply current VO = 0, No load 2.6 2.7 mA
= ±5 V, VO = ±2.3 V, or for V
CC±
/VIO)
= ± 15 V, V
CC±
= 0, V
RS = 50 V
= 0, V
See Figure 5 V
= 0, V
See Figure 5
RL = 10 k 4.2 13.9 RL = 2 k RL = 10 k –3.5 –13.2 RL = 2 k
RL = 2 k 59 105 V/mV
VIC = V VO = 0, RS = 50
VO = 0, RS = 50 99 99 dB
= ±10 V.
O
ICR
min,
= 0,
= 0,
= 0,
TL051Y
VCC ± = ± 5 V VCC ± = ± 15 V
MIN TYP MAX MIN TYP MAX
–2.3
to
5.6
3.8 12.7
–3.2 –12
12
85 93 dB
–12.3
15.6
12
10
to
UNIT
p
p
V
14
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
L
,
L
,
V/µs
()
ns
C
L
100 F
V
Equival
V/H
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051Y operating characteristics, T
PARAMETER TEST CONDITIONS
SR+ SR– t
r
t
f
V I
n
THD Total harmonic distortion
B
φ
m
For V
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
For V
Positive slew rate at unity gain Negative slew rate at unity gain Rise time Fall time Overshoot factor
n
N(PP)
1
CC±
CC±
ent input noise voltage
Peak-to-peak equivalent input noise voltage
Equivalent input noise current f = 1 kHz 0.01 0.01 pA/√Hz
Unity-gain bandwidth
Phase margin at unity gain
= ±5 V, V
= ±5 V, VOrms = 1 V; for V
= ±1 V; for V
I(PP)
§
= ±15 V, V
CC±
= ±15 V, VOrms = 6 V.
CC±
= 25°C
A
R
= 2 kΩ,C
See Figure 1 V
= ±10 mV ,
I(PP)
RL = 2 kΩ,
=
p
=
See Figures 1 and 2
RS = 20 Ω, See Figure 3
RS = 1 kΩ,RL = 2 kΩ, f = 1 kHz
VI = 10 mV, RL = 2 kΩ, CL = 25 pF, See Figure 4
VI = 10 mV, RL = 2 kΩ, CL = 25 pF, See Figure 4
I(PP)
= 100 pF,
,
f = 10 Hz 75 75 f = 1 kHz 18 18 f = 10 Hz to
10 kHz
= ±5 V.
TL051Y
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
16 20 15 18 55 56 55 57
24% 19%
4 4 µV
0.003% 0.003%
3 3.1 MHz
59° 62°
CC±
= ±15 V
UNIT
n
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
15
TL05x, TL05xA, TL05xY
A
TL052C
VIOInput offset voltage
mV
TL052AC
V
IC
R
S
TL052C
8
8
V/°C
TL052AC
8625
IIOInput offset current
O
,
V
0
IIBInput bias current
O
,
V
0
V
V
R
k
V
V
R
k
R
10 k
V
g
V
R
k
voltage am lification
C
V
V
rejection ratio
V
O
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052C and TL052AC electrical characteristics at specified free-air temperature
TL052C, TL052AC
PARAMETER TEST CONDITIONS
p
VO = 0,
= 0,
= 50
50
R
α
A
r c
CMRR
† ‡
§
Temperature coefficient
VIO
of input offset voltage
Input offset voltage long­term drift
Common-mode input
ICR
voltage range
Maximum positive peak
OM+
output voltage swing
Maximum negative peak
OM–
output voltage swing
Large-signal differential
VD
Input resistance 25°C
i
Input capacitance 25°C 10 12 pF
i
Full range is 0°C to 70°C. This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV . For V
CC±
§
p
p
p
ommon-mode
= ±5 V, VO = ±2.3 V; at V
VO = 0, RS = 50
V
= 0,
See Figure 5 V
= 0,
See Figure 5
= 10
L
= 2
L
=
L
= 2
L
RL = 2 k
=
IC
= 0,
CC±
min,
ICR
=
= ±15 V, VO = ±10 V.
VIC = 0, 25°C 0.04 0.04 µV/mo
,
=
IC
,
=
IC
RS = 50
T
A
25°C 0.73 3.5 0.65 1.5
Full range 4.5 2.5
25°C 0.51 2.8 0.4 0.8
Full range 3.8 1.8
25°C to
70°C
25°C to
70°C
25°C 4 100 5 100 pA 70°C 25°C 20 200 30 200 pA 70°C
25°C
Full range
25°C 3 4.2 13 13.9
Full range 3 13
25°C 2.5 3.8 11.5 12.7
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Full range –2.5 –12
25°C –2.3 –3.2 –11 –12
Full range –2.3 –11
25°C 25 59 50 105
0°C 30 65 60 129
70°C 20 46 30 85
25°C 65 85 75 93
0°C
70°C 65 84 75 91
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
0.02 1 0.025 1 nA
0.15 4 0.2 4 nA
–1
–2.3
to
to
4
5.6
–1
to
4
12
10
65 84 75 92
–11
11
–11
11
to
to
CC±
= ±15 V
–12.3
to
15.6
12
10
UNIT
µ
V/mV
dB
°
16
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
A
ratio (V
CC ±
/VIO)
(two am lifiers)
A
SR +Slew rate at unity gain
V/µs
SR
g
ns
()
C
L
100 F
g
g
V
q V/H
C
L
See Figure 4
Ph
V
R
gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052C and TL052AC electrical characteristics at specified free-air temperature (continued)
TL052C, TL052AC
k
SVR
I
CC
VO1/V
PARAMETER TEST CONDITIONS
Supply-voltage rejection
Supply current
p
Crosstalk attenuation AVD = 100 25°C 120 120 dB
O2
VO = 0, RS = 50
VO = 0, No load
T
A
25°C 75 99 75 99
0°C 70°C 75 97 75 97 25°C 4.6 5.6 4.8 5.6
0°C 70°C 4.4 6.4 4.6 6.4
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
75 98 75 98
4.7 6.4 4.8 6.4
CC±
= ±15 V
TL052C and TL052AC operating characteristics at specified free-air temperature
TL052C, TL052AC
PARAMETER TEST CONDITIONS
RL = 2 kΩ, CL = 100 pF,
Negative slew rate
at unity gain
t
r
t
f
V
I
n
THD T otal harmonic distortion
B
φ
Full range is 0°C to 70°C.
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
Rise time
Fall time
Overshoot factor
Equivalent input noise
n
voltage Peak-to-peak equivalent
N(PP)
input noise current Equivalent input
noise current
Unity-gain bandwidth
1
m
ase margin at unity
= ±5 V, V
CC±
= ±5 V, V
CC±
§
= ±1 V; for V
I(PP)
O(RMS)
= 1 V; for V
See Figure 1
V
= ±10 mV,
I(PP)
RL = 2 kΩ,
See Fi
RS = 20 Ω, See Figure 3
f = 1 kHz 25°C 0.01 0.01 pA/√Hz RS = 1 kΩ,
f = 1 kHz
VI = 10 mV,
CC±
=
ures 1 and 2
= 25 F,
p
= 10 mV,
I
= 25 F,
=
p
= ±15 V, V
= ±15 V, V
CC±
p
,
f = 10 Hz 25°C 71 71 f = 1 kHz 25°C 19 19 30
10 Hz t
f =
10 kHz
RL = 2 kΩ,
RL = 2 kΩ,
= 2 k,
L
= ±5 V.
I(PP)
= 6 V.
O(RMS)
T
A
25°C 17.8 9 20.7
Full range
25°C 15.4 9 17.8
Full range 8
25°C 55 56
0°C 54 55 70°C 63 63 25°C 55 57
0°C 54 56 70°C 62 64 25°C 24% 19%
0°C 24% 19% 70°C 24% 19%
25°C 4 4 µV
25°C 0.003% 0.003% 25°C 3 3
0°C 3.2 3.2 70°C 2.6 2.7 25°C 60° 63°
0°C 59° 63° 70°C 60° 63°
V
= ± 5 V V
CC±
MIN TYP MAX MIN TYP MAX
CC±
8
= ± 15 V
UNIT
dB
mA
UNIT
n
MHz
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
17
TL05x, TL05xA, TL05xY
A
TL052I
VIOInput offset voltage
mV
V
TL052AI
V
IC
T
ffici
V/°C
IIOInput offset current
O
,
IC
,
IIBInput bias current
O
,
IC
,
V
V
R
k
V
V
R
2 k
R
k
V
g
V
R
k
voltage am lification
C
V
V
rejection ratio
V
O
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052I and TL052AI electrical characteristics at specified free-air temperature
TL052I, TL052AI
PARAMETER TEST CONDITIONS
p
= 0,
O
=
= 0,
RS = 50
α
VIO
ICR
OM+
OM–
A
VD
r
i
c
i
CMRR
Full range is –40°C to 85°C.
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
At V
emperature coe
Input offset voltage long­term drift
Common-mode input voltage range
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
Large-signal differential
Input resistance 25°C 10 Input capacitance 25°C 10 12 pF
CC±
§
p
p
p
ommon-mode
= ± 5 V, VO = ± 2.3 V; at V
ent
VO = 0, RS = 50
V
= 0, V
See Figure 5 V
= 0, V
See Figure 5
= 10
L
=
L
= 10
L
= 2
L
RL = 2 k
=
IC
ICR
= 0,
=
= ±15 V, VO = ±10 V.
CC±
TL052I
TL052AI
VIC = 0, 25°C 0.04 0.04 µV/mo
= 0,
= 0,
min,
RS = 50
T
A
25°C 0.73 3.5 0.65 1.5
Full range 5.3 3.3
25°C 0.51 2.8 0.4 0.8
Full range 4.6 2.6
25°C to
85°C
25°C to
85°C
25°C 4 100 5 100 pA 85°C 0.06 10 0.07 10 nA 25°C 20 200 30 200 pA 85°C 0.6 20 0.7 20 nA
25°C
Full range
25°C 3 4.2 13 13.9
Full range 3 13
25°C 2.5 3.8 11.5 12.7
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Full range –2.5 –12
25°C –2.3 –3.2 –11 –12
Full range –2.3 –11
25°C 25 59 50 105
–40°C 30 74 60 145
85°C 20 43 30 76
25°C 65 85 75 93
–40°C
85°C 65 84 75 93
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
7 6
6 6 25
–1
–2.3
to
to
4
5.6
–1
to
4
12
65 83 75 90
–11
11
–11
11
to
to
CC±
= ±15 V
–12.3
to
15.6
12
10
UNIT
µ
V/mV
dB
°
18
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
A
ratio (V
CC±
/VIO)
(two am lifiers)
A
SR
Sl
L
,
L
,
V/µs
SR
g
ns
V
I(PP)
±10 mV
V
q
C
L
See Figure 4
Ph
V
R
gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052I and TL052AI electrical characteristics at specified free-air temperature (continued)
TL052I, TL052AI
k
SVR
I
CC
VO1/V
PARAMETER TEST CONDITIONS
Supply-voltage rejection
Supply current
p
Crosstalk attenuation AVD = 100 25°C 120 120 dB
O2
VO = 0, RS = 50
VO = 0, No load
T
A
25°C 75 99 75 99
–40°C
85°C 75 99 75 99 25°C 4.6 5.6 4.8 5.6
–40°C
85°C 4.4 6.4 4.6 6.4
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
75 98 75 98
4.5 6.4 4.7 6.4
CC±
= ±15 V
TL052I and TL052AI operating characteristics at specified free-air temperature
TL052I, TL052AI
PARAMETER TEST CONDITIONS
+
ew rate at unity gain
Negative slew rate at
unity gain
t
r
t
f
V
I
n
THD T otal harmonic distortion
B
φ
Full range is –40°C to 85°C.
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
Rise time
Fall time
Overshoot factor
Equivalent input noise
n
voltage Peak-to-peak equivalent
N(PP)
input noise current Equivalent input noise
current
Unity-gain bandwidth
1
m
CC±
CC±
§
ase margin at unity
= ±5 V, V
= ±5 V, V
= ±1 V; for V
I(PP)
O(RMS)
R
= 2 kΩ, C
See Figure 1
=
= RL = 2 kΩ, CL = 100 pF, See Figures 1 and 2
RS = 20 Ω, See Figure 3
f = 1 kHz 25°C 0.01 0.01 pA/√Hz RS = 1 kΩ,
f = 1 kHz
VI = 10 mV,
= 25 F,
p
= 10 mV,
I
= 25 F,
=
p
= ±15 V, V
CC±
= 1 V; for V
CC±
= ±15 V, V
= 100 pF,
,
f = 10 Hz 25°C 71 71 f = 1 kHz 25°C 19 19 30
10 Hz to
f =
10 kHz
RL = 2 kΩ,
RL = 2 kΩ,
= 2 k,
L
= ±5 V.
I(PP)
= 6 V.
O(RMS)
T
A
25°C 17.8 9 20.7
Full range 8
25°C 15.4 9 17.8
Full range 8
25°C 55 56
–40°C 52 53
85°C 64 65 25°C 55 57
–40°C 51 53
85°C 64 65 25°C 24% 19%
–40°C 24% 19%
85°C 24% 19%
25°C 4 4 µV
25°C 0.003% 0.003% 25°C 3 3
–40°C 3.5 3.6
85°C 2.5 2.6 25°C 60° 63°
–40°C 58° 61°
85°C 60° 63°
V
= ± 5 V V
CC±
MIN TYP MAX MIN TYP MAX
CC±
= ± 15 V
UNIT
dB
mA
UNIT
MHz
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
19
TL05x, TL05xA, TL05xY
A
TL052M
VIOInput offset voltage
mV
V
TL052AM
V
IC
R
S
TL052M
10
9
α
VIO
µV/°C
IIOInput offset current
O
IC
IIBInput bias current
O
V
V
R
k
V
V
R
k
R
k
V
g
V
R
k
L
diff
l
§
voltage am lification
§
,
C
V
IC
V
ICR
min,
rejection ratio
S
ratio (V
CC±
/VIO)
S
t
(two am lifiers)
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052M and TL052AM electrical characteristics at specified free-air temperature
TL052M, TL052AM
PARAMETER TEST CONDITIONS
p
= 0,
O
= 0,
= 50
50 Temperature coefficient of input offset voltage
Input offset voltage long­term drift
ICR
OM+
OM–
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
VO1/V
Full range is – 55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
Common-mode input voltage range
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
Input resistance 25°C Input capacitance 25°C 10 12 pF
Crosstalk attenuation AVD = 100 25°C 120 120 dB
O2
= ± 5 V, VO = ± 2.3 V; at V
CC±
p
p
arge-signal
ommon-mode
upply-voltage rejection
upply curren
erentia
p
p
R
VO = 0, RS = 50
VO = 0, VIC = 0, See Figure 5
VO = 0, See Figure 5
= 10
L
= 2
L
= 10
L
= 2
L
RL = 2 k
V
= V
min VO = 0, RS = 50
VO = 0, RS = 50
VO = 0, No load
= ±15 V, VO = ±10 V.
CC±
TL052AM VIC = 0,
VIC = 0,
T
A
25°C 0.73 3.5 0.65 1.5
Full range 6.5 4.5
25°C 0.51 2.8 0.4 0.8
Full range 5.8 3.8
25°C to
125°C
25°C to
125°C
25°C 0.04 0.04 µV/mo 25°C 4 100 5 100 pA
125°C 1 20 2 20 nA
25°C 20 200 30 200 pA
125°C 10 50 20 50 nA
25°C
Full range
25°C 3 4.2 13 13.9
Full range 3 13
25°C 2.5 3.8 11.5 12.7
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Full range –2.5 –12
25°C –2.3 –3.2 –11 –12
Full range –2.3 –11
25°C 25 59 50 105
–55°C 30 76 60 149
125°C 10 32 15 49
25°C 65 85 75 93
–55°C 65 83 75 92
125°C 65 84 75 94
25°C 75 99 75 99
–55°C
125°C 75 100 75 100
25°C 4.6 5.6 4.8 5.6
–55°C
125°C 4.2 6.4 4.4 6.4
V
= ± 5 V V
CC±
MIN TYP MAX MIN TYP MAX
9 8
–1
–2.3
to
to
4
5.6
–1
to
4
12
10
75 98 75 98
4.4 6.4 4.5 6.4
–11
11
–11
11
CC±
to
to
= ± 15 V
–12.3
to
15.6
12
10
UNIT
V/mV
dB
dB
mA
°
20
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
A
SR
C
100 pF
See
V/µs
SR
g
See Figure 1
ns
()
C
L
100 F
g
g
V
q V/H
R
S
C
L
See Figure 4
gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052M and TL052AM operating characteristics at specified free-air temperature
TL052M, TL052AM
PARAMETER TEST CONDITIONS
Positive slew rate
+
at unity gain Negative slew rate
at unity gain
t
r
t
f
n
V
N(PP)
I
n
THD
B
1
φ
m
Full range is – 55°C to 125°C.
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
Rise time
Fall time
Overshoot factor
Equivalent input noise voltage
Peak-to-peak equivalent input noise current
Equivalent input noise current
Total harmonic distortion
Unity-gain bandwidth
Phase margin at unity
= ±5 V, V
CC±
= ±5 V, V
CC±
§
= ±1 V; for V
I(PP)
O(RMS)
RL = 2 kΩ,
=
L
V
I(PP)
RL = 2 kΩ,
=
See Fi
= 20 Ω,
See Figure 3
f = 1 kHz 25°C 0.01 0.01 pA/√Hz RS = 1 kΩ,
f = 1 kHz
VI = 10 mV,
= 25 F,
VI = 10 mV,pRL = 2 kΩ,
= 25 F,
CC±
= 1 V; for V
p
Figure 1
= ± 10 mV,
p
ures 1 and 2
p
= ±15 V, V
= ±15 V, V
CC±
,
,
f = 10 Hz 25°C 71 71 f = 1 kHz 25°C 19 19
10 Hz
f =
RL = 2 kΩ,
RL = 2 kΩ,
I(PP)
10 kHz
= ±5 V.
O(RMS)
to
= 6 V.
T
A
25°C 17.8 9 20.7
Full range 8
25°C 15.4 9 17.8
Full range 8
25°C 55 56
–55°C 51 52
125°C 68 68
25°C 55 57
–55°C 51 52
125°C 68 69
25°C 24% 19%
–55°C 25% 19%
125°C 25% 19%
25°C 4 4 µV
25°C 0.003% 0.003% 25°C 3 3
–55°C 3.6 3.7
125°C 2.3 2.4
25°C 60° 63°
–55°C 57° 61°
125°C 60° 63°
V
= ± 5 V V
CC±
MIN TYP MAX MIN TYP MAX
CC±
= ± 15 V
UNIT
n
MHz
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
21
TL05x, TL05xA, TL05xY
V V
V
V
g
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052Y electrical characteristics, TA = 25°C
PARAMETER TEST CONDITIONS
V
IO
I
IO
I
IB
V
ICR
OM+
OM–
A
VD
r
i
c
i
CMRR Common-mode rejection ratio
k
SVR
I
CC
VO1/V
For V
Input offset voltage Input offset voltage long-term
drift Input offset current
Input bias current
Common-mode input voltage range
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
Large-signal differential voltage amplification
Input resistance Input capacitance 10 12 pF
Supply-voltage rejection ratio (V
Supply current (two amplifiers) VO = 0, No load 4.6 4.8 mA Crosstalk attenuation AVD = 100 120 120 dB
O2
= ±5 V, VO = ±2.3 V; at V
CC±
CC±
/VIO)
= ±15 V, VO = ±10 V.
CC±
= 0,
O
RS = 50
VO = 0, See Figure 5
VO = 0, See Figure 5
RL = 10 k 4.2 13.9 RL = 2 k RL = 10 k –3.5 –13.2 RL = 2 k
RL = 2 k 59 105 V/mV
VIC = V VO = 0,
VO = 0, RS = 50 99 99 dB
ICR
min,
VIC = 0,
VIC = 0,
VIC = 0,
RS = 50
TL052Y
V
= ± 5 V V
CC±
MIN TYP MAX MIN TYP MAX
0.73 0.65 mV
0.04 0.04 µV/mo
4 5 pA
20 30 pA
–2.3
to
5.6
3.8 12.7
–3.2 –12
12
10
85 93 dB
CC±
= ± 15 V
–12.3
to
15.6
12
10
UNIT
V
22
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
L
,
L
,
V/µs
V
I(PP)
±10 mV
ns
V
q V/H
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052Y operating characteristics, TA = 25°C
TL052Y
PARAMETER TEST CONDITIONS
SR +
SR – t
r
t
f
V
I
n
THD
B
φ
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
§
For V
Positive slew rate at unity gain
Negative slew rate at unity gain
Rise time Fall time Overshoot factor
Equivalent input noise
n
voltage Peak-to-peak equivalent input
N(PP)
noise current Equivalent input noise
current
Total harmonic distortion
Unity-gain bandwidth
1
Phase margin at unity gain
m
CC± CC±
= ±5 V, V = ±5 V, V
= ±1 V; for V
I(PP) O(RMS)
§
= 1 V; for V
R
= 2 kΩ, C
See Figure 1
=
= RL = 2 kΩ, CL = 100 pF, See Figures 1 and 2
RS = 20 Ω, See Figure 3
f = 1 kHz 0.01 0.01 pA/√Hz RS = 1 kΩ,
f = 1 kHz VI = 10 mV,
CL = 25 pF, VI = 10 mV,
CL = 25 pF,
= ±15 V, V
CC±
= ±15 V, V
CC±
= 100 pF,
,
f = 10 Hz 71 71 f = 1 kHz 19 19
f = 10 Hz to 10 kHz 4 4 µV
RL = 2 kΩ,
RL = 2 kΩ, See Figure 4
RL = 2 kΩ, See Figure 4
= ±5 V.
I(PP)
O(RMS)
= 6 V.
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
17.8 20.7
15.4 17.8 55 56
55 57
24% 19%
0.003% 0.003%
3 3
60° 63°
CC±
= ±15 V
UNIT
n
MHz
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
23
TL05x, TL05xA, TL05xY
TL054C
VIOInput offset voltage
mV
TL054AC
V
O
R
S
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
10 k
V
V
R
k
R
k
V
g
V
R
2 k
L
diff
l
voltage am lification
§
C
V
V
rejection ratio
V
O
R
S
S
V
ratio (V
CC±
/VIO)
V
O
R
S
S
t
(four am lifiers)
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054C and TL054AC electrical characteristics at specified free-air temperature
TL054C, TL054AC
PARAMETER TEST CONDITIONS
p
= 0,
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
VO1/VO2Crosstalk attenuation AVD = 100 25°C 120 120 dB
Full range is 0°C to 70°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
Temperature coefficient of input offset voltage
Input offset voltage long-term drift
p
p
Common-mode input voltage range
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
arge-signal
Input resistance 25°C Input capacitance 25°C 10 12 pF
ommon-mode
upply-voltage rejection
upply curren
= ±5 V, VO = ±2.3 V, at V
CC±
erentia
p
p
VIC = 0,
= 50
50
R
VO = 0, VIC = 0, See Figure 5
VO = 0, VIC = 0, See Figure 5
=
L
= 2
L
= 10
L
=
L
RL = 2 k 0°C 30 88 60 173 V/mV
=
IC
= 0,
CC±
= 0,
VO = 0, No load 0°C 8.2 12.8 8.5 12.8 mA
= ±15 V, VO = ±10 V.B
CC±
TL054C
TL054AC
min,
ICR
= ±5 V to ±15 V,
= 50
= 50
T
A
25°C 0.64 5.5 0.56 4
Full range 7.7 6.2
25°C 0.57 3.5 0.5 1.5
Full range 5.7 3.7
25°C to
70°C
25°C to
70°C 25°C 0.04 0.04 µV/mo 25°C 4 100 5 100 pA
70°C 0.02 1 0.025 1 nA 25°C 20 200 30 200 pA 70°C 0.15 4 0.2 4 nA
25°C
Full range
25°C 3 4.2 13 13.9
Full range 3 13
25°C 2.5 3.8 11.5 12.7
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Full range –2.5 –12
25°C –2.3 –3.2 –11 –12
Full range –2.3 –11
25°C 25 72 50 133
70°C 20 57 30 85
25°C 65 84 75 92
0°C 65 84 75 92 dB 70°C 65 84 75 93 25°C 75 99 75 99
0°C 75 99 75 99 dB 70°C 75 99 75 99 25°C 8.1 11.2 8.4 11.2
70°C 7.9 11.2 8.2 11.2
VCC ± = ± 5 V VCC ± = ± 15 V
MIN TYP MAX MIN TYP MAX
25 23
24 23
–1
–1
–2.3
to
to
to
4
5.6
4
12
10
–11
11
–11
11
–12.3
to
to
15.6
10
to
12
UNIT
µ
°
24
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SR
L L
V/µs
SR
g
ns
R
C
L
100 F
g
See Figures 1 and 2
V
q
nV/Hz
V
R
C
L
See Figure 4
Phase margin at
V
R
unity gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054C and TL054AC operating characteristics at specified free-air temperature
TL054C, TL054C
PARAMETER TEST CONDITIONS
Positive slew rate
+
at unity gain
RL = 2 kΩ,CL = 100 pF,
Negative slew rate at
unity gain
t
r
t
f
n
V
N(PP)
I
n
THD
B
1
φ
m
Full range is 0°C to 70°C.
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
Rise time 0°C 54 55
Fall time
Overshoot factor 0°C 24% 19%
Equivalent input noise voltage
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
Total harmonic distortion
Unity-gain bandwidth
= ±5 V, V
CC±
= ±5 V, V
CC±
§
= ±1 V; for V
I(PP)
) = 1 V; for V
o(rms
See Figure 1 and Note 7
V
= ±10 mV ,
I(PP)
= 2 k,
L
p
=
See Fi
RS = 20 Ω, See Figure 3
f = 1 kHz 25°C 0.01 0.01 RS = 1 kΩ,
f = 1 kHz
= 10 mV,
I
= 25 F,
= 10 mV,
I
= 25 F,
=
CC±
CC±
,
ures 1 and 2
p
p
= ±15 V, V
= ±15 V, V
f = 10 Hz 25°C 75 75 f = 1 kHz 25°C 21 21 45 f = 10 Hz to
10 kHz
RL = 2 kΩ,
= 2 k,
L
= 2 k,
L
= ±5 V.
I(PP)
= 6 V.
o(rms)
T
A
25°C 15.4 10 17.8
0°C 15.7 8 17.9
70°C 14.4 8 17.5
25°C 13.9 10 15.9
0°C 14.3 8 16.1
70°C 13.3 8 15.5
25°C 55 56
70°C 63 63 25°C 55 57
0°C 54 56 70°C 62 64 25°C 24% 19%
70°C 24% 19%
25°C 4 4 µV
25°C 0.003% 0.003% 25°C 2.7 2.7
0°C 3 3 MHz 70°C 2.4 2.4 25°C 61° 64°
0°C 60° 64° 70°C 61° 63°
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
CC±
= ±15 V
UNIT
pA/Hz
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
25
TL05x, TL05xA, TL05xY
A
TL054I
VIOIn ut offset voltage
mV
TL054AI
V
O
R
S
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
10 k
V
V
R
k
R
k
V
g
V
R
2 k
L
diff
l
voltage am lification
§
C
V
V
rejection ratio
V
O
R
S
S
V
5 V t
ratio (V
CC±
/VIO)
V
O
R
S
S
t
(four am lifiers)
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054I and TL054AI electrical characteristics at specified free-air temperature
TL054I, TL054AI
PARAMETER TEST CONDITIONS
p
= 0,
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
VO1/VO2Crosstalk attenuation AVD = 100 25°C 120 120 dB
Full range is –40°C to 85°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
Temperature coefficient of input offset voltage
Input offset voltage long-term drift
p
p
Common-mode input voltage range
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
arge-signal
Input resistance 25°C Input capacitance 25°C 10 12 pF
ommon-mode
upply-voltage rejection
upply curren
= ±5 V, VO = ±2.3 V, at V
CC±
erentia
p
p
VIC = 0,
= 50
50
R
VO = 0, VIC = 0, See Figure 5
VO = 0, VIC = 0, See Figure 5
=
L
= 2
L
= 10
L
=
L
RL = 2 k –40°C 30 101 60 212 V/mV
=
IC
= 0,
CC±
= 0,
VO = 0, No load –40°C 7.9 12.8 8.2 12.8 mA
= ±15 V, VO = ±10 V.
CC±
ICR
= ±
TL054I
TL054AI
min,
= 50
o ±15 V,
= 50
T
A
25°C
Full range 8.8 7.3
25°C 0.57 3.5 0.5 1.5
Full range 6.8 4.8
25°C to
85°C
25°C to
85°C 25°C 0.04 0.04 µV/mo 25°C 4 100 5 100 pA
85°C 0.06 10 0.07 10 nA 25°C 20 200 30 200 pA 85°C 0.6 20 0.7 20 nA
25°C
Full range
25°C 3 4.2 13 13.9
Full range 3 13
25°C 2.5 3.8 11.5 12.7
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Full range –2.5 –12
25°C –2.3 –3.2 –11 –12
Full range –2.3 –11
25°C 25 72 50 133
85°C 20 50 30 70
25°C 65 84 75 92
–40°C 65 83 75 92 dB
85°C 65 84 75 93 25°C 75 99 75 99
–40°C 75 98 75 99 dB
85°C 75 99 75 99 25°C 8.1 11.2 8.4 11.2
85°C 7.6 11.2 7.9 11.2
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
0.64 5.5 0.56 4
25 24
25 23
–1
–2.3
to
to
4
5.6
–1
to
4
12
10
= ±15 V UNIT
CC±
–11
–12.3
to
to
11
15.6
–11
to
11
12
10
µ
°
26
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
A
SR
L L
V/µs
SR
g
,
ns
V
I(PP)
±10 mV, R
L
k,
V
q
nV/Hz
V
R
C
L
See Figure 4
Phase margin at
V
10 mV,R
2 k
unity gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054I and TL054AI operating characteristics at specified free-air temperature
TL054I, TL054AI
PARAMETER TEST CONDITIONS
Positive slew rate
+
at unity gain
RL = 2 kΩ,CL = 100 pF,
Negative slew rate at
unity gain
t
r
t
f
n
V
N(PP)
I
n
THD
B
1
φ
m
Full range is –40°C to 85°C.
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
Rise time –40°C 52 53
Fall time
Overshoot factor –40°C 24% 19%
Equivalent input noise voltage
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
Total harmonic distortion
Unity-gain bandwidth
= ±5 V, V
CC±
= ±5 V, V
CC±
§
= ±1 V; for V
I(PP)
) = 1 V; for V
o(rms
See Figure 1
V
= ±10 mV, R CL = 100 pF, See Figures 1 and 2
RS = 20 Ω, See Figure 3
f = 1 kHz 25°C 0.01 0.01 pA/√Hz RS = 1 kΩ,
f = 1 kHz
= 10 mV,
I
= 25 F,
p
=
I
=
p
= 25 F,
= ±15 V, V
CC±
= ±15 V, V
CC±
= 2 k
2
f = 10 Hz 25°C 75 75 f = 1 kHz 25°C 21 21 45 f = 10 Hz to
10 kHz
RL = 2 kΩ,
= 2 k,
L
=
L
= ±5 V.
I(PP)
= 6 V.
o(rms)
T
A
25°C 15.4 10 17.8
–40°C 16.4 8 18
85°C 14 8 17.3 25°C 13.9 10 15.9
–40°C 14.7 8 16.1
85°C 13 8 15.3 25°C 55 56
85°C 64 65 25°C 55 57
–40°C 51 53
85°C 64 65 25°C 24% 19%
85°C 24% 19%
25°C 4 4 µV
25°C 0.003% 0.003% 25°C 2.7 2.7
–40°C 3.3 3.3 MHz
85°C 2.3 2.4 25°C 61° 64°
,
–40°C 59° 62°
85°C 61° 64°
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
= ±15 V UNIT
CC±
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
27
TL05x, TL05xA, TL05xY
A
TL054M
VIOInput offset voltage
mV
TL054AM
V
O
R
S
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
k
V
V
R
k
R
k
V
g
V
R
k
L
diff
l
voltage am lification
§
C
IC ICR
,
rejection ratio
S
CC±
,
ratio (V
CC±
/VIO)
S
t
(four am lifiers)
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054M and TL054AM electrical characteristics at specified free-air temperature
TL054M, TL054AM
PARAMETER TEST CONDITIONS
p
= 0,
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
VO1/VO2Crosstalk attenuation AVD = 100 25°C 120 120 dB
Full range is –55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
Temperature coefficient of input offset voltage
Input offset voltage long-term drift
p
p
Common-mode input voltage range
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
arge-signal
Input resistance 25°C Input capacitance 25°C 10 12 pF
ommon-mode
upply-voltage rejection
upply curren
= ±5 V, VO = ±2.3 V, at V
CC±
erentia
p
p
VIC = 0,
= 50
50
R
VO = 0, VIC = 0, See Figure 5
VO = 0, VIC = 0, See Figure 5
= 10
L
= 2
L
= 10
L
= 2
L
RL = 2 k –55°C 30 99 60 209 V/mV
V
= V VO = 0, RS = 50
V VO = 0, RS = 50
VO = 0, No load –55°C 7.8 12.8 8.1 12.8 mA
= ±15 V, VO = ±10 V.
CC±
TL054M
TL054AM
min,
= ±5 V to ±15 V,
T
A
25°C 0.64 5.5 0.56 4
Full range 10.5 9
25°C 0.57 3.5 0.5 1.5
Full range 8.5 6.5
25°C to
85°C
25°C to
85°C
25°C 0.04 0.04 µV/mo 25°C 4 100 5 100 pA
125°C 1 20 2 20 nA
25°C 20 200 30 200 pA
125°C 10 50 20 50 nA
25°C
Full range
25°C 3 4.2 13 13.9
Full range 3 13
25°C 2.5 3.8 11.5 12.7
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Full range –2.5 –12
25°C –2.3 –3.2 –11 –12
Full range –2.3 –11
25°C 25 72 50 133
125°C 10 35 15 35
25°C 65 84 75 92
–55°C 65 83 75 92 dB
125°C 65 84 75 93
25°C 75 99 75 99
–40°C 75 98 75 98 dB
85°C 75 100 75 100 25°C 8.1 11.2 8.4 11.2
125°C 7.1 11.2 7.5 11.2
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
21 20
21 20
–1
–2.3
to
to
4
5.6
–1
to
4
12
10
= ±15 V UNIT
CC±
–11
–12.3
to
11
–11
to
11
15.6
10
to
12
µ
°
28
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
A
SR
L L
V/µs
SR
unity gain
ns
R
2 k
C
L
100 F
g
See Figures 1 and 2
V
q
nV/Hz
V
R
C
L
See Figure 4
Phase margin at
V
10 mV,R
2 k
unity gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054M and TL054AM operating characteristics at specified free-air temperature
TL054M, TL054AM
PARAMETER TEST CONDITIONS
Positive slew rate
+
at unity gain
Negative slew rate at
t
r
t
f
n
V
N(PP)
I
n
THD Total harmonic distortion
B
1
φ
m
Full range is –55°C to 125°C.
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
Rise time –55°C 51 52
Fall time
Overshoot factor –55°C 25% 19%
Equivalent input noise
§
voltage Peak-to-peak equivalent
input noise voltage Equivalent input
noise current
Unity-gain bandwidth
= ±5 V, V
CC±
= ±5 V, Vorms = 1 V; for V
CC±
= ±1 V; for V
I(PP)
RL = 2 kΩ,CL = 100 pF, See Figure 1
V
= ±10 mV ,
I(PP)
,
=
L
p
=
See Fi
RS = 20 Ω, See Figure 3
f = 1 kHz 25°C 0.01 0.01 pA/√Hz RS = 1 kΩ,
f = 1 kHz
= 10 mV,
I
= 25 F,
=
I
=
= 25 F,
CC±
CC±
,
ures 1 and 2
f = 10 Hz 25°C 75 75 f = 1 kHz 25°C 21 21 45 f = 10 Hz to
10 kHz
RL = 2 kΩ,
= 2 k,
p
p
= ±15 V, V
= ±15 V, Vorms = 6 V.
L
=
L
I(PP)
= ±5 V.
T
A
25°C 15.4 10 17.8
–55°C 16.7 18.3
125°C 12.9 16.7
25°C 13.9 10 15.9
–55°C 14.7 16.3
125°C 12.2 14.5
25°C 55 56
125°C 68 68
25°C 55 57
–55°C 51 52
125°C 68 69
25°C 24% 19%
125°C 25% 19%
25°C 4 4 µV
25°C 0.003% 0.003% 25°C 2.7 2.7
–55°C 3.4 3.4 MHz
125°C 2.1 2.1
25°C 61° 64°
,
–55°C 58° 62°
125°C 60° 64°
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
= ±15 V UNIT
CC±
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
29
TL05x, TL05xA, TL05xY
V
V
V
g
V
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054Y electrical characteristics, TA = 25°C
TL054Y
PARAMETER TEST CONDITIONS
V
IO
I
IO
I
IB
V
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
VO1/VO2Crosstalk attenuation AVD = 100 120 120 dB
For V
Input offset voltage
Input offset current
Input bias current
Common-mode input voltage range
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
Large-signal differential voltage amplification
Input resistance Input capacitance 10 12 pF Common-mode
rejection ratio Supply-voltage rejection
ratio (∆V Supply current
(four amplifiers)
= ±5 V, VO = ±2.3 V, at V
CC±
CC±
/VIO)
= ±15 V, VO = ±10 V.
CC±
VO = 0, RS = 50
VO = 0, VIC = 0, See Figure 5
VO = 0, VIC = 0, See Figure 5
RL = 10 k 4.2 13.9 RL = 2 k RL = 10 k –3.5 –13.2 RL = 2 k
RL = 2 kΩ, 72 133 V/mV
VIC = V VO = 0, RS = 50
V
CC±
VO = 0, RS = 50 VO = 0, No load 8.1 8.4 mA
VIC = 0,
min,
ICR
= ±5 V to ±15 V,
VCC ± = ± 5 V VCC ± = ± 15 V
MIN TYP MAX MIN TYP MAX
0.64 0.56 mV
4 5 pA
20 30 pA
–2.3
to
5.6
3.8 12.7
–3.2 –12
12
10
84 92 dB
99 99 dB
–12.3
15.6
12
10
to
UNIT
V
30
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
L L
V/µs
()
ns
C
L
100 F
V
q
nV/√Hz
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054Y operating characteristics, TA = 25°C
TL054Y
PARAMETER TEST CONDITIONS
SR+
SR– t
r
t
f
n
V
N(PP)
I
n
THD
B
1
φ
m
For V
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
For V
Positive slew rate at unity
gain Negative slew rate at unity
gain Rise time V Fall time
Overshoot factor Equivalent input noise
voltage Peak-to-peak equivalent
input noise voltage Equivalent input
noise current Total harmonic distortion
Unity-gain bandwidth Phase margin at
unity gain
CC±
CC±
= ±5 V, V
= ±5 V, V
= ±1 V; for V
I(PP)
) = 1 V; for V
o(rms
RL = 2 kΩ,CL = 100 pF, See Figure 1
= ±10 mV ,
I(PP)
RL = 2 kΩ,
p
=
See Figures 1 and 2
RS = 20 Ω, See Figure 3
f = 1 kHz 0.01 0.01 RS = 1 kΩ,
§ f = 1 kHz
VI = 10 mV, RL = 2 kΩ, CL = 25 pF, See Figure 4
VI = 10 mV, RL = 2 kΩ, CL = 25 pF, See Figure 4
= ±15 V, V
CC±
= ±15 V, V
CC±
,
f = 10 Hz 75 75 f = 1 kHz 21 21
f = 10 Hz to 10 kHz 4 4 µV
RL = 2 kΩ,
= ±5 V.
I(PP)
= 6 V.
o(rms)
V
= ±5 V V
CC±
MIN TYP MAX MIN TYP MAX
15.4 17.8
13.9 15.9 55 56
55 57
24% 19%
0.003% 0.003%
2.7 2.7 MHz
61° 64°
CC±
= ±15 V
UNIT
pA/√Hz
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
31
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
PARAMETER MEASUREMENT INFORMATION
V
CC+
V
NOTE A: CL includes fixture capacitance.
+
I
V
CC–
(see Note A)
C
L
. Slew Rate, Rise/Fall Time,Figure 1
and Overshoot Test Circuit
V
O
R
L
Overshoot
10%
. Rise Time and OvershootFigure 2
90%
t
r
Waveform
2 k
V
CC+
– +
V
CC–
R
R
S
S
V
O
. Noise-Voltage Test CircuitFigure 3
typical values
Typical values as presented in this data sheet
V
I
100
NOTE A: CL includes fixture capacitance.
Figure 4
Phase-Margin Test Circuit
10 k
V
CC+
+
V
CC–
(see Note A)
C
L
V
R
L
. Unity-Gain Bandwidth and
V
Ground Shield
CC+
+
represent the median (50% point) of device parametric performance.
pA pA
V
CC–
input bias and offset current
At the picoamp-bias-current level typical of the TL05x and TL05xA, accurate measurement of the
Figure 5. Input-Bias and Offset-Current Test Circuit
bias current becomes difficult. Not only does this measurement require a picoammeter, but test socket leakages can easily exceed the actualdevice bias currents. T o accurately measure these small currents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but with no device in the socket. The device is then inserted in the socket, and a second test that measures both the socket leakage and the device input bias current is performed. The two measurements are then subtracted algebraically to determine the bias current of the device.
noise
Because of the increasing emphasis on low noise levels in many of today’s applications, the input noise voltage density is sample tested at f = 1 kHz. Texas Instruments also has additional noise testing capability to meet specific application requirements. Please contact the factory for details.
O
32
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
IO
α
VIO
I
IB
I
IO
V
IC
V
O
V
OM
V
O(PP)
A
VD
CMRR Common-mode rejection ratio z
o
k
SVR
I
OS
I
CC
SR Slew rate
V
n
THD Total harmonic distortion vs Frequency 63 B
1
φ
m
Input offset voltage Distribution 6 – 11 Temperature coefficient of input offset voltage Distribution 12, 13, 14
Input bias current Input offset current vs Free-air temperature 16 Common-mode input voltage range limits Output voltage vs Differential input voltage 19, 20
Maximum peak output voltage
Maximum peak-to-peak output voltage vs Frequency 22, 23, 24
Large-signal differential voltage amplification
Output impedance vs Frequency 37 Supply-voltage rejection ratio vs Free-air temperature 38
Short-circuit output current
Supply current
Overshoot factor vs Load capacitance 60 Equivalent input noise voltage vs Frequency 61, 62
Unity-gain bandwidth
Phase margin
Phase shift vs Frequency 30 Voltage-follower small-signal pulse response vs Time 79 Voltage-follower large-signal pulse response vs Time 80
vs Common-mode input voltage vs Free-air temperature
vs Supply voltage vs Free-air temperature
vs Supply voltage vs Output current vs Free-air temperature
vs Load resistance vs Frequency vs Free-air temperature
vs Frequency vs Free-air temperature
vs Supply voltage vs Time vs Free-air temperature
vs Supply voltage vs Free-air temperature
vs Load resistance vs Free-air temperature
vs Supply voltage vs Free-air temperature
vs Supply voltage vs Load capacitance vs Free-air temperature
15 16
17 18
21 25, 26 27, 28
29
30
31, 32, 33
34, 35
36
39
40
41
42, 43, 44 45, 46, 47
48 – 53
54 –59
64, 65, 66 67, 68, 69
70, 71, 72 73, 74, 75 76, 77, 78
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
33
TL05x, TL05xA, TL05xY
P
t
f
A
lifi
%
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TL051
INPUT OFFSET VOLTAGE
16
433 Units Tested From 1 Wafer Lot V
= ±15 V
CC±
TA = 25°C
12
Percentage of Units – %
P Package
8
4
0
–1.5
–0.9 –0.3 0 0.3 0.9 1.5
–1.1 –0.6 0.6 1.1
VIO – Input Offset Voltage – mV
DISTRIBUTION OF TL052 INPUT OFFSET VOLTAGE
15
476 Amplifiers Tested From 1 Wafer Lot
V
= ±15 V
CC±
TA = 25°C
12
P Package
Figure 6
DISTRIBUTION OF TL051A
INPUT OFFSET VOLTAGE
20
393 Units Tested From 1 Wafer Lot V
= ±15 V
CC±
TA = 25°C
16
P Package
12
8
Percentage of Units – %
4
0
–900
VIO – Input Offset Voltage – µV
DISTRIBUTION OF TL052A
INPUT OFFSET VOLTAGE
20
403 Amplifiers Tested From 1 Wafer Lot V
= ±15 V
CC±
TA = 25°C P Package
15
9006003000–300–600
Figure 7
ers –
mp
age o
ercen
34
9
6
3
0
–1.5
–0.9 –0.3 0 0.3 0.9 1.5
–1.2 –0.6 0.6 1.2
VIO – Input Offset Voltage – mV
Figure 8
10
5
Percentage of Amplifiers – %
0
–900 –600 –300 0 300 600 900
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
VIO – Input Offset Voltage – µV
Figure 9
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
30
1140 Amplifiers Tested From 3 Wafer Lots V
CC±
25
TA = 25°C N Package
20
15
10
Percentage of Amplifiers – %
5
0
–4
20
120 Units Tested From 2 Wafer Lots V
CC±
TA = 25°C to 125°C
16
P Package
DISTRIBUTION OF TL054
INPUT OFFSET VOLTAGE
= ±15 V
–2 0 1 3–3 –1 2 4
VIO – Input Offset Voltage – mV
Figure 10
DISTRIBUTION OF TL051
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
= ±15 V
15
1048 Amplifiers Tested From 3 Wafer Lots V
CC±
TA = 25°C
12
N Package
9
6
Percentage of Amplifiers – %
3
0
–1.8
20
172 Amplifiers Tested From 2 Wafer Lots V
CC±
TA = 25°C to 125°C P Package
15
Outlier: One Unit at –34.6 µV/°C
DISTRIBUTION OF TL054A
INPUT OFFSET VOLTAGE
= ±15 V
1.81.20.60–0.6–1.2
VIO – Input Offset Voltage – mV
Figure 11
DISTRIBUTION OF TL052 INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
= ±15 V
12
8
Percentage of Units – %
4
0
–25
–20 –15 –10 –5 0 5 10 15 20 25
α
– Temperature Coefficient – µV/°C
VIO
Figure 12
10
5
Percentage of Amplifiers – %
0
α
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
– Temperature Coefficient – µV/°C
VIO
Figure 13
20100–10–20–30
30
35
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
50
40
30
20
Percentage of Amplifiers – %
10
0
–60
100
V VO = 0 VIC = 0
10
1
DISTRIBUTION OF TL054
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
324 Amplifiers Tested From 3 Wafer Lots
–40 –20 0 20 40 60
α
– Temperature Coefficient – µV/°C
VIO
V
= ±15 V
CC±
TA = 25°C to 125°C N Package
Figure 14
INPUT BIAS CURRENT AND
INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
= ±15 V
CC±
I
IB
COMMON-MODE INPUT VOLTAGE
10
V
= ±15 V
CC±
TA = 25°C
5
0
– Input Bias Current – nA
IB
–5
I
–10
–15
–10 –5 0 5 10 15 VIC – Common-Mode Input Voltage – V
INPUT VOLTAGE RANGE LIMITS
16
TA = 25°C
12
8
4
INPUT BIAS CURRENT
vs
Figure 15
COMMON-MODE
vs
SUPPLY VOLTAGE
Positive Limit
I
0.1
– Input Bias and Offset Currents – nA
IO
I
0.01
and
IB
I
0.001 25
45 65 85 105 125
TA – Free-Air Temperature – °C
IO
Figure 16
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
36
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
0
–4
–8
– Common-Mode Input Voltage – V
IC
–12
V
–16
0
Negative Limit
2 4 6 8 10 12 14 16
|V
| – Supply Voltage – V
CC±
Figure 17
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
20
15
10
5
0
–5
–10
– Common-Mode Input Voltage – V
IC
–15
V
–20
–75
COMMON-MODE
INPUT VOLTAGE RANGE LIMITS
vs
FREE-AIR TEMPERATURE
V
= ±15 V
CC±
Positive Limit
Negative Limit
–50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
Figure 18
5 4
3 2
1 0
–1
– Output Voltage – V
–2
O
V
–3 –4
–5
– 200
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
V
= ±5 V
CC±
TA = 25°C
RL = 600 RL = 1 k
– 100 0 100 200
VID – Differential Input Voltage – µV
Figure 19
RL = 2 k RL = 10 k
15
10
5
0
–5
– Output Voltage – V
O
V
–10
–15
– 400
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
V
= ±15 V
CC±
TA = 25°C
RL = 600 RL = 1 k RL = 2 k RL = 10 k
– 200 0 200 400
VID – Differential Input Voltage – µV
Figure 20
16
12
8
4
0
–4
–8
– Maximum Peak Output Voltage – V
OM
–12
V
–16
0
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
TA = 25°C
RL = 10 k
RL = 10 k
2 4 6 8 10 12 14 16
|V
|– Supply V oltage – V
CC±
V
OM+
RL = 2 k
RL = 2 k
V
OM–
Figure 21
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
37
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
30
RL = 2 k
TA = –55°C
25
20
15
10
5
– Maximum Peak-to-Peak Output Voltage – V
O(PP)
0
V
10 k
V
CC±
TA = 125°C
V
CC±
= ±15 V
= ±5 V
100 k 1 M 10 M
f – Frequency – Hz
Figure 22
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
30
25
20
15
FREQUENCY
V
= ±15 V
CC±
RL = 10 k
TA = 25°C
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
30
RL = 2 k TA = 25°C
25
20
15
10
5
– Maximum Peak-to-Peak Output Voltage – V
O(PP)
V
0
10 k
V
CC±
V
CC±
= ±15 V
= ±5 V
100 k 1 M 10 M
f – Frequency – Hz
Figure 23
MAXIMUM PEAK OUTPUT VOLTAGE
vs
OUTPUT CURRENT
5
4
3
V
OM+
V
= ±5 V
CC±
RL = 10 k TA = 25°C
10
V
= ±5 V
5
– Maximum Peak-to-Peak Output Voltage – V
O(PP)
0
V
10 k 100 k
CC±
1 M 10 M
f – Frequency – Hz
Figure 24
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
38
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
2
– Maximum Peak Output Voltage – V
|
1
OM
|V
0
0
V
OM–
2 6 10 14
41216208
|IO| – Output Current – mA
Figure 25
18
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
16
14
12
10
8
6
4
– Maximum Peak Output Voltage – V
|
2
OM
|V
0
0
16
12
8
MAXIMUM PEAK OUTPUT VOLTAGE
vs
OUTPUT CURRENT
V
= ±15 V
CC±
RL = 10 k TA = 25°C
V
OM+
V
OM–
515253550
10 20 30 40
|IO| – Output Current – mA
50
Figure 26
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
RL = 10 k
V
OM+
RL = 2 k
5 4
3 2
1
0
–1
–2 –3
– Maximum Peak Output Voltage – V
OM
–4
V
–5
–75
250
200
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
V
OM+
V
OM–
–50 –25 0 25 50 75 100 125
RL = 10 k
RL = 2 k
V
CC±
RL = 2 k
RL = 10 k
TA – Free-Air Temperature – °C
= ±5 V
Figure 27
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION
vs
LOAD RESISTANCE
VO = ±1 V TA = 25°C
V
= ±15 V
CC±
4
V
= ±15 V
CC±
0
–4
–8
– Maximum Peak Output Voltage – V
–12
OM
V
–16
V
OM–
–75
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
RL = 2 k
RL = 10 k
125
Figure 28
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
150
100
– Differential Voltage Amplification – V/mV
VD
A
50
0
0.4
V
= ±5 V
CC±
1 4 10 40 100
RL – Load Resistance – k
Figure 29
39
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
6
10
5
10
4
10
3
10
TYPICAL CHARACTERISTICS
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
V
= ±15 V
CC±
RL = 2 k
CL = 25 pF
TA = 25°C
A
VD
0°
30°
60°
1000
400
100
2
10
1
10
1
– Differential Voltage Amplification – V/mVA
VD
0.1 10
TL051 AND TL052
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
V
= ±5 V
CC±
VO = ±2.3 V
RL = 10 k
Phase Shift
f – Frequency – Hz
Figure 30
1000
400
100
90°
mφ – Phase Shift
120°
150°
180°
10 M100 1 k 10 k 100 k 1 M
TL054
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
V
= ±5 V
CC±
VO = ±2.3 V
RL = 10 k
RL = 2 k
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
125
– Differential Voltage Amplification – V/mVA
VD
40
10
–75
– Differential Voltage Amplification – V/mVA
VD
40
10
–75
Figure 31
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
40
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
RL = 2 k
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
Figure 32
125
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
– Differential Voltage Amplification – V/mVA
VD
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION
vs
FREE-AIR TEMPERATURE
1000
400
100
40
10
–75
–50 –25 0 25 50 75 100
RL = 10 k
RL = 2 k
TA – Free-Air Temperature – °C
Figure 33
V
= ±15 V
CC±
VO = 10 V
125
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
100
90
80
70
60
50
40
30
20 10
CMRR – Common-Mode Rejection Ratio – dB
0
10
100 1 k 10 k 100 k 1 M
f – Frequency – Hz
Figure 34
V
= ±5 V
CC±
TA = 25°C
10 M
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
100
90
80
70
60
50
40
30
20
10
CMRR – Common-Mode Rejection Ratio – dB
0
10
f – Frequency – Hz
Figure 35
V
= ±15 V
CC±
TA = 25°C
1 M100 k10 k1 k100
10 M
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
100
VIC = V
95
90
85
80
75
CMRR – Common-Mode Rejection Ratio – dB
70
–50 –25 0 25 50 75 100
–75
V
= ±15 V
CC±
V
= ±5 V
CC±
TA – Free-Air Temperature –°C
Figure 36
ICR
Min
125
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
41
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
OUTPUT IMPEDANCE
100
40
10
4
1
– Output Impedance –
o
z
0.4
0.1 1 k
SHORT-CIRCUIT OUTPUT CURRENT
60
VO = 0
TA = 25°C
40
20
vs
FREQUENCY
AVD = 100
AVD = 10
AVD = 1
VCC± = ±15 V TA = 25°C
ro (open loop) 250
10 k 100 k
f – Frequency – Hz
Figure 37
vs
SUPPLY VOLTAGE
VID = 100 mV
1 M
SUPPLY-VOLTAGE REJECTION RATIO
FREE-AIR TEMPERATURE
110
V
= ±5 V to ±15 V
CC±
106
102
98
94
SVR
kSVR – Supply-Voltage Rejection Ratio – dB
k
90
–75
–50 –25 02550 75 100
TA – Free-Air Temperature – °C
Figure 38
SHORT-CIRCUIT OUTPUT CURRENT
60
40
20
vs
125
vs
TIME
VID = 100 mV
0
–20
VID = –100 mV
–40
OS
IOS – Short-Circuit Output Current – mA
I
–60
0
246 8 10 12 14
|V
| – Supply Voltage – V
CC±
16
Figure 39
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
42
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
–20
–40
VID = –100 mV
–60
OS
IOS – Short-Circuit Output Current – mA
I
0
t – Time – s
Figure 40
V
CC±
TA = 25°C
= ±15 V
5040302010 600
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
60
40
20
0
–20
–40
OS
IOS – Short-Circuit Output Current – mA
I
–60
VID = 100 m V
VID = –100 m V
VO = 0
TA – Free-Air Temperature – °C
Figure 41
V
V
V
V
CC±
CC±
CC±
CC±
= ±15 V
= ±5 V
= ±5 V
= ±15 V
1007550250–25– 50 125–75
SUPPLY CURRENT
TL051
vs
SUPPLY VOLTAGE
3
2.5 TA = 25°C
2
1.5
1
CC
ICC – Supply Current – mA
I
0.5
0
0
2 4 6 8 10 12 14
|V
CC±
| – Supply Voltage – V
TA = –55°C TA = 125°C
VO = 0 No Load
16
Figure 42
SUPPLY CURRENT
SUPPLY VOLTAGE
5
4
3
2
CC
ICC – Supply Current – mA
I
1
0
0
2 4 6 8 10 12 14
|V
CC±
TL052
vs
TA = 25°C
TA = –55°C
TA = 125°C
| – Supply Voltage – V
Figure 43
VO = 0 No Load
16
SUPPLY CURRENT
SUPPLY VOLTAGE
10
8
6
4
CC
ICC – Supply Current – mA
I
2
0
0
246 8 10 12 14
|V
CC±
Figure 44
TL054
vs
TA = 25°C
TA = –55°C
TA = 125°C
VO = 0 No Load
16
| – Supply Voltage – V
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
43
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
FREE-AIR TEMPERATURE
3
2.5
2
1.5
1
CC
ICC – Supply Current – mA
I
0.5
0
–75
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
Figure 45
TL051
vs
V
V
CC± CC±
= ±15 V = ±5 V
VO = 0 No Load
125
SUPPLY CURRENT
FREE-AIR TEMPERATURE
5
4
3
2
CC
ICC – Supply Current – mA
I
1
0
–75
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
Figure 46
TL052
vs
V V
CC± CC±
= ±15 V = ±5 V
VO = 0 No Load
125
SUPPLY CURRENT
FREE-AIR TEMPERATURE
10
8
6
4
CC
ICC – Supply Current – mA
I
2
0
–75
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
Figure 47
TL054
vs
V
CC±
V
CC±
= ±15 V
= ±5 V
VO = 0 No Load
125
25
20
µs
15
10
SR – Slew Rate – V/
5
0
0.4
TL051
SLEW RATE
vs
LOAD RESISTANCE
SR +
SR –
V
CC±
CL = 100 pF TA = 25°C See Figure 1
RL – Load Resistance – k
Figure 48
= ±5 V
100401041
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
44
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL052
SLEW RATE
vs
LOAD RESISTANCE
25
SR+
20
15
10
SR – Slew Rate – V/µs
5
0
RL – Load Resistance – k
SR–
10410.4
V
= ±5 V
CC±
CL = 100 pF TA = 25°C See Figure 1
40
100
25
20
µs
15
10
SR – Slew Rate – V/
5
0
0.4 RL – Load Resistance – k
Figure 49
TL054
SLEW RATE
vs
LOAD RESISTANCE
SR +
SR –
V CL = 100 pF TA = 25°C See Figure 1
Figure 50
CC±
= ±5 V
100401041
TL051
SLEW RATE
vs
LOAD RESISTANCE
30
SR +
25
SR –
20
15
10
SR – Slew Rate – V/µs
5
0
0.4
1 4 10 40 100
RL – Load Resistance – k
V
= ±15 V
CC±
CL = 100 pF TA = 25°C See Figure 1
25
20
15
10
SR – Slew Rate – V/µs
5
0
1 4 10 40 1000.4
RL – Load Resistance – k
Figure 51
TL052
SLEW RATE
vs
LOAD RESISTANCE
SR+
SR–
V CL = 100 pF TA = 25°C See Figure 1
Figure 52
CC±
= ±15 V
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
45
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL054
SLEW RATE
vs
LOAD RESISTANCE
25
SR +
20
SR –
15
10
SR – Slew Rate – V/µs
5
0
0.4
1 4 10 40 100
RL – Load Resistance – k
V
= ±5 V
CC±
CL = 100 pF TA = 25°C See Figure 1
30
25
20
15
10
SR – Slew Rate – V/µs
5
0
–75
FREE-AIR TEMPERATURE
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
Figure 53
TL051
SLEW RATE
vs
SR +
SR –
Figure 54
V
CC±
RL = 2 k
= ±5 V
125
TL052
SLEW RATE
vs
FREE-AIR TEMPERATURE
25
20
15
10
SR – Slew Rate – V/µs
5
0
–75
TA – Free-Air Temperature – °C
SR+
SR–
V
= ±5 V
CC±
RL = 2 k CL = 100 pF See Figure 1
125–50 –25 0 25 50 75 100
20
15
10
SR – Slew Rate – V/µs
5
0 –75
FREE-AIR TEMPERATURE
TA – Free-Air Temperature – °C
Figure 55
TL054
SLEW RATE
vs
SR+
SR–
Figure 56
V
= ±5 V
CC±
RL = 2 k CL = 100 pF See Figure 1
125–50 –25 0 25 50 75 100
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
46
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SR
Slew
Rate
V/µs
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
30
25
20
15
10
TL051
SLEW RATE
vs
FREE-AIR TEMPERATURE
SR +
SR –
5
0
–75
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
Figure 57
V
= ±15 V
CC±
RL = 2 k CL = 100 pF
See Figure 1
125
TL052
SLEW RATE
vs
FREE-AIR TEMPERATURE
25
SR+
20
15
10
SR – Slew Rate – V/µs
5
0
–75
TA – Free-Air Temperature – °C
SR–
V
= ±15 V
CC±
RL = 2 k CL = 100 pF See Figure 1
125–50 –25 0 25 50 75 100
Figure 58
TL054
SLEW RATE
vs
FREE-AIR TEMPERATURE
20
SR+
SR–
15
10
SR – Slew Rate – V/µs
5
0
–75
TA – Free-Air Temperature – °C
V
= ±15 V
CC±
RL = 2 k CL = 100 pF See Figure 1
125–50 –25 0 25 50 75 100
50
40
30
20
Overshoot Factor – %
10
0
0
Figure 59
OVERSHOOT FACTOR
vs
LOAD CAPACITANCE
V
= ±5 V
CC±
V
= ±15 V
CC±
V
= ±10 mV
I(PP)
RL = 2 k
TA = 25°C
See Figure 1
50 100 150 200 250
CL – Load Capacitance – pF
Figure 60
300
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
47
TL05x, TL05xA, TL05xY
U
it
G
i
B
d
idth
MH
B
ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
100
70
nV/ Hz
50 40
30
20
Vn – Equivalent Input Noise Voltage –
10
10
TL051
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
V
= ±15 V
CC±
RS = 20 TA = 25°C See Figure 3
100 1 k 10 k
f – Frequency – Hz
Figure 61
100 k
100
70
nV/ Hz
50 40
30
20
Vn – Equivalent Input Noise Voltage –
10
10
TL052 AND TL054
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
V
= ±15 V
CC±
RS = 20 TA = 25°C See Figure 3
100 1 k 10 k
f – Frequency – Hz
Figure 62
100 k
TOTAL HARMONIC DISTORTION
FREQUENCY
1
V
= ±15 V
CC±
100
AVD = 1
V
O(RMS)
TA = 25°C
= 6 V
1 k 10 k 100 k
f – Frequency – Hz
0.4
0.1
0.04
0.01
0.004
THD – Total Harmonic Distortion – %
0.001
Figure 63
vs
z
w an
n a
y­n
TL051
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
3.2
3.1
3
2.9 VI = 10 mV
RL = 2 k
2.8
1
2.7
0
2 4 6 8 10 12 14
|V
| – Supply Voltage – V
CC±
CL = 25 pF TA = 25°C
See Figure 4
16
Figure 64
48
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
U
it
G
i
B
d
idth
MH
B
U
it
G
i
B
d
idth
MH
B
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL052
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
3.2
z
3.1
3
w an
n a
2.9
y­n
2.8
1
2.7 4 6 8 10 12 14
|V
|– Supply Voltage – V
CC±
Figure 65
VI = 10 mV RL = 2 k CL = 25 pF TA = 25°C See Figure 4
16
TL054
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
2.9
z
2.8
2.7
w an
n a
2.6
y­n
2.5
1
2.4 0 2 6 8 10 14
412
|V
|– Supply Voltage – V
CC±
Figure 66
VI = 10 mV RL = 2 k CL = 25 pF
TA = 25°C
See Figure 4
16
TL051
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
4
V
= ±15 V
CC±
3
V
= ±5 V
CC±
2
VI = 10 mV
1
– Unity-Gain Bandwidth – MHzB
1
RL = 2 k CL = 25 pF
See Figure 4
0
–75
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
UNITY-GAIN BANDWIDTH
FREE-AIR TEMPERATURE
4
3
2
V
= ±5 V to ±15 V
CC±
VI = 10 mV RL = 2 k
1
– Unity-Gain Bandwidth – MHzB
1
125
CL = 25 pF TA = 25°C See Figure 4
0
–75
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
Figure 67
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL052
vs
Figure 68
125
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
49
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
TL054
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
4
3
2
V
= ±5 V to ±15 V
CC±
VI = 10 mV RL = 2 k
1
– Unity-Gain Bandwidth – MHzB
1
CL = 25 pF TA = 25°C See Figure 4
0
–75
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
125
65°
63°
61°
59°
m
φ – Phase Margin
57°
55°
0
2 4 6 8 10 12 14
|V
CC±
Figure 69
TL051
PHASE MARGIN
vs
SUPPLY VOLTAGE
VI = 10 mV RL = 2 k CL = 25 pF
TA = 25°C See Figure 4
16
| –Supply Voltage – V
Figure 70
TL052
PHASE MARGIN
vs
SUPPLY VOLTAGE
65°
63°
61°
59°
m
φ – Phase Margin
57°
55°
46 8101214
|V
| –Supply Voltage – V
CC±
VI = 10 mV
RL = 2 k
CL = 25 pF TA = 25°C
See Figure 4
Figure 71
16
TL054
PHASE MARGIN
vs
SUPPLY VOLTAGE
65°
63°
61°
59°
m
φ – Phase Margin
57°
55°
048101214
62
|V
| –Supply Voltage – V
CC±
VI = 10 mV RL = 2 k CL = 25 pF
TA = 25°C See Figure 4
Figure 72
16
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
50
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
70°
65°
60°
See Note A
55°
50°
m
φ – Phase Margin
45°
TL051
PHASE MARGIN
vs
LOAD CAPACITANCE
V
CC±
V
= ±5 V
CC±
TYPICAL CHARACTERISTICS
70°
VI = 10 mV RL = 2 k TA = 25°C
See Figure 4
= ±15 V
65°
60°
See Note A
55°
m
φ – Phase Margin
50°
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052
PHASE MARGIN
vs
LOAD CAPACITANCE
V
= ±5 V
CC±
V
CC±
VI = 10 mV RL = 2 k TA = 25°C
See Figure 4
= ±15 V
40°
0
10 20 30 40 50 60 70 80 90
CL – Load Capacitance – pF
Figure 73
70°
65°
60°
See Note A
55°
m
φ – Phase Margin
50°
45°
0
45°
0
100
10 20 30 40 50 60 70 80 90
TL054
PHASE MARGIN
vs
LOAD CAPACITANCE
VI = 10 mV RL = 2 k TA = 25°C
See Figure 4
V
= ±15 V
CC±
V
= ±5 V
CC±
10 20 30 40 50 60 70 80 90
CL – Load Capacitance – pF
CL – Load Capacitance – pF
Figure 74
100
Figure 75
Values of phase margin below a load capacitance of 25 pF were estimated.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
51
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
65°
VI = 10 mV RL = 2 k
CL = 25 pF See Figure 4
63°
61°
59°
m
φ – Phase Margin
57°
55°
–75
–50 –25 0 25 50 75 100
TL051
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
V
= ±15 V
CC±
V
= ±5 V
CC±
TA – Free-Air Temperature –°C
Figure 76
65°
65°
VI = 10 mV RL = 2 k
CL = 25 pF See Figure 4
–75
–50 –25 0 25 50 75 100
125
63°
61°
59°
m
φ – Phase Margin
57°
55°
TL054
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
TL052
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
V
= ±15 V
CC±
V
= ±5 V
CC±
TA – Free-Air Temperature – °C
Figure 77
125
63°
61°
59°
m
φ – Phase Margin
57°
55°
–75
–50 –25 0 25 50 75 100
TA – Free-Air Temperature – °C
V
CC±
V
CC±
= ±5 V
= ±15 V
VI = 10 mV RL = 2 k
CL = 25 pF See Figure 4
125
Figure 78
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
52
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
– Output Voltage – mV
O
V
16
12
–4
–8
–12
–16
VOLTAGE-FOLLOWER
SMALL-SIGNAL
PULSE RESPONSE
8
6
8
4
0
0 0.2 0.4 0.6 0.8 1.0
V
= ±15 V
CC±
RL = 2 k CL = 100 pF TA = 25°C
See Figure 1
t – Time – µs
1.2
4
2
0
–2
– Output Voltage – VV
O
–4
–6
–8
Figure 79
VOLTAGE-FOLLOWER
LARGE-SIGNAL
PULSE RESPONSE
V
= ±15 V
CC±
RL = 2 k CL = 100 pF TA = 25°C
See Figure 1
0 1 2 3 4 5
t – Time – µs
Figure 80
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
53
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
output characteristics
All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance. The TL05x and TL05xA drive higher capacitive loads; however, as the load capacitance increases, the resulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value of the load capacitance at which oscillation occurs varies with production lots. If an application appears to be sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate the problem. Capacitive loads of 1000 pF and larger may be driven if enough resistance is added in series with the output (see Figure 81 and Figure 82).
(a) CL = 100 pF, R = 0 (b) CL = 300 pF, R = 0 (c) CL = 350 pF, R = 0
(d) CL = 1000 pF, R = 0
(e) CL 1000 pF, R = 50
(f) CL = 1000 pF, R = 2 k
Figure 81. Effect of Capacitive Loads
15 V
5 V
– 5 V
+
– 15 V
(see Note A)
R
C
L
2 k
V
O
54
NOTE A: CL includes fixture capacitance.
Figure 82. Test Circuit for Output Characteristics
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
input characteristics
The TL05x and TL05xA are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction.
Because of the extremely high input impedance and resulting low bias current requirements, the TL05x and TL05xA are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceed bias current requirements and cause degradation in system performance. It is good practice to include guard rings around inputs (see Figure 83). These guards should be driven from a low-impedance source at the same voltage level as the common-mode input.
Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.
V
I
(a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER (c) UNITY-GAIN AMPLIFIER
+ –
V
O
V
I
V
+
O
V
I
+
Figure 83. Use of Guard Rings
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage differential amplifier. The low input bias current requirements of the TL05x and TL05xA result in a very low current noise. This feature makes the devices especially favorable over bipolar devices when using values of circuit impedance greater than 50 kΩ.
V
O
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55
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
phase meter
The phase meter in Figure 84 produces an output voltage of 10 mV per degree of phase delay between the two input signals VA and VB. The reference signal VA must be the same frequency as VB. The TLC3702 comparators (U1) convert these two input sine waves into ±5-V square waves. Then R1 and R4 provide level shifting prior to the SN74HC109 dual J-K flip flops.
Flip-flop U2B is connected as a toggle flip-flop and generates a square wave at half the frequency of V Flip-flop U2A also produces a square wave at half the input frequency . The pulse duration of U2A varies from zero to half the period, where zero corresponds to zero phase delay between V
and VB and half the period
A
corresponds to VB lagging VA by 360 degrees. The output pulse from U2A causes the TLC4066 (U3) switch to charge the TL05x (U4) integrator capacitors C1
and C2. As the phase delay approaches 360 degrees, the output of U4A approximates a square wave and U2A has an output of almost 2.5 V. U4B acts as a noninverting amplifier with a gain of 1.44 in order to scale the 0- to 2.5-V integrator output to a 0- to 3.6-V output range.
R8 and R10 provide output gain and zero-level calibration. This circuit operates over a 100-Hz to 10-kHz frequency range.
+ 5 V
R2
100 k
V
A
U1A
R1
100 k
1J
S
U2A
C1
1K
R
U3
NC
+ 5 V
10 k
R5
R6
10 k
R7
10 k
C1
0.016 µF
C2
0.016 µF
+
U4A
+
U4B V
R9
20 k
.
B
O
R3
100 k
R4
100 k
V
B
U1B
NOTE A: U1 = TLC3702; V
56
U2 = SN74HC109 U3 = TLC4066 U4, U5 = TL05x; V
CC±
CC±
S
2J
C1
2K
R
= ±5 V
= ±5 V
U2B
NC
Figure 84. Phase Meter
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Gain
R8 50 k
+ 5 V
R10 10 k
Zero
– 5 V
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
precision constant-current source over temperature
A precision current source (see Figure 85) benefits from the high input impedance and stability of Texas Instruments enhanced-JFET process. A low-current shunt regulator maintains 2.5 V between the inverting input and the output of the TL05x. The negative feedback then forces 2.5 V across the current setting resistor R; therefore, the current to the load is simply 2.5 V divided by R.
Possible choices for the shunt regulator include the LT1004, LT1009, and LM385. If the regulator’s cathode connects to the operational amplifier output, this circuit sources load current. Similarly , if the cathode connects to the inverting input, the circuit sinks current from the load. T o minimize output current change with temperature, R should be a metal film resistor with a low temperature coefficient. Also, this circuit must be operated with split-voltage supplies.
150 pF
150 pF
100 k
I
O
Load
V = 0 to 10 V
(a) SOURCE CURRENT LOAD (b) SINK CURRENT LOAD
NOTE B: U1 = 1/2 TL05x
U2 = LM385, LT1004, or LT1009 voltage reference
2.5 V
I =
, R = Low temperature coefficient metal film resistor
R
U2
+ 15 V
U1
+
– 15 V
R
V = 0 to –10 V
100 k
Load
I
I
Figure 85. Precision Constant-Current Source
U2
+ 15 V
U1 +
– 15 V
R
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TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
instrumentation amplifier with adjustable gain/null
The instrumentation amplifier in Figure 86 benefits greatly from the high input impedance and stable input offset voltage of the TL05xA. Amplifiers U1A, U1B, and U2A form the actual instrumentation amplifier, while U2B provides offset null. Potentiometer R1 provides gain adjust. With R1 = 2 kΩ, the circuit gain equals 100, while with R1 = 200 kΩ, the circuit gain equals two. The following equation shows the instrumentation amplifier gain as a function of R1:
R2
)
R1
R3
Ǔ
equals zero, VO can
I
+1)
A
V
Readjusting the offset null is necessary whenever the circuit gain is changed. If U2B is needed for another application, R7 can be terminated at ground. The low input offset voltage of the TL05xA minimizes the dc error of the circuit. For best matching, all resistors should be one percent tolerance. The matching between R4, R5, R6, and R7 controls the CMRR of this application.
The following equation shows the output voltages when the input voltage equals zero. This dc error can be nulled by adjusting the offset null potentiometer; however , any change in offset voltage over time or temperature also creates an error. To calculate the error from changes in offset, consider the three offset components in the equation as delta offsets rather than initial offsets. The improved stability of T exas Instruments enhanced JFETs minimizes the error resulting from change in input offset voltage with time. Assuming V be shown as a function of the offset voltage:
ǒ
VO+
200 k
10 turn
AV = 2 to 100
–V
V
IO1
V
2 k
V
IO2
I–
I+
1
+
)
ǒ
U1A
U1B
+
R5
R3
Ǔ
R1
R7
)
100 k
R2
10 M
10 M
R3
100 k
ǒ
ƪ
R3
ƪ
R1
R1
ǒ
R7
R5
R7
)
ǒ
Ǔ
1
10 k
R5
10 k
R7
)
R4
Ǔ
R6 R4
ǒ
Ǔ
1
)
)
U2A
+
R7
10 k
R6
10 k
R6 R4
R6 R4
Ǔ
)
ǒ
1
)
U2B
R1
R2 R1
ǒ
Ǔ
+
0.1 µF
Ǔ
ƫ
R4
ƫ
)
Offset Null
1
)
82 k
1 k 82 k
R6 R4
Ǔ
ǒ
V
IO3
V
O
V
CC+
R6
R2
58
NOTE A: U1 and U2 = TL05xA; V
= ± 15 V.
CC±
Figure 86. Instrumentation Amplifier
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
V
CC–
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
high input impedance log amplifier
The low input offset voltage and high input impedance of the TL05xA creates a precision log amplifier (see Figure 87). IC1 is a 2.5-V, low-current precision, shunt regulator. Transistors Q1 and Q2 must be a closely matched NPN pair. For best performance over temperature, R4 should be a metal film resistor with a low temperature coefficient.
In this circuit, U1A serves as a high-impedance unity-gain buffer. Amplifier U1B converts the input voltage to a current through R1 and Q1. Amplifier U1C, IC1, and R4 form a 1-µA temperature-stable current source that sets the base-emitter voltage of Q2. U1D amplifies the difference between the base-emitter voltage of Q1 and Q2 (see Figure 88). The output voltage is given by the following equation:
kT
ƫ
R1
10 k
ȱ
In
ȧ
q
ǒ
R1 1 10
Ȳ
–15V
R6
VO+
ƪ
1
)
R5
+ U1A
_
V
I
NOTE A: U1A through U1D = TL05xA. IC1 = LM385, LT1004, or LT1009 voltage reference.
V
I
Q1 Q2
2N2484
R2
15 V
+ U1B
_
10 k
R3
270 k
ȳ
where k
ȧ
–6
Ǔ
and T is in degrees kelvin.
ȴ
R4
2.5 M
+ U1C
_
C1
150 pF
IC1
+
1.38 10
10 k
R5
Figure 87. Log Amplifier
–0.1
–0.15
–23
,q+1.602 10
+ U1D
_
R6
10 k
–19
V
O
(see equation above)
,
–0.2
–0.25
–0.3
–0.35
– Differential Voltage Amplification – dB
VD
A
–0.4
0123456
f – Frequency – Hz
78910
Figure 88. Output Voltage vs Input Voltage for Log Amplifier
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
59
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
analog thermometer
By combining a current source that does not vary over temperature with an instrumentation amplifier, a precise analog thermometer can be built (see Figure 89). Amplifier U1A and IC1 establish a constant current through the temperature-sensing diode D1. For this section of the circuit to operate correctly , the TL05x must use split supplies and R3 must be a metal-film resistor with a low temperature coefficient.
The temperature-sensitive voltage from the diode is compared to a temperature-stable voltage reference set by IC2. R4 should be adjusted to provide the correct output voltage when the diode is at a known temperature. Although this potentiometer resistance varies with temperature, the divider ratio of the potentiometer remains constant.
Amplifiers U1B, U2A, and U2B form the instrumentation amplifier that converts the difference between the diode and reference voltage to a voltage proportional to the temperature. With switch S1 closed, the amplifier gain equals 5 and the output voltage is proportional to temperature in degrees Celsius. With S1 open, the amplifier gain is 9 and the output is proportional to temperature in degrees Fahrenheit. Every time that S1 is changed, R4 must be recalibrated. By setting S1 correctly, the output voltage equals 10 mV per degree (C or F).
IC1
R1
100 k
D1
(see Note A)
C1
150 pF
U1A
+
R3
+15 V
10 k (see Note B)
+
U1B
R6
10 k
R5
5 k
S1 (see Note C)
R9 R12
10 k 10 k
R7 5 k
+15 V
U2B
+
–15 V
V
O
(see Note D)
100 k
R2
IC2
NOTES: A. T emperature-sensing diode (–2 mV/°C)
B. Metal-film resistor (low temperature coefficient) C. Switch open for °F and closed for °C D. VO α temperature; 10 mV/°C or 10 mV/°F E. U1, U2 = TL05x. IC1, IC2 = LM385, LT1004, or LT1009 voltage reference
R4 50 k
Figure 89. Analog Thermometer
R8
10 k
U2A
+
R10
10 k
R11 10 k
60
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
voltage-ratio-to-dB converter
The application in Figure 90 measures the amplitude ratio of two signals and then converts the ratio to decibels (see Figure 91). The output voltage provides a resolution of 100 mV/dB. The two inputs can be either dc or sinusoidal ac signals. When using ac signals, both signals should be the same frequency or output glitches will occur. For measuring two input signals of different frequencies, extra filtering should be added after the rectifiers.
The circuit contains three low-offset TL05xA devices. Two of these devices provide the rectification and logarithmic conversion of the inputs. The third TL05xA forms an instrumentation amplifier. The stage performing the logarithmic conversion also requires two well-matched npn transistors.
The input signal first passes through a high impedance unity-gain buffer U1A (U2A). Then U1B (U2B) rectifies the input signal at a gain of 0.5, and U1C (U2C) provides a noninverting gain of 2 so that the system gain is still one. U1D (U2D), R6 (R13), and Q1 (Q2) perform the logarithmic conversion of the rectified input signal. The instrumentation amplifier formed by U3A, U3B, U3D scales the difference of the two logarithmic voltages by a gain of 33.6. As a result, the output voltage equals 100 mV/dB. The 1-k potentiometer on the input of U3C calibrates the zero dB reference level. The following equations are used to derive the relationship between the input voltage ratio expressed in decibels and the output voltage.
In (10)
Ǔ
B
V
BE(Q2)
kT
q
–19
Ǔǒ
A
ƫ
ƪ
ƫ
, and T is in kelvins.
InǒV
+
A
Ǔ
S
ȱ
20
ȧ Ȳ
–InǒV
ƫ
+
V
A
ƪ
XdB+20 log
XdB+8.686ƪInǒV
V
BE(Q1)
D
VBE+
XdB
where
k+1.38 10
This would give a resolution of 1 V/dB. Therefore, the gain of the instrumentation amplifier is set at 33.6 to obtain 100 mV/dB.
kT
+
In
q
V
BE(Q1)–VBE(Q2)
8.686
+
kTńq
–23
ƫ
V
B
V
A
ƪ
R I
ƪ
V
BE(Q1)–VBE(Q2)
,q+1.602 10
V
+
InǒV
+
336ƪV
Ǔ
ȳ
B
ȧ ȴ
kT
q
Ǔ
A
V
In
ƪ
R I
–InǒV
BE(Q1)–VBE(Q2)
B
ƫ
S
Ǔ
ƫ
B
ƫ
at 25°C
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
R2
V
V
+
A
U1A
_
+
B
U2A
_
R1
20 k
R8
20 k
10 k
+ U1B
_
10 k
+ U2B
_
R9
D1
R3
30 k
D2
R10
30 k
+
U1C
_
R5
10 k
R4 10 k
+ U2C
_
10 k
R11 10 k
R6
10 k
R13
10 k
R12
+ U1D
_
+ U2D
_
2N2484
2N2484
10 k
R7
10 k
R14
82 k
82 k
1 k
Q2
15 V
–15 V
Q1
16.3 k
16.3 k
+ U3A
_
R16
R76
+ U3B
_
C1
+
U3C
_
R18
10 k
R19
10 k
R20
10 k
+
U3D
_
R21 10 k
V
O
NOTE A: U1A through U3D = TL05xA, V
– Output Voltage – V
O
V
Figure 91. Output Voltage vs the Ratio of the Input Voltages for Voltage-to-dB Converter
= ±15 V. D1 and D2 = 1N914.
CC±
Figure 90. Voltage-Ratio-to-dB Converter
2
1
0
–1
–2
0123456
Ratio – VA/V
78910
B
62
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
macromodel information
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
Macromodel information provided was derived using Microsim with Microsim
PSpice
. The Boyle macromodel (see Note 5) and subcircuit Figure 92 are generated using the
Parts
, the model generation software used
TL05x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
Maximum positive output voltage swing
D
Maximum negative output voltage swing
D
Slew rate
D
Quiescent power dissipation
D
Input bias current
D
Open-loop voltage amplification
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”,
Journal of Solid-State Circuits,
V
CC+
RP
2
IN –
DP
IN+
3
V
CC–
.SUBCKT TL05x 1 2 3 4 5
C1 11 12 3.988E–12 C2 6 7 15.00E–12 DC 5 53 DX DE 54 5 DX DLP 90 91 DX DLN 92 90 DX DP 43DX EGND 99 0 POLY (2) (3,0) (4,0) 0 .5 .5 FB 7 99 POLY (5) VB VC VE VLP + VLN 0 2.875E6 –3E6 3E6 3E6 –3E6 GA 6 0 11 12 292.2E–6 GCM 0 6 10 99 6.542E–9 ISS 3 10 DC 300.0E–6 HLIM 90 0 VLIM 1K J1 11 2 10 JX J2 12 1 10 JX R2 6 9 100.0E3
SC-9, 353 (1974).
3
RSS ISS
10
J1 J2
11
RD1
VAD
+ –
12
C1
RD2
60
4
VE
+
VC
DC
54
+
DE
R2
53
6
9
GCM
D
Unity-gain frequency
D
Common-mode rejection ratio
D
Phase margin
D
DC output resistance
D
AC output resistance
D
Short-circuit output current limit
99
EGND
+
+
FB
VB
C2
GA
RD1 4 11 3.422E3 RD2 4 12 3.422E3 R01 8 5 125 R02 7 99 125 RP 3 4 11.11E3 RSS 10 99 666.7E6 VB 9 0 DC 0 VC 3 53 DC 3 VE 54 4 DC 3.7 VLIM 7 8 DC 0 VLP 91 0 DC 28 VLN 0 92 DC 28 .MODEL DX D (IS=800.0E–18) .MODEL JX PJF (IS=15.00E–12 BETA=185.2E–6 + VTO=–.1) .ENDS
7
VLIM
RO2
HLIM
8
5
OUT
90
+
RO1
+
DLP
91
+
DLN
92
+
IEEE
VLNVLP
Figure 92. Boyle Macromodel and Subcircuit
PSpice
and
Parts
are trademarks of MicroSim Corporation.
Macromodels, simulation models, or other models provided by TI, directly or indirectly, are not warranted by TI as fully representing all of the specification and operating characteristics of the semiconductor product to which the model relates.
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TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
64
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
CERTAIN APPLICA TIONS USING SEMICONDUCT OR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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