Direct Upgrades to TL07x and TL08x BiFET
Operational Amplifiers
D
Faster Slew Rate (20 V/µs Typ) Without
Increased Power Consumption
description
The TL05x series of JFET-input operational amplifiers of fers improved dc and ac characteristics over the TL07x
and TL08x families of BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision
grades as low as 1.5 mV (TL051A) for greater accuracy in dc-coupled applications. T exas Instruments improved
BiFET process and optimized designs also yield improved bandwidth and slew rate without increased power
consumption. The TL05x devices are pin-compatible with the TL07x and TL08x and can be used to upgrade
existing circuits or for optimal performance in new designs.
BiFET operational amplifiers offer the inherently higher input impedance of the JFET -input transistors, without
sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with
high-impedance sensors or very low-level ac signals. They also feature inherently better ac response than
bipolar or CMOS devices having comparable power consumption.
The TL05x family was designed to offer higher precision and better ac response than the TL08x with the low
noise floor of the TL07x. Designers requiring significantly faster ac response or ensured lower noise should
consider the Excalibur TLE208x and TLE207x families of BiFET operational amplifiers.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
D
On-Chip Offset Voltage Trimming for
Improved DC Performance and Precision
Grades Are Available (1.5 mV, TL051A)
D
Available in TSSOP for Small Form-Factor
Designs
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
0°C to 70°C
–40°C to 85°C
–55°C to 125°C
†
The D packages are available taped and reeled. Add R suffix to device type (e.g., TL054CDR).
‡
Chip forms are tested at 25°C.
VIOmax
AT 25°C
800 µV
1.5 mV
4 mVTL054CD———TL054CN—
800 µV
1.5 mV
4 mVTL054ID——TL054IN—
800 µV
1.5 mV
4 mVTL054MDTL054MFKTL054MJ—TL054MN—
SMALL
OUTLINE
(D)
TL051ACD
TL052ACD
TL051CD
TL052CD
TL054ACD
TL051AID
TL052AID
TL051ID
TL052ID
TL054AID
TL051AMD
TL052AMD
TL051MD
TL052MD
TL054AMD
†
CARRIER
TL051AMFK
TL052AMFK
TL051MFK
TL052MFK
TL054AMFK
CHIP
(FK)
————
———TL054ACN
————
———TL054AIN
CERAMIC
DIP
(J)
—
TL054AMJ
CERAMIC
DIP
(JG)
TL051AMJG
TL052AMJG
TL051MJG
TL052MJG
PLASTIC
DIP
(N)
—
TL054AMN
PLASTIC
DIP
(P)
TL051ACP
TL052ACP
TL051CP
TL052CP
TL051AIP
TL052AIP
TL051IP
TL052IP
TL051AMP
TL052AMP
TL051MP
TL052MP
FORM
(Y)
TL051Y
TL052Y
TL054Y
—
—
‡
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to
observe common-mode input voltage limits and output swing when operating from a single supply . DC biasing
of the input signal is required and loads should be terminated to a virtual-ground node at midsupply. Texas
Instruments TLE2426 integrated virtual ground generator is useful when operating BiFET amplifiers from single
supplies.
The TL05x are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply systems,
Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When moving
from BiFET to CMOS amplifiers, particular attention should be paid to the slew rate and bandwidth
requirements, and also the output loading.
D, JG, OR P PACKAGE
TL051
(TOP VIEW)
D, JG, OR P PACKAGE
TL052
(TOP VIEW)
TL054
D, J, OR N PACKAGE
(TOP VIEW)
OFFSET N1
IN–
IN+
V
CC–
NC
IN–
NC
IN+
NC
1
2
3
4
TL051
FK PACKAGE
(TOP VIEW)
NC
OFFSET N1
NC
3 2 1 20 19
4
5
6
7
8
910111213
NC
NC
CC –
V
NC
8
V
7
CC+
OUT
6
OFFSET N2
5
NC
NC
18
17
16
15
14
NC
NC
V
CC+
NC
OUT
NC
NC
1IN –
NC
1IN+
NC
1OUT
1IN–
1IN+
V
CC –
3212019
4
5
6
7
8
NC
NC
8
7
6
5
CC +
V
2IN +
V
2OUT
2IN–
2IN+
NC
18
17
16
15
14
NC
1
2
3
4
TL052
FK PACKAGE
(TOP VIEW)
NC
1OUT
910111213
NC
CC –
V
CC+
NC
2OUT
NC
2IN –
NC
1IN+
V
CC+
2IN+
1OUT
1IN–
1IN+
V
CC+
2IN+
2IN–
2OUT
NC
NC
14
1
13
2
12
3
11
4
10
5
6
7
FK PACKAGE
3212019
4
5
6
7
8
910111213
9
8
TL054
(TOP VIEW)
1IN –
1OUT
NC
NC
2IN –
2OUT
3OUT
4OUT
4IN–
4IN+
V
CC–
3IN+
3IN–
3OUT
4IN –
4OUT
18
17
16
15
14
3IN –
4IN+
NC
V
CC–
NC
3IN+
NC – No internal connection
2
OFFSET N2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
symbol (each amplifier)
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
IN–
IN+
equivalent schematic (each amplifier)
Q2
Q3
IN+
IN–
JF1JF2
Q4
Q1
See Note A
OFFSET N1
OFFSET N2
R1
R2R3
Q5
–
+
Q6
Q7
D1
C1
R4
OUT
Q8
V
CC+
Q10
Q11
R5
R6
Q9
Q12
R8
Q13
R7
R9
Q14
R10D2
Q17
Q15
Q16
JF3
OUT
NOTE A: OFFSET N1 and OFFSET N2 are only available on the TL051x.
This chip, when properly assembled, displays characteristics similar to the TL051. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
(6)(7)
(3)
IN+
(2)
IN–
OFFSET N1
OFFSET N2
(1)
(5)
CC+
(7)
+
–
V
(6)
(4)
CC–
OUT
63
(1)
(2)
43
(5)
(3)
(4)
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052Y chip information
This chip, when properly assembled, displays characteristics similar to the TL052. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(7)
(6)
(5)
1IN+
1IN–
2OUT
(3)
(2)
(7)
(8)
+
–
V
CC–
(4)
(1)
1OUT
(5)
+
–
(6)
2IN+
2IN–
72
(8)
(1)
66
(2)
(4)
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
This chip, when properly assembled, displays characteristics similar to the TL054C. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. These chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
+
+
V
–
–
(11)
CC–
CC+
(4)
(1)
(5)
+
(6)
–
(8)
(12)
+
(13)
–
(2)
(3)
(1)
(14)
(13)
(12)
1IN+
1IN–
2OUT
3IN+
3IN–
4OUT
(3)
(2)
(7)
(10)
(9)
(14)
1OUT
2IN+
2IN–
3OUT
4IN+
4IN–
122
(4)
(5)
(6)
(7)(8)
(6)
(7)
71
(8)
(9)
(11)
(10)
(9)
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF THE CHIP.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
UNIT
C
V
V
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Lead temperature 1,6 mm (1/16inch) from case for 10 seconds: D, N, or P package 260°C. . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16inch) from case for 60 seconds: J or JG package 300°C. . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
TL051C and TL051AC electrical characteristics at specified free-air temperature
TL051C, TL051AC
PARAMETERTEST CONDITIONS
p
= 0,
O
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
†
Full range is 0°C to 70°C.
‡
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TL051C and TL051AC operating characteristics at specified free-air temperature
TL051C, TL051AC
PARAMETERTEST CONDITIONS
SR+
SR–
t
r
t
f
n
V
N(PP)
I
n
THD
B
1
φ
m
†
Full range is 0°C to 70°C.
‡
For V
CC±
§
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
¶
For V
CC±
ve slew rate
§
‡
‡
= ±1 V; for V
I(PP)
at unity gain
egative slew rate
at unity gain
Rise time
Fall time
Overshoot factor
Equivalent input noise
voltage
Peak-to-peak equivalent
input noise voltage
Equivalent input
noise current
Total harmonic distortion
Unity-gain bandwidth
Phase margin at unity
= ±5 V, V
= ±5 V, VOrms = 1 V; for V
R
= 2 kΩ,C
See Figure 1
V
= ±10 mV ,
I(PP)
RL = 2 kΩ,
See Figures 1 and 2
RS = 20 Ω,
See Figure 3
f = 1 kHz25°C0.010.01
RS = 1 kΩ,
¶
f = 1 kHz
VI = 10 mV,RL = 2 kΩ,
VI = 10 mV,RL = 2 kΩ,
CC±
CC±
p
=
p
= 25 F,
= 25 F,
p
= ±15 V, V
= ±15 V, VOrms = 6 V.
= 100 pF,
,
f = 10 Hz25°C7575
f = 1 kHz25°C181830
f = 10 Hz to
10 kHz
RL = 2 kΩ,
= ±5 V.
I(PP)
T
A
25°C161320
Full
range
25°C151318
Full
range
25°C5556
0°C5455
70°C6363
25°C5557
0°C5456
70°C6264
25°C24%19%
0°C24%19%
70°C24%19%
25°C44µV
25°C0.003%0.003%
25°C33.1
0°C3.23.3
70°C2.72.8
25°C59°62°
0°C58°62°
70°C59°62°
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
16.41122.6
161119.3
CC±
= ±15 V
UNIT
n
pA/√Hz
MHz
z
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
9
TL05x, TL05xA, TL05xY
†
A
TL051I
VIOInput offset voltage
mV
TL051AI
V
0
R
S
Ω
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
kΩ
V
V
R
kΩ
R
kΩ
V
g
V
R
kΩ
L
diff
l
¶
voltage am lification
¶
,
C
V
IC
V
ICR
min,
rejection ratio
S
V
ratio (∆V
CC±
/∆VIO)
R
S
Ω
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051I and TL051AI electrical characteristics at specified free-air temperature
TL051I, TL051AI
PARAMETERTEST CONDITIONS
p
,
=
O
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
†
Full range is –40°C to 85°C
‡
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TL051I and TL051AI operating characteristics at specified free-air temperature
TL051I, TL051AI
PARAMETERTEST CONDITIONS
SR+
SR–
t
r
t
f
n
V
N(PP)
I
n
THDTotal harmonic distortion
B
1
φ
m
†
Full range is –40°C to 85°C.
‡
For V
CC±
§
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
¶
For V
CC±
ve slew rate
§
‡
‡
= ±1 V; for V
I(PP)
at unity gain
egative slew rate
at unity gain
Rise time
Fall time
Overshoot factor
Equivalent input noise
voltage
Peak-to-peak equivalent
input noise voltage
Equivalent input
noise current
Unity-gain bandwidth
Phase margin at unity
= ±5 V, V
= ±5 V, VOrms = 1 V; for V
R
= 2 kΩ,C
See Figure 1
V
= ±10 mV ,
I(PP)
RL = 2 kΩ,
See Fi
RS = 20 Ω,
See Figure 3
f = 1 kHz25°C0.010.01pA/√Hz
RS = 1 kΩ,
¶
f = 1 kHz
VI = 10 mV,RL = 2 kΩ,
VI = 10 mV,RL = 2 kΩ,
CC±
CC±
p
=
ures 1 and 2
p
= 25 F,
= 25 F,
p
= ±15 V, V
= ±15 V, VOrms = 6 V.
= 100 pF,
,
f = 10 Hz25°C7575
f = 1 kHz25°C181830
f = 10 Hz to
10 kHz
RL = 2 kΩ,
= ±5 V.
I(PP)
T
A
25°C161320
Full
range
25°C151318
Full
range
25°C5556
–40°C5253
85°C6465
25°C5557
–40°C5153
85°C6465
25°C24%19%
–40°C24%19%
85°C24%19%
25°C44µV
25°C0.003%0.003%
25°C33.1
–40°C3.53.6
85°C2.62.7
25°C59°62°
–40°C58°61°
85°C59°62°
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
11
11
CC±
= ±15 V
UNIT
n
MHz
z
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
11
TL05x, TL05xA, TL05xY
†
A
TL051M
VIOInput offset voltage
mV
TL051AM
V
0
R
S
Ω
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
kΩ
V
V
R
kΩ
R
kΩ
V
g
V
R
kΩ
L
diff
l
§
voltage am lification
§
,
C
V
IC
V
ICR
min,
rejection ratio
S
ratio (∆V
CC±
/∆VIO)
CCyO
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL051M and TL051AM electrical characteristics at specified free-air temperature
TL051M, TL051AM
PARAMETERTEST CONDITIONS
p
,
=
O
α
A
r
i
c
CMRR
k
I
CC
†
Full range is –55°C to 125°C.
‡
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TL051M and TL051AM operating characteristics at specified free-air temperature
TL051M, TL051AM
V
PARAMETERTEST CONDITIONS
Positive slew rate
+
at unity gain
Negative slew rate
–
at unity gain
t
r
t
f
V
I
n
THD
B
φ
m
†
For V
‡
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing
on testing or nontesting of other parameters.
§
For V
Positive slew rate at unity gain
Negative slew rate at unity gain
Rise time
Fall time
Overshoot factor
n
N(PP)
1
CC±
CC±
ent input noise voltage
Peak-to-peak equivalent input
noise voltage
Equivalent input noise current f = 1 kHz0.010.01pA/√Hz
Unity-gain bandwidth
Phase margin at unity gain
= ±5 V, V
= ±5 V, VOrms = 1 V; for V
= ±1 V; for V
I(PP)
†
†
§
= ±15 V, V
CC±
= ±15 V, VOrms = 6 V.
CC±
= 25°C
A
R
= 2 kΩ,C
See Figure 1
V
= ±10 mV ,
I(PP)
RL = 2 kΩ,
=
p
=
See Figures 1 and 2
RS = 20 Ω,
See Figure 3
RS = 1 kΩ,RL = 2 kΩ,
f = 1 kHz
VI = 10 mV,RL = 2 kΩ,
CL = 25 pF,See Figure 4
VI = 10 mV,RL = 2 kΩ,
CL = 25 pF,See Figure 4
I(PP)
= 100 pF,
,
f = 10 Hz7575
f = 1 kHz1818
f = 10 Hz to
10 kHz
= ±5 V.
TL051Y
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
1620
1518
5556
5557
24%19%
44µV
0.003%0.003%
33.1MHz
59°62°
CC±
= ±15 V
UNIT
n
z
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
15
TL05x, TL05xA, TL05xY
A
TL052C
VIOInput offset voltage
mV
TL052AC
V
IC
R
S
Ω
TL052C
8
8
V/°C
TL052AC
8625
IIOInput offset current
O
,
V
0
IIBInput bias current
O
,
V
0
V
V
R
kΩ
V
V
R
kΩ
R
10 kΩ
V
g
V
R
kΩ
¶
voltage am lification
¶
C
V
V
rejection ratio
V
O
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052C and TL052AC electrical characteristics at specified free-air temperature
TL052C, TL052AC
PARAMETERTEST CONDITIONS
p
VO = 0,
= 0,
= 50 Ω
50
R
α
A
r
c
CMRR
†
‡
§
¶
Temperature coefficient
VIO
of input offset voltage
Input offset voltage longterm drift
Common-mode input
ICR
voltage range
Maximum positive peak
OM+
output voltage swing
Maximum negative peak
OM–
output voltage swing
Large-signal differential
VD
Input resistance25°C
i
Input capacitance25°C1012pF
i
Full range is 0°C to 70°C.
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
For V
CC±
§
p
p
p
ommon-mode
= ±5 V, VO = ±2.3 V; at V
‡
VO = 0,
RS = 50 Ω
V
= 0,
See Figure 5
V
= 0,
See Figure 5
= 10
L
= 2
L
=
L
= 2
L
RL = 2 kΩ
=
IC
= 0,
CC±
min,
ICR
=
= ±15 V, VO = ±10 V.
VIC = 0,25°C0.040.04µV/mo
,
=
IC
,
=
IC
RS = 50 Ω
†
T
A
25°C0.733.50.651.5
Full range4.52.5
25°C0.512.80.40.8
Full range3.81.8
25°C to
70°C
25°C to
70°C
25°C41005100pA
70°C
25°C2020030200pA
70°C
25°C
Full range
25°C34.21313.9
Full range313
25°C2.53.811.512.7
Full range2.511.5
25°C–2.5–3.5–12 –13.2
Full range–2.5–12
25°C–2.3–3.2–11–12
Full range–2.3–11
25°C255950105
0°C306560129
70°C20463085
25°C65857593
0°C
70°C65847591
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
0.0210.0251nA
0.1540.24nA
–1
–2.3
to
to
4
5.6
–1
to
4
12
10
65847592
–11
11
–11
11
to
to
CC±
= ±15 V
–12.3
to
15.6
12
10
UNIT
µ
V/mV
Ω
dB
°
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
A
ratio (∆V
CC ±
/∆VIO)
(two am lifiers)
A
SR +Slew rate at unity gain
V/µs
SR
g
ns
()
C
L
100 F
g
g
V
q
V/√H
C
L
See Figure 4
Ph
V
R
gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052C and TL052AC electrical characteristics at specified free-air temperature (continued)
TL052C, TL052AC
k
SVR
I
CC
VO1/V
PARAMETERTEST CONDITIONS
Supply-voltage rejection
Supply current
p
Crosstalk attenuationAVD = 10025°C120120dB
O2
VO = 0,RS = 50 Ω
VO = 0,No load
T
A
25°C75997599
0°C
70°C75977597
25°C4.65.64.85.6
0°C
70°C4.46.44.66.4
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
75987598
4.76.44.86.4
CC±
= ±15 V
TL052C and TL052AC operating characteristics at specified free-air temperature
TL052C, TL052AC
PARAMETERTEST CONDITIONS
RL = 2 kΩ,CL = 100 pF,
Negative slew rate
–
at unity gain
t
r
t
f
V
I
n
THDT otal harmonic distortion
B
φ
†
Full range is 0°C to 70°C.
‡
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
¶
For V
Rise time
Fall time
Overshoot factor
Equivalent input noise
n
voltage
Peak-to-peak equivalent
N(PP)
input noise current
Equivalent input
noise current
Unity-gain bandwidth
1
m
ase margin at unity
= ±5 V, V
CC±
= ±5 V, V
CC±
§
‡
= ±1 V; for V
I(PP)
O(RMS)
= 1 V; for V
See Figure 1
V
= ±10 mV,
I(PP)
RL = 2 kΩ,
See Fi
RS = 20 Ω,
See Figure 3
f = 1 kHz25°C0.010.01pA/√Hz
RS = 1 kΩ,
¶
f = 1 kHz
VI = 10 mV,
CC±
=
ures 1 and 2
= 25 F,
p
= 10 mV,
I
= 25 F,
=
p
= ±15 V, V
= ±15 V, V
CC±
p
,
f = 10 Hz25°C7171
f = 1 kHz25°C191930
10 Hz t
f =
10 kHz
RL = 2 kΩ,
RL = 2 kΩ,
= 2 kΩ,
L
= ±5 V.
I(PP)
= 6 V.
O(RMS)
†
T
A
25°C17.8920.7
Full range
25°C15.4917.8
Full range8
25°C5556
0°C5455
70°C6363
25°C5557
0°C5456
70°C6264
25°C24%19%
0°C24%19%
70°C24%19%
25°C44µV
25°C0.003%0.003%
25°C33
0°C3.23.2
70°C2.62.7
25°C60°63°
0°C59°63°
70°C60°63°
V
= ± 5 VV
CC±
MINTYPMAXMINTYPMAX
CC±
8
= ± 15 V
UNIT
dB
mA
UNIT
n
MHz
z
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
17
TL05x, TL05xA, TL05xY
A
TL052I
VIOInput offset voltage
mV
V
TL052AI
V
IC
T
ffici
‡
V/°C
IIOInput offset current
O
,
IC
,
IIBInput bias current
O
,
IC
,
V
V
R
kΩ
V
V
R
2 kΩ
R
kΩ
V
g
V
R
kΩ
¶
voltage am lification
¶
C
V
V
rejection ratio
V
O
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052I and TL052AI electrical characteristics at specified free-air temperature
TL052I, TL052AI
PARAMETERTEST CONDITIONS
p
= 0,
O
=
= 0,
RS = 50 Ω
α
VIO
ICR
OM+
OM–
A
VD
r
i
c
i
CMRR
†
Full range is –40°C to 85°C.
‡
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
TL052I and TL052AI electrical characteristics at specified free-air temperature (continued)
TL052I, TL052AI
k
SVR
I
CC
VO1/V
PARAMETERTEST CONDITIONS
Supply-voltage rejection
Supply current
p
Crosstalk attenuationAVD = 10025°C120120dB
O2
VO = 0,RS = 50 Ω
VO = 0,No load
T
A
25°C75997599
–40°C
85°C75997599
25°C4.65.64.85.6
–40°C
85°C4.46.44.66.4
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
75987598
4.56.44.76.4
CC±
= ±15 V
TL052I and TL052AI operating characteristics at specified free-air temperature
TL052I, TL052AI
PARAMETERTEST CONDITIONS
+
ew rate at unity gain
Negative slew rate at
–
unity gain
t
r
t
f
V
I
n
THDT otal harmonic distortion
B
φ
†
Full range is –40°C to 85°C.
‡
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
¶
For V
Rise time
Fall time
Overshoot factor
Equivalent input noise
n
voltage
Peak-to-peak equivalent
N(PP)
input noise current
Equivalent input noise
current
Unity-gain bandwidth
1
m
CC±
CC±
‡
§
ase margin at unity
= ±5 V, V
= ±5 V, V
= ±1 V; for V
I(PP)
O(RMS)
R
= 2 kΩ,C
See Figure 1
=
=
RL = 2 kΩ,CL = 100 pF,
See Figures 1 and 2
RS = 20 Ω,
See Figure 3
f = 1 kHz25°C0.010.01pA/√Hz
RS = 1 kΩ,
¶
f = 1 kHz
VI = 10 mV,
= 25 F,
p
= 10 mV,
I
= 25 F,
=
p
= ±15 V, V
CC±
= 1 V; for V
CC±
= ±15 V, V
= 100 pF,
,
f = 10 Hz25°C7171
f = 1 kHz25°C191930
10 Hz to
f =
10 kHz
RL = 2 kΩ,
RL = 2 kΩ,
= 2 kΩ,
L
= ±5 V.
I(PP)
= 6 V.
O(RMS)
†
T
A
25°C17.8920.7
Full range8
25°C15.4917.8
Full range8
25°C5556
–40°C5253
85°C6465
25°C5557
–40°C5153
85°C6465
25°C24%19%
–40°C24%19%
85°C24%19%
25°C44µV
25°C0.003%0.003%
25°C33
–40°C3.53.6
85°C2.52.6
25°C60°63°
–40°C58°61°
85°C60°63°
V
= ± 5 VV
CC±
MINTYPMAXMINTYPMAX
CC±
= ± 15 V
UNIT
dB
mA
UNIT
MHz
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
19
TL05x, TL05xA, TL05xY
A
TL052M
VIOInput offset voltage
mV
V
TL052AM
V
IC
R
S
Ω
TL052M
10
9
α
VIO
µV/°C
IIOInput offset current
O
IC
IIBInput bias current
O
V
V
R
kΩ
V
V
R
kΩ
R
kΩ
V
g
V
R
kΩ
L
diff
l
§
voltage am lification
§
,
C
V
IC
V
ICR
min,
rejection ratio
S
ratio (∆V
CC±
/∆VIO)
S
t
(two am lifiers)
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052M and TL052AM electrical characteristics at specified free-air temperature
TL052M, TL052AM
PARAMETERTEST CONDITIONS
p
= 0,
O
= 0,
= 50 Ω
50
Temperature coefficient
of input offset voltage
Input offset voltage longterm drift
ICR
OM+
OM–
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
VO1/V
†
Full range is – 55°C to 125°C.
‡
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
Common-mode input
voltage range
Maximum positive peak
output voltage swing
Maximum negative peak
output voltage swing
Input resistance25°C
Input capacitance25°C1012pF
Crosstalk attenuationAVD = 10025°C120120dB
O2
= ± 5 V, VO = ± 2.3 V; at V
CC±
‡
p
p
arge-signal
ommon-mode
upply-voltage rejection
upply curren
erentia
p
p
R
VO = 0,
RS = 50 Ω
VO = 0,VIC = 0,
See Figure 5
VO = 0,
See Figure 5
= 10
L
= 2
L
= 10
L
= 2
L
RL = 2 kΩ
V
= V
min
VO = 0,
RS = 50 Ω
VO = 0,RS = 50 Ω
VO = 0,No load
= ±15 V, VO = ±10 V.
CC±
TL052AM
VIC = 0,
VIC = 0,
†
T
A
25°C0.733.50.651.5
Full range6.54.5
25°C0.512.80.40.8
Full range5.83.8
25°C to
125°C
25°C to
125°C
25°C0.040.04µV/mo
25°C41005100pA
125°C120220nA
25°C2020030200pA
125°C10502050nA
25°C
Full range
25°C34.21313.9
Full range313
25°C2.53.811.512.7
Full range2.511.5
25°C–2.5–3.5–12 –13.2
Full range –2.5–12
25°C–2.3–3.2–11–12
Full range –2.3–11
25°C255950105
–55°C307660149
125°C10321549
25°C65857593
–55°C65837592
125°C65847594
25°C75997599
–55°C
125°C7510075100
25°C4.65.64.85.6
–55°C
125°C4.26.44.46.4
V
= ± 5 VV
CC±
MINTYP MAXMINTYP MAX
98
–1
–2.3
to
to
4
5.6
–1
to
4
12
10
75987598
4.46.44.56.4
–11
11
–11
11
CC±
to
to
= ± 15 V
–12.3
to
15.6
12
10
UNIT
V/mV
Ω
dB
dB
mA
°
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
A
SR
C
100 pF
See
V/µs
SR
g
See Figure 1
ns
()
C
L
100 F
g
g
V
q
V/√H
R
S
C
L
See Figure 4
gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052M and TL052AM operating characteristics at specified free-air temperature
TL052M, TL052AM
PARAMETERTEST CONDITIONS
Positive slew rate
+
at unity gain
Negative slew rate
–
at unity gain
t
r
t
f
n
V
N(PP)
I
n
THD
B
1
φ
m
†
Full range is – 55°C to 125°C.
‡
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
¶
For V
Rise time
Fall time
Overshoot factor
Equivalent input noise
voltage
Peak-to-peak
equivalent input noise
current
Equivalent input
noise current
Total harmonic
distortion
Unity-gain bandwidth
Phase margin at unity
= ±5 V, V
CC±
= ±5 V, V
CC±
§
¶
‡
‡
= ±1 V; for V
I(PP)
O(RMS)
RL = 2 kΩ,
=
L
V
I(PP)
RL = 2 kΩ,
=
See Fi
= 20 Ω,
See Figure 3
f = 1 kHz25°C0.010.01pA/√Hz
RS = 1 kΩ,
f = 1 kHz
VI = 10 mV,
= 25 F,
VI = 10 mV,pRL = 2 kΩ,
= 25 F,
CC±
= 1 V; for V
p
Figure 1
= ± 10 mV,
p
ures 1 and 2
p
= ±15 V, V
= ±15 V, V
CC±
,
,
f =10 Hz25°C7171
f =1 kHz25°C1919
10 Hz
f =
RL = 2 kΩ,
RL = 2 kΩ,
I(PP)
10 kHz
= ±5 V.
O(RMS)
to
= 6 V.
†
T
A
25°C17.8920.7
Full range8
25°C15.4917.8
Full range8
25°C5556
–55°C5152
125°C6868
25°C5557
–55°C5152
125°C6869
25°C24%19%
–55°C25%19%
125°C25%19%
25°C44µV
25°C0.003%0.003%
25°C33
–55°C3.63.7
125°C2.32.4
25°C60°63°
–55°C57°61°
125°C60°63°
V
= ± 5 VV
CC±
MINTYPMAXMINTYPMAX
CC±
= ± 15 V
UNIT
n
MHz
z
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
21
TL05x, TL05xA, TL05xY
V
V
V
V
g
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL052Y electrical characteristics, TA = 25°C
PARAMETERTEST CONDITIONS
V
IO
I
IO
I
IB
V
ICR
OM+
OM–
A
VD
r
i
c
i
CMRRCommon-mode rejection ratio
k
SVR
I
CC
VO1/V
†
For V
Input offset voltage
Input offset voltage long-term
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
‡
For V
§
For V
Positive slew rate at
unity gain
Negative slew rate at
unity gain
Rise time
Fall time
Overshoot factor
Equivalent input noise
n
voltage
Peak-to-peak equivalent input
N(PP)
noise current
Equivalent input noise
current
Total harmonic distortion
Unity-gain bandwidth
1
Phase margin at unity gain
m
CC±
CC±
†
†
‡
= ±5 V, V
= ±5 V, V
= ±1 V; for V
I(PP)
O(RMS)
§
= 1 V; for V
R
= 2 kΩ,C
See Figure 1
=
=
RL = 2 kΩ,CL = 100 pF,
See Figures 1 and 2
RS = 20 Ω,
See Figure 3
f = 1 kHz0.010.01pA/√Hz
RS = 1 kΩ,
f = 1 kHz
VI = 10 mV,
CL = 25 pF,
VI = 10 mV,
CL = 25 pF,
= ±15 V, V
CC±
= ±15 V, V
CC±
= 100 pF,
,
f = 10 Hz7171
f = 1 kHz1919
f = 10 Hz to 10 kHz44µV
RL = 2 kΩ,
RL = 2 kΩ,
See Figure 4
RL = 2 kΩ,
See Figure 4
= ±5 V.
I(PP)
O(RMS)
= 6 V.
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
17.820.7
15.417.8
5556
5557
24%19%
0.003%0.003%
33
60°63°
CC±
= ±15 V
UNIT
n
MHz
z
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
23
TL05x, TL05xA, TL05xY
†
TL054C
VIOInput offset voltage
mV
TL054AC
V
O
R
S
Ω
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
10 kΩ
V
V
R
kΩ
R
kΩ
V
g
V
R
2 kΩ
L
diff
l
voltage am lification
§
C
V
V
rejection ratio
V
O
R
S
Ω
S
V
ratio (∆V
CC±
/∆VIO)
V
O
R
S
Ω
S
t
(four am lifiers)
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054C and TL054AC electrical characteristics at specified free-air temperature
TL054C, TL054AC
PARAMETERTEST CONDITIONS
p
= 0,
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
VO1/VO2Crosstalk attenuationAVD = 10025°C120120dB
†
Full range is 0°C to 70°C.
‡
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TL054C and TL054AC operating characteristics at specified free-air temperature
TL054C, TL054C
PARAMETERTEST CONDITIONS
Positive slew rate
+
at unity gain
RL = 2 kΩ,CL = 100 pF,
Negative slew rate at
–
unity gain
t
r
t
f
n
V
N(PP)
I
n
THD
B
1
φ
m
†
Full range is 0°C to 70°C.
‡
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
¶
For V
Rise time0°C5455
Fall time
Overshoot factor0°C24%19%
Equivalent input noise
voltage
Peak-to-peak equivalent
input noise voltage
Equivalent input
noise current
Total harmonic
distortion
Unity-gain bandwidth
= ±5 V, V
CC±
= ±5 V, V
CC±
‡
§
¶
= ±1 V; for V
I(PP)
) = 1 V; for V
o(rms
See Figure 1 and Note 7
V
= ±10 mV ,
I(PP)
= 2 kΩ,
L
p
=
See Fi
RS = 20 Ω,
See Figure 3
f = 1 kHz25°C0.010.01
RS = 1 kΩ,
f = 1 kHz
= 10 mV,
I
= 25 F,
= 10 mV,
I
= 25 F,
=
CC±
CC±
,
ures 1 and 2
p
p
= ±15 V, V
= ±15 V, V
f = 10 Hz25°C7575
f = 1 kHz25°C212145
f = 10 Hz to
10 kHz
RL = 2 kΩ,
= 2 kΩ,
L
= 2 kΩ,
L
= ±5 V.
I(PP)
= 6 V.
o(rms)
T
A
25°C15.41017.8
0°C15.7817.9
70°C14.4817.5
25°C13.91015.9
0°C14.3816.1
70°C13.3815.5
25°C5556
70°C6363
25°C5557
0°C5456
70°C6264
25°C24%19%
70°C24%19%
25°C44µV
25°C0.003%0.003%
25°C2.72.7
0°C33MHz
70°C2.42.4
25°C61°64°
0°C60°64°
70°C61°63°
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
CC±
= ±15 V
UNIT
pA/√Hz
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
25
TL05x, TL05xA, TL05xY
†
A
TL054I
VIOIn ut offset voltage
mV
TL054AI
V
O
R
S
Ω
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
10 kΩ
V
V
R
kΩ
R
kΩ
V
g
V
R
2 kΩ
L
diff
l
voltage am lification
§
C
V
V
rejection ratio
V
O
R
S
Ω
S
V
5 V t
ratio (∆V
CC±
/∆VIO)
V
O
R
S
Ω
S
t
(four am lifiers)
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054I and TL054AI electrical characteristics at specified free-air temperature
TL054I, TL054AI
PARAMETERTEST CONDITIONS
p
= 0,
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
VO1/VO2Crosstalk attenuationAVD = 10025°C120120dB
†
Full range is –40°C to 85°C.
‡
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
TL054I and TL054AI operating characteristics at specified free-air temperature
TL054I, TL054AI
PARAMETERTEST CONDITIONS
Positive slew rate
+
at unity gain
RL = 2 kΩ,CL = 100 pF,
Negative slew rate at
–
unity gain
t
r
t
f
n
V
N(PP)
I
n
THD
B
1
φ
m
†
Full range is –40°C to 85°C.
‡
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
¶
For V
Rise time–40°C5253
Fall time
Overshoot factor–40°C24%19%
Equivalent input noise
voltage
Peak-to-peak equivalent
input noise voltage
Equivalent input
noise current
Total harmonic distortion
Unity-gain bandwidth
= ±5 V, V
CC±
= ±5 V, V
CC±
‡
§
= ±1 V; for V
I(PP)
) = 1 V; for V
o(rms
See Figure 1
V
= ±10 mV, R
CL = 100 pF,
See Figures 1 and 2
RS = 20 Ω,
See Figure 3
f = 1 kHz25°C0.010.01pA/√Hz
RS = 1 kΩ,
¶
f = 1 kHz
= 10 mV,
I
= 25 F,
p
=
I
=
p
= 25 F,
= ±15 V, V
CC±
= ±15 V, V
CC±
= 2 kΩ
2
f = 10 Hz25°C7575
f = 1 kHz25°C212145
f = 10 Hz to
10 kHz
RL = 2 kΩ,
= 2 kΩ,
L
=
L
= ±5 V.
I(PP)
= 6 V.
o(rms)
T
A
25°C15.41017.8
–40°C16.4818
85°C14817.3
25°C13.91015.9
–40°C14.7816.1
85°C13815.3
25°C5556
85°C6465
25°C5557
–40°C5153
85°C6465
25°C24%19%
85°C24%19%
25°C44µV
25°C0.003%0.003%
25°C2.72.7
–40°C3.33.3MHz
85°C2.32.4
25°C61°64°
,
–40°C59°62°
85°C61°64°
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
= ±15 VUNIT
CC±
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
27
TL05x, TL05xA, TL05xY
†
A
TL054M
VIOInput offset voltage
mV
TL054AM
V
O
R
S
Ω
V/°C
IIOInput offset current
OIC
IIBInput bias current
OIC
V
V
R
kΩ
V
V
R
kΩ
R
kΩ
V
g
V
R
kΩ
L
diff
l
voltage am lification
§
C
ICICR
,
rejection ratio
S
CC±
,
ratio (∆V
CC±
/∆VIO)
S
t
(four am lifiers)
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054M and TL054AM electrical characteristics at specified free-air temperature
TL054M, TL054AM
PARAMETERTEST CONDITIONS
p
= 0,
α
VIO
ICR
OM +
OM –
A
VD
r
i
c
i
CMRR
k
SVR
I
CC
VO1/VO2Crosstalk attenuationAVD = 10025°C120120dB
†
Full range is –55°C to 125°C.
‡
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
Temperature coefficient of
input offset voltage
Input offset voltage
long-term drift
p
p
Common-mode input
voltage range
Maximum positive peak
output voltage swing
Maximum negative peak
output voltage swing
arge-signal
Input resistance25°C
Input capacitance25°C1012pF
ommon-mode
upply-voltage rejection
upply curren
= ±5 V, VO = ±2.3 V, at V
CC±
‡
erentia
p
p
VIC = 0,
= 50 Ω
50
R
VO = 0,VIC = 0,
See Figure 5
VO = 0, VIC = 0,
See Figure 5
= 10
L
= 2
L
= 10
L
= 2
L
RL = 2 kΩ–55°C309960209V/mV
V
= V
VO = 0,
RS = 50 Ω
V
VO = 0,
RS = 50 Ω
VO = 0,No load–55°C7.812.88.112.8mA
= ±15 V, VO = ±10 V.
CC±
TL054M
TL054AM
min,
= ±5 V to ±15 V,
T
A
25°C0.645.50.564
Full range10.59
25°C0.573.50.51.5
Full range8.56.5
25°C to
85°C
25°C to
85°C
25°C0.040.04µV/mo
25°C41005100pA
125°C120220nA
25°C2020030200pA
125°C10502050nA
25°C
Full range
25°C34.21313.9
Full range313
25°C2.53.811.512.7
Full range2.511.5
25°C–2.5–3.5–12 –13.2
Full range–2.5–12
25°C–2.3–3.2–11–12
Full range–2.3–11
25°C257250133
125°C10351535
25°C65847592
–55°C65837592dB
125°C65847593
25°C75997599
–40°C75987598dB
85°C7510075100
25°C8.111.28.411.2
125°C7.111.27.511.2
V
= ±5 VV
CC±
MINTYPMAXMINTYPMAX
2120
2120
–1
–2.3
to
to
4
5.6
–1
to
4
12
10
= ±15 VUNIT
CC±
–11
–12.3
to
11
–11
to
11
15.6
10
to
12
µ
Ω
°
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
†
A
SR
LL
V/µs
SR
unity gain
‡
ns
R
2 kΩ
C
L
100 F
g
SeeFigures1and2
V
q
nV/√Hz
V
R
C
L
See Figure 4
Phase margin at
V
10 mV,R
2 kΩ
unity gain
C
L
See Figure 4
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TL054M and TL054AM operating characteristics at specified free-air temperature
TL054M, TL054AM
PARAMETERTEST CONDITIONS
Positive slew rate
+
at unity gain
Negative slew rate at
–
t
r
t
f
n
V
N(PP)
I
n
THDTotal harmonic distortion
B
1
φ
m
†
Full range is –55°C to 125°C.
‡
For V
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
¶
For V
Rise time–55°C5152
Fall time
Overshoot factor–55°C25%19%
Equivalent input noise
§
voltage
Peak-to-peak equivalent
input noise voltage
Equivalent input
noise current
Unity-gain bandwidth
= ±5 V, V
CC±
= ±5 V, Vorms = 1 V; for V
CC±
= ±1 V; for V
I(PP)
RL = 2 kΩ,CL = 100 pF,
See Figure 1
V
= ±10 mV ,
I(PP)
,
=
L
p
=
See Fi
RS = 20 Ω,
See Figure 3
f = 1 kHz25°C0.010.01pA/√Hz
RS = 1 kΩ,
¶
f = 1 kHz
= 10 mV,
I
= 25 F,
=
I
=
= 25 F,
CC±
CC±
,
ures 1 and 2
f = 10 Hz25°C7575
f = 1 kHz25°C212145
f = 10 Hz to
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing
or nontesting of other parameters.
represent the median (50% point) of device
parametric performance.
pApA
V
CC–
input bias and offset current
At the picoamp-bias-current level typical of the
TL05x and TL05xA, accurate measurement of the
Figure 5. Input-Bias and Offset-Current Test Circuit
bias current becomes difficult. Not only does this
measurement require a picoammeter, but test
socket leakages can easily exceed the actualdevice bias currents. T o accurately measure these small currents,
Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias
voltages applied but with no device in the socket. The device is then inserted in the socket, and a second test
that measures both the socket leakage and the device input bias current is performed. The two measurements
are then subtracted algebraically to determine the bias current of the device.
noise
Because of the increasing emphasis on low noise levels in many of today’s applications, the input noise voltage
density is sample tested at f = 1 kHz. Texas Instruments also has additional noise testing capability to meet
specific application requirements. Please contact the factory for details.
O
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
IO
α
VIO
I
IB
I
IO
V
IC
V
O
V
OM
V
O(PP)
A
VD
CMRRCommon-mode rejection ratio
z
o
k
SVR
I
OS
I
CC
SRSlew rate
V
n
THDTotal harmonic distortionvs Frequency63
B
1
φ
m
Input offset voltageDistribution6 – 11
Temperature coefficient of input offset voltageDistribution12, 13, 14
Input bias current
Input offset currentvs Free-air temperature16
Common-mode input voltage range limits
Output voltagevs Differential input voltage19, 20
Maximum peak output voltage
Maximum peak-to-peak output voltagevs Frequency22, 23, 24
All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance.
The TL05x and TL05xA drive higher capacitive loads; however, as the load capacitance increases, the resulting
response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value of
the load capacitance at which oscillation occurs varies with production lots. If an application appears to be
sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate
the problem. Capacitive loads of 1000 pF and larger may be driven if enough resistance is added in series with
the output (see Figure 81 and Figure 82).
(a) CL = 100 pF, R = 0(b) CL = 300 pF, R = 0(c) CL = 350 pF, R = 0
(d) CL = 1000 pF, R = 0
(e) CL 1000 pF, R = 50 Ω
(f) CL = 1000 pF, R = 2 kΩ
Figure 81. Effect of Capacitive Loads
15 V
5 V
– 5 V
–
+
– 15 V
(see Note A)
R
C
L
2 kΩ
V
O
54
NOTE A: CL includes fixture capacitance.
Figure 82. Test Circuit for Output Characteristics
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
input characteristics
The TL05x and TL05xA are specified with a minimum and a maximum input voltage that, if exceeded at either
input, could cause the device to malfunction.
Because of the extremely high input impedance and resulting low bias current requirements, the TL05x and
TL05xA are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and
sockets can easily exceed bias current requirements and cause degradation in system performance. It is good
practice to include guard rings around inputs (see Figure 83). These guards should be driven from a
low-impedance source at the same voltage level as the common-mode input.
Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage
differential amplifier. The low input bias current requirements of the TL05x and TL05xA result in a very low
current noise. This feature makes the devices especially favorable over bipolar devices when using values of
circuit impedance greater than 50 kΩ.
The phase meter in Figure 84 produces an output voltage of 10 mV per degree of phase delay between the two
input signals VA and VB. The reference signal VA must be the same frequency as VB. The TLC3702 comparators
(U1) convert these two input sine waves into ±5-V square waves. Then R1 and R4 provide level shifting prior
to the SN74HC109 dual J-K flip flops.
Flip-flop U2B is connected as a toggle flip-flop and generates a square wave at half the frequency of V
Flip-flop U2A also produces a square wave at half the input frequency . The pulse duration of U2A varies from
zero to half the period, where zero corresponds to zero phase delay between V
and VB and half the period
A
corresponds to VB lagging VA by 360 degrees.
The output pulse from U2A causes the TLC4066 (U3) switch to charge the TL05x (U4) integrator capacitors C1
and C2. As the phase delay approaches 360 degrees, the output of U4A approximates a square wave and U2A
has an output of almost 2.5 V. U4B acts as a noninverting amplifier with a gain of 1.44 in order to scale the
0- to 2.5-V integrator output to a 0- to 3.6-V output range.
R8 and R10 provide output gain and zero-level calibration. This circuit operates over a 100-Hz to 10-kHz
frequency range.
+ 5 V
R2
100 kΩ
V
A
U1A
R1
100 kΩ
1J
S
U2A
C1
1K
R
U3
NC
+ 5 V
10 kΩ
R5
R6
10 kΩ
R7
10 kΩ
C1
0.016 µF
C2
0.016 µF
+
U4A
–
+
U4BV
–
R9
20 kΩ
.
B
O
R3
100 kΩ
R4
100 kΩ
V
B
U1B
NOTE A: U1 = TLC3702; V
56
U2 = SN74HC109
U3 = TLC4066
U4, U5 = TL05x; V
CC±
CC±
S
2J
C1
2K
R
= ±5 V
= ±5 V
U2B
NC
Figure 84. Phase Meter
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Gain
R8
50 kΩ
+ 5 V
R10
10 kΩ
Zero
– 5 V
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
precision constant-current source over temperature
A precision current source (see Figure 85) benefits from the high input impedance and stability of Texas
Instruments enhanced-JFET process. A low-current shunt regulator maintains 2.5 V between the inverting input
and the output of the TL05x. The negative feedback then forces 2.5 V across the current setting resistor R;
therefore, the current to the load is simply 2.5 V divided by R.
Possible choices for the shunt regulator include the LT1004, LT1009, and LM385. If the regulator’s cathode
connects to the operational amplifier output, this circuit sources load current. Similarly , if the cathode connects
to the inverting input, the circuit sinks current from the load. T o minimize output current change with temperature,
R should be a metal film resistor with a low temperature coefficient. Also, this circuit must be operated with
split-voltage supplies.
150 pF
150 pF
100 kΩ
I
O
Load
V = 0 to 10 V
(a) SOURCE CURRENT LOAD(b) SINK CURRENT LOAD
NOTE B: U1 = 1/2 TL05x
U2 = LM385, LT1004, or LT1009 voltage reference
2.5 V
I =
, R = Low temperature coefficient metal film resistor
instrumentation amplifier with adjustable gain/null
The instrumentation amplifier in Figure 86 benefits greatly from the high input impedance and stable input offset
voltage of the TL05xA. Amplifiers U1A, U1B, and U2A form the actual instrumentation amplifier, while U2B
provides offset null. Potentiometer R1 provides gain adjust. With R1 = 2 kΩ, the circuit gain equals 100, while
with R1 = 200 kΩ, the circuit gain equals two. The following equation shows the instrumentation amplifier gain
as a function of R1:
R2
)
R1
R3
Ǔ
equals zero, VO can
I
+1)
A
V
Readjusting the offset null is necessary whenever the circuit gain is changed. If U2B is needed for another
application, R7 can be terminated at ground. The low input offset voltage of the TL05xA minimizes the dc error
of the circuit. For best matching, all resistors should be one percent tolerance. The matching between R4, R5,
R6, and R7 controls the CMRR of this application.
The following equation shows the output voltages when the input voltage equals zero. This dc error can be
nulled by adjusting the offset null potentiometer; however , any change in offset voltage over time or temperature
also creates an error. To calculate the error from changes in offset, consider the three offset components in the
equation as delta offsets rather than initial offsets. The improved stability of T exas Instruments enhanced JFETs
minimizes the error resulting from change in input offset voltage with time. Assuming V
be shown as a function of the offset voltage:
ǒ
VO+
200 kΩ
10 turn
AV = 2 to 100
–V
V
IO1
V
2 kΩ
V
IO2
I–
I+
1
+
–
)
ǒ
U1A
–
U1B
+
R5
R3
Ǔ
R1
R7
)
100 kΩ
R2
10 MΩ
10 MΩ
R3
100 kΩ
ǒ
ƪ
R3
ƪ
R1
R1
ǒ
R7
R5
R7
)
ǒ
Ǔ
1
10 kΩ
R5
10 kΩ
R7
)
R4
Ǔ
R6
R4
ǒ
Ǔ
1
)
)
–
U2A
+
R7
10 kΩ
R6
10 kΩ
R6
R4
R6
R4
Ǔ
)
ǒ
1
)
U2B
R1
R2
R1
ǒ
Ǔ
–
+
0.1 µF
Ǔ
ƫ
R4
ƫ
)
Offset Null
1
)
82 kΩ
1 kΩ
82 kΩ
R6
R4
Ǔ
ǒ
V
IO3
V
O
V
CC+
R6
R2
58
NOTE A: U1 and U2 = TL05xA; V
= ± 15 V.
CC±
Figure 86. Instrumentation Amplifier
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
V
CC–
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
high input impedance log amplifier
The low input offset voltage and high input impedance of the TL05xA creates a precision log amplifier (see
Figure 87). IC1 is a 2.5-V, low-current precision, shunt regulator. Transistors Q1 and Q2 must be a closely
matched NPN pair. For best performance over temperature, R4 should be a metal film resistor with a low
temperature coefficient.
In this circuit, U1A serves as a high-impedance unity-gain buffer. Amplifier U1B converts the input voltage to
a current through R1 and Q1. Amplifier U1C, IC1, and R4 form a 1-µA temperature-stable current source that
sets the base-emitter voltage of Q2. U1D amplifies the difference between the base-emitter voltage of Q1 and
Q2 (see Figure 88). The output voltage is given by the following equation:
kT
ƫ
R1
10 kΩ
ȱ
In
ȧ
q
ǒ
R1110
Ȳ
–15V
R6
VO+
ƪ
–
1
)
R5
+
U1A
_
V
I
NOTE A: U1A through U1D = TL05xA. IC1 = LM385, LT1004, or LT1009 voltage reference.
V
I
Q1Q2
2N2484
R2
15 V
+
U1B
_
10 kΩ
R3
270 kΩ
ȳ
where k
ȧ
–6
Ǔ
and T is in degrees kelvin.
ȴ
R4
2.5 MΩ
+
U1C
_
C1
150 pF
IC1
+
1.3810
10 kΩ
R5
Figure 87. Log Amplifier
–0.1
–0.15
–23
,q+1.60210
+
U1D
_
R6
10 kΩ
–19
V
O
(see equation above)
,
–0.2
–0.25
–0.3
–0.35
– Differential Voltage Amplification – dB
VD
A
–0.4
0123456
f – Frequency – Hz
78910
Figure 88. Output Voltage vs Input Voltage for Log Amplifier
By combining a current source that does not vary over temperature with an instrumentation amplifier, a precise
analog thermometer can be built (see Figure 89). Amplifier U1A and IC1 establish a constant current through
the temperature-sensing diode D1. For this section of the circuit to operate correctly , the TL05x must use split
supplies and R3 must be a metal-film resistor with a low temperature coefficient.
The temperature-sensitive voltage from the diode is compared to a temperature-stable voltage reference set
by IC2. R4 should be adjusted to provide the correct output voltage when the diode is at a known temperature.
Although this potentiometer resistance varies with temperature, the divider ratio of the potentiometer remains
constant.
Amplifiers U1B, U2A, and U2B form the instrumentation amplifier that converts the difference between the diode
and reference voltage to a voltage proportional to the temperature. With switch S1 closed, the amplifier gain
equals 5 and the output voltage is proportional to temperature in degrees Celsius. With S1 open, the amplifier
gain is 9 and the output is proportional to temperature in degrees Fahrenheit. Every time that S1 is changed,
R4 must be recalibrated. By setting S1 correctly, the output voltage equals 10 mV per degree (C or F).
IC1
R1
100 kΩ
D1
(see Note A)
C1
150 pF
–
U1A
+
R3
+15 V
10 kΩ
(see Note B)
+
U1B
–
R6
10 kΩ
R5
5 kΩ
S1
(see Note C)
R9R12
10 kΩ10 kΩ
R7
5 kΩ
+15 V
–
U2B
+
–15 V
V
O
(see Note D)
100 kΩ
R2
IC2
NOTES: A. T emperature-sensing diode ≈ (–2 mV/°C)
B. Metal-film resistor (low temperature coefficient)
C. Switch open for °F and closed for °C
D. VO α temperature; 10 mV/°C or 10 mV/°F
E. U1, U2 = TL05x. IC1, IC2 = LM385, LT1004, or LT1009 voltage reference
R4
50 kΩ
Figure 89. Analog Thermometer
R8
10 kΩ
–
U2A
+
R10
10 kΩ
R11
10 kΩ
60
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
voltage-ratio-to-dB converter
The application in Figure 90 measures the amplitude ratio of two signals and then converts the ratio to decibels
(see Figure 91). The output voltage provides a resolution of 100 mV/dB. The two inputs can be either dc or
sinusoidal ac signals. When using ac signals, both signals should be the same frequency or output glitches will
occur. For measuring two input signals of different frequencies, extra filtering should be added after the
rectifiers.
The circuit contains three low-offset TL05xA devices. Two of these devices provide the rectification and
logarithmic conversion of the inputs. The third TL05xA forms an instrumentation amplifier. The stage performing
the logarithmic conversion also requires two well-matched npn transistors.
The input signal first passes through a high impedance unity-gain buffer U1A (U2A). Then U1B (U2B) rectifies
the input signal at a gain of 0.5, and U1C (U2C) provides a noninverting gain of 2 so that the system gain is still
one. U1D (U2D), R6 (R13), and Q1 (Q2) perform the logarithmic conversion of the rectified input signal. The
instrumentation amplifier formed by U3A, U3B, U3D scales the difference of the two logarithmic voltages by a
gain of 33.6. As a result, the output voltage equals 100 mV/dB. The 1-kΩ potentiometer on the input of U3C
calibrates the zero dB reference level. The following equations are used to derive the relationship between the
input voltage ratio expressed in decibels and the output voltage.
In (10)
Ǔ
B
V
BE(Q2)
kT
q
–19
Ǔ–ǒ
A
ƫ
ƪ
ƫ
, and T is in kelvins.
InǒV
+
A
Ǔ
S
ȱ
20
ȧȲ
–InǒV
ƫ
+
V
A
ƪ
XdB+20 log
XdB+8.686ƪInǒV
V
BE(Q1)
D
VBE+
XdB
where
k+1.3810
This would give a resolution of 1 V/dB. Therefore, the gain of the instrumentation amplifier is set at 33.6 to obtain
100 mV/dB.
Figure 91. Output Voltage vs the Ratio of the Input Voltages for Voltage-to-dB Converter
= ±15 V. D1 and D2 = 1N914.
CC±
Figure 90. Voltage-Ratio-to-dB Converter
2
1
0
–1
–2
0123456
Ratio – VA/V
78910
B
62
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
macromodel information
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
APPLICATION INFORMATION
Macromodel information provided was derived using Microsim
with Microsim
PSpice
. The Boyle macromodel (see Note 5) and subcircuit Figure 92 are generated using the
Parts
, the model generation software used
TL05x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations
of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
Maximum positive output voltage swing
D
Maximum negative output voltage swing
D
Slew rate
D
Quiescent power dissipation
D
Input bias current
D
Open-loop voltage amplification
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”,
Macromodels, simulation models, or other models provided by TI,
directly or indirectly, are not warranted by TI as fully representing all
of the specification and operating characteristics of the
semiconductor product to which the model relates.
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICA TIONS USING SEMICONDUCT OR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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